1
Last lot of target-arm changes to squeeze in before rc1:
1
Patches for rc1: nothing major, just some minor bugfixes and
2
* various minor Arm bug fixes
2
code cleanups.
3
* David Carlier's Haiku build portability fixes
4
* Wentong Wu's fixes for icount handling in the nios2 target
5
3
6
The following changes since commit 00ce6c36b35e0eb8cc5d68a28f288a6335848813:
4
-- PMM
7
5
8
Merge remote-tracking branch 'remotes/huth-gitlab/tags/pull-request-2020-07-13' into staging (2020-07-13 13:01:30 +0100)
6
The following changes since commit f7e1914adad8885a5d4c70239ab90d901ed97e9f:
7
8
Merge remote-tracking branch 'remotes/alistair/tags/pull-riscv-to-apply-20201109' into staging (2020-11-10 09:24:56 +0000)
9
9
10
are available in the Git repository at:
10
are available in the Git repository at:
11
11
12
https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20200713
12
https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20201110
13
13
14
for you to fetch changes up to 756f739b1682bf131994ec96dad7fbdf8b54493a:
14
for you to fetch changes up to b6c56c8a9a4064ea783f352f43c5df6231a110fa:
15
15
16
hw/arm/aspeed: Do not create and attach empty SD cards by default (2020-07-13 14:36:12 +0100)
16
target/arm/translate-neon.c: Handle VTBL UNDEF case before VFP access check (2020-11-10 11:03:48 +0000)
17
17
18
----------------------------------------------------------------
18
----------------------------------------------------------------
19
target-arm queue:
19
target-arm queue:
20
* hw/arm/bcm2836: Remove unused 'cpu_type' field
20
* hw/arm/Kconfig: ARM_V7M depends on PTIMER
21
* target/arm: Fix mtedesc for do_mem_zpz
21
* Minor coding style fixes
22
* Add the ability to change the FEC PHY MDIO device number on i.MX25/i.MX6/i.MX7
22
* docs: add some notes on the sbsa-ref machine
23
* target/arm: Don't do raw writes for PMINTENCLR
23
* hw/arm/virt: Remove dependency on Cortex-A15 MPCore peripherals
24
* virtio-iommu: Fix coverity issue in virtio_iommu_handle_command()
24
* target/arm: Fix neon VTBL/VTBX for len > 1
25
* build: Fix various issues with building on Haiku
25
* hw/arm/armsse: Correct expansion MPC interrupt lines
26
* target/nios2: fix wrctl behaviour when using icount
26
* hw/misc/stm32f2xx_syscfg: Remove extraneous IRQ
27
* hw/arm/tosa: Encapsulate misc GPIO handling in a device
27
* hw/arm/nseries: Remove invalid/unnecessary n8x0_uart_setup()
28
* hw/arm/palm.c: Encapsulate misc GPIO handling in a device
28
* hw/arm/musicpal: Don't connect two qemu_irqs directly to the same input
29
* hw/arm/aspeed: Do not create and attach empty SD cards by default
29
* hw/arm/musicpal: Only use qdev_get_gpio_in() when necessary
30
* hw/arm/nseries: Check return value from load_image_targphys()
31
* tests/qtest/npcm7xx_rng-test: count runs properly
32
* target/arm/translate-neon.c: Handle VTBL UNDEF case before VFP access check
30
33
31
----------------------------------------------------------------
34
----------------------------------------------------------------
32
Aaron Lindsay (1):
35
Alex Bennée (1):
33
target/arm: Don't do raw writes for PMINTENCLR
36
docs: add some notes on the sbsa-ref machine
34
37
35
David CARLIER (8):
38
AlexChen (1):
36
build: Enable BSD symbols for Haiku
39
ssi: Fix bad printf format specifiers
37
util/qemu-openpty.c: Don't assume pty.h is glibc-only
38
build: Check that mlockall() exists
39
osdep.h: Always include <sys/signal.h> if it exists
40
osdep.h: For Haiku, define SIGIO as equivalent to SIGPOLL
41
bswap.h: Include <endian.h> on Haiku for bswap operations
42
util/compatfd.c: Only include <sys/syscall.h> if CONFIG_SIGNALFD
43
util/oslib-posix.c: Implement qemu_init_exec_dir() for Haiku
44
40
45
Eric Auger (1):
41
Andrew Jones (1):
46
virtio-iommu: Fix coverity issue in virtio_iommu_handle_command()
42
hw/arm/Kconfig: ARM_V7M depends on PTIMER
47
43
48
Gerd Hoffmann (1):
44
Havard Skinnemoen (1):
49
util/drm: make portable by avoiding struct dirent d_type
45
tests/qtest/npcm7xx_rng-test: count runs properly
50
46
51
Jean-Christophe Dubois (3):
47
Peter Maydell (2):
52
Add the ability to change the FEC PHY MDIO device number on i.MX25 processor
48
hw/arm/nseries: Check return value from load_image_targphys()
53
Add the ability to change the FEC PHY MDIO device number on i.MX6 processor
49
target/arm/translate-neon.c: Handle VTBL UNDEF case before VFP access check
54
Add the ability to change the FEC PHY MDIO devices numbers on i.MX7 processor
55
50
56
Peter Maydell (4):
51
Philippe Mathieu-Daudé (6):
57
hw/arm/tosa.c: Detabify
52
hw/arm/virt: Remove dependency on Cortex-A15 MPCore peripherals
58
hw/arm/tosa: Encapsulate misc GPIO handling in a device
53
hw/arm/armsse: Correct expansion MPC interrupt lines
59
hw/arm/palm.c: Detabify
54
hw/misc/stm32f2xx_syscfg: Remove extraneous IRQ
60
hw/arm/palm.c: Encapsulate misc GPIO handling in a device
55
hw/arm/nseries: Remove invalid/unnecessary n8x0_uart_setup()
61
56
hw/arm/musicpal: Don't connect two qemu_irqs directly to the same input
62
Philippe Mathieu-Daudé (2):
57
hw/arm/musicpal: Only use qdev_get_gpio_in() when necessary
63
hw/arm/bcm2836: Remove unused 'cpu_type' field
64
hw/arm/aspeed: Do not create and attach empty SD cards by default
65
58
66
Richard Henderson (1):
59
Richard Henderson (1):
67
target/arm: Fix mtedesc for do_mem_zpz
60
target/arm: Fix neon VTBL/VTBX for len > 1
68
61
69
Wentong Wu (4):
62
Xinhao Zhang (3):
70
target/nios2: add DISAS_NORETURN case for nothing more to generate
63
target/arm: add spaces around operator
71
target/nios2: in line the semantics of DISAS_UPDATE with other targets
64
target/arm: Don't use '#' flag of printf format
72
target/nios2: Use gen_io_start around wrctl instruction
65
target/arm: add space before the open parenthesis '('
73
hw/nios2: exit to main CPU loop only when unmasking interrupts
74
66
75
configure | 38 ++++++++++++-
67
docs/system/arm/sbsa.rst | 32 ++++++++++++++++++++++
76
include/hw/arm/bcm2836.h | 1 -
68
docs/system/target-arm.rst | 1 +
77
include/hw/arm/fsl-imx25.h | 1 +
69
include/hw/misc/stm32f2xx_syscfg.h | 2 --
78
include/hw/arm/fsl-imx6.h | 1 +
70
target/arm/helper.h | 2 +-
79
include/hw/arm/fsl-imx7.h | 1 +
71
hw/arm/armsse.c | 3 +-
80
include/qemu/bswap.h | 2 +
72
hw/arm/musicpal.c | 40 +++++++++++++++++----------
81
include/qemu/osdep.h | 6 +-
73
hw/arm/nseries.c | 26 ++++++++----------
82
hw/arm/aspeed.c | 9 +--
74
hw/arm/stm32f205_soc.c | 1 -
83
hw/arm/fsl-imx25.c | 7 +++
75
hw/misc/stm32f2xx_syscfg.c | 2 --
84
hw/arm/fsl-imx6.c | 7 +++
76
hw/ssi/imx_spi.c | 2 +-
85
hw/arm/fsl-imx7.c | 9 +++
77
hw/ssi/xilinx_spi.c | 2 +-
86
hw/arm/palm.c | 111 +++++++++++++++++++++++++------------
78
target/arm/arch_dump.c | 8 +++---
87
hw/arm/tosa.c | 132 +++++++++++++++++++++++++++++---------------
79
target/arm/arm-semi.c | 8 +++---
88
hw/nios2/cpu_pic.c | 3 +-
80
target/arm/helper.c | 2 +-
89
hw/virtio/virtio-iommu.c | 1 +
81
target/arm/op_helper.c | 23 +++++++++-------
90
hw/xen/xen-legacy-backend.c | 1 -
82
target/arm/translate-a64.c | 4 +--
91
os-posix.c | 4 ++
83
target/arm/translate.c | 2 +-
92
target/arm/helper.c | 4 +-
84
tests/qtest/npcm7xx_rng-test.c | 2 +-
93
target/arm/translate-sve.c | 2 +-
85
hw/arm/Kconfig | 3 +-
94
target/nios2/translate.c | 12 +++-
86
target/arm/translate-neon.c.inc | 56 ++++++++++++++------------------------
95
util/compatfd.c | 2 +
87
20 files changed, 123 insertions(+), 98 deletions(-)
96
util/drm.c | 19 +++++--
88
create mode 100644 docs/system/arm/sbsa.rst
97
util/oslib-posix.c | 20 ++++++-
98
util/qemu-openpty.c | 2 +-
99
24 files changed, 292 insertions(+), 103 deletions(-)
100
89
diff view generated by jsdifflib
1
From: Eric Auger <eric.auger@redhat.com>
1
From: Andrew Jones <drjones@redhat.com>
2
2
3
Coverity points out (CID 1430180) that the new case is missing
3
commit 32bd322a0134 ("hw/timer/armv7m_systick: Rewrite to use ptimers")
4
break or a /* fallthrough */ comment. Break is the right thing to
4
changed armv7m_systick to build on ptimers. Make sure we have ptimers
5
do as in that case, tail is not used.
5
in the build when building armv7m_systick.
6
6
7
Fixes 1733eebb9e ("virtio-iommu: Implement RESV_MEM probe request")
7
Signed-off-by: Andrew Jones <drjones@redhat.com>
8
Signed-off-by: Eric Auger <eric.auger@redhat.com>
8
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
9
Reported-by: Peter Maydell <peter.maydell@linaro.org>
9
Message-id: 20201104103343.30392-1-drjones@redhat.com
10
Message-id: 20200708160147.18426-1-eric.auger@redhat.com
11
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
12
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
10
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
13
---
11
---
14
hw/virtio/virtio-iommu.c | 1 +
12
hw/arm/Kconfig | 1 +
15
1 file changed, 1 insertion(+)
13
1 file changed, 1 insertion(+)
16
14
17
diff --git a/hw/virtio/virtio-iommu.c b/hw/virtio/virtio-iommu.c
15
diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
18
index XXXXXXX..XXXXXXX 100644
16
index XXXXXXX..XXXXXXX 100644
19
--- a/hw/virtio/virtio-iommu.c
17
--- a/hw/arm/Kconfig
20
+++ b/hw/virtio/virtio-iommu.c
18
+++ b/hw/arm/Kconfig
21
@@ -XXX,XX +XXX,XX @@ static void virtio_iommu_handle_command(VirtIODevice *vdev, VirtQueue *vq)
19
@@ -XXX,XX +XXX,XX @@ config ZYNQ
22
ptail = (struct virtio_iommu_req_tail *)
20
23
(buf + s->config.probe_size);
21
config ARM_V7M
24
ptail->status = virtio_iommu_handle_probe(s, iov, iov_cnt, buf);
22
bool
25
+ break;
23
+ select PTIMER
26
}
24
27
default:
25
config ALLWINNER_A10
28
tail.status = VIRTIO_IOMMU_S_UNSUPP;
26
bool
29
--
27
--
30
2.20.1
28
2.20.1
31
29
32
30
diff view generated by jsdifflib
1
Replace the free-floating set of IRQs and palmte_onoff_gpios()
1
From: AlexChen <alex.chen@huawei.com>
2
function with a simple QOM device that encapsulates this
3
behaviour.
4
2
5
This fixes Coverity issue CID 1421944, which points out that
3
We should use printf format specifier "%u" instead of "%d" for
6
the memory returned by qemu_allocate_irqs() is leaked.
4
argument of type "unsigned int".
7
5
6
Reported-by: Euler Robot <euler.robot@huawei.com>
7
Signed-off-by: Alex Chen <alex.chen@huawei.com>
8
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
9
Message-id: 5FA280F5.8060902@huawei.com
8
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
10
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
9
Reviewed-by: Li Qiang <liq3ea@gmail.com>
10
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
11
Message-id: 20200628214230.2592-3-peter.maydell@linaro.org
12
---
11
---
13
hw/arm/palm.c | 61 +++++++++++++++++++++++++++++++++++++++++++--------
12
hw/ssi/imx_spi.c | 2 +-
14
1 file changed, 52 insertions(+), 9 deletions(-)
13
hw/ssi/xilinx_spi.c | 2 +-
14
2 files changed, 2 insertions(+), 2 deletions(-)
15
15
16
diff --git a/hw/arm/palm.c b/hw/arm/palm.c
16
diff --git a/hw/ssi/imx_spi.c b/hw/ssi/imx_spi.c
17
index XXXXXXX..XXXXXXX 100644
17
index XXXXXXX..XXXXXXX 100644
18
--- a/hw/arm/palm.c
18
--- a/hw/ssi/imx_spi.c
19
+++ b/hw/arm/palm.c
19
+++ b/hw/ssi/imx_spi.c
20
@@ -XXX,XX +XXX,XX @@ static void palmte_button_event(void *opaque, int keycode)
20
@@ -XXX,XX +XXX,XX @@ static const char *imx_spi_reg_name(uint32_t reg)
21
!(keycode & 0x80));
21
case ECSPI_MSGDATA:
22
}
22
return "ECSPI_MSGDATA";
23
23
default:
24
+/*
24
- sprintf(unknown, "%d ?", reg);
25
+ * Encapsulation of some GPIO line behaviour for the Palm board
25
+ sprintf(unknown, "%u ?", reg);
26
+ *
26
return unknown;
27
+ * QEMU interface:
28
+ * + unnamed GPIO inputs 0..6: for the various miscellaneous input lines
29
+ */
30
+
31
+#define TYPE_PALM_MISC_GPIO "palm-misc-gpio"
32
+#define PALM_MISC_GPIO(obj) \
33
+ OBJECT_CHECK(PalmMiscGPIOState, (obj), TYPE_PALM_MISC_GPIO)
34
+
35
+typedef struct PalmMiscGPIOState {
36
+ SysBusDevice parent_obj;
37
+} PalmMiscGPIOState;
38
+
39
static void palmte_onoff_gpios(void *opaque, int line, int level)
40
{
41
switch (line) {
42
@@ -XXX,XX +XXX,XX @@ static void palmte_onoff_gpios(void *opaque, int line, int level)
43
}
27
}
44
}
28
}
45
29
diff --git a/hw/ssi/xilinx_spi.c b/hw/ssi/xilinx_spi.c
46
+static void palm_misc_gpio_init(Object *obj)
30
index XXXXXXX..XXXXXXX 100644
47
+{
31
--- a/hw/ssi/xilinx_spi.c
48
+ DeviceState *dev = DEVICE(obj);
32
+++ b/hw/ssi/xilinx_spi.c
49
+
33
@@ -XXX,XX +XXX,XX @@ static void xlx_spi_update_irq(XilinxSPI *s)
50
+ qdev_init_gpio_in(dev, palmte_onoff_gpios, 7);
34
irq chain unless things really changed. */
51
+}
35
if (pending != s->irqline) {
52
+
36
s->irqline = pending;
53
+static const TypeInfo palm_misc_gpio_info = {
37
- DB_PRINT("irq_change of state %d ISR:%x IER:%X\n",
54
+ .name = TYPE_PALM_MISC_GPIO,
38
+ DB_PRINT("irq_change of state %u ISR:%x IER:%X\n",
55
+ .parent = TYPE_SYS_BUS_DEVICE,
39
pending, s->regs[R_IPISR], s->regs[R_IPIER]);
56
+ .instance_size = sizeof(PalmMiscGPIOState),
40
qemu_set_irq(s->irq, pending);
57
+ .instance_init = palm_misc_gpio_init,
41
}
58
+ /*
59
+ * No class init required: device has no internal state so does not
60
+ * need to set up reset or vmstate, and has no realize method.
61
+ */
62
+};
63
+
64
static void palmte_gpio_setup(struct omap_mpu_state_s *cpu)
65
{
66
- qemu_irq *misc_gpio;
67
+ DeviceState *misc_gpio;
68
+
69
+ misc_gpio = sysbus_create_simple(TYPE_PALM_MISC_GPIO, -1, NULL);
70
71
omap_mmc_handlers(cpu->mmc,
72
qdev_get_gpio_in(cpu->gpio, PALMTE_MMC_WP_GPIO),
73
qemu_irq_invert(omap_mpuio_in_get(cpu->mpuio)
74
[PALMTE_MMC_SWITCH_GPIO]));
75
76
- misc_gpio = qemu_allocate_irqs(palmte_onoff_gpios, cpu, 7);
77
- qdev_connect_gpio_out(cpu->gpio, PALMTE_MMC_POWER_GPIO, misc_gpio[0]);
78
- qdev_connect_gpio_out(cpu->gpio, PALMTE_SPEAKER_GPIO, misc_gpio[1]);
79
- qdev_connect_gpio_out(cpu->gpio, 11, misc_gpio[2]);
80
- qdev_connect_gpio_out(cpu->gpio, 12, misc_gpio[3]);
81
- qdev_connect_gpio_out(cpu->gpio, 13, misc_gpio[4]);
82
- omap_mpuio_out_set(cpu->mpuio, 1, misc_gpio[5]);
83
- omap_mpuio_out_set(cpu->mpuio, 3, misc_gpio[6]);
84
+ qdev_connect_gpio_out(cpu->gpio, PALMTE_MMC_POWER_GPIO,
85
+ qdev_get_gpio_in(misc_gpio, 0));
86
+ qdev_connect_gpio_out(cpu->gpio, PALMTE_SPEAKER_GPIO,
87
+ qdev_get_gpio_in(misc_gpio, 1));
88
+ qdev_connect_gpio_out(cpu->gpio, 11, qdev_get_gpio_in(misc_gpio, 2));
89
+ qdev_connect_gpio_out(cpu->gpio, 12, qdev_get_gpio_in(misc_gpio, 3));
90
+ qdev_connect_gpio_out(cpu->gpio, 13, qdev_get_gpio_in(misc_gpio, 4));
91
+ omap_mpuio_out_set(cpu->mpuio, 1, qdev_get_gpio_in(misc_gpio, 5));
92
+ omap_mpuio_out_set(cpu->mpuio, 3, qdev_get_gpio_in(misc_gpio, 6));
93
94
/* Reset some inputs to initial state. */
95
qemu_irq_lower(qdev_get_gpio_in(cpu->gpio, PALMTE_USBDETECT_GPIO));
96
@@ -XXX,XX +XXX,XX @@ static void palmte_machine_init(MachineClass *mc)
97
}
98
99
DEFINE_MACHINE("cheetah", palmte_machine_init)
100
+
101
+static void palm_register_types(void)
102
+{
103
+ type_register_static(&palm_misc_gpio_info);
104
+}
105
+
106
+type_init(palm_register_types)
107
--
42
--
108
2.20.1
43
2.20.1
109
44
110
45
diff view generated by jsdifflib
1
From: Aaron Lindsay <aaron@os.amperecomputing.com>
1
From: Xinhao Zhang <zhangxinhao1@huawei.com>
2
2
3
Raw writes to this register when in KVM mode can cause interrupts to be
3
Fix code style. Operator needs spaces both sides.
4
raised (even when the PMU is disabled). Because the underlying state is
5
already aliased to PMINTENSET (which already provides raw write
6
functions), we can safely disable raw accesses to PMINTENCLR entirely.
7
4
8
Signed-off-by: Aaron Lindsay <aaron@os.amperecomputing.com>
5
Signed-off-by: Xinhao Zhang <zhangxinhao1@huawei.com>
9
Message-id: 20200707152616.1917154-1-aaron@os.amperecomputing.com
6
Signed-off-by: Kai Deng <dengkai1@huawei.com>
7
Message-id: 20201103114529.638233-1-zhangxinhao1@huawei.com
10
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
8
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
11
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
9
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
12
---
10
---
13
target/arm/helper.c | 4 ++--
11
target/arm/arch_dump.c | 8 ++++----
14
1 file changed, 2 insertions(+), 2 deletions(-)
12
target/arm/arm-semi.c | 8 ++++----
13
target/arm/helper.c | 2 +-
14
3 files changed, 9 insertions(+), 9 deletions(-)
15
15
16
diff --git a/target/arm/arch_dump.c b/target/arm/arch_dump.c
17
index XXXXXXX..XXXXXXX 100644
18
--- a/target/arm/arch_dump.c
19
+++ b/target/arm/arch_dump.c
20
@@ -XXX,XX +XXX,XX @@ static int aarch64_write_elf64_prfpreg(WriteCoreDumpFunction f,
21
22
for (i = 0; i < 32; ++i) {
23
uint64_t *q = aa64_vfp_qreg(env, i);
24
- note.vfp.vregs[2*i + 0] = cpu_to_dump64(s, q[0]);
25
- note.vfp.vregs[2*i + 1] = cpu_to_dump64(s, q[1]);
26
+ note.vfp.vregs[2 * i + 0] = cpu_to_dump64(s, q[0]);
27
+ note.vfp.vregs[2 * i + 1] = cpu_to_dump64(s, q[1]);
28
}
29
30
if (s->dump_info.d_endian == ELFDATA2MSB) {
31
@@ -XXX,XX +XXX,XX @@ static int aarch64_write_elf64_prfpreg(WriteCoreDumpFunction f,
32
*/
33
for (i = 0; i < 32; ++i) {
34
uint64_t tmp = note.vfp.vregs[2*i];
35
- note.vfp.vregs[2*i] = note.vfp.vregs[2*i+1];
36
- note.vfp.vregs[2*i+1] = tmp;
37
+ note.vfp.vregs[2 * i] = note.vfp.vregs[2 * i + 1];
38
+ note.vfp.vregs[2 * i + 1] = tmp;
39
}
40
}
41
42
diff --git a/target/arm/arm-semi.c b/target/arm/arm-semi.c
43
index XXXXXXX..XXXXXXX 100644
44
--- a/target/arm/arm-semi.c
45
+++ b/target/arm/arm-semi.c
46
@@ -XXX,XX +XXX,XX @@ target_ulong do_arm_semihosting(CPUARMState *env)
47
if (use_gdb_syscalls()) {
48
arm_semi_open_guestfd = guestfd;
49
ret = arm_gdb_syscall(cpu, arm_semi_open_cb, "open,%s,%x,1a4", arg0,
50
- (int)arg2+1, gdb_open_modeflags[arg1]);
51
+ (int)arg2 + 1, gdb_open_modeflags[arg1]);
52
} else {
53
ret = set_swi_errno(env, open(s, open_modeflags[arg1], 0644));
54
if (ret == (uint32_t)-1) {
55
@@ -XXX,XX +XXX,XX @@ target_ulong do_arm_semihosting(CPUARMState *env)
56
GET_ARG(1);
57
if (use_gdb_syscalls()) {
58
ret = arm_gdb_syscall(cpu, arm_semi_cb, "unlink,%s",
59
- arg0, (int)arg1+1);
60
+ arg0, (int)arg1 + 1);
61
} else {
62
s = lock_user_string(arg0);
63
if (!s) {
64
@@ -XXX,XX +XXX,XX @@ target_ulong do_arm_semihosting(CPUARMState *env)
65
GET_ARG(3);
66
if (use_gdb_syscalls()) {
67
return arm_gdb_syscall(cpu, arm_semi_cb, "rename,%s,%s",
68
- arg0, (int)arg1+1, arg2, (int)arg3+1);
69
+ arg0, (int)arg1 + 1, arg2, (int)arg3 + 1);
70
} else {
71
char *s2;
72
s = lock_user_string(arg0);
73
@@ -XXX,XX +XXX,XX @@ target_ulong do_arm_semihosting(CPUARMState *env)
74
GET_ARG(1);
75
if (use_gdb_syscalls()) {
76
return arm_gdb_syscall(cpu, arm_semi_cb, "system,%s",
77
- arg0, (int)arg1+1);
78
+ arg0, (int)arg1 + 1);
79
} else {
80
s = lock_user_string(arg0);
81
if (!s) {
16
diff --git a/target/arm/helper.c b/target/arm/helper.c
82
diff --git a/target/arm/helper.c b/target/arm/helper.c
17
index XXXXXXX..XXXXXXX 100644
83
index XXXXXXX..XXXXXXX 100644
18
--- a/target/arm/helper.c
84
--- a/target/arm/helper.c
19
+++ b/target/arm/helper.c
85
+++ b/target/arm/helper.c
20
@@ -XXX,XX +XXX,XX @@ static const ARMCPRegInfo v7_cp_reginfo[] = {
86
@@ -XXX,XX +XXX,XX @@ uint32_t HELPER(usad8)(uint32_t a, uint32_t b)
21
.resetvalue = 0x0 },
87
uint32_t sum;
22
{ .name = "PMINTENCLR", .cp = 15, .crn = 9, .crm = 14, .opc1 = 0, .opc2 = 2,
88
sum = do_usad(a, b);
23
.access = PL1_RW, .accessfn = access_tpm,
89
sum += do_usad(a >> 8, b >> 8);
24
- .type = ARM_CP_ALIAS | ARM_CP_IO,
90
- sum += do_usad(a >> 16, b >>16);
25
+ .type = ARM_CP_ALIAS | ARM_CP_IO | ARM_CP_NO_RAW,
91
+ sum += do_usad(a >> 16, b >> 16);
26
.fieldoffset = offsetof(CPUARMState, cp15.c9_pminten),
92
sum += do_usad(a >> 24, b >> 24);
27
.writefn = pmintenclr_write, },
93
return sum;
28
{ .name = "PMINTENCLR_EL1", .state = ARM_CP_STATE_AA64,
94
}
29
.opc0 = 3, .opc1 = 0, .crn = 9, .crm = 14, .opc2 = 2,
30
.access = PL1_RW, .accessfn = access_tpm,
31
- .type = ARM_CP_ALIAS | ARM_CP_IO,
32
+ .type = ARM_CP_ALIAS | ARM_CP_IO | ARM_CP_NO_RAW,
33
.fieldoffset = offsetof(CPUARMState, cp15.c9_pminten),
34
.writefn = pmintenclr_write },
35
{ .name = "CCSIDR", .state = ARM_CP_STATE_BOTH,
36
--
95
--
37
2.20.1
96
2.20.1
38
97
39
98
diff view generated by jsdifflib
1
From: David CARLIER <devnexen@gmail.com>
1
From: Xinhao Zhang <zhangxinhao1@huawei.com>
2
2
3
Instead of assuming that all POSIX platforms provide mlockall(),
3
Fix code style. Don't use '#' flag of printf format ('%#') in
4
test for it in configure. If the host doesn't provide this platform
4
format strings, use '0x' prefix instead
5
then os_mlock() will fail -ENOSYS, as it does already on Windows.
6
5
7
This is necessary for Haiku, which does not have mlockall().
6
Signed-off-by: Xinhao Zhang <zhangxinhao1@huawei.com>
8
7
Signed-off-by: Kai Deng <dengkai1@huawei.com>
9
Signed-off-by: David Carlier <devnexen@gmail.com>
8
Message-id: 20201103114529.638233-2-zhangxinhao1@huawei.com
10
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
11
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
12
Message-id: 20200703145614.16684-4-peter.maydell@linaro.org
13
[PMM: Expanded commit message; rename to HAVE_MLOCKALL]
14
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
9
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
15
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
10
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
16
---
11
---
17
configure | 15 +++++++++++++++
12
target/arm/translate-a64.c | 4 ++--
18
os-posix.c | 4 ++++
13
1 file changed, 2 insertions(+), 2 deletions(-)
19
2 files changed, 19 insertions(+)
20
14
21
diff --git a/configure b/configure
15
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
22
index XXXXXXX..XXXXXXX 100755
23
--- a/configure
24
+++ b/configure
25
@@ -XXX,XX +XXX,XX @@ else
26
pty_h=no
27
fi
28
29
+cat > $TMPC <<EOF
30
+#include <sys/mman.h>
31
+int main(int argc, char *argv[]) {
32
+ return mlockall(MCL_FUTURE);
33
+}
34
+EOF
35
+if compile_prog "" "" ; then
36
+ have_mlockall=yes
37
+else
38
+ have_mlockall=no
39
+fi
40
+
41
#########################################
42
# vhost interdependencies and host support
43
44
@@ -XXX,XX +XXX,XX @@ fi
45
if test "$pty_h" = "yes" ; then
46
echo "HAVE_PTY_H=y" >> $config_host_mak
47
fi
48
+if test "$have_mlockall" = "yes" ; then
49
+ echo "HAVE_MLOCKALL=y" >> $config_host_mak
50
+fi
51
if test "$fuzzing" = "yes" ; then
52
if test "$have_fuzzer" = "yes"; then
53
FUZZ_LDFLAGS=" -fsanitize=address,fuzzer"
54
diff --git a/os-posix.c b/os-posix.c
55
index XXXXXXX..XXXXXXX 100644
16
index XXXXXXX..XXXXXXX 100644
56
--- a/os-posix.c
17
--- a/target/arm/translate-a64.c
57
+++ b/os-posix.c
18
+++ b/target/arm/translate-a64.c
58
@@ -XXX,XX +XXX,XX @@ bool is_daemonized(void)
19
@@ -XXX,XX +XXX,XX @@ static void disas_simd_three_reg_same_fp16(DisasContext *s, uint32_t insn)
59
20
gen_helper_advsimd_acgt_f16(tcg_res, tcg_op1, tcg_op2, fpst);
60
int os_mlock(void)
21
break;
61
{
22
default:
62
+#ifdef HAVE_MLOCKALL
23
- fprintf(stderr, "%s: insn %#04x, fpop %#2x @ %#" PRIx64 "\n",
63
int ret = 0;
24
+ fprintf(stderr, "%s: insn 0x%04x, fpop 0x%2x @ 0x%" PRIx64 "\n",
64
25
__func__, insn, fpopcode, s->pc_curr);
65
ret = mlockall(MCL_CURRENT | MCL_FUTURE);
26
g_assert_not_reached();
66
@@ -XXX,XX +XXX,XX @@ int os_mlock(void)
27
}
28
@@ -XXX,XX +XXX,XX @@ static void disas_simd_two_reg_misc_fp16(DisasContext *s, uint32_t insn)
29
case 0x7f: /* FSQRT (vector) */
30
break;
31
default:
32
- fprintf(stderr, "%s: insn %#04x fpop %#2x\n", __func__, insn, fpop);
33
+ fprintf(stderr, "%s: insn 0x%04x fpop 0x%2x\n", __func__, insn, fpop);
34
g_assert_not_reached();
67
}
35
}
68
36
69
return ret;
70
+#else
71
+ return -ENOSYS;
72
+#endif
73
}
74
--
37
--
75
2.20.1
38
2.20.1
76
39
77
40
diff view generated by jsdifflib
1
From: Wentong Wu <wentong.wu@intel.com>
1
From: Xinhao Zhang <zhangxinhao1@huawei.com>
2
2
3
wrctl instruction on nios2 target will cause checking cpu
3
Fix code style. Space required before the open parenthesis '('.
4
interrupt but tcg_handle_interrupt() will call cpu_abort()
5
if the CPU gets an interrupt while it's not in 'can do IO'
6
state, so add gen_io_start around wrctl instruction. Also
7
at the same time, end the onging TB with DISAS_UPDATE.
8
4
9
Signed-off-by: Wentong Wu <wentong.wu@intel.com>
5
Signed-off-by: Xinhao Zhang <zhangxinhao1@huawei.com>
10
Message-id: 20200710233433.19729-3-wentong.wu@intel.com
6
Signed-off-by: Kai Deng <dengkai1@huawei.com>
7
Message-id: 20201103114529.638233-3-zhangxinhao1@huawei.com
11
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
8
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
12
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
9
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
13
---
10
---
14
target/nios2/translate.c | 5 +++++
11
target/arm/translate.c | 2 +-
15
1 file changed, 5 insertions(+)
12
1 file changed, 1 insertion(+), 1 deletion(-)
16
13
17
diff --git a/target/nios2/translate.c b/target/nios2/translate.c
14
diff --git a/target/arm/translate.c b/target/arm/translate.c
18
index XXXXXXX..XXXXXXX 100644
15
index XXXXXXX..XXXXXXX 100644
19
--- a/target/nios2/translate.c
16
--- a/target/arm/translate.c
20
+++ b/target/nios2/translate.c
17
+++ b/target/arm/translate.c
21
@@ -XXX,XX +XXX,XX @@
18
@@ -XXX,XX +XXX,XX @@ static void arm_tr_tb_stop(DisasContextBase *dcbase, CPUState *cpu)
22
#include "exec/cpu_ldst.h"
19
- Hardware watchpoints.
23
#include "exec/translator.h"
20
Hardware breakpoints have already been handled and skip this code.
24
#include "qemu/qemu-print.h"
21
*/
25
+#include "exec/gen-icount.h"
22
- switch(dc->base.is_jmp) {
26
23
+ switch (dc->base.is_jmp) {
27
/* is_jmp field values */
24
case DISAS_NEXT:
28
#define DISAS_JUMP DISAS_TARGET_0 /* only pc was modified dynamically */
25
case DISAS_TOO_MANY:
29
@@ -XXX,XX +XXX,XX @@ static void wrctl(DisasContext *dc, uint32_t code, uint32_t flags)
26
gen_goto_tb(dc, 1, dc->base.pc_next);
30
/* If interrupts were enabled using WRCTL, trigger them. */
31
#if !defined(CONFIG_USER_ONLY)
32
if ((instr.imm5 + CR_BASE) == CR_STATUS) {
33
+ if (tb_cflags(dc->tb) & CF_USE_ICOUNT) {
34
+ gen_io_start();
35
+ }
36
gen_helper_check_interrupts(dc->cpu_env);
37
+ dc->is_jmp = DISAS_UPDATE;
38
}
39
#endif
40
}
41
--
27
--
42
2.20.1
28
2.20.1
43
29
44
30
diff view generated by jsdifflib
1
From: Wentong Wu <wentong.wu@intel.com>
1
From: Alex Bennée <alex.bennee@linaro.org>
2
2
3
In line the semantics of DISAS_UPDATE on nios2 target with other targets
3
We should at least document what this machine is about.
4
which is to explicitly write the PC back into the cpu state before doing
5
a tcg_gen_exit_tb().
6
4
7
Signed-off-by: Wentong Wu <wentong.wu@intel.com>
5
Reviewed-by: Graeme Gregory <graeme@nuviainc.com>
8
Message-id: 20200710233433.19729-2-wentong.wu@intel.com
6
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
9
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
7
Message-id: 20201104165254.24822-1-alex.bennee@linaro.org
8
Cc: Leif Lindholm <leif@nuviainc.com>
9
Cc: Shashi Mallela <shashi.mallela@linaro.org>
10
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
11
[PMM: fixed filename mismatch]
10
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
12
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
11
---
13
---
12
target/nios2/translate.c | 2 +-
14
docs/system/arm/sbsa.rst | 32 ++++++++++++++++++++++++++++++++
13
1 file changed, 1 insertion(+), 1 deletion(-)
15
docs/system/target-arm.rst | 1 +
16
2 files changed, 33 insertions(+)
17
create mode 100644 docs/system/arm/sbsa.rst
14
18
15
diff --git a/target/nios2/translate.c b/target/nios2/translate.c
19
diff --git a/docs/system/arm/sbsa.rst b/docs/system/arm/sbsa.rst
20
new file mode 100644
21
index XXXXXXX..XXXXXXX
22
--- /dev/null
23
+++ b/docs/system/arm/sbsa.rst
24
@@ -XXX,XX +XXX,XX @@
25
+Arm Server Base System Architecture Reference board (``sbsa-ref``)
26
+==================================================================
27
+
28
+While the `virt` board is a generic board platform that doesn't match
29
+any real hardware the `sbsa-ref` board intends to look like real
30
+hardware. The `Server Base System Architecture
31
+<https://developer.arm.com/documentation/den0029/latest>` defines a
32
+minimum base line of hardware support and importantly how the firmware
33
+reports that to any operating system. It is a static system that
34
+reports a very minimal DT to the firmware for non-discoverable
35
+information about components affected by the qemu command line (i.e.
36
+cpus and memory). As a result it must have a firmware specifically
37
+built to expect a certain hardware layout (as you would in a real
38
+machine).
39
+
40
+It is intended to be a machine for developing firmware and testing
41
+standards compliance with operating systems.
42
+
43
+Supported devices
44
+"""""""""""""""""
45
+
46
+The sbsa-ref board supports:
47
+
48
+ - A configurable number of AArch64 CPUs
49
+ - GIC version 3
50
+ - System bus AHCI controller
51
+ - System bus EHCI controller
52
+ - CDROM and hard disc on AHCI bus
53
+ - E1000E ethernet card on PCIe bus
54
+ - VGA display adaptor on PCIe bus
55
+ - A generic SBSA watchdog device
56
+
57
diff --git a/docs/system/target-arm.rst b/docs/system/target-arm.rst
16
index XXXXXXX..XXXXXXX 100644
58
index XXXXXXX..XXXXXXX 100644
17
--- a/target/nios2/translate.c
59
--- a/docs/system/target-arm.rst
18
+++ b/target/nios2/translate.c
60
+++ b/docs/system/target-arm.rst
19
@@ -XXX,XX +XXX,XX @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns)
61
@@ -XXX,XX +XXX,XX @@ undocumented; you can get a complete list by running
20
/* Indicate where the next block should start */
62
arm/mps2
21
switch (dc->is_jmp) {
63
arm/musca
22
case DISAS_NEXT:
64
arm/realview
23
+ case DISAS_UPDATE:
65
+ arm/sbsa
24
/* Save the current PC back into the CPU register */
66
arm/versatile
25
tcg_gen_movi_tl(cpu_R[R_PC], dc->pc);
67
arm/vexpress
26
tcg_gen_exit_tb(NULL, 0);
68
arm/aspeed
27
@@ -XXX,XX +XXX,XX @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns)
28
29
default:
30
case DISAS_JUMP:
31
- case DISAS_UPDATE:
32
/* The jump will already have updated the PC register */
33
tcg_gen_exit_tb(NULL, 0);
34
break;
35
--
69
--
36
2.20.1
70
2.20.1
37
71
38
72
diff view generated by jsdifflib
1
From: Gerd Hoffmann <kraxel@redhat.com>
1
From: Philippe Mathieu-Daudé <philmd@redhat.com>
2
2
3
Given this isn't perforance critical at all lets avoid the non-portable
3
When using a Cortex-A15, the Virt machine does not use any
4
d_type and use fstat instead to check whenever the file is a chardev.
4
MPCore peripherals. Remove the dependency.
5
5
6
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
6
Fixes: 7951c7b7c05 ("hw/arm: Express dependencies of the virt machine with Kconfig")
7
Reported-by: David Carlier <devnexen@gmail.com>
7
Reported-by: Miroslav Rezanina <mrezanin@redhat.com>
8
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
8
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
9
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
9
Message-id: 20201107114852.271922-1-philmd@redhat.com
10
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
11
Message-id: 20200703145614.16684-10-peter.maydell@linaro.org
12
Message-id: 20200701180302.14821-1-kraxel@redhat.com
13
[PMM: fixed comment style; tweaked subject line]
14
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
10
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
15
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
11
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
16
---
12
---
17
util/drm.c | 19 ++++++++++++++-----
13
hw/arm/Kconfig | 1 -
18
1 file changed, 14 insertions(+), 5 deletions(-)
14
1 file changed, 1 deletion(-)
19
15
20
diff --git a/util/drm.c b/util/drm.c
16
diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
21
index XXXXXXX..XXXXXXX 100644
17
index XXXXXXX..XXXXXXX 100644
22
--- a/util/drm.c
18
--- a/hw/arm/Kconfig
23
+++ b/util/drm.c
19
+++ b/hw/arm/Kconfig
24
@@ -XXX,XX +XXX,XX @@ int qemu_drm_rendernode_open(const char *rendernode)
20
@@ -XXX,XX +XXX,XX @@ config ARM_VIRT
25
{
21
imply VFIO_PLATFORM
26
DIR *dir;
22
imply VFIO_XGMAC
27
struct dirent *e;
23
imply TPM_TIS_SYSBUS
28
- int r, fd;
24
- select A15MPCORE
29
+ struct stat st;
25
select ACPI
30
+ int r, fd, ret;
26
select ARM_SMMUV3
31
char *p;
27
select GPIO_KEY
32
33
if (rendernode) {
34
@@ -XXX,XX +XXX,XX @@ int qemu_drm_rendernode_open(const char *rendernode)
35
36
fd = -1;
37
while ((e = readdir(dir))) {
38
- if (e->d_type != DT_CHR) {
39
- continue;
40
- }
41
-
42
if (strncmp(e->d_name, "renderD", 7)) {
43
continue;
44
}
45
@@ -XXX,XX +XXX,XX @@ int qemu_drm_rendernode_open(const char *rendernode)
46
g_free(p);
47
continue;
48
}
49
+
50
+ /*
51
+ * prefer fstat() over checking e->d_type == DT_CHR for
52
+ * portability reasons
53
+ */
54
+ ret = fstat(r, &st);
55
+ if (ret < 0 || (st.st_mode & S_IFMT) != S_IFCHR) {
56
+ close(r);
57
+ g_free(p);
58
+ continue;
59
+ }
60
+
61
fd = r;
62
g_free(p);
63
break;
64
--
28
--
65
2.20.1
29
2.20.1
66
30
67
31
diff view generated by jsdifflib
1
From: Richard Henderson <richard.henderson@linaro.org>
1
From: Richard Henderson <richard.henderson@linaro.org>
2
2
3
The mtedesc that was constructed was not actually passed in.
3
The helper function did not get updated when we reorganized
4
Found by Coverity (CID 1429996).
4
the vector register file for SVE. Since then, the neon dregs
5
are non-sequential and cannot be simply indexed.
5
6
6
Fixes: d28d12f008e
7
At the same time, make the helper function operate on 64-bit
8
quantities so that we do not have to call it twice.
9
10
Fixes: c39c2b9043e
11
Reported-by: Ard Biesheuvel <ardb@kernel.org>
7
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
12
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
8
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
13
[PMM: use aa32_vfp_dreg() rather than opencoding]
9
Message-id: 20200706202345.193676-1-richard.henderson@linaro.org
14
Message-id: 20201105171126.88014-1-richard.henderson@linaro.org
15
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
10
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
16
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
11
---
17
---
12
target/arm/translate-sve.c | 2 +-
18
target/arm/helper.h | 2 +-
13
1 file changed, 1 insertion(+), 1 deletion(-)
19
target/arm/op_helper.c | 23 +++++++++--------
20
target/arm/translate-neon.c.inc | 44 +++++++++++----------------------
21
3 files changed, 29 insertions(+), 40 deletions(-)
14
22
15
diff --git a/target/arm/translate-sve.c b/target/arm/translate-sve.c
23
diff --git a/target/arm/helper.h b/target/arm/helper.h
16
index XXXXXXX..XXXXXXX 100644
24
index XXXXXXX..XXXXXXX 100644
17
--- a/target/arm/translate-sve.c
25
--- a/target/arm/helper.h
18
+++ b/target/arm/translate-sve.c
26
+++ b/target/arm/helper.h
19
@@ -XXX,XX +XXX,XX @@ static void do_mem_zpz(DisasContext *s, int zt, int pg, int zm,
27
@@ -XXX,XX +XXX,XX @@ DEF_HELPER_FLAGS_2(rsqrte_f32, TCG_CALL_NO_RWG, f32, f32, ptr)
20
desc = FIELD_DP32(desc, MTEDESC, ESIZE, 1 << msz);
28
DEF_HELPER_FLAGS_2(rsqrte_f64, TCG_CALL_NO_RWG, f64, f64, ptr)
21
desc <<= SVE_MTEDESC_SHIFT;
29
DEF_HELPER_FLAGS_1(recpe_u32, TCG_CALL_NO_RWG, i32, i32)
30
DEF_HELPER_FLAGS_1(rsqrte_u32, TCG_CALL_NO_RWG, i32, i32)
31
-DEF_HELPER_FLAGS_4(neon_tbl, TCG_CALL_NO_RWG, i32, i32, i32, ptr, i32)
32
+DEF_HELPER_FLAGS_4(neon_tbl, TCG_CALL_NO_RWG, i64, env, i32, i64, i64)
33
34
DEF_HELPER_3(shl_cc, i32, env, i32, i32)
35
DEF_HELPER_3(shr_cc, i32, env, i32, i32)
36
diff --git a/target/arm/op_helper.c b/target/arm/op_helper.c
37
index XXXXXXX..XXXXXXX 100644
38
--- a/target/arm/op_helper.c
39
+++ b/target/arm/op_helper.c
40
@@ -XXX,XX +XXX,XX @@ void raise_exception_ra(CPUARMState *env, uint32_t excp, uint32_t syndrome,
41
cpu_loop_exit_restore(cs, ra);
42
}
43
44
-uint32_t HELPER(neon_tbl)(uint32_t ireg, uint32_t def, void *vn,
45
- uint32_t maxindex)
46
+uint64_t HELPER(neon_tbl)(CPUARMState *env, uint32_t desc,
47
+ uint64_t ireg, uint64_t def)
48
{
49
- uint32_t val, shift;
50
- uint64_t *table = vn;
51
+ uint64_t tmp, val = 0;
52
+ uint32_t maxindex = ((desc & 3) + 1) * 8;
53
+ uint32_t base_reg = desc >> 2;
54
+ uint32_t shift, index, reg;
55
56
- val = 0;
57
- for (shift = 0; shift < 32; shift += 8) {
58
- uint32_t index = (ireg >> shift) & 0xff;
59
+ for (shift = 0; shift < 64; shift += 8) {
60
+ index = (ireg >> shift) & 0xff;
61
if (index < maxindex) {
62
- uint32_t tmp = (table[index >> 3] >> ((index & 7) << 3)) & 0xff;
63
- val |= tmp << shift;
64
+ reg = base_reg + (index >> 3);
65
+ tmp = *aa32_vfp_dreg(env, reg);
66
+ tmp = ((tmp >> ((index & 7) << 3)) & 0xff) << shift;
67
} else {
68
- val |= def & (0xff << shift);
69
+ tmp = def & (0xffull << shift);
70
}
71
+ val |= tmp;
22
}
72
}
23
- desc = simd_desc(vsz, vsz, scale);
73
return val;
24
+ desc = simd_desc(vsz, vsz, desc | scale);
74
}
25
t_desc = tcg_const_i32(desc);
75
diff --git a/target/arm/translate-neon.c.inc b/target/arm/translate-neon.c.inc
26
76
index XXXXXXX..XXXXXXX 100644
27
tcg_gen_addi_ptr(t_pg, cpu_env, pred_full_reg_offset(s, pg));
77
--- a/target/arm/translate-neon.c.inc
78
+++ b/target/arm/translate-neon.c.inc
79
@@ -XXX,XX +XXX,XX @@ static bool trans_VEXT(DisasContext *s, arg_VEXT *a)
80
81
static bool trans_VTBL(DisasContext *s, arg_VTBL *a)
82
{
83
- int n;
84
- TCGv_i32 tmp, tmp2, tmp3, tmp4;
85
- TCGv_ptr ptr1;
86
+ TCGv_i64 val, def;
87
+ TCGv_i32 desc;
88
89
if (!arm_dc_feature(s, ARM_FEATURE_NEON)) {
90
return false;
91
@@ -XXX,XX +XXX,XX @@ static bool trans_VTBL(DisasContext *s, arg_VTBL *a)
92
return true;
93
}
94
95
- n = a->len + 1;
96
- if ((a->vn + n) > 32) {
97
+ if ((a->vn + a->len + 1) > 32) {
98
/*
99
* This is UNPREDICTABLE; we choose to UNDEF to avoid the
100
* helper function running off the end of the register file.
101
*/
102
return false;
103
}
104
- n <<= 3;
105
- tmp = tcg_temp_new_i32();
106
- if (a->op) {
107
- read_neon_element32(tmp, a->vd, 0, MO_32);
108
- } else {
109
- tcg_gen_movi_i32(tmp, 0);
110
- }
111
- tmp2 = tcg_temp_new_i32();
112
- read_neon_element32(tmp2, a->vm, 0, MO_32);
113
- ptr1 = vfp_reg_ptr(true, a->vn);
114
- tmp4 = tcg_const_i32(n);
115
- gen_helper_neon_tbl(tmp2, tmp2, tmp, ptr1, tmp4);
116
117
+ desc = tcg_const_i32((a->vn << 2) | a->len);
118
+ def = tcg_temp_new_i64();
119
if (a->op) {
120
- read_neon_element32(tmp, a->vd, 1, MO_32);
121
+ read_neon_element64(def, a->vd, 0, MO_64);
122
} else {
123
- tcg_gen_movi_i32(tmp, 0);
124
+ tcg_gen_movi_i64(def, 0);
125
}
126
- tmp3 = tcg_temp_new_i32();
127
- read_neon_element32(tmp3, a->vm, 1, MO_32);
128
- gen_helper_neon_tbl(tmp3, tmp3, tmp, ptr1, tmp4);
129
- tcg_temp_free_i32(tmp);
130
- tcg_temp_free_i32(tmp4);
131
- tcg_temp_free_ptr(ptr1);
132
+ val = tcg_temp_new_i64();
133
+ read_neon_element64(val, a->vm, 0, MO_64);
134
135
- write_neon_element32(tmp2, a->vd, 0, MO_32);
136
- write_neon_element32(tmp3, a->vd, 1, MO_32);
137
- tcg_temp_free_i32(tmp2);
138
- tcg_temp_free_i32(tmp3);
139
+ gen_helper_neon_tbl(val, cpu_env, desc, val, def);
140
+ write_neon_element64(val, a->vd, 0, MO_64);
141
+
142
+ tcg_temp_free_i64(def);
143
+ tcg_temp_free_i64(val);
144
+ tcg_temp_free_i32(desc);
145
return true;
146
}
147
28
--
148
--
29
2.20.1
149
2.20.1
30
150
31
151
diff view generated by jsdifflib
1
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
1
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
2
2
3
Since added in commit 2bea128c3d, each SDHCI is wired with a SD
3
We can use one MPC per SRAM bank, but we currently only wire the
4
card, using empty card when no block drive provided. This is not
4
IRQ from the first expansion MPC to the IRQ splitter. Fix that.
5
the desired behavior. The SDHCI exposes a SD bus to plug cards
6
on, if no card available, it is fine to have an unplugged bus.
7
5
8
Avoid creating unnecessary SD card device when no block drive
6
Fixes: bb75e16d5e6 ("hw/arm/iotkit: Wire up MPC interrupt lines")
9
provided.
10
11
Fixes: 2bea128c3d ("hw/sd/aspeed_sdhci: New device")
12
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
7
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
13
Message-id: 20200705173402.15620-1-f4bug@amsat.org
8
Message-id: 20201107193403.436146-2-f4bug@amsat.org
14
Reviewed-by: Cédric Le Goater <clg@kaod.org>
9
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
15
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
10
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
16
---
11
---
17
hw/arm/aspeed.c | 9 +++++----
12
hw/arm/armsse.c | 3 ++-
18
1 file changed, 5 insertions(+), 4 deletions(-)
13
1 file changed, 2 insertions(+), 1 deletion(-)
19
14
20
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
15
diff --git a/hw/arm/armsse.c b/hw/arm/armsse.c
21
index XXXXXXX..XXXXXXX 100644
16
index XXXXXXX..XXXXXXX 100644
22
--- a/hw/arm/aspeed.c
17
--- a/hw/arm/armsse.c
23
+++ b/hw/arm/aspeed.c
18
+++ b/hw/arm/armsse.c
24
@@ -XXX,XX +XXX,XX @@ static void sdhci_attach_drive(SDHCIState *sdhci, DriveInfo *dinfo)
19
@@ -XXX,XX +XXX,XX @@ static void armsse_realize(DeviceState *dev, Error **errp)
25
{
20
qdev_get_gpio_in(dev_splitter, 0));
26
DeviceState *card;
21
qdev_connect_gpio_out(dev_splitter, 0,
27
22
qdev_get_gpio_in_named(dev_secctl,
28
- card = qdev_new(TYPE_SD_CARD);
23
- "mpc_status", 0));
29
- if (dinfo) {
24
+ "mpc_status",
30
- qdev_prop_set_drive_err(card, "drive", blk_by_legacy_dinfo(dinfo),
25
+ i - IOTS_NUM_EXP_MPC));
31
- &error_fatal);
32
+ if (!dinfo) {
33
+ return;
34
}
26
}
35
+ card = qdev_new(TYPE_SD_CARD);
27
36
+ qdev_prop_set_drive_err(card, "drive", blk_by_legacy_dinfo(dinfo),
28
qdev_connect_gpio_out(dev_splitter, 1,
37
+ &error_fatal);
38
qdev_realize_and_unref(card,
39
qdev_get_child_bus(DEVICE(sdhci), "sd-bus"),
40
&error_fatal);
41
--
29
--
42
2.20.1
30
2.20.1
43
31
44
32
diff view generated by jsdifflib
1
From: David CARLIER <devnexen@gmail.com>
1
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
2
2
3
The qemu_init_exec_dir() function is inherently non-portable;
3
The system configuration controller (SYSCFG) doesn't have
4
provide an implementation for Haiku hosts.
4
any output IRQ (and the INTC input #71 belongs to the UART6).
5
Remove the invalid code.
5
6
6
Signed-off-by: David Carlier <devnexen@gmail.com>
7
Fixes: db635521a02 ("stm32f205: Add the stm32f205 SoC")
7
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
8
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
8
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
9
Message-id: 20201107193403.436146-3-f4bug@amsat.org
9
Message-id: 20200703145614.16684-9-peter.maydell@linaro.org
10
[PMM: Expanded commit message]
11
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
10
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
12
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
11
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
13
---
12
---
14
util/oslib-posix.c | 19 +++++++++++++++++++
13
include/hw/misc/stm32f2xx_syscfg.h | 2 --
15
1 file changed, 19 insertions(+)
14
hw/arm/stm32f205_soc.c | 1 -
15
hw/misc/stm32f2xx_syscfg.c | 2 --
16
3 files changed, 5 deletions(-)
16
17
17
diff --git a/util/oslib-posix.c b/util/oslib-posix.c
18
diff --git a/include/hw/misc/stm32f2xx_syscfg.h b/include/hw/misc/stm32f2xx_syscfg.h
18
index XXXXXXX..XXXXXXX 100644
19
index XXXXXXX..XXXXXXX 100644
19
--- a/util/oslib-posix.c
20
--- a/include/hw/misc/stm32f2xx_syscfg.h
20
+++ b/util/oslib-posix.c
21
+++ b/include/hw/misc/stm32f2xx_syscfg.h
21
@@ -XXX,XX +XXX,XX @@
22
@@ -XXX,XX +XXX,XX @@ struct STM32F2XXSyscfgState {
22
#include <mach-o/dyld.h>
23
uint32_t syscfg_exticr3;
23
#endif
24
uint32_t syscfg_exticr4;
24
25
uint32_t syscfg_cmpcr;
25
+#ifdef __HAIKU__
26
-
26
+#include <kernel/image.h>
27
- qemu_irq irq;
27
+#endif
28
};
28
+
29
29
#include "qemu/mmap-alloc.h"
30
#endif /* HW_STM32F2XX_SYSCFG_H */
30
31
diff --git a/hw/arm/stm32f205_soc.c b/hw/arm/stm32f205_soc.c
31
#ifdef CONFIG_DEBUG_STACK_USAGE
32
index XXXXXXX..XXXXXXX 100644
32
@@ -XXX,XX +XXX,XX @@ void qemu_init_exec_dir(const char *argv0)
33
--- a/hw/arm/stm32f205_soc.c
33
}
34
+++ b/hw/arm/stm32f205_soc.c
34
}
35
@@ -XXX,XX +XXX,XX @@ static void stm32f205_soc_realize(DeviceState *dev_soc, Error **errp)
35
}
36
}
36
+#elif defined(__HAIKU__)
37
busdev = SYS_BUS_DEVICE(dev);
37
+ {
38
sysbus_mmio_map(busdev, 0, 0x40013800);
38
+ image_info ii;
39
- sysbus_connect_irq(busdev, 0, qdev_get_gpio_in(armv7m, 71));
39
+ int32_t c = 0;
40
40
+
41
/* Attach UART (uses USART registers) and USART controllers */
41
+ *buf = '\0';
42
for (i = 0; i < STM_NUM_USARTS; i++) {
42
+ while (get_next_image_info(0, &c, &ii) == B_OK) {
43
diff --git a/hw/misc/stm32f2xx_syscfg.c b/hw/misc/stm32f2xx_syscfg.c
43
+ if (ii.type == B_APP_IMAGE) {
44
index XXXXXXX..XXXXXXX 100644
44
+ strncpy(buf, ii.name, sizeof(buf));
45
--- a/hw/misc/stm32f2xx_syscfg.c
45
+ buf[sizeof(buf) - 1] = 0;
46
+++ b/hw/misc/stm32f2xx_syscfg.c
46
+ p = buf;
47
@@ -XXX,XX +XXX,XX @@ static void stm32f2xx_syscfg_init(Object *obj)
47
+ break;
48
{
48
+ }
49
STM32F2XXSyscfgState *s = STM32F2XX_SYSCFG(obj);
49
+ }
50
50
+ }
51
- sysbus_init_irq(SYS_BUS_DEVICE(obj), &s->irq);
51
#endif
52
-
52
/* If we don't have any way of figuring out the actual executable
53
memory_region_init_io(&s->mmio, obj, &stm32f2xx_syscfg_ops, s,
53
location then try argv[0]. */
54
TYPE_STM32F2XX_SYSCFG, 0x400);
55
sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->mmio);
54
--
56
--
55
2.20.1
57
2.20.1
56
58
57
59
diff view generated by jsdifflib
1
From: Wentong Wu <wentong.wu@intel.com>
1
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
2
2
3
Only when guest code is unmasking interrupts, terminate the excution
3
omap2420_mpu_init() introduced in commit 827df9f3c5f ("Add basic
4
of translated code and exit to the main CPU loop to handle previous
4
OMAP2 chip support") takes care of creating the 3 UARTs.
5
pended interrupts because of the interrupts mask by guest code.
6
5
7
Signed-off-by: Wentong Wu <wentong.wu@intel.com>
6
Then commit 58a26b477e9 ("Emulate a serial bluetooth HCI with H4+
8
Message-id: 20200710233433.19729-4-wentong.wu@intel.com
7
extensions and attach to n8x0's UART") added n8x0_uart_setup()
8
which create the UART and connects it to an IRQ output,
9
overwritting the existing peripheral and its IRQ connection.
10
This is incorrect.
11
12
Fortunately we don't need to fix this, because commit 6da68df7f9b
13
("hw/arm/nseries: Replace the bluetooth chardev with a "null"
14
chardev") removed the use of this peripheral. We can simply
15
remove the code.
16
17
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
18
Message-id: 20201107193403.436146-4-f4bug@amsat.org
9
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
19
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
10
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
20
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
11
---
21
---
12
hw/nios2/cpu_pic.c | 3 ++-
22
hw/arm/nseries.c | 11 -----------
13
1 file changed, 2 insertions(+), 1 deletion(-)
23
1 file changed, 11 deletions(-)
14
24
15
diff --git a/hw/nios2/cpu_pic.c b/hw/nios2/cpu_pic.c
25
diff --git a/hw/arm/nseries.c b/hw/arm/nseries.c
16
index XXXXXXX..XXXXXXX 100644
26
index XXXXXXX..XXXXXXX 100644
17
--- a/hw/nios2/cpu_pic.c
27
--- a/hw/arm/nseries.c
18
+++ b/hw/nios2/cpu_pic.c
28
+++ b/hw/arm/nseries.c
19
@@ -XXX,XX +XXX,XX @@ static void nios2_pic_cpu_handler(void *opaque, int irq, int level)
29
@@ -XXX,XX +XXX,XX @@ static void n8x0_cbus_setup(struct n800_s *s)
20
30
cbus_attach(cbus, s->tahvo = tahvo_init(tahvo_irq, 1));
21
void nios2_check_interrupts(CPUNios2State *env)
31
}
32
33
-static void n8x0_uart_setup(struct n800_s *s)
34
-{
35
- Chardev *radio = qemu_chr_new("bt-dummy-uart", "null", NULL);
36
- /*
37
- * Note: We used to connect N8X0_BT_RESET_GPIO and N8X0_BT_WKUP_GPIO
38
- * here, but this code has been removed with the bluetooth backend.
39
- */
40
- omap_uart_attach(s->mpu->uart[BT_UART], radio);
41
-}
42
-
43
static void n8x0_usb_setup(struct n800_s *s)
22
{
44
{
23
- if (env->irq_pending) {
45
SysBusDevice *dev;
24
+ if (env->irq_pending &&
46
@@ -XXX,XX +XXX,XX @@ static void n8x0_init(MachineState *machine,
25
+ (env->regs[CR_STATUS] & CR_STATUS_PIE)) {
47
n8x0_spi_setup(s);
26
env->irq_pending = 0;
48
n8x0_dss_setup(s);
27
cpu_interrupt(env_cpu(env), CPU_INTERRUPT_HARD);
49
n8x0_cbus_setup(s);
50
- n8x0_uart_setup(s);
51
if (machine_usb(machine)) {
52
n8x0_usb_setup(s);
28
}
53
}
29
--
54
--
30
2.20.1
55
2.20.1
31
56
32
57
diff view generated by jsdifflib
1
From: David CARLIER <devnexen@gmail.com>
1
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
2
2
3
util/compatfd.c includes <sys/syscall.h> so that the CONFIG_SIGNALFD
3
The MusicPal board code connects both of the IRQ outputs of the UART
4
code can use SYS_signalfd. Guard the #include with CONFIG_SIGNALFD
4
to the same INTC qemu_irq. Connecting two qemu_irqs outputs directly
5
to avoid portability issues on hosts like Haiku which do not
5
to the same input is not valid as it produces subtly wrong behaviour
6
provide that header file.
6
(for instance if both the IRQ lines are high, and then one goes
7
low, the INTC input will see this as a high-to-low transition
8
even though the second IRQ line should still be holding it high).
7
9
8
Signed-off-by: David Carlier <devnexen@gmail.com>
10
This kind of wiring needs an explicitly created OR gate; add one.
9
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
11
10
Reviewed-by: Thomas Huth <thuth@redhat.com>
12
Inspired-by: Peter Maydell <peter.maydell@linaro.org>
11
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
13
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
12
Message-id: 20200703145614.16684-8-peter.maydell@linaro.org
14
Message-id: 20201107193403.436146-5-f4bug@amsat.org
13
[PMM: Expanded commit message]
14
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
15
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
15
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
16
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
16
---
17
---
17
util/compatfd.c | 2 ++
18
hw/arm/musicpal.c | 17 +++++++++++++----
18
1 file changed, 2 insertions(+)
19
hw/arm/Kconfig | 1 +
20
2 files changed, 14 insertions(+), 4 deletions(-)
19
21
20
diff --git a/util/compatfd.c b/util/compatfd.c
22
diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c
21
index XXXXXXX..XXXXXXX 100644
23
index XXXXXXX..XXXXXXX 100644
22
--- a/util/compatfd.c
24
--- a/hw/arm/musicpal.c
23
+++ b/util/compatfd.c
25
+++ b/hw/arm/musicpal.c
24
@@ -XXX,XX +XXX,XX @@
26
@@ -XXX,XX +XXX,XX @@
25
#include "qemu/osdep.h"
27
#include "ui/console.h"
26
#include "qemu/thread.h"
28
#include "hw/i2c/i2c.h"
27
29
#include "hw/irq.h"
28
+#if defined(CONFIG_SIGNALFD)
30
+#include "hw/or-irq.h"
29
#include <sys/syscall.h>
31
#include "hw/audio/wm8750.h"
30
+#endif
32
#include "sysemu/block-backend.h"
31
33
#include "sysemu/runstate.h"
32
struct sigfd_compat_info
34
@@ -XXX,XX +XXX,XX @@
33
{
35
#define MP_TIMER4_IRQ 7
36
#define MP_EHCI_IRQ 8
37
#define MP_ETH_IRQ 9
38
-#define MP_UART1_IRQ 11
39
-#define MP_UART2_IRQ 11
40
+#define MP_UART_SHARED_IRQ 11
41
#define MP_GPIO_IRQ 12
42
#define MP_RTC_IRQ 28
43
#define MP_AUDIO_IRQ 30
44
@@ -XXX,XX +XXX,XX @@ static void musicpal_init(MachineState *machine)
45
ARMCPU *cpu;
46
qemu_irq pic[32];
47
DeviceState *dev;
48
+ DeviceState *uart_orgate;
49
DeviceState *i2c_dev;
50
DeviceState *lcd_dev;
51
DeviceState *key_dev;
52
@@ -XXX,XX +XXX,XX @@ static void musicpal_init(MachineState *machine)
53
pic[MP_TIMER2_IRQ], pic[MP_TIMER3_IRQ],
54
pic[MP_TIMER4_IRQ], NULL);
55
56
- serial_mm_init(address_space_mem, MP_UART1_BASE, 2, pic[MP_UART1_IRQ],
57
+ /* Logically OR both UART IRQs together */
58
+ uart_orgate = DEVICE(object_new(TYPE_OR_IRQ));
59
+ object_property_set_int(OBJECT(uart_orgate), "num-lines", 2, &error_fatal);
60
+ qdev_realize_and_unref(uart_orgate, NULL, &error_fatal);
61
+ qdev_connect_gpio_out(DEVICE(uart_orgate), 0, pic[MP_UART_SHARED_IRQ]);
62
+
63
+ serial_mm_init(address_space_mem, MP_UART1_BASE, 2,
64
+ qdev_get_gpio_in(uart_orgate, 0),
65
1825000, serial_hd(0), DEVICE_NATIVE_ENDIAN);
66
- serial_mm_init(address_space_mem, MP_UART2_BASE, 2, pic[MP_UART2_IRQ],
67
+ serial_mm_init(address_space_mem, MP_UART2_BASE, 2,
68
+ qdev_get_gpio_in(uart_orgate, 1),
69
1825000, serial_hd(1), DEVICE_NATIVE_ENDIAN);
70
71
/* Register flash */
72
diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
73
index XXXXXXX..XXXXXXX 100644
74
--- a/hw/arm/Kconfig
75
+++ b/hw/arm/Kconfig
76
@@ -XXX,XX +XXX,XX @@ config MUSCA
77
78
config MUSICPAL
79
bool
80
+ select OR_IRQ
81
select BITBANG_I2C
82
select MARVELL_88W8618
83
select PTIMER
34
--
84
--
35
2.20.1
85
2.20.1
36
86
37
87
diff view generated by jsdifflib
1
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
1
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
2
2
3
The 'cpu_type' has been moved from BCM283XState to BCM283XClass
3
We don't need to fill the full pic[] array if we only use
4
in commit 210f47840d, but we forgot to remove the old variable.
4
few of the interrupt lines. Directly call qdev_get_gpio_in()
5
Do it now.
5
when necessary.
6
6
7
Fixes: 210f47840d ("hw/arm/bcm2836: Hardcode correct CPU type")
8
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
7
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
9
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
8
Message-id: 20201107193403.436146-6-f4bug@amsat.org
10
Message-id: 20200703200459.23294-1-f4bug@amsat.org
9
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
11
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
10
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
12
---
11
---
13
include/hw/arm/bcm2836.h | 1 -
12
hw/arm/musicpal.c | 25 +++++++++++++------------
14
1 file changed, 1 deletion(-)
13
1 file changed, 13 insertions(+), 12 deletions(-)
15
14
16
diff --git a/include/hw/arm/bcm2836.h b/include/hw/arm/bcm2836.h
15
diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c
17
index XXXXXXX..XXXXXXX 100644
16
index XXXXXXX..XXXXXXX 100644
18
--- a/include/hw/arm/bcm2836.h
17
--- a/hw/arm/musicpal.c
19
+++ b/include/hw/arm/bcm2836.h
18
+++ b/hw/arm/musicpal.c
20
@@ -XXX,XX +XXX,XX @@ typedef struct BCM283XState {
19
@@ -XXX,XX +XXX,XX @@ static struct arm_boot_info musicpal_binfo = {
21
DeviceState parent_obj;
20
static void musicpal_init(MachineState *machine)
22
/*< public >*/
21
{
23
22
ARMCPU *cpu;
24
- char *cpu_type;
23
- qemu_irq pic[32];
25
uint32_t enabled_cpus;
24
DeviceState *dev;
26
25
+ DeviceState *pic;
27
struct {
26
DeviceState *uart_orgate;
27
DeviceState *i2c_dev;
28
DeviceState *lcd_dev;
29
@@ -XXX,XX +XXX,XX @@ static void musicpal_init(MachineState *machine)
30
&error_fatal);
31
memory_region_add_subregion(address_space_mem, MP_SRAM_BASE, sram);
32
33
- dev = sysbus_create_simple(TYPE_MV88W8618_PIC, MP_PIC_BASE,
34
+ pic = sysbus_create_simple(TYPE_MV88W8618_PIC, MP_PIC_BASE,
35
qdev_get_gpio_in(DEVICE(cpu), ARM_CPU_IRQ));
36
- for (i = 0; i < 32; i++) {
37
- pic[i] = qdev_get_gpio_in(dev, i);
38
- }
39
- sysbus_create_varargs(TYPE_MV88W8618_PIT, MP_PIT_BASE, pic[MP_TIMER1_IRQ],
40
- pic[MP_TIMER2_IRQ], pic[MP_TIMER3_IRQ],
41
- pic[MP_TIMER4_IRQ], NULL);
42
+ sysbus_create_varargs(TYPE_MV88W8618_PIT, MP_PIT_BASE,
43
+ qdev_get_gpio_in(pic, MP_TIMER1_IRQ),
44
+ qdev_get_gpio_in(pic, MP_TIMER2_IRQ),
45
+ qdev_get_gpio_in(pic, MP_TIMER3_IRQ),
46
+ qdev_get_gpio_in(pic, MP_TIMER4_IRQ), NULL);
47
48
/* Logically OR both UART IRQs together */
49
uart_orgate = DEVICE(object_new(TYPE_OR_IRQ));
50
object_property_set_int(OBJECT(uart_orgate), "num-lines", 2, &error_fatal);
51
qdev_realize_and_unref(uart_orgate, NULL, &error_fatal);
52
- qdev_connect_gpio_out(DEVICE(uart_orgate), 0, pic[MP_UART_SHARED_IRQ]);
53
+ qdev_connect_gpio_out(DEVICE(uart_orgate), 0,
54
+ qdev_get_gpio_in(pic, MP_UART_SHARED_IRQ));
55
56
serial_mm_init(address_space_mem, MP_UART1_BASE, 2,
57
qdev_get_gpio_in(uart_orgate, 0),
58
@@ -XXX,XX +XXX,XX @@ static void musicpal_init(MachineState *machine)
59
OBJECT(get_system_memory()), &error_fatal);
60
sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
61
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, MP_ETH_BASE);
62
- sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, pic[MP_ETH_IRQ]);
63
+ sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0,
64
+ qdev_get_gpio_in(pic, MP_ETH_IRQ));
65
66
sysbus_create_simple("mv88w8618_wlan", MP_WLAN_BASE, NULL);
67
68
sysbus_create_simple(TYPE_MUSICPAL_MISC, MP_MISC_BASE, NULL);
69
70
dev = sysbus_create_simple(TYPE_MUSICPAL_GPIO, MP_GPIO_BASE,
71
- pic[MP_GPIO_IRQ]);
72
+ qdev_get_gpio_in(pic, MP_GPIO_IRQ));
73
i2c_dev = sysbus_create_simple("gpio_i2c", -1, NULL);
74
i2c = (I2CBus *)qdev_get_child_bus(i2c_dev, "i2c");
75
76
@@ -XXX,XX +XXX,XX @@ static void musicpal_init(MachineState *machine)
77
NULL);
78
sysbus_realize_and_unref(s, &error_fatal);
79
sysbus_mmio_map(s, 0, MP_AUDIO_BASE);
80
- sysbus_connect_irq(s, 0, pic[MP_AUDIO_IRQ]);
81
+ sysbus_connect_irq(s, 0, qdev_get_gpio_in(pic, MP_AUDIO_IRQ));
82
83
musicpal_binfo.ram_size = MP_RAM_DEFAULT_SIZE;
84
arm_load_kernel(cpu, machine, &musicpal_binfo);
28
--
85
--
29
2.20.1
86
2.20.1
30
87
31
88
diff view generated by jsdifflib
Deleted patch
1
From: Jean-Christophe Dubois <jcd@tribudubois.net>
2
1
3
Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net>
4
Message-id: 9f8923ecd974160ae8f634c275b1100c2cbe66d7.1593806826.git.jcd@tribudubois.net
5
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
6
[PMM: updated for object_property_set_uint() argument reordering]
7
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
8
---
9
include/hw/arm/fsl-imx25.h | 1 +
10
hw/arm/fsl-imx25.c | 7 +++++++
11
2 files changed, 8 insertions(+)
12
13
diff --git a/include/hw/arm/fsl-imx25.h b/include/hw/arm/fsl-imx25.h
14
index XXXXXXX..XXXXXXX 100644
15
--- a/include/hw/arm/fsl-imx25.h
16
+++ b/include/hw/arm/fsl-imx25.h
17
@@ -XXX,XX +XXX,XX @@ typedef struct FslIMX25State {
18
MemoryRegion rom[2];
19
MemoryRegion iram;
20
MemoryRegion iram_alias;
21
+ uint32_t phy_num;
22
} FslIMX25State;
23
24
/**
25
diff --git a/hw/arm/fsl-imx25.c b/hw/arm/fsl-imx25.c
26
index XXXXXXX..XXXXXXX 100644
27
--- a/hw/arm/fsl-imx25.c
28
+++ b/hw/arm/fsl-imx25.c
29
@@ -XXX,XX +XXX,XX @@ static void fsl_imx25_realize(DeviceState *dev, Error **errp)
30
epit_table[i].irq));
31
}
32
33
+ object_property_set_uint(OBJECT(&s->fec), "phy-num", s->phy_num, &err);
34
qdev_set_nic_properties(DEVICE(&s->fec), &nd_table[0]);
35
36
if (!sysbus_realize(SYS_BUS_DEVICE(&s->fec), errp)) {
37
@@ -XXX,XX +XXX,XX @@ static void fsl_imx25_realize(DeviceState *dev, Error **errp)
38
&s->iram_alias);
39
}
40
41
+static Property fsl_imx25_properties[] = {
42
+ DEFINE_PROP_UINT32("fec-phy-num", FslIMX25State, phy_num, 0),
43
+ DEFINE_PROP_END_OF_LIST(),
44
+};
45
+
46
static void fsl_imx25_class_init(ObjectClass *oc, void *data)
47
{
48
DeviceClass *dc = DEVICE_CLASS(oc);
49
50
+ device_class_set_props(dc, fsl_imx25_properties);
51
dc->realize = fsl_imx25_realize;
52
dc->desc = "i.MX25 SOC";
53
/*
54
--
55
2.20.1
56
57
diff view generated by jsdifflib
Deleted patch
1
From: Jean-Christophe Dubois <jcd@tribudubois.net>
2
1
3
Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net>
4
Message-id: 05a64e83eb1c0c865ac077b22c599425c024c02c.1593806826.git.jcd@tribudubois.net
5
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
6
[PMM: updated for object_property_set_uint() argument reordering]
7
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
8
---
9
include/hw/arm/fsl-imx6.h | 1 +
10
hw/arm/fsl-imx6.c | 7 +++++++
11
2 files changed, 8 insertions(+)
12
13
diff --git a/include/hw/arm/fsl-imx6.h b/include/hw/arm/fsl-imx6.h
14
index XXXXXXX..XXXXXXX 100644
15
--- a/include/hw/arm/fsl-imx6.h
16
+++ b/include/hw/arm/fsl-imx6.h
17
@@ -XXX,XX +XXX,XX @@ typedef struct FslIMX6State {
18
MemoryRegion caam;
19
MemoryRegion ocram;
20
MemoryRegion ocram_alias;
21
+ uint32_t phy_num;
22
} FslIMX6State;
23
24
25
diff --git a/hw/arm/fsl-imx6.c b/hw/arm/fsl-imx6.c
26
index XXXXXXX..XXXXXXX 100644
27
--- a/hw/arm/fsl-imx6.c
28
+++ b/hw/arm/fsl-imx6.c
29
@@ -XXX,XX +XXX,XX @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp)
30
spi_table[i].irq));
31
}
32
33
+ object_property_set_uint(OBJECT(&s->eth), "phy-num", s->phy_num, &err);
34
qdev_set_nic_properties(DEVICE(&s->eth), &nd_table[0]);
35
if (!sysbus_realize(SYS_BUS_DEVICE(&s->eth), errp)) {
36
return;
37
@@ -XXX,XX +XXX,XX @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp)
38
&s->ocram_alias);
39
}
40
41
+static Property fsl_imx6_properties[] = {
42
+ DEFINE_PROP_UINT32("fec-phy-num", FslIMX6State, phy_num, 0),
43
+ DEFINE_PROP_END_OF_LIST(),
44
+};
45
+
46
static void fsl_imx6_class_init(ObjectClass *oc, void *data)
47
{
48
DeviceClass *dc = DEVICE_CLASS(oc);
49
50
+ device_class_set_props(dc, fsl_imx6_properties);
51
dc->realize = fsl_imx6_realize;
52
dc->desc = "i.MX6 SOC";
53
/* Reason: Uses serial_hd() in the realize() function */
54
--
55
2.20.1
56
57
diff view generated by jsdifflib
Deleted patch
1
From: Jean-Christophe Dubois <jcd@tribudubois.net>
2
1
3
Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net>
4
Message-id: c850187322be9930e47c8b234c385a7d0da245cb.1593806826.git.jcd@tribudubois.net
5
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
6
[PMM: updated for object_property_set_uint() argument reordering]
7
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
8
---
9
include/hw/arm/fsl-imx7.h | 1 +
10
hw/arm/fsl-imx7.c | 9 +++++++++
11
2 files changed, 10 insertions(+)
12
13
diff --git a/include/hw/arm/fsl-imx7.h b/include/hw/arm/fsl-imx7.h
14
index XXXXXXX..XXXXXXX 100644
15
--- a/include/hw/arm/fsl-imx7.h
16
+++ b/include/hw/arm/fsl-imx7.h
17
@@ -XXX,XX +XXX,XX @@ typedef struct FslIMX7State {
18
IMX7GPRState gpr;
19
ChipideaState usb[FSL_IMX7_NUM_USBS];
20
DesignwarePCIEHost pcie;
21
+ uint32_t phy_num[FSL_IMX7_NUM_ETHS];
22
} FslIMX7State;
23
24
enum FslIMX7MemoryMap {
25
diff --git a/hw/arm/fsl-imx7.c b/hw/arm/fsl-imx7.c
26
index XXXXXXX..XXXXXXX 100644
27
--- a/hw/arm/fsl-imx7.c
28
+++ b/hw/arm/fsl-imx7.c
29
@@ -XXX,XX +XXX,XX @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp)
30
FSL_IMX7_ENET2_ADDR,
31
};
32
33
+ object_property_set_uint(OBJECT(&s->eth[i]), "phy-num",
34
+ s->phy_num[i], &error_abort);
35
object_property_set_uint(OBJECT(&s->eth[i]), "tx-ring-num",
36
FSL_IMX7_ETH_NUM_TX_RINGS, &error_abort);
37
qdev_set_nic_properties(DEVICE(&s->eth[i]), &nd_table[i]);
38
@@ -XXX,XX +XXX,XX @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp)
39
FSL_IMX7_PCIE_PHY_SIZE);
40
}
41
42
+static Property fsl_imx7_properties[] = {
43
+ DEFINE_PROP_UINT32("fec1-phy-num", FslIMX7State, phy_num[0], 0),
44
+ DEFINE_PROP_UINT32("fec2-phy-num", FslIMX7State, phy_num[1], 1),
45
+ DEFINE_PROP_END_OF_LIST(),
46
+};
47
+
48
static void fsl_imx7_class_init(ObjectClass *oc, void *data)
49
{
50
DeviceClass *dc = DEVICE_CLASS(oc);
51
52
+ device_class_set_props(dc, fsl_imx7_properties);
53
dc->realize = fsl_imx7_realize;
54
55
/* Reason: Uses serial_hds and nd_table in realize() directly */
56
--
57
2.20.1
58
59
diff view generated by jsdifflib
Deleted patch
1
From: David CARLIER <devnexen@gmail.com>
2
1
3
Tell Haiku to provide various BSD functions by setting BSD_SOURCE
4
and linking libbsd.
5
6
Signed-off-by: David Carlier <devnexen@gmail.com>
7
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
8
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
9
Message-id: 20200703145614.16684-2-peter.maydell@linaro.org
10
[PMM: expanded commit message]
11
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
12
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
13
---
14
configure | 4 ++--
15
1 file changed, 2 insertions(+), 2 deletions(-)
16
17
diff --git a/configure b/configure
18
index XXXXXXX..XXXXXXX 100755
19
--- a/configure
20
+++ b/configure
21
@@ -XXX,XX +XXX,XX @@ SunOS)
22
;;
23
Haiku)
24
haiku="yes"
25
- QEMU_CFLAGS="-DB_USE_POSITIVE_POSIX_ERRORS $QEMU_CFLAGS"
26
- LIBS="-lposix_error_mapper -lnetwork $LIBS"
27
+ QEMU_CFLAGS="-DB_USE_POSITIVE_POSIX_ERRORS -DBSD_SOURCE $QEMU_CFLAGS"
28
+ LIBS="-lposix_error_mapper -lnetwork -lbsd $LIBS"
29
;;
30
Linux)
31
audio_drv_list="try-pa oss"
32
--
33
2.20.1
34
35
diff view generated by jsdifflib
Deleted patch
1
From: David CARLIER <devnexen@gmail.com>
2
1
3
Instead of using an OS-specific ifdef test to select the "openpty()
4
is in pty.h" codepath, make configure check for the existence of
5
the header and use the new CONFIG_PTY instead.
6
7
This is necessary to build on Haiku, which also provides openpty()
8
via pty.h.
9
10
Signed-off-by: David Carlier <devnexen@gmail.com>
11
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
12
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
13
Message-id: 20200703145614.16684-3-peter.maydell@linaro.org
14
[PMM: Expanded commit message; rename to HAVE_PTY_H]
15
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
16
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
17
---
18
configure | 9 +++++++++
19
util/qemu-openpty.c | 2 +-
20
2 files changed, 10 insertions(+), 1 deletion(-)
21
22
diff --git a/configure b/configure
23
index XXXXXXX..XXXXXXX 100755
24
--- a/configure
25
+++ b/configure
26
@@ -XXX,XX +XXX,XX @@ else
27
l2tpv3=no
28
fi
29
30
+if check_include "pty.h" ; then
31
+ pty_h=yes
32
+else
33
+ pty_h=no
34
+fi
35
+
36
#########################################
37
# vhost interdependencies and host support
38
39
@@ -XXX,XX +XXX,XX @@ fi
40
if test "$sheepdog" = "yes" ; then
41
echo "CONFIG_SHEEPDOG=y" >> $config_host_mak
42
fi
43
+if test "$pty_h" = "yes" ; then
44
+ echo "HAVE_PTY_H=y" >> $config_host_mak
45
+fi
46
if test "$fuzzing" = "yes" ; then
47
if test "$have_fuzzer" = "yes"; then
48
FUZZ_LDFLAGS=" -fsanitize=address,fuzzer"
49
diff --git a/util/qemu-openpty.c b/util/qemu-openpty.c
50
index XXXXXXX..XXXXXXX 100644
51
--- a/util/qemu-openpty.c
52
+++ b/util/qemu-openpty.c
53
@@ -XXX,XX +XXX,XX @@
54
#include "qemu/osdep.h"
55
#include "qemu-common.h"
56
57
-#if defined(__GLIBC__)
58
+#if defined HAVE_PTY_H
59
# include <pty.h>
60
#elif defined CONFIG_BSD
61
# include <termios.h>
62
--
63
2.20.1
64
65
diff view generated by jsdifflib
Deleted patch
1
From: David CARLIER <devnexen@gmail.com>
2
1
3
Regularize our handling of <sys/signal.h>: currently we include it in
4
osdep.h, but only for OpenBSD, and we include it without an ifdef
5
guard in a couple of C files. This causes problems for Haiku, which
6
doesn't have that header.
7
8
Instead, check in configure whether sys/signal.h exists, and if it
9
does then always include it from osdep.h.
10
11
Signed-off-by: David Carlier <devnexen@gmail.com>
12
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
13
Reviewed-by: Thomas Huth <thuth@redhat.com>
14
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
15
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
16
Message-id: 20200703145614.16684-5-peter.maydell@linaro.org
17
[PMM: Expanded commit message; rename to HAVE_SYS_SIGNAL_H]
18
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
19
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
20
---
21
configure | 10 ++++++++++
22
include/qemu/osdep.h | 2 +-
23
hw/xen/xen-legacy-backend.c | 1 -
24
util/oslib-posix.c | 1 -
25
4 files changed, 11 insertions(+), 3 deletions(-)
26
27
diff --git a/configure b/configure
28
index XXXXXXX..XXXXXXX 100755
29
--- a/configure
30
+++ b/configure
31
@@ -XXX,XX +XXX,XX @@ if check_include "libdrm/drm.h" ; then
32
have_drm_h=yes
33
fi
34
35
+#########################################
36
+# sys/signal.h check
37
+have_sys_signal_h=no
38
+if check_include "sys/signal.h" ; then
39
+ have_sys_signal_h=yes
40
+fi
41
+
42
##########################################
43
# VTE probe
44
45
@@ -XXX,XX +XXX,XX @@ fi
46
if test "$have_openpty" = "yes" ; then
47
echo "HAVE_OPENPTY=y" >> $config_host_mak
48
fi
49
+if test "$have_sys_signal_h" = "yes" ; then
50
+ echo "HAVE_SYS_SIGNAL_H=y" >> $config_host_mak
51
+fi
52
53
# Work around a system header bug with some kernel/XFS header
54
# versions where they both try to define 'struct fsxattr':
55
diff --git a/include/qemu/osdep.h b/include/qemu/osdep.h
56
index XXXXXXX..XXXXXXX 100644
57
--- a/include/qemu/osdep.h
58
+++ b/include/qemu/osdep.h
59
@@ -XXX,XX +XXX,XX @@ extern int daemon(int, int);
60
#include <setjmp.h>
61
#include <signal.h>
62
63
-#ifdef __OpenBSD__
64
+#ifdef HAVE_SYS_SIGNAL_H
65
#include <sys/signal.h>
66
#endif
67
68
diff --git a/hw/xen/xen-legacy-backend.c b/hw/xen/xen-legacy-backend.c
69
index XXXXXXX..XXXXXXX 100644
70
--- a/hw/xen/xen-legacy-backend.c
71
+++ b/hw/xen/xen-legacy-backend.c
72
@@ -XXX,XX +XXX,XX @@
73
*/
74
75
#include "qemu/osdep.h"
76
-#include <sys/signal.h>
77
78
#include "hw/sysbus.h"
79
#include "hw/boards.h"
80
diff --git a/util/oslib-posix.c b/util/oslib-posix.c
81
index XXXXXXX..XXXXXXX 100644
82
--- a/util/oslib-posix.c
83
+++ b/util/oslib-posix.c
84
@@ -XXX,XX +XXX,XX @@
85
#include "qemu/sockets.h"
86
#include "qemu/thread.h"
87
#include <libgen.h>
88
-#include <sys/signal.h>
89
#include "qemu/cutils.h"
90
91
#ifdef CONFIG_LINUX
92
--
93
2.20.1
94
95
diff view generated by jsdifflib
Deleted patch
1
From: David CARLIER <devnexen@gmail.com>
2
1
3
Haiku doesn't provide SIGIO; fix this up in osdep.h by defining it as
4
equal to SIGPOLL.
5
6
Signed-off-by: David Carlier <devnexen@gmail.com>
7
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
8
Reviewed-by: Thomas Huth <thuth@redhat.com>
9
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
10
Message-id: 20200703145614.16684-6-peter.maydell@linaro.org
11
[PMM: Expanded commit message]
12
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
13
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
14
---
15
include/qemu/osdep.h | 4 ++++
16
1 file changed, 4 insertions(+)
17
18
diff --git a/include/qemu/osdep.h b/include/qemu/osdep.h
19
index XXXXXXX..XXXXXXX 100644
20
--- a/include/qemu/osdep.h
21
+++ b/include/qemu/osdep.h
22
@@ -XXX,XX +XXX,XX @@ void qemu_anon_ram_free(void *ptr, size_t size);
23
#define HAVE_CHARDEV_PARPORT 1
24
#endif
25
26
+#if defined(__HAIKU__)
27
+#define SIGIO SIGPOLL
28
+#endif
29
+
30
#if defined(CONFIG_LINUX)
31
#ifndef BUS_MCEERR_AR
32
#define BUS_MCEERR_AR 4
33
--
34
2.20.1
35
36
diff view generated by jsdifflib
1
Currently we have a free-floating set of IRQs and a function
1
The nseries machines have a codepath that allows them to load a
2
tosa_out_switch() which handle the GPIO lines on the tosa board which
2
secondary bootloader. This code wasn't checking that the
3
connect to LEDs, and another free-floating IRQ and tosa_reset()
3
load_image_targphys() succeeded. Check the return value and report
4
function to handle the GPIO line that resets the system. Encapsulate
4
the error to the user.
5
this behaviour in a simple QOM device.
6
5
7
This commit fixes Coverity issue CID 1421929 (which pointed out that
6
While we're in the vicinity, fix the comment style of the
8
the 'outsignals' in tosa_gpio_setup() were leaked), because it
7
comment documenting what this image load is doing.
9
removes the use of the qemu_allocate_irqs() API from this code
10
entirely.
11
8
9
Fixes: Coverity CID 1192904
12
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
10
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
13
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
11
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
14
Message-id: 20200628203748.14250-3-peter.maydell@linaro.org
12
Message-id: 20201103114918.11807-1-peter.maydell@linaro.org
15
---
13
---
16
hw/arm/tosa.c | 88 +++++++++++++++++++++++++++++++++++++--------------
14
hw/arm/nseries.c | 15 +++++++++++----
17
1 file changed, 64 insertions(+), 24 deletions(-)
15
1 file changed, 11 insertions(+), 4 deletions(-)
18
16
19
diff --git a/hw/arm/tosa.c b/hw/arm/tosa.c
17
diff --git a/hw/arm/nseries.c b/hw/arm/nseries.c
20
index XXXXXXX..XXXXXXX 100644
18
index XXXXXXX..XXXXXXX 100644
21
--- a/hw/arm/tosa.c
19
--- a/hw/arm/nseries.c
22
+++ b/hw/arm/tosa.c
20
+++ b/hw/arm/nseries.c
23
@@ -XXX,XX +XXX,XX @@ static void tosa_microdrive_attach(PXA2xxState *cpu)
21
@@ -XXX,XX +XXX,XX @@ static void n8x0_init(MachineState *machine,
24
pxa2xx_pcmcia_attach(cpu->pcmcia[0], md);
22
/* No, wait, better start at the ROM. */
25
}
23
s->mpu->cpu->env.regs[15] = OMAP2_Q2_BASE + 0x400000;
26
24
27
-static void tosa_out_switch(void *opaque, int line, int level)
25
- /* This is intended for loading the `secondary.bin' program from
28
+/*
26
+ /*
29
+ * Encapsulation of some GPIO line behaviour for the Tosa board
27
+ * This is intended for loading the `secondary.bin' program from
30
+ *
28
* Nokia images (the NOLO bootloader). The entry point seems
31
+ * QEMU interface:
29
* to be at OMAP2_Q2_BASE + 0x400000.
32
+ * + named GPIO inputs "leds[0..3]": assert to light LEDs
30
*
33
+ * + named GPIO input "reset": when asserted, resets the system
31
@@ -XXX,XX +XXX,XX @@ static void n8x0_init(MachineState *machine,
34
+ */
32
* for them the entry point needs to be set to OMAP2_SRAM_BASE.
35
+
33
*
36
+#define TYPE_TOSA_MISC_GPIO "tosa-misc-gpio"
34
* The code above is for loading the `zImage' file from Nokia
37
+#define TOSA_MISC_GPIO(obj) \
35
- * images. */
38
+ OBJECT_CHECK(TosaMiscGPIOState, (obj), TYPE_TOSA_MISC_GPIO)
36
- load_image_targphys(option_rom[0].name, OMAP2_Q2_BASE + 0x400000,
39
+
37
- machine->ram_size - 0x400000);
40
+typedef struct TosaMiscGPIOState {
38
+ * images.
41
+ SysBusDevice parent_obj;
39
+ */
42
+} TosaMiscGPIOState;
40
+ if (load_image_targphys(option_rom[0].name,
43
+
41
+ OMAP2_Q2_BASE + 0x400000,
44
+static void tosa_gpio_leds(void *opaque, int line, int level)
42
+ machine->ram_size - 0x400000) < 0) {
45
{
43
+ error_report("Failed to load secondary bootloader %s",
46
switch (line) {
44
+ option_rom[0].name);
47
- case 0:
45
+ exit(EXIT_FAILURE);
48
- fprintf(stderr, "blue LED %s.\n", level ? "on" : "off");
46
+ }
49
- break;
47
50
- case 1:
48
n800_setup_nolo_tags(nolo_tags);
51
- fprintf(stderr, "green LED %s.\n", level ? "on" : "off");
49
cpu_physical_memory_write(OMAP2_SRAM_BASE, nolo_tags, 0x10000);
52
- break;
53
- case 2:
54
- fprintf(stderr, "amber LED %s.\n", level ? "on" : "off");
55
- break;
56
- case 3:
57
- fprintf(stderr, "wlan LED %s.\n", level ? "on" : "off");
58
- break;
59
- default:
60
- fprintf(stderr, "Uhandled out event: %d = %d\n", line, level);
61
- break;
62
+ case 0:
63
+ fprintf(stderr, "blue LED %s.\n", level ? "on" : "off");
64
+ break;
65
+ case 1:
66
+ fprintf(stderr, "green LED %s.\n", level ? "on" : "off");
67
+ break;
68
+ case 2:
69
+ fprintf(stderr, "amber LED %s.\n", level ? "on" : "off");
70
+ break;
71
+ case 3:
72
+ fprintf(stderr, "wlan LED %s.\n", level ? "on" : "off");
73
+ break;
74
+ default:
75
+ g_assert_not_reached();
76
}
77
}
78
79
@@ -XXX,XX +XXX,XX @@ static void tosa_reset(void *opaque, int line, int level)
80
}
81
}
82
83
+static void tosa_misc_gpio_init(Object *obj)
84
+{
85
+ DeviceState *dev = DEVICE(obj);
86
+
87
+ qdev_init_gpio_in_named(dev, tosa_gpio_leds, "leds", 4);
88
+ qdev_init_gpio_in_named(dev, tosa_reset, "reset", 1);
89
+}
90
+
91
static void tosa_gpio_setup(PXA2xxState *cpu,
92
DeviceState *scp0,
93
DeviceState *scp1,
94
TC6393xbState *tmio)
95
{
96
- qemu_irq *outsignals = qemu_allocate_irqs(tosa_out_switch, cpu, 4);
97
- qemu_irq reset;
98
+ DeviceState *misc_gpio;
99
+
100
+ misc_gpio = sysbus_create_simple(TYPE_TOSA_MISC_GPIO, -1, NULL);
101
102
/* MMC/SD host */
103
pxa2xx_mmci_handlers(cpu->mmc,
104
@@ -XXX,XX +XXX,XX @@ static void tosa_gpio_setup(PXA2xxState *cpu,
105
qemu_irq_invert(qdev_get_gpio_in(cpu->gpio, TOSA_GPIO_nSD_DETECT)));
106
107
/* Handle reset */
108
- reset = qemu_allocate_irq(tosa_reset, cpu, 0);
109
- qdev_connect_gpio_out(cpu->gpio, TOSA_GPIO_ON_RESET, reset);
110
+ qdev_connect_gpio_out(cpu->gpio, TOSA_GPIO_ON_RESET,
111
+ qdev_get_gpio_in_named(misc_gpio, "reset", 0));
112
113
/* PCMCIA signals: card's IRQ and Card-Detect */
114
pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[0],
115
@@ -XXX,XX +XXX,XX @@ static void tosa_gpio_setup(PXA2xxState *cpu,
116
qdev_get_gpio_in(cpu->gpio, TOSA_GPIO_JC_CF_IRQ),
117
NULL);
118
119
- qdev_connect_gpio_out(scp1, TOSA_GPIO_BT_LED, outsignals[0]);
120
- qdev_connect_gpio_out(scp1, TOSA_GPIO_NOTE_LED, outsignals[1]);
121
- qdev_connect_gpio_out(scp1, TOSA_GPIO_CHRG_ERR_LED, outsignals[2]);
122
- qdev_connect_gpio_out(scp1, TOSA_GPIO_WLAN_LED, outsignals[3]);
123
+ qdev_connect_gpio_out(scp1, TOSA_GPIO_BT_LED,
124
+ qdev_get_gpio_in_named(misc_gpio, "leds", 0));
125
+ qdev_connect_gpio_out(scp1, TOSA_GPIO_NOTE_LED,
126
+ qdev_get_gpio_in_named(misc_gpio, "leds", 1));
127
+ qdev_connect_gpio_out(scp1, TOSA_GPIO_CHRG_ERR_LED,
128
+ qdev_get_gpio_in_named(misc_gpio, "leds", 2));
129
+ qdev_connect_gpio_out(scp1, TOSA_GPIO_WLAN_LED,
130
+ qdev_get_gpio_in_named(misc_gpio, "leds", 3));
131
132
qdev_connect_gpio_out(scp1, TOSA_GPIO_TC6393XB_L3V_ON, tc6393xb_l3v_get(tmio));
133
134
@@ -XXX,XX +XXX,XX @@ static const TypeInfo tosa_ssp_info = {
135
.class_init = tosa_ssp_class_init,
136
};
137
138
+static const TypeInfo tosa_misc_gpio_info = {
139
+ .name = "tosa-misc-gpio",
140
+ .parent = TYPE_SYS_BUS_DEVICE,
141
+ .instance_size = sizeof(TosaMiscGPIOState),
142
+ .instance_init = tosa_misc_gpio_init,
143
+ /*
144
+ * No class init required: device has no internal state so does not
145
+ * need to set up reset or vmstate, and has no realize method.
146
+ */
147
+};
148
+
149
static void tosa_register_types(void)
150
{
151
type_register_static(&tosa_dac_info);
152
type_register_static(&tosa_ssp_info);
153
+ type_register_static(&tosa_misc_gpio_info);
154
}
155
156
type_init(tosa_register_types)
157
--
50
--
158
2.20.1
51
2.20.1
159
52
160
53
diff view generated by jsdifflib
1
From: David CARLIER <devnexen@gmail.com>
1
From: Havard Skinnemoen <hskinnemoen@google.com>
2
2
3
Haiku puts the bswap* functions in <endian.h>; pull in that
3
The number of runs is equal to the number of 0-1 and 1-0 transitions,
4
include file on that platform.
4
plus one. Currently, it's counting the number of times these transitions
5
do _not_ happen, plus one.
5
6
6
Signed-off-by: David Carlier <devnexen@gmail.com>
7
Source:
7
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
8
https://nvlpubs.nist.gov/nistpubs/Legacy/SP/nistspecialpublication800-22r1a.pdf
8
Reviewed-by: Thomas Huth <thuth@redhat.com>
9
section 2.3.4 point (3).
9
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
10
10
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
11
Signed-off-by: Havard Skinnemoen <hskinnemoen@google.com>
11
Message-id: 20200703145614.16684-7-peter.maydell@linaro.org
12
Message-id: 20201103011457.2959989-2-hskinnemoen@google.com
12
[PMM: Expanded commit message]
13
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
13
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
14
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
14
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
15
---
15
---
16
include/qemu/bswap.h | 2 ++
16
tests/qtest/npcm7xx_rng-test.c | 2 +-
17
1 file changed, 2 insertions(+)
17
1 file changed, 1 insertion(+), 1 deletion(-)
18
18
19
diff --git a/include/qemu/bswap.h b/include/qemu/bswap.h
19
diff --git a/tests/qtest/npcm7xx_rng-test.c b/tests/qtest/npcm7xx_rng-test.c
20
index XXXXXXX..XXXXXXX 100644
20
index XXXXXXX..XXXXXXX 100644
21
--- a/include/qemu/bswap.h
21
--- a/tests/qtest/npcm7xx_rng-test.c
22
+++ b/include/qemu/bswap.h
22
+++ b/tests/qtest/npcm7xx_rng-test.c
23
@@ -XXX,XX +XXX,XX @@
23
@@ -XXX,XX +XXX,XX @@ static double calc_runs_p(const unsigned long *buf, unsigned int nr_bits)
24
# include <machine/bswap.h>
24
pi = (double)nr_ones / nr_bits;
25
#elif defined(__FreeBSD__)
25
26
# include <sys/endian.h>
26
for (k = 0; k < nr_bits - 1; k++) {
27
+#elif defined(__HAIKU__)
27
- vn_obs += !(test_bit(k, buf) ^ test_bit(k + 1, buf));
28
+# include <endian.h>
28
+ vn_obs += (test_bit(k, buf) ^ test_bit(k + 1, buf));
29
#elif defined(CONFIG_BYTESWAP_H)
29
}
30
# include <byteswap.h>
30
vn_obs += 1;
31
31
32
--
32
--
33
2.20.1
33
2.20.1
34
34
35
35
diff view generated by jsdifflib
Deleted patch
1
From: Wentong Wu <wentong.wu@intel.com>
2
1
3
Add DISAS_NORETURN case for nothing more to generate because at runtime
4
execution will never return from some helper call. And at the same time
5
replace DISAS_UPDATE in t_gen_helper_raise_exception and gen_exception
6
with the newly added DISAS_NORETURN.
7
8
Signed-off-by: Wentong Wu <wentong.wu@intel.com>
9
Message-id: 20200710233433.19729-1-wentong.wu@intel.com
10
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
11
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
12
---
13
target/nios2/translate.c | 5 +++--
14
1 file changed, 3 insertions(+), 2 deletions(-)
15
16
diff --git a/target/nios2/translate.c b/target/nios2/translate.c
17
index XXXXXXX..XXXXXXX 100644
18
--- a/target/nios2/translate.c
19
+++ b/target/nios2/translate.c
20
@@ -XXX,XX +XXX,XX @@ static void t_gen_helper_raise_exception(DisasContext *dc,
21
tcg_gen_movi_tl(dc->cpu_R[R_PC], dc->pc);
22
gen_helper_raise_exception(dc->cpu_env, tmp);
23
tcg_temp_free_i32(tmp);
24
- dc->is_jmp = DISAS_UPDATE;
25
+ dc->is_jmp = DISAS_NORETURN;
26
}
27
28
static bool use_goto_tb(DisasContext *dc, uint32_t dest)
29
@@ -XXX,XX +XXX,XX @@ static void gen_exception(DisasContext *dc, uint32_t excp)
30
tcg_gen_movi_tl(cpu_R[R_PC], dc->pc);
31
gen_helper_raise_exception(cpu_env, tmp);
32
tcg_temp_free_i32(tmp);
33
- dc->is_jmp = DISAS_UPDATE;
34
+ dc->is_jmp = DISAS_NORETURN;
35
}
36
37
/* generate intermediate code for basic block 'tb'. */
38
@@ -XXX,XX +XXX,XX @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns)
39
tcg_gen_exit_tb(NULL, 0);
40
break;
41
42
+ case DISAS_NORETURN:
43
case DISAS_TB_JUMP:
44
/* nothing more to generate */
45
break;
46
--
47
2.20.1
48
49
diff view generated by jsdifflib
Deleted patch
1
Remove the hardcoded tabs from hw/arm/tosa.c. There aren't
2
many, but since they're all in constant #defines they're not
3
going to go away with our usual "only when we touch a function"
4
policy on reformatting.
5
1
6
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
7
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
8
Message-id: 20200628203748.14250-2-peter.maydell@linaro.org
9
---
10
hw/arm/tosa.c | 44 ++++++++++++++++++++++----------------------
11
1 file changed, 22 insertions(+), 22 deletions(-)
12
13
diff --git a/hw/arm/tosa.c b/hw/arm/tosa.c
14
index XXXXXXX..XXXXXXX 100644
15
--- a/hw/arm/tosa.c
16
+++ b/hw/arm/tosa.c
17
@@ -XXX,XX +XXX,XX @@
18
#include "hw/sysbus.h"
19
#include "exec/address-spaces.h"
20
21
-#define TOSA_RAM 0x04000000
22
-#define TOSA_ROM    0x00800000
23
+#define TOSA_RAM 0x04000000
24
+#define TOSA_ROM 0x00800000
25
26
-#define TOSA_GPIO_USB_IN        (5)
27
-#define TOSA_GPIO_nSD_DETECT    (9)
28
-#define TOSA_GPIO_ON_RESET        (19)
29
-#define TOSA_GPIO_CF_IRQ        (21)    /* CF slot0 Ready */
30
-#define TOSA_GPIO_CF_CD            (13)
31
-#define TOSA_GPIO_TC6393XB_INT (15)
32
-#define TOSA_GPIO_JC_CF_IRQ        (36)    /* CF slot1 Ready */
33
+#define TOSA_GPIO_USB_IN (5)
34
+#define TOSA_GPIO_nSD_DETECT (9)
35
+#define TOSA_GPIO_ON_RESET (19)
36
+#define TOSA_GPIO_CF_IRQ (21) /* CF slot0 Ready */
37
+#define TOSA_GPIO_CF_CD (13)
38
+#define TOSA_GPIO_TC6393XB_INT (15)
39
+#define TOSA_GPIO_JC_CF_IRQ (36) /* CF slot1 Ready */
40
41
-#define TOSA_SCOOP_GPIO_BASE    1
42
-#define TOSA_GPIO_IR_POWERDWN    (TOSA_SCOOP_GPIO_BASE + 2)
43
-#define TOSA_GPIO_SD_WP            (TOSA_SCOOP_GPIO_BASE + 3)
44
-#define TOSA_GPIO_PWR_ON        (TOSA_SCOOP_GPIO_BASE + 4)
45
+#define TOSA_SCOOP_GPIO_BASE 1
46
+#define TOSA_GPIO_IR_POWERDWN (TOSA_SCOOP_GPIO_BASE + 2)
47
+#define TOSA_GPIO_SD_WP (TOSA_SCOOP_GPIO_BASE + 3)
48
+#define TOSA_GPIO_PWR_ON (TOSA_SCOOP_GPIO_BASE + 4)
49
50
-#define TOSA_SCOOP_JC_GPIO_BASE        1
51
-#define TOSA_GPIO_BT_LED        (TOSA_SCOOP_JC_GPIO_BASE + 0)
52
-#define TOSA_GPIO_NOTE_LED        (TOSA_SCOOP_JC_GPIO_BASE + 1)
53
-#define TOSA_GPIO_CHRG_ERR_LED        (TOSA_SCOOP_JC_GPIO_BASE + 2)
54
-#define TOSA_GPIO_TC6393XB_L3V_ON    (TOSA_SCOOP_JC_GPIO_BASE + 5)
55
-#define TOSA_GPIO_WLAN_LED        (TOSA_SCOOP_JC_GPIO_BASE + 7)
56
+#define TOSA_SCOOP_JC_GPIO_BASE 1
57
+#define TOSA_GPIO_BT_LED (TOSA_SCOOP_JC_GPIO_BASE + 0)
58
+#define TOSA_GPIO_NOTE_LED (TOSA_SCOOP_JC_GPIO_BASE + 1)
59
+#define TOSA_GPIO_CHRG_ERR_LED (TOSA_SCOOP_JC_GPIO_BASE + 2)
60
+#define TOSA_GPIO_TC6393XB_L3V_ON (TOSA_SCOOP_JC_GPIO_BASE + 5)
61
+#define TOSA_GPIO_WLAN_LED (TOSA_SCOOP_JC_GPIO_BASE + 7)
62
63
-#define    DAC_BASE    0x4e
64
-#define DAC_CH1        0
65
-#define DAC_CH2        1
66
+#define DAC_BASE 0x4e
67
+#define DAC_CH1 0
68
+#define DAC_CH2 1
69
70
static void tosa_microdrive_attach(PXA2xxState *cpu)
71
{
72
--
73
2.20.1
74
75
diff view generated by jsdifflib
1
Remove hard-tabs from palm.c.
1
Checks for UNDEF cases should go before the "is VFP enabled?" access
2
check, except in special cases. Move a stray UNDEF check in the VTBL
3
trans function up above the access check.
2
4
3
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
5
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
4
Reviewed-by: Li Qiang <liq3ea@gmail.com>
6
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
5
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
7
Message-id: 20201109145324.2859-1-peter.maydell@linaro.org
6
Message-id: 20200628214230.2592-2-peter.maydell@linaro.org
7
---
8
---
8
hw/arm/palm.c | 64 +++++++++++++++++++++++++--------------------------
9
target/arm/translate-neon.c.inc | 8 ++++----
9
1 file changed, 32 insertions(+), 32 deletions(-)
10
1 file changed, 4 insertions(+), 4 deletions(-)
10
11
11
diff --git a/hw/arm/palm.c b/hw/arm/palm.c
12
diff --git a/target/arm/translate-neon.c.inc b/target/arm/translate-neon.c.inc
12
index XXXXXXX..XXXXXXX 100644
13
index XXXXXXX..XXXXXXX 100644
13
--- a/hw/arm/palm.c
14
--- a/target/arm/translate-neon.c.inc
14
+++ b/hw/arm/palm.c
15
+++ b/target/arm/translate-neon.c.inc
15
@@ -XXX,XX +XXX,XX @@ static const MemoryRegionOps static_ops = {
16
@@ -XXX,XX +XXX,XX @@ static bool trans_VTBL(DisasContext *s, arg_VTBL *a)
16
/* Palm Tunsgten|E support */
17
return false;
17
18
}
18
/* Shared GPIOs */
19
19
-#define PALMTE_USBDETECT_GPIO    0
20
- if (!vfp_access_check(s)) {
20
-#define PALMTE_USB_OR_DC_GPIO    1
21
- return true;
21
-#define PALMTE_TSC_GPIO        4
22
- }
22
-#define PALMTE_PINTDAV_GPIO    6
23
-
23
-#define PALMTE_MMC_WP_GPIO    8
24
if ((a->vn + a->len + 1) > 32) {
24
-#define PALMTE_MMC_POWER_GPIO    9
25
/*
25
-#define PALMTE_HDQ_GPIO        11
26
* This is UNPREDICTABLE; we choose to UNDEF to avoid the
26
-#define PALMTE_HEADPHONES_GPIO    14
27
@@ -XXX,XX +XXX,XX @@ static bool trans_VTBL(DisasContext *s, arg_VTBL *a)
27
-#define PALMTE_SPEAKER_GPIO    15
28
return false;
28
+#define PALMTE_USBDETECT_GPIO 0
29
}
29
+#define PALMTE_USB_OR_DC_GPIO 1
30
30
+#define PALMTE_TSC_GPIO 4
31
+ if (!vfp_access_check(s)) {
31
+#define PALMTE_PINTDAV_GPIO 6
32
+ return true;
32
+#define PALMTE_MMC_WP_GPIO 8
33
+ }
33
+#define PALMTE_MMC_POWER_GPIO 9
34
+
34
+#define PALMTE_HDQ_GPIO 11
35
desc = tcg_const_i32((a->vn << 2) | a->len);
35
+#define PALMTE_HEADPHONES_GPIO 14
36
def = tcg_temp_new_i64();
36
+#define PALMTE_SPEAKER_GPIO 15
37
if (a->op) {
37
/* MPU private GPIOs */
38
-#define PALMTE_DC_GPIO        2
39
-#define PALMTE_MMC_SWITCH_GPIO    4
40
-#define PALMTE_MMC1_GPIO    6
41
-#define PALMTE_MMC2_GPIO    7
42
-#define PALMTE_MMC3_GPIO    11
43
+#define PALMTE_DC_GPIO 2
44
+#define PALMTE_MMC_SWITCH_GPIO 4
45
+#define PALMTE_MMC1_GPIO 6
46
+#define PALMTE_MMC2_GPIO 7
47
+#define PALMTE_MMC3_GPIO 11
48
49
static MouseTransformInfo palmte_pointercal = {
50
.x = 320,
51
@@ -XXX,XX +XXX,XX @@ static struct {
52
int column;
53
} palmte_keymap[0x80] = {
54
[0 ... 0x7f] = { -1, -1 },
55
- [0x3b] = { 0, 0 },    /* F1    -> Calendar */
56
- [0x3c] = { 1, 0 },    /* F2    -> Contacts */
57
- [0x3d] = { 2, 0 },    /* F3    -> Tasks List */
58
- [0x3e] = { 3, 0 },    /* F4    -> Note Pad */
59
- [0x01] = { 4, 0 },    /* Esc    -> Power */
60
- [0x4b] = { 0, 1 },    /*      Left */
61
- [0x50] = { 1, 1 },    /*      Down */
62
- [0x48] = { 2, 1 },    /*     Up */
63
- [0x4d] = { 3, 1 },    /*     Right */
64
- [0x4c] = { 4, 1 },    /*      Centre */
65
- [0x39] = { 4, 1 },    /* Spc    -> Centre */
66
+ [0x3b] = { 0, 0 }, /* F1 -> Calendar */
67
+ [0x3c] = { 1, 0 }, /* F2 -> Contacts */
68
+ [0x3d] = { 2, 0 }, /* F3 -> Tasks List */
69
+ [0x3e] = { 3, 0 }, /* F4 -> Note Pad */
70
+ [0x01] = { 4, 0 }, /* Esc -> Power */
71
+ [0x4b] = { 0, 1 }, /* Left */
72
+ [0x50] = { 1, 1 }, /* Down */
73
+ [0x48] = { 2, 1 }, /* Up */
74
+ [0x4d] = { 3, 1 }, /* Right */
75
+ [0x4c] = { 4, 1 }, /* Centre */
76
+ [0x39] = { 4, 1 }, /* Spc -> Centre */
77
};
78
79
static void palmte_button_event(void *opaque, int keycode)
80
@@ -XXX,XX +XXX,XX @@ static void palmte_gpio_setup(struct omap_mpu_state_s *cpu)
81
[PALMTE_MMC_SWITCH_GPIO]));
82
83
misc_gpio = qemu_allocate_irqs(palmte_onoff_gpios, cpu, 7);
84
- qdev_connect_gpio_out(cpu->gpio, PALMTE_MMC_POWER_GPIO,    misc_gpio[0]);
85
- qdev_connect_gpio_out(cpu->gpio, PALMTE_SPEAKER_GPIO,    misc_gpio[1]);
86
- qdev_connect_gpio_out(cpu->gpio, 11,            misc_gpio[2]);
87
- qdev_connect_gpio_out(cpu->gpio, 12,            misc_gpio[3]);
88
- qdev_connect_gpio_out(cpu->gpio, 13,            misc_gpio[4]);
89
- omap_mpuio_out_set(cpu->mpuio, 1,                misc_gpio[5]);
90
- omap_mpuio_out_set(cpu->mpuio, 3,                misc_gpio[6]);
91
+ qdev_connect_gpio_out(cpu->gpio, PALMTE_MMC_POWER_GPIO, misc_gpio[0]);
92
+ qdev_connect_gpio_out(cpu->gpio, PALMTE_SPEAKER_GPIO, misc_gpio[1]);
93
+ qdev_connect_gpio_out(cpu->gpio, 11, misc_gpio[2]);
94
+ qdev_connect_gpio_out(cpu->gpio, 12, misc_gpio[3]);
95
+ qdev_connect_gpio_out(cpu->gpio, 13, misc_gpio[4]);
96
+ omap_mpuio_out_set(cpu->mpuio, 1, misc_gpio[5]);
97
+ omap_mpuio_out_set(cpu->mpuio, 3, misc_gpio[6]);
98
99
/* Reset some inputs to initial state. */
100
qemu_irq_lower(qdev_get_gpio_in(cpu->gpio, PALMTE_USBDETECT_GPIO));
101
--
38
--
102
2.20.1
39
2.20.1
103
40
104
41
diff view generated by jsdifflib