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[PATCH 00/21] target/xtensa: implement double precision FPU

Max Filippov posted 21 patches 3 years, 9 months ago
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git fetch https://github.com/patchew-project/qemu tags/patchew/20200706234737.32378-1-jcmvbkbc@gmail.com
Maintainers: Max Filippov <jcmvbkbc@gmail.com>
There is a newer version of this series
fpu/softfloat-specialize.inc.c                |    276 +-
fpu/softfloat.c                               |      2 +-
include/fpu/softfloat-helpers.h               |     10 +
include/fpu/softfloat-types.h                 |      2 +
target/xtensa/Makefile.objs                   |      2 +
target/xtensa/core-DE_233L_FPU.c              |     31 +
target/xtensa/core-DE_233L_FPU/core-isa.h     |    727 +
target/xtensa/core-DE_233L_FPU/core-matmap.h  |    717 +
.../xtensa/core-DE_233L_FPU/gdb-config.inc.c  |    277 +
.../core-DE_233L_FPU/xtensa-modules.inc.c     |  20758 ++
target/xtensa/core-dsp3400.c                  |     31 +
target/xtensa/core-dsp3400/core-isa.h         |    452 +
target/xtensa/core-dsp3400/core-matmap.h      |    312 +
target/xtensa/core-dsp3400/gdb-config.inc.c   |    400 +
.../xtensa/core-dsp3400/xtensa-modules.inc.c  | 171906 +++++++++++++++
target/xtensa/cpu.c                           |      4 +
target/xtensa/cpu.h                           |      7 +-
target/xtensa/fpu_helper.c                    |    314 +-
target/xtensa/helper.c                        |      4 +-
target/xtensa/helper.h                        |     53 +-
target/xtensa/overlay_tool.h                  |      6 +
target/xtensa/translate.c                     |   1345 +-
tests/tcg/xtensa/fpu.h                        |    142 +
tests/tcg/xtensa/macros.inc                   |     10 +-
tests/tcg/xtensa/test_dfp0_arith.S            |    153 +
tests/tcg/xtensa/test_fp0_arith.S             |    266 +-
tests/tcg/xtensa/test_fp0_conv.S              |    299 +-
tests/tcg/xtensa/test_fp0_div.S               |     82 +
tests/tcg/xtensa/test_fp0_sqrt.S              |     76 +
tests/tcg/xtensa/test_fp1.S                   |     62 +-
tests/tcg/xtensa/test_lsc.S                   |    170 +-
31 files changed, 198354 insertions(+), 542 deletions(-)
create mode 100644 target/xtensa/core-DE_233L_FPU.c
create mode 100644 target/xtensa/core-DE_233L_FPU/core-isa.h
create mode 100644 target/xtensa/core-DE_233L_FPU/core-matmap.h
create mode 100644 target/xtensa/core-DE_233L_FPU/gdb-config.inc.c
create mode 100644 target/xtensa/core-DE_233L_FPU/xtensa-modules.inc.c
create mode 100644 target/xtensa/core-dsp3400.c
create mode 100644 target/xtensa/core-dsp3400/core-isa.h
create mode 100644 target/xtensa/core-dsp3400/core-matmap.h
create mode 100644 target/xtensa/core-dsp3400/gdb-config.inc.c
create mode 100644 target/xtensa/core-dsp3400/xtensa-modules.inc.c
create mode 100644 tests/tcg/xtensa/fpu.h
create mode 100644 tests/tcg/xtensa/test_dfp0_arith.S
create mode 100644 tests/tcg/xtensa/test_fp0_div.S
create mode 100644 tests/tcg/xtensa/test_fp0_sqrt.S
[PATCH 00/21] target/xtensa: implement double precision FPU
Posted by Max Filippov 3 years, 9 months ago 
Hello,

this series implements double precision floating point unit option for
target/xtensa, updates FPU tests and adds two new CPU cores, one with
FPU2000 option and one with DFPU option.

Max Filippov (21):
  softfloat: make NO_SIGNALING_NANS runtime property
  softfloat: pass float_status pointer to pickNaN
  softfloat: add xtensa specialization for pickNaNMulAdd
  target/xtensa: add geometry to xtensa_get_regfile_by_name
  target/xtensa: support copying registers up to 64 bits wide
  target/xtensa: rename FPU2000 translators and helpers
  target/xtensa: move FSR/FCR register accessors
  target/xtensa: don't access BR regfile directly
  target/xtensa: add DFP option, registers and opcodes
  target/xtensa: implement FPU division and square root
  tests/tcg/xtensa: fix test execution on ISS
  tests/tcg/xtensa: update test_fp0_arith for DFPU
  tests/tcg/xtensa: expand madd tests
  tests/tcg/xtensa: update test_fp0_conv for DFPU
  tests/tcg/xtensa: update test_fp1 for DFPU
  tests/tcg/xtensa: update test_lsc for DFPU
  tests/tcg/xtensa: add fp0 div and sqrt tests
  tests/tcg/xtensa: test double precision load/store
  tests/tcg/xtensa: add DFP0 arith tests
  target/xtensa: import DE_233L_FPU core
  target/xtensa: import DSP3400 core

 fpu/softfloat-specialize.inc.c                |    276 +-
 fpu/softfloat.c                               |      2 +-
 include/fpu/softfloat-helpers.h               |     10 +
 include/fpu/softfloat-types.h                 |      2 +
 target/xtensa/Makefile.objs                   |      2 +
 target/xtensa/core-DE_233L_FPU.c              |     31 +
 target/xtensa/core-DE_233L_FPU/core-isa.h     |    727 +
 target/xtensa/core-DE_233L_FPU/core-matmap.h  |    717 +
 .../xtensa/core-DE_233L_FPU/gdb-config.inc.c  |    277 +
 .../core-DE_233L_FPU/xtensa-modules.inc.c     |  20758 ++
 target/xtensa/core-dsp3400.c                  |     31 +
 target/xtensa/core-dsp3400/core-isa.h         |    452 +
 target/xtensa/core-dsp3400/core-matmap.h      |    312 +
 target/xtensa/core-dsp3400/gdb-config.inc.c   |    400 +
 .../xtensa/core-dsp3400/xtensa-modules.inc.c  | 171906 +++++++++++++++
 target/xtensa/cpu.c                           |      4 +
 target/xtensa/cpu.h                           |      7 +-
 target/xtensa/fpu_helper.c                    |    314 +-
 target/xtensa/helper.c                        |      4 +-
 target/xtensa/helper.h                        |     53 +-
 target/xtensa/overlay_tool.h                  |      6 +
 target/xtensa/translate.c                     |   1345 +-
 tests/tcg/xtensa/fpu.h                        |    142 +
 tests/tcg/xtensa/macros.inc                   |     10 +-
 tests/tcg/xtensa/test_dfp0_arith.S            |    153 +
 tests/tcg/xtensa/test_fp0_arith.S             |    266 +-
 tests/tcg/xtensa/test_fp0_conv.S              |    299 +-
 tests/tcg/xtensa/test_fp0_div.S               |     82 +
 tests/tcg/xtensa/test_fp0_sqrt.S              |     76 +
 tests/tcg/xtensa/test_fp1.S                   |     62 +-
 tests/tcg/xtensa/test_lsc.S                   |    170 +-
 31 files changed, 198354 insertions(+), 542 deletions(-)
 create mode 100644 target/xtensa/core-DE_233L_FPU.c
 create mode 100644 target/xtensa/core-DE_233L_FPU/core-isa.h
 create mode 100644 target/xtensa/core-DE_233L_FPU/core-matmap.h
 create mode 100644 target/xtensa/core-DE_233L_FPU/gdb-config.inc.c
 create mode 100644 target/xtensa/core-DE_233L_FPU/xtensa-modules.inc.c
 create mode 100644 target/xtensa/core-dsp3400.c
 create mode 100644 target/xtensa/core-dsp3400/core-isa.h
 create mode 100644 target/xtensa/core-dsp3400/core-matmap.h
 create mode 100644 target/xtensa/core-dsp3400/gdb-config.inc.c
 create mode 100644 target/xtensa/core-dsp3400/xtensa-modules.inc.c
 create mode 100644 tests/tcg/xtensa/fpu.h
 create mode 100644 tests/tcg/xtensa/test_dfp0_arith.S
 create mode 100644 tests/tcg/xtensa/test_fp0_div.S
 create mode 100644 tests/tcg/xtensa/test_fp0_sqrt.S

-- 
2.20.1
Re: [PATCH 00/21] target/xtensa: implement double precision FPU
Posted by Alex Bennée 3 years, 9 months ago 
Max Filippov <jcmvbkbc@gmail.com> writes:

> Hello,
>
> this series implements double precision floating point unit option for
> target/xtensa, updates FPU tests and adds two new CPU cores, one with
> FPU2000 option and one with DFPU option.
>
> Max Filippov (21):
>   softfloat: make NO_SIGNALING_NANS runtime property
>   softfloat: pass float_status pointer to pickNaN
>   softfloat: add xtensa specialization for pickNaNMulAdd

I've only looked at the softfloat bits as I'm not familiar with xtensa
at all. However you can have a vague:

Tested-by: Alex Bennée <alex.bennee@linaro.org>

for the series - congratulations you pass your own tests ;-)

-- 
Alex Bennée
Re: [PATCH 00/21] target/xtensa: implement double precision FPU
Posted by Max Filippov 3 years, 9 months ago 
On Tue, Jul 7, 2020 at 4:31 AM Alex Bennée <alex.bennee@linaro.org> wrote:
> I've only looked at the softfloat bits as I'm not familiar with xtensa

Thanks for taking a look!

> at all. However you can have a vague:
>
> Tested-by: Alex Bennée <alex.bennee@linaro.org>
>
> for the series - congratulations you pass your own tests ;-)

Unless you've built toolchains for the newly added cores and
run the tests on these cores it only means that new tests are
properly disabled for the cores without FPU/DFPU. I'll
take it as an independent build test (:

--
Thanks.
-- Max
Re: [PATCH 00/21] target/xtensa: implement double precision FPU
Posted by Alex Bennée 3 years, 9 months ago 
Max Filippov <jcmvbkbc@gmail.com> writes:

> On Tue, Jul 7, 2020 at 4:31 AM Alex Bennée <alex.bennee@linaro.org> wrote:
>> I've only looked at the softfloat bits as I'm not familiar with xtensa
>
> Thanks for taking a look!
>
>> at all. However you can have a vague:
>>
>> Tested-by: Alex Bennée <alex.bennee@linaro.org>
>>
>> for the series - congratulations you pass your own tests ;-)
>
> Unless you've built toolchains for the newly added cores and
> run the tests on these cores it only means that new tests are
> properly disabled for the cores without FPU/DFPU. I'll
> take it as an independent build test (:

Well it ran some xtensa tests thanks to the docker cross compiler
support. Do you know what toolchains we need?

Currently we have the following:

  ENV CPU_LIST csp dc232b dc233c
  ENV TOOLCHAIN_RELEASE 2018.02

  RUN for cpu in $CPU_LIST; do \
          curl -#SL http://github.com/foss-xtensa/toolchain/releases/download/$TOOLCHAIN_RELEASE/x86_64-$TOOLCHAIN_RELEASE-xtensa-$cpu-elf.tar.gz \
          | tar -xzC /opt; \
      done

  ENV PATH $PATH:/opt/$TOOLCHAIN_RELEASE/xtensa-dc232b-elf/bin:/opt/$TOOLCHAIN_RELEASE/xtensa-dc233c-elf/bin:/opt/$TOOLCHAIN_RELEASE/xtensa-csp-elf/bin

-- 
Alex Bennée
Re: [PATCH 00/21] target/xtensa: implement double precision FPU
Posted by Max Filippov 3 years, 9 months ago 
On Tue, Jul 7, 2020 at 12:21 PM Alex Bennée <alex.bennee@linaro.org> wrote:
> Well it ran some xtensa tests thanks to the docker cross compiler
> support. Do you know what toolchains we need?
>
> Currently we have the following:
>
>   ENV CPU_LIST csp dc232b dc233c
>   ENV TOOLCHAIN_RELEASE 2018.02
>
>   RUN for cpu in $CPU_LIST; do \
>           curl -#SL http://github.com/foss-xtensa/toolchain/releases/download/$TOOLCHAIN_RELEASE/x86_64-$TOOLCHAIN_RELEASE-xtensa-$cpu-elf.tar.gz \

Oh, that's a familiar URL. Let me do the new batch of toolchains and
add FPU2000/DFPU configurations there.
And this is tests/docker/dockerfiles/debian-xtensa-cross.docker, right?
I can add new configurations there as well and add one more patch
to this series.

-- 
Thanks.
-- Max
Re: [PATCH 00/21] target/xtensa: implement double precision FPU
Posted by Alex Bennée 3 years, 9 months ago 
Max Filippov <jcmvbkbc@gmail.com> writes:

> On Tue, Jul 7, 2020 at 12:21 PM Alex Bennée <alex.bennee@linaro.org> wrote:
>> Well it ran some xtensa tests thanks to the docker cross compiler
>> support. Do you know what toolchains we need?
>>
>> Currently we have the following:
>>
>>   ENV CPU_LIST csp dc232b dc233c
>>   ENV TOOLCHAIN_RELEASE 2018.02
>>
>>   RUN for cpu in $CPU_LIST; do \
>>           curl -#SL http://github.com/foss-xtensa/toolchain/releases/download/$TOOLCHAIN_RELEASE/x86_64-$TOOLCHAIN_RELEASE-xtensa-$cpu-elf.tar.gz \
>
> Oh, that's a familiar URL. Let me do the new batch of toolchains and
> add FPU2000/DFPU configurations there.
> And this is tests/docker/dockerfiles/debian-xtensa-cross.docker,
> right?

Yep - you could also tweak tests/tcg/configure.sh if you want to handle
the presence of the toolchain in your local environment. We might want
to expand the configurations emitted to
tests/tcg/config-xtensa-softmmu.mak to handle the multiple binaries
though unless a single binary can call the relevant toolchains with
tweaks to CFLAGS?

> I can add new configurations there as well and add one more patch
> to this series.

Cool ;-)

-- 
Alex Bennée

Patchew 2.1-devel-0870f84

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