target/i386: implement undocumented "smsw r32" behavior

[PATCH] target/i386: implement undocumented "smsw r32" behavior

Posted by Paolo Bonzini 3 years, 9 months ago

In 32-bit mode, the higher 16 bits of the destination
register are undefined.  In practice CR0[31:0] is stored,
just like in 64-bit mode, so just remove the "if" that
currently differentiates the behavior.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
 target/i386/translate.c | 13 +++++++------
 1 file changed, 7 insertions(+), 6 deletions(-)

diff --git a/target/i386/translate.c b/target/i386/translate.c
index 4d808a6f93..60eac03498 100644
--- a/target/i386/translate.c
+++ b/target/i386/translate.c
@@ -7579,12 +7579,13 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
         CASE_MODRM_OP(4): /* smsw */
             gen_svm_check_intercept(s, pc_start, SVM_EXIT_READ_CR0);
             tcg_gen_ld_tl(s->T0, cpu_env, offsetof(CPUX86State, cr[0]));
-            if (CODE64(s)) {
-                mod = (modrm >> 6) & 3;
-                ot = (mod != 3 ? MO_16 : s->dflag);
-            } else {
-                ot = MO_16;
-            }
+            /*
+             * In 32-bit mode, the higher 16 bits of the destination
+             * register are undefined.  In practice CR0[31:0] is stored
+             * just like in 64-bit mode.
+             */
+            mod = (modrm >> 6) & 3;
+            ot = (mod != 3 ? MO_16 : s->dflag);
             gen_ldst_modrm(env, s, modrm, ot, OR_TMP0, 1);
             break;
         case 0xee: /* rdpkru */
-- 
2.26.2

Re: [PATCH] target/i386: implement undocumented "smsw r32" behavior

Posted by Roman Bolshakov 3 years, 9 months ago

On Fri, Jun 26, 2020 at 06:44:19AM -0400, Paolo Bonzini wrote:
> In 32-bit mode, the higher 16 bits of the destination
> register are undefined.  In practice CR0[31:0] is stored,
> just like in 64-bit mode, so just remove the "if" that
> currently differentiates the behavior.
> 
> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

Hi Paolo,

It seems to be a follow-up to the kvm-unit-tests patch:
https://patchwork.kernel.org/patch/11590445/

Could you please add:
Reported-by: Roman Bolshakov <r.bolshakov@yadro.com>

> ---
>  target/i386/translate.c | 13 +++++++------
>  1 file changed, 7 insertions(+), 6 deletions(-)
> 
> diff --git a/target/i386/translate.c b/target/i386/translate.c
> index 4d808a6f93..60eac03498 100644
> --- a/target/i386/translate.c
> +++ b/target/i386/translate.c
> @@ -7579,12 +7579,13 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
>          CASE_MODRM_OP(4): /* smsw */
>              gen_svm_check_intercept(s, pc_start, SVM_EXIT_READ_CR0);
>              tcg_gen_ld_tl(s->T0, cpu_env, offsetof(CPUX86State, cr[0]));
> -            if (CODE64(s)) {
> -                mod = (modrm >> 6) & 3;
> -                ot = (mod != 3 ? MO_16 : s->dflag);
> -            } else {
> -                ot = MO_16;
> -            }
> +            /*
> +             * In 32-bit mode, the higher 16 bits of the destination
> +             * register are undefined.  In practice CR0[31:0] is stored
> +             * just like in 64-bit mode.
> +             */
> +            mod = (modrm >> 6) & 3;
> +            ot = (mod != 3 ? MO_16 : s->dflag);
>              gen_ldst_modrm(env, s, modrm, ot, OR_TMP0, 1);
>              break;
>          case 0xee: /* rdpkru */
> -- 
> 2.26.2
> 
> 

Reviewed-by: Roman Bolshakov <r.bolshakov@yadro.com>

Regards,
Roman

Re: [PATCH] target/i386: implement undocumented "smsw r32" behavior

Posted by Paolo Bonzini 3 years, 9 months ago

On 02/07/20 11:37, Roman Bolshakov wrote:
> On Fri, Jun 26, 2020 at 06:44:19AM -0400, Paolo Bonzini wrote:
>> In 32-bit mode, the higher 16 bits of the destination
>> register are undefined.  In practice CR0[31:0] is stored,
>> just like in 64-bit mode, so just remove the "if" that
>> currently differentiates the behavior.
>>
>> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
> 
> Hi Paolo,
> 
> It seems to be a follow-up to the kvm-unit-tests patch:
> https://patchwork.kernel.org/patch/11590445/

It would be if I had seen that patch! O:-)  I'll add the Reported-by of
course.

Paolo

> Could you please add:
> Reported-by: Roman Bolshakov <r.bolshakov@yadro.com>
> 
>> ---
>>  target/i386/translate.c | 13 +++++++------
>>  1 file changed, 7 insertions(+), 6 deletions(-)
>>
>> diff --git a/target/i386/translate.c b/target/i386/translate.c
>> index 4d808a6f93..60eac03498 100644
>> --- a/target/i386/translate.c
>> +++ b/target/i386/translate.c
>> @@ -7579,12 +7579,13 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
>>          CASE_MODRM_OP(4): /* smsw */
>>              gen_svm_check_intercept(s, pc_start, SVM_EXIT_READ_CR0);
>>              tcg_gen_ld_tl(s->T0, cpu_env, offsetof(CPUX86State, cr[0]));
>> -            if (CODE64(s)) {
>> -                mod = (modrm >> 6) & 3;
>> -                ot = (mod != 3 ? MO_16 : s->dflag);
>> -            } else {
>> -                ot = MO_16;
>> -            }
>> +            /*
>> +             * In 32-bit mode, the higher 16 bits of the destination
>> +             * register are undefined.  In practice CR0[31:0] is stored
>> +             * just like in 64-bit mode.
>> +             */
>> +            mod = (modrm >> 6) & 3;
>> +            ot = (mod != 3 ? MO_16 : s->dflag);
>>              gen_ldst_modrm(env, s, modrm, ot, OR_TMP0, 1);
>>              break;
>>          case 0xee: /* rdpkru */
>> -- 
>> 2.26.2
>>
>>
> 
> Reviewed-by: Roman Bolshakov <r.bolshakov@yadro.com>
> 
> Regards,
> Roman
>

Re: [PATCH] target/i386: implement undocumented "smsw r32" behavior

Posted by Richard Henderson 3 years, 9 months ago

On 6/26/20 3:44 AM, Paolo Bonzini wrote:
> In 32-bit mode, the higher 16 bits of the destination
> register are undefined.  In practice CR0[31:0] is stored,
> just like in 64-bit mode, so just remove the "if" that
> currently differentiates the behavior.
> 
> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
> ---
>  target/i386/translate.c | 13 +++++++------
>  1 file changed, 7 insertions(+), 6 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~