The following changes since commit 61fee7f45955cd0bf9b79be9fa9c7ebabb5e6a85:

Merge remote-tracking branch 'remotes/philmd-gitlab/tags/acceptance-testing-20200622' into staging (2020-06-22 20:50:10 +0100)

https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20200623

for you to fetch changes up to 539533b85fbd269f777bed931de8ccae1dd837e9:

arm/virt: Add memory hot remove support (2020-06-23 11:39:48 +0100)

* util/oslib-posix : qemu_init_exec_dir implementation for Mac

* target/arm: Last parts of neon decodetree conversion

* hw/arm/virt: Add 5.0 HW compat props

* hw/watchdog/cmsdk-apb-watchdog: Add trace event for lock status

* mps2: Add CMSDK APB watchdog, FPGAIO block, S2I devices and I2C devices

* mps2: Add some unimplemented-device stubs for audio and GPIO

* mps2-tz: Use the ARM SBCon two-wire serial bus interface

* target/arm: Check supported KVM features globally (not per vCPU)

* tests/qtest/arm-cpu-features: Add feature setting tests

* arm/virt: Add memory hot remove support

Andrew Jones (2):

hw/arm/virt: Add 5.0 HW compat props

tests/qtest/arm-cpu-features: Add feature setting tests

David CARLIER (1):

util/oslib-posix : qemu_init_exec_dir implementation for Mac

Peter Maydell (23):

target/arm: Convert Neon 2-reg-misc VREV64 to decodetree

target/arm: Convert Neon 2-reg-misc pairwise ops to decodetree

target/arm: Convert VZIP, VUZP to decodetree

target/arm: Convert Neon narrowing moves to decodetree

target/arm: Convert Neon 2-reg-misc VSHLL to decodetree

target/arm: Convert Neon VCVT f16/f32 insns to decodetree

target/arm: Convert vectorised 2-reg-misc Neon ops to decodetree

target/arm: Convert Neon 2-reg-misc crypto operations to decodetree

target/arm: Rename NeonGenOneOpFn to NeonGenOne64OpFn

target/arm: Fix capitalization in NeonGenTwo{Single, Double}OPFn typedefs

target/arm: Make gen_swap_half() take separate src and dest

target/arm: Convert Neon 2-reg-misc VREV32 and VREV16 to decodetree

target/arm: Convert remaining simple 2-reg-misc Neon ops

target/arm: Convert Neon VQABS, VQNEG to decodetree

target/arm: Convert simple fp Neon 2-reg-misc insns

target/arm: Convert Neon 2-reg-misc fp-compare-with-zero insns to decodetree

target/arm: Convert Neon 2-reg-misc VRINT insns to decodetree

target/arm: Convert Neon 2-reg-misc VCVT insns to decodetree

target/arm: Convert Neon VSWP to decodetree

target/arm: Convert Neon VTRN to decodetree

target/arm: Move some functions used only in translate-neon.inc.c to that file

target/arm: Remove unnecessary gen_io_end() calls

target/arm: Remove dead code relating to SABA and UABA

Philippe Mathieu-Daudé (15):

hw/watchdog/cmsdk-apb-watchdog: Add trace event for lock status

hw/i2c/versatile_i2c: Add definitions for register addresses

hw/i2c/versatile_i2c: Add SCL/SDA definitions

hw/i2c: Add header for ARM SBCon two-wire serial bus interface

hw/arm: Use TYPE_VERSATILE_I2C instead of hardcoded string

hw/arm/mps2: Document CMSDK/FPGA APB subsystem sections

hw/arm/mps2: Rename CMSDK AHB peripheral region

hw/arm/mps2: Add CMSDK APB watchdog device

hw/arm/mps2: Add CMSDK AHB GPIO peripherals as unimplemented devices

hw/arm/mps2: Map the FPGA I/O block

hw/arm/mps2: Add SPI devices

hw/arm/mps2: Add I2C devices

hw/arm/mps2: Add audio I2S interface as unimplemented device

hw/arm/mps2-tz: Use the ARM SBCon two-wire serial bus interface

target/arm: Check supported KVM features globally (not per vCPU)

Shameer Kolothum (1):

arm/virt: Add memory hot remove support

include/hw/i2c/arm_sbcon_i2c.h | 35 ++

target/arm/cpu.h | 2 +-

target/arm/kvm_arm.h | 21 +-

target/arm/translate.h | 8 +-

target/arm/neon-dp.decode | 106 ++++

hw/acpi/generic_event_device.c | 29 +

hw/arm/mps2-tz.c | 23 +-

hw/arm/mps2.c | 65 ++-

hw/arm/realview.c | 3 +-

hw/arm/versatilepb.c | 3 +-

hw/arm/vexpress.c | 3 +-

hw/arm/virt.c | 63 +-

hw/i2c/versatile_i2c.c | 38 +-

hw/watchdog/cmsdk-apb-watchdog.c | 1 +

target/arm/cpu.c | 2 +-

target/arm/cpu64.c | 10 +-

target/arm/kvm.c | 4 +-

target/arm/kvm64.c | 14 +-

target/arm/translate-a64.c | 20 +-

target/arm/translate-neon.inc.c | 1191 +++++++++++++++++++++++++++++++++++++-

target/arm/translate-vfp.inc.c | 7 +-

target/arm/translate.c | 1064 +---------------------------------

tests/qtest/arm-cpu-features.c | 38 +-

util/oslib-posix.c | 15 +

MAINTAINERS | 1 +

hw/arm/Kconfig | 8 +-

hw/watchdog/trace-events | 1 +

27 files changed, 1624 insertions(+), 1151 deletions(-)

create mode 100644 include/hw/i2c/arm_sbcon_i2c.h

From: Philippe Mathieu-Daudé <f4bug@amsat.org>

From 'Application Note AN385', chapter 3.14:

The SMM implements a simple SBCon interface based on I2C.

There are 4 SBCon interfaces on the FPGA APB subsystem.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

Message-id: 20200617072539.32686-13-f4bug@amsat.org

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>

2 files changed, 9 insertions(+)

@@ -XXX,XX +XXX,XX @@ config MPS2

select SPLIT_IRQ

select UNIMP

select CMSDK_APB_WATCHDOG

+ select VERSATILE_I2C

config FSL_IMX7

From: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com>

This adds support for memory(pc-dimm) hot remove on arm/virt that

uses acpi ged device.

NVDIMM hot removal is not yet supported.

Signed-off-by: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com>

Message-id: 20200622124157.20360-1-shameerali.kolothum.thodi@huawei.com

Reviewed-by: Eric Auger <eric.auger@redhat.com>

Tested-by: Eric Auger <eric.auger@redhat.com>

hw/acpi/generic_event_device.c | 29 ++++++++++++++++

hw/arm/virt.c | 62 ++++++++++++++++++++++++++++++++--

2 files changed, 89 insertions(+), 2 deletions(-)

diff --git a/hw/acpi/generic_event_device.c b/hw/acpi/generic_event_device.c

--- a/hw/acpi/generic_event_device.c

+++ b/hw/acpi/generic_event_device.c

@@ -XXX,XX +XXX,XX @@ static void acpi_ged_device_plug_cb(HotplugHandler *hotplug_dev,

+static void acpi_ged_unplug_request_cb(HotplugHandler *hotplug_dev,

+ DeviceState *dev, Error **errp)

+{

+ AcpiGedState *s = ACPI_GED(hotplug_dev);

+

+ if ((object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM) &&

+ !(object_dynamic_cast(OBJECT(dev), TYPE_NVDIMM)))) {

+ acpi_memory_unplug_request_cb(hotplug_dev, &s->memhp_state, dev, errp);

+ } else {

+ error_setg(errp, "acpi: device unplug request for unsupported device"

+ " type: %s", object_get_typename(OBJECT(dev)));

+ }

+}

+

+static void acpi_ged_unplug_cb(HotplugHandler *hotplug_dev,

+ DeviceState *dev, Error **errp)

+{

+ AcpiGedState *s = ACPI_GED(hotplug_dev);

+

+ if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) {

+ acpi_memory_unplug_cb(&s->memhp_state, dev, errp);

+ } else {

+ error_setg(errp, "acpi: device unplug for unsupported device"

+ " type: %s", object_get_typename(OBJECT(dev)));

+ }

+}

+

static void acpi_ged_send_event(AcpiDeviceIf *adev, AcpiEventStatusBits ev)

{

AcpiGedState *s = ACPI_GED(adev);

@@ -XXX,XX +XXX,XX @@ static void acpi_ged_class_init(ObjectClass *class, void *data)

dc->vmsd = &vmstate_acpi_ged;

hc->plug = acpi_ged_device_plug_cb;

+ hc->unplug_request = acpi_ged_unplug_request_cb;

+ hc->unplug = acpi_ged_unplug_cb;

adevc->send_event = acpi_ged_send_event;

}

diff --git a/hw/arm/virt.c b/hw/arm/virt.c

--- a/hw/arm/virt.c

+++ b/hw/arm/virt.c

@@ -XXX,XX +XXX,XX @@ static void virt_machine_device_plug_cb(HotplugHandler *hotplug_dev,

From: Andrew Jones <drjones@redhat.com>

Some cpu features may be enabled and disabled for all configurations

that support the feature. Let's test that.

A recent regression[*] inspired adding these tests.

[*] '-cpu host,pmu=on' caused a segfault

Signed-off-by: Andrew Jones <drjones@redhat.com>

Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>

Message-id: 20200623090622.30365-2-philmd@redhat.com

Message-Id: <20200623082310.17577-1-drjones@redhat.com>

tests/qtest/arm-cpu-features.c | 38 ++++++++++++++++++++++++++++++----

1 file changed, 34 insertions(+), 4 deletions(-)

diff --git a/tests/qtest/arm-cpu-features.c b/tests/qtest/arm-cpu-features.c

--- a/tests/qtest/arm-cpu-features.c

+++ b/tests/qtest/arm-cpu-features.c

@@ -XXX,XX +XXX,XX @@ static bool resp_get_feature(QDict *resp, const char *feature)

qobject_unref(_resp); \

})

-#define assert_feature(qts, cpu_type, feature, expected_value) \

+#define resp_assert_feature(resp, feature, expected_value) \

({ \

- QDict *_resp, *_props; \

+ QDict *_props; \

\

- _resp = do_query_no_props(qts, cpu_type); \

g_assert(_resp); \

g_assert(resp_has_props(_resp)); \

_props = resp_get_props(_resp); \

g_assert(qdict_get(_props, feature)); \

g_assert(qdict_get_bool(_props, feature) == (expected_value)); \

+})

+

+#define assert_feature(qts, cpu_type, feature, expected_value) \

+({ \

+ QDict *_resp; \

+ \

+ _resp = do_query_no_props(qts, cpu_type); \

+ g_assert(_resp); \

+ resp_assert_feature(_resp, feature, expected_value); \

+ qobject_unref(_resp); \

+})

+

+#define assert_set_feature(qts, cpu_type, feature, value) \

+({ \

+ const char *_fmt = (value) ? "{ %s: true }" : "{ %s: false }"; \

+ QDict *_resp; \

+ \

+ _resp = do_query(qts, cpu_type, _fmt, feature); \

+ g_assert(_resp); \

+ resp_assert_feature(_resp, feature, value); \

qobject_unref(_resp); \

})

@@ -XXX,XX +XXX,XX @@ static void test_query_cpu_model_expansion(const void *data)

assert_error(qts, "host", "The CPU type 'host' requires KVM", NULL);

/* Test expected feature presence/absence for some cpu types */

- assert_has_feature_enabled(qts, "max", "pmu");

assert_has_feature_enabled(qts, "cortex-a15", "pmu");

assert_has_not_feature(qts, "cortex-a15", "aarch64");

+ /* Enabling and disabling pmu should always work. */

+ assert_has_feature_enabled(qts, "max", "pmu");

+ assert_set_feature(qts, "max", "pmu", false);

+ assert_set_feature(qts, "max", "pmu", true);

+

assert_has_not_feature(qts, "max", "kvm-no-adjvtime");

if (g_str_equal(qtest_get_arch(), "aarch64")) {

@@ -XXX,XX +XXX,XX @@ static void test_query_cpu_model_expansion_kvm(const void *data)

return;

+ /* Enabling and disabling kvm-no-adjvtime should always work. */

assert_has_feature_disabled(qts, "host", "kvm-no-adjvtime");

+ assert_set_feature(qts, "host", "kvm-no-adjvtime", true);

+ assert_set_feature(qts, "host", "kvm-no-adjvtime", false);

if (g_str_equal(qtest_get_arch(), "aarch64")) {

bool kvm_supports_sve;

@@ -XXX,XX +XXX,XX @@ static void test_query_cpu_model_expansion_kvm(const void *data)

char *error;

assert_has_feature_enabled(qts, "host", "aarch64");

+

+ /* Enabling and disabling pmu should always work. */

assert_has_feature_enabled(qts, "host", "pmu");

+ assert_set_feature(qts, "host", "pmu", false);

+ assert_set_feature(qts, "host", "pmu", true);

assert_error(qts, "cortex-a15",

"We cannot guarantee the CPU type 'cortex-a15' works "

From: Philippe Mathieu-Daudé <f4bug@amsat.org>

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

Message-id: 20200617072539.32686-7-f4bug@amsat.org

hw/arm/mps2.c | 5 ++++-

1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/hw/arm/mps2.c b/hw/arm/mps2.c

--- a/hw/arm/mps2.c

+++ b/hw/arm/mps2.c

@@ -XXX,XX +XXX,XX @@ typedef struct {

MemoryRegion blockram_m2;

MemoryRegion blockram_m3;

MemoryRegion sram;

+ /* FPGA APB subsystem */

MPS2SCC scc;

+ /* CMSDK APB subsystem */

CMSDKAPBDualTimer dualtimer;

} MPS2MachineState;

@@ -XXX,XX +XXX,XX @@ static void mps2_common_init(MachineState *machine)

Convert the pairwise ops VPADDL and VPADAL in the 2-reg-misc grouping

to decodetree.

At this point we can get rid of the weird CPU_V001 #define that was

used to avoid having to explicitly list all the arguments being

passed to some TCG gen/helper functions.

target/arm/neon-dp.decode | 6 ++

target/arm/translate-neon.inc.c | 149 ++++++++++++++++++++++++++++++++

target/arm/translate.c | 35 +-------

3 files changed, 157 insertions(+), 33 deletions(-)

@@ -XXX,XX +XXX,XX @@ static void gen_exception_return(DisasContext *s, TCGv_i32 pc)

gen_rfe(s, pc, load_cpu_field(spsr));

}

-#define CPU_V001 cpu_V0, cpu_V0, cpu_V1

-

static int gen_neon_unzip(int rd, int rm, int size, int q)

{

TCGv_ptr pd, pm;

@@ -XXX,XX +XXX,XX @@ static inline void gen_neon_widen(TCGv_i64 dest, TCGv_i32 src, int size, int u)

tcg_temp_free_i32(src);

}

-static inline void gen_neon_addl(int size)

-{

- switch (size) {

- case 0: gen_helper_neon_addl_u16(CPU_V001); break;

- case 1: gen_helper_neon_addl_u32(CPU_V001); break;

- case 2: tcg_gen_add_i64(CPU_V001); break;

- default: abort();

- }

-}

-

static void gen_neon_narrow_op(int op, int u, int size,

TCGv_i32 dest, TCGv_i64 src)

{

@@ -XXX,XX +XXX,XX @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn)

}

switch (op) {

case NEON_2RM_VREV64:

- /* handled by decodetree */

- return 1;

case NEON_2RM_VPADDL: case NEON_2RM_VPADDL_U:

case NEON_2RM_VPADAL: case NEON_2RM_VPADAL_U:

- for (pass = 0; pass < q + 1; pass++) {

- tmp = neon_load_reg(rm, pass * 2);

- gen_neon_widen(cpu_V0, tmp, size, op & 1);

- tmp = neon_load_reg(rm, pass * 2 + 1);

- gen_neon_widen(cpu_V1, tmp, size, op & 1);

- switch (size) {

- case 0: gen_helper_neon_paddl_u16(CPU_V001); break;

- case 1: gen_helper_neon_paddl_u32(CPU_V001); break;

- case 2: tcg_gen_add_i64(CPU_V001); break;

- default: abort();

- }

- if (op >= NEON_2RM_VPADAL) {

- /* Accumulate. */

- neon_load_reg64(cpu_V1, rd + pass);

- gen_neon_addl(size);

- }

- neon_store_reg64(cpu_V0, rd + pass);

- }

- break;

+ /* handled by decodetree */

+ return 1;

case NEON_2RM_VTRN:

if (size == 2) {

int n;

From: Philippe Mathieu-Daudé <f4bug@amsat.org>

'ARM SBCon two-wire serial bus interface' is the official

name describing the pair of registers used to bitbanging

I2C in the Versatile boards.

Make the private VersatileI2CState structure as public

ArmSbconI2CState.

Add the TYPE_ARM_SBCON_I2C, alias to our current

TYPE_VERSATILE_I2C model.

Rename the memory region description as 'arm_sbcon_i2c'.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

Message-id: 20200617072539.32686-5-f4bug@amsat.org

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>

include/hw/i2c/arm_sbcon_i2c.h | 35 ++++++++++++++++++++++++++++++++++

hw/i2c/versatile_i2c.c | 17 +++++------------

MAINTAINERS | 1 +

3 files changed, 41 insertions(+), 12 deletions(-)

create mode 100644 include/hw/i2c/arm_sbcon_i2c.h

diff --git a/include/hw/i2c/arm_sbcon_i2c.h b/include/hw/i2c/arm_sbcon_i2c.h

+++ b/include/hw/i2c/arm_sbcon_i2c.h

+/*

+ * ARM SBCon two-wire serial bus interface (I2C bitbang)

+ * a.k.a.

+ * ARM Versatile I2C controller

+ *

+ * Copyright (c) 2006-2007 CodeSourcery.

+ * Copyright (c) 2012 Oskar Andero <oskar.andero@gmail.com>

+ * Copyright (C) 2020 Philippe Mathieu-Daudé <f4bug@amsat.org>

+ *

+ * SPDX-License-Identifier: GPL-2.0-or-later

+ */

+#ifndef HW_I2C_ARM_SBCON_H

+#define HW_I2C_ARM_SBCON_H

+#include "hw/sysbus.h"

+#include "hw/i2c/bitbang_i2c.h"

+#define TYPE_VERSATILE_I2C "versatile_i2c"

+#define TYPE_ARM_SBCON_I2C TYPE_VERSATILE_I2C

+#define ARM_SBCON_I2C(obj) \

+ OBJECT_CHECK(ArmSbconI2CState, (obj), TYPE_ARM_SBCON_I2C)

+typedef struct ArmSbconI2CState {

+ /*< private >*/

+ SysBusDevice parent_obj;

+ /*< public >*/

+ MemoryRegion iomem;

+ bitbang_i2c_interface bitbang;

+ int out;

+ int in;

+} ArmSbconI2CState;

+#endif /* HW_I2C_ARM_SBCON_H */

diff --git a/hw/i2c/versatile_i2c.c b/hw/i2c/versatile_i2c.c

--- a/hw/i2c/versatile_i2c.c

+++ b/hw/i2c/versatile_i2c.c

@@ -XXX,XX +XXX,XX @@

/*

- * ARM Versatile I2C controller

+ * ARM SBCon two-wire serial bus interface (I2C bitbang)

+ * a.k.a. ARM Versatile I2C controller

*

* Copyright (c) 2006-2007 CodeSourcery.

* Copyright (c) 2012 Oskar Andero <oskar.andero@gmail.com>

@@ -XXX,XX +XXX,XX @@

*/

#include "qemu/osdep.h"

-#include "hw/sysbus.h"

-#include "hw/i2c/bitbang_i2c.h"

+#include "hw/i2c/arm_sbcon_i2c.h"

#include "hw/registerfields.h"

#include "qemu/log.h"

#include "qemu/module.h"

-#define TYPE_VERSATILE_I2C "versatile_i2c"

#define VERSATILE_I2C(obj) \

OBJECT_CHECK(VersatileI2CState, (obj), TYPE_VERSATILE_I2C)

-typedef struct VersatileI2CState {

- SysBusDevice parent_obj;

+typedef ArmSbconI2CState VersatileI2CState;

- MemoryRegion iomem;

- bitbang_i2c_interface bitbang;

- int out;

- int in;

-} VersatileI2CState;

REG32(CONTROL_GET, 0)

REG32(CONTROL_SET, 0)

@@ -XXX,XX +XXX,XX @@ static void versatile_i2c_init(Object *obj)

bus = i2c_init_bus(dev, "i2c");

bitbang_i2c_init(&s->bitbang, bus);

memory_region_init_io(&s->iomem, obj, &versatile_i2c_ops, s,

- "versatile_i2c", 0x1000);

+ "arm_sbcon_i2c", 0x1000);

sysbus_init_mmio(sbd, &s->iomem);

}

diff --git a/MAINTAINERS b/MAINTAINERS

index XXXXXXX..XXXXXXX 100644

--- a/MAINTAINERS

+++ b/MAINTAINERS

@@ -XXX,XX +XXX,XX @@ M: Peter Maydell <peter.maydell@linaro.org>

L: qemu-arm@nongnu.org

S: Maintained

F: hw/*/versatile*

+F: include/hw/i2c/arm_sbcon_i2c.h

F: hw/misc/arm_sysctl.c

F: docs/system/arm/versatile.rst

From: Philippe Mathieu-Daudé <f4bug@amsat.org>

From 'Application Note AN385', chapter 3.9, SPI:

The SMM implements five PL022 SPI modules.

Two pairs of modules share the same OR-gated IRQ.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

Message-id: 20200617072539.32686-12-f4bug@amsat.org

hw/arm/mps2.c | 24 ++++++++++++++++++++++++

hw/arm/Kconfig | 6 +++---

2 files changed, 27 insertions(+), 3 deletions(-)

@@ -XXX,XX +XXX,XX @@ config HIGHBANK

select ARM_TIMER # sp804

select ARM_V7M

select PL011 # UART

- select PL022 # Serial port

+ select PL022 # SPI

select PL031 # RTC

select PL061 # GPIO

select PL310 # cache controller

@@ -XXX,XX +XXX,XX @@ config STELLARIS

select CMSDK_APB_WATCHDOG

select I2C

select PL011 # UART

- select PL022 # Serial port

+ select PL022 # SPI

select PL061 # GPIO

select SSD0303 # OLED display

select SSD0323 # OLED display

@@ -XXX,XX +XXX,XX @@ config MPS2

select MPS2_FPGAIO

select MPS2_SCC

select OR_IRQ

- select PL022 # Serial port

+ select PL022 # SPI

select PL080 # DMA controller

select SPLIT_IRQ

select UNIMP

From: Philippe Mathieu-Daudé <philmd@redhat.com>

Since commit d70c996df23f, when enabling the PMU we get:

$ qemu-system-aarch64 -cpu host,pmu=on -M virt,accel=kvm,gic-version=3

Segmentation fault (core dumped)

Thread 1 "qemu-system-aar" received signal SIGSEGV, Segmentation fault.

0x0000aaaaaae356d0 in kvm_ioctl (s=0x0, type=44547) at accel/kvm/kvm-all.c:2588

2588 ret = ioctl(s->fd, type, arg);

(gdb) bt

#0 0x0000aaaaaae356d0 in kvm_ioctl (s=0x0, type=44547) at accel/kvm/kvm-all.c:2588

#1 0x0000aaaaaae31568 in kvm_check_extension (s=0x0, extension=126) at accel/kvm/kvm-all.c:916

#2 0x0000aaaaaafce254 in kvm_arm_pmu_supported (cpu=0xaaaaac214ab0) at target/arm/kvm.c:213

#3 0x0000aaaaaafc0f94 in arm_set_pmu (obj=0xaaaaac214ab0, value=true, errp=0xffffffffe438) at target/arm/cpu.c:1111

#4 0x0000aaaaab5533ac in property_set_bool (obj=0xaaaaac214ab0, v=0xaaaaac223a80, name=0xaaaaac11a970 "pmu", opaque=0xaaaaac222730, errp=0xffffffffe438) at qom/object.c:2170

#5 0x0000aaaaab5512f0 in object_property_set (obj=0xaaaaac214ab0, v=0xaaaaac223a80, name=0xaaaaac11a970 "pmu", errp=0xffffffffe438) at qom/object.c:1328

#6 0x0000aaaaab551e10 in object_property_parse (obj=0xaaaaac214ab0, string=0xaaaaac11b4c0 "on", name=0xaaaaac11a970 "pmu", errp=0xffffffffe438) at qom/object.c:1561

#7 0x0000aaaaab54ee8c in object_apply_global_props (obj=0xaaaaac214ab0, props=0xaaaaac018e20, errp=0xaaaaabd6fd88 <error_fatal>) at qom/object.c:407

#8 0x0000aaaaab1dd5a4 in qdev_prop_set_globals (dev=0xaaaaac214ab0) at hw/core/qdev-properties.c:1218

#9 0x0000aaaaab1d9fac in device_post_init (obj=0xaaaaac214ab0) at hw/core/qdev.c:1050

...

#15 0x0000aaaaab54f310 in object_initialize_with_type (obj=0xaaaaac214ab0, size=52208, type=0xaaaaabe237f0) at qom/object.c:512

#16 0x0000aaaaab54fa24 in object_new_with_type (type=0xaaaaabe237f0) at qom/object.c:687

#17 0x0000aaaaab54fa80 in object_new (typename=0xaaaaabe23970 "host-arm-cpu") at qom/object.c:702

#18 0x0000aaaaaaf04a74 in machvirt_init (machine=0xaaaaac0a8550) at hw/arm/virt.c:1770

#19 0x0000aaaaab1e8720 in machine_run_board_init (machine=0xaaaaac0a8550) at hw/core/machine.c:1138

#20 0x0000aaaaaaf95394 in qemu_init (argc=5, argv=0xffffffffea58, envp=0xffffffffea88) at softmmu/vl.c:4348

#21 0x0000aaaaaada3f74 in main (argc=<optimized out>, argv=<optimized out>, envp=<optimized out>) at softmmu/main.c:48

This is because in frame #2, cpu->kvm_state is still NULL

(the vCPU is not yet realized).

KVM has a hard requirement of all cores supporting the same

feature set. We only need to check if the accelerator supports

a feature, not each vCPU individually.

Fix by removing the 'CPUState *cpu' argument from the

kvm_arm_<FEATURE>_supported() functions.

Fixes: d70c996df23f ('Use CPUState::kvm_state in kvm_arm_pmu_supported')

Reported-by: Haibo Xu <haibo.xu@linaro.org>

Reviewed-by: Andrew Jones <drjones@redhat.com>

Acked-by: Paolo Bonzini <pbonzini@redhat.com>

Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>

Suggested-by: Paolo Bonzini <pbonzini@redhat.com>

Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>

target/arm/kvm_arm.h | 21 +++++++++------------

target/arm/cpu.c | 2 +-

target/arm/cpu64.c | 10 +++++-----

target/arm/kvm.c | 4 ++--

target/arm/kvm64.c | 14 +++++---------

5 files changed, 22 insertions(+), 29 deletions(-)

diff --git a/target/arm/kvm_arm.h b/target/arm/kvm_arm.h

--- a/target/arm/kvm_arm.h

+++ b/target/arm/kvm_arm.h

@@ -XXX,XX +XXX,XX @@ void kvm_arm_add_vcpu_properties(Object *obj);

/**

* kvm_arm_aarch32_supported:

- * @cs: CPUState

*

- * Returns: true if the KVM VCPU can enable AArch32 mode

+ * Returns: true if KVM can enable AArch32 mode

* and false otherwise.

*/

-bool kvm_arm_aarch32_supported(CPUState *cs);

+bool kvm_arm_aarch32_supported(void);

/**

* kvm_arm_pmu_supported:

- * @cs: CPUState

*

- * Returns: true if the KVM VCPU can enable its PMU

+ * Returns: true if KVM can enable the PMU

* and false otherwise.

*/

-bool kvm_arm_pmu_supported(CPUState *cs);

+bool kvm_arm_pmu_supported(void);