Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 hw/arm/mps2.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/hw/arm/mps2.c b/hw/arm/mps2.c
index 6224d7a63c..345ba551ab 100644
--- a/hw/arm/mps2.c
+++ b/hw/arm/mps2.c
@@ -38,6 +38,7 @@
 #include "hw/timer/cmsdk-apb-timer.h"
 #include "hw/timer/cmsdk-apb-dualtimer.h"
 #include "hw/misc/mps2-scc.h"
+#include "hw/misc/mps2-fpgaio.h"
 #include "hw/net/lan9118.h"
 #include "net/net.h"
 
@@ -66,6 +67,7 @@ typedef struct {
     MemoryRegion blockram_m3;
     MemoryRegion sram;
     MPS2SCC scc;
+    MPS2FPGAIO fpgaio;
     CMSDKAPBDualTimer dualtimer;
 } MPS2MachineState;
 
@@ -337,6 +339,11 @@ static void mps2_common_init(MachineState *machine)
 
         sysbus_create_simple("versatile_i2c", i2cbase[i], NULL);
     }
+    sysbus_init_child_obj(OBJECT(mms), "fpgaio", &mms->fpgaio,
+                          sizeof(mms->fpgaio), TYPE_MPS2_FPGAIO);
+    object_property_set_bool(OBJECT(&mms->fpgaio), true, "realized",
+                             &error_fatal);
+    sysbus_mmio_map(SYS_BUS_DEVICE(&mms->fpgaio), 0, 0x40028000);
 
     /* In hardware this is a LAN9220; the LAN9118 is software compatible
      * except that it doesn't support the checksum-offload feature.
-- 
2.21.3

On Tue, 16 Jun 2020 at 07:32, Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---

> @@ -337,6 +339,11 @@ static void mps2_common_init(MachineState *machine)
>
>          sysbus_create_simple("versatile_i2c", i2cbase[i], NULL);
>      }
> +    sysbus_init_child_obj(OBJECT(mms), "fpgaio", &mms->fpgaio,
> +                          sizeof(mms->fpgaio), TYPE_MPS2_FPGAIO);
> +    object_property_set_bool(OBJECT(&mms->fpgaio), true, "realized",
> +                             &error_fatal);
> +    sysbus_mmio_map(SYS_BUS_DEVICE(&mms->fpgaio), 0, 0x40028000);

AN385 TRM isn't entirely clear but I suspect that you need to set
the FPGAIO's prescale-clk property because the default of 20MHz
isn't what the AN385 runs at. The FPGAIO model's default is written
to match the AN505, which is 20MHz, but AN385 and AN511 are both
25MHz:
https://developer.arm.com/tools-and-software/development-boards/fpga-prototyping-boards/mps2

thanks
-- PMM

On 6/16/20 12:26 PM, Peter Maydell wrote:
> On Tue, 16 Jun 2020 at 07:32, Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>>
>> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
>> ---
> 
>> @@ -337,6 +339,11 @@ static void mps2_common_init(MachineState *machine)
>>
>>          sysbus_create_simple("versatile_i2c", i2cbase[i], NULL);
>>      }
>> +    sysbus_init_child_obj(OBJECT(mms), "fpgaio", &mms->fpgaio,
>> +                          sizeof(mms->fpgaio), TYPE_MPS2_FPGAIO);
>> +    object_property_set_bool(OBJECT(&mms->fpgaio), true, "realized",
>> +                             &error_fatal);
>> +    sysbus_mmio_map(SYS_BUS_DEVICE(&mms->fpgaio), 0, 0x40028000);
> 
> AN385 TRM isn't entirely clear but I suspect that you need to set
> the FPGAIO's prescale-clk property because the default of 20MHz
> isn't what the AN385 runs at. The FPGAIO model's default is written
> to match the AN505, which is 20MHz, but AN385 and AN511 are both
> 25MHz:
> https://developer.arm.com/tools-and-software/development-boards/fpga-prototyping-boards/mps2

Ah I only checked for the I/O register. I'll check the clocks.

> 
> thanks
> -- PMM
>