[PULL v2 00/29] target-arm queue
[PULL v2 00/57] target-arm queue
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v2: added Property array terminator (which caused crashes on
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Squashed in a trivial fix for 32-bit hosts:
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various non-x86 host architectures).
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2
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The following changes since commit ae3aa5da96f4ccf0c2a28851449d92db9fcfad71:
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--- a/target/arm/mve_helper.c
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+++ b/target/arm/mve_helper.c
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@@ -XXX,XX +XXX,XX @@ DO_LDAV(vmlsldavxsw, 4, int32_t, true, +=, -=)
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acc = EVENACC(acc, TO128(n[H##ESIZE(e + 1 * XCHG)] * \
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m[H##ESIZE(e)])); \
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} \
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- acc = int128_add(acc, 1 << 7); \
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+ acc = int128_add(acc, int128_make64(1 << 7)); \
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} \
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} \
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mve_advance_vpt(env); \
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Merge remote-tracking branch 'remotes/berrange/tags/socket-next-pull-request' into staging (2020-05-21 16:47:28 +0100)
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-- PMM
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The following changes since commit 53f306f316549d20c76886903181413d20842423:
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Merge remote-tracking branch 'remotes/ehabkost-gl/tags/x86-next-pull-request' into staging (2021-06-21 11:26:04 +0100)
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are available in the Git repository at:
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are available in the Git repository at:
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https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20200521-1
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https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20210624
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for you to fetch changes up to fafe7229272f39500c14845bc7ea60a8504a5a20:
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for you to fetch changes up to 90a76c6316cfe6416fc33814a838fb3928f746ee:
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linux-user/arm/signal.c: Drop TARGET_CONFIG_CPU_32 (2020-05-21 22:05:27 +0100)
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docs/system: arm: Add nRF boards description (2021-06-24 14:58:48 +0100)
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----------------------------------------------------------------
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----------------------------------------------------------------
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target-arm queue:
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target-arm queue:
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* tests/acceptance: Add a test for the canon-a1100 machine
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* Don't require 'virt' board to be compiled in for ACPI GHES code
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* docs/system: Document some of the Arm development boards
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* docs: Document which architecture extensions we emulate
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* linux-user: make BKPT insn cause SIGTRAP, not be a syscall
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* Fix bugs in M-profile FPCXT_NS accesses
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* target/arm: Remove unused GEN_NEON_INTEGER_OP macro
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* First slice of MVE patches
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* fsl-imx25, fsl-imx31, fsl-imx6, fsl-imx6ul, fsl-imx7: implement watchdog
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* Implement MTE3
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* hw/arm: Use qemu_log_mask() instead of hw_error() in various places
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* docs/system: arm: Add nRF boards description
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* ARM: PL061: Introduce N_GPIOS
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* target/arm: Improve clear_vec_high() usage
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* target/arm: Allow user-mode code to write CPSR.E via MSR
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* linux-user/arm: Reset CPSR_E when entering a signal handler
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* linux-user/arm/signal.c: Drop TARGET_CONFIG_CPU_32
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37
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----------------------------------------------------------------
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----------------------------------------------------------------
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Amanieu d'Antras (1):
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Alexandre Iooss (1):
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linux-user/arm: Reset CPSR_E when entering a signal handler
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docs/system: arm: Add nRF boards description
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41
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Geert Uytterhoeven (1):
42
Peter Collingbourne (1):
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ARM: PL061: Introduce N_GPIOS
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target/arm: Implement MTE3
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Guenter Roeck (8):
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Peter Maydell (55):
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hw: Move i.MX watchdog driver to hw/watchdog
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hw/acpi: Provide stub version of acpi_ghes_record_errors()
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hw/watchdog: Implement full i.MX watchdog support
47
hw/acpi: Provide function acpi_ghes_present()
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hw/arm/fsl-imx25: Wire up watchdog
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target/arm: Use acpi_ghes_present() to see if we report ACPI memory errors
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hw/arm/fsl-imx31: Wire up watchdog
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docs/system/arm: Document which architecture extensions we emulate
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hw/arm/fsl-imx6: Connect watchdog interrupts
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target/arm/translate-vfp.c: Whitespace fixes
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hw/arm/fsl-imx6ul: Connect watchdog interrupts
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target/arm: Handle FPU being disabled in FPCXT_NS accesses
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hw/arm/fsl-imx7: Instantiate various unimplemented devices
52
target/arm: Don't NOCP fault for FPCXT_NS accesses
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hw/arm/fsl-imx7: Connect watchdog interrupts
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target/arm: Handle writeback in VLDR/VSTR sysreg with no memory access
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target/arm: Factor FP context update code out into helper function
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target/arm: Split vfp_access_check() into A and M versions
56
target/arm: Handle FPU check for FPCXT_NS insns via vfp_access_check_m()
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target/arm: Implement MVE VLDR/VSTR (non-widening forms)
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target/arm: Implement widening/narrowing MVE VLDR/VSTR insns
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target/arm: Implement MVE VCLZ
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target/arm: Implement MVE VCLS
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target/arm: Implement MVE VREV16, VREV32, VREV64
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target/arm: Implement MVE VMVN (register)
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target/arm: Implement MVE VABS
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target/arm: Implement MVE VNEG
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tcg: Make gen_dup_i32/i64() public as tcg_gen_dup_i32/i64
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target/arm: Implement MVE VDUP
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target/arm: Implement MVE VAND, VBIC, VORR, VORN, VEOR
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target/arm: Implement MVE VADD, VSUB, VMUL
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target/arm: Implement MVE VMULH
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target/arm: Implement MVE VRMULH
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target/arm: Implement MVE VMAX, VMIN
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target/arm: Implement MVE VABD
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target/arm: Implement MVE VHADD, VHSUB
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target/arm: Implement MVE VMULL
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target/arm: Implement MVE VMLALDAV
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target/arm: Implement MVE VMLSLDAV
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target/arm: Implement MVE VRMLALDAVH, VRMLSLDAVH
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target/arm: Implement MVE VADD (scalar)
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target/arm: Implement MVE VSUB, VMUL (scalar)
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target/arm: Implement MVE VHADD, VHSUB (scalar)
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target/arm: Implement MVE VBRSR
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target/arm: Implement MVE VPST
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target/arm: Implement MVE VQADD and VQSUB
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target/arm: Implement MVE VQDMULH and VQRDMULH (scalar)
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target/arm: Implement MVE VQDMULL scalar
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target/arm: Implement MVE VQDMULH, VQRDMULH (vector)
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target/arm: Implement MVE VQADD, VQSUB (vector)
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target/arm: Implement MVE VQSHL (vector)
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target/arm: Implement MVE VQRSHL
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target/arm: Implement MVE VSHL insn
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target/arm: Implement MVE VRSHL
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target/arm: Implement MVE VQDMLADH and VQRDMLADH
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target/arm: Implement MVE VQDMLSDH and VQRDMLSDH
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target/arm: Implement MVE VQDMULL (vector)
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target/arm: Implement MVE VRHADD
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target/arm: Implement MVE VADC, VSBC
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target/arm: Implement MVE VCADD
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target/arm: Implement MVE VHCADD
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target/arm: Implement MVE VADDV
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target/arm: Make VMOV scalar <-> gpreg beatwise for MVE
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Peter Maydell (12):
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docs/system/arm/emulation.rst | 103 ++++
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docs/system: Add 'Arm' to the Integrator/CP document title
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docs/system/arm/nrf.rst | 51 ++
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docs/system: Sort Arm board index into alphabetical order
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docs/system/target-arm.rst | 7 +
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docs/system: Document Arm Versatile Express boards
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include/hw/acpi/ghes.h | 9 +
51
docs/system: Document the various MPS2 models
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include/tcg/tcg-op.h | 8 +
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docs/system: Document Musca boards
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include/tcg/tcg.h | 1 -
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linux-user/arm: BKPT should cause SIGTRAP, not be a syscall
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target/arm/helper-mve.h | 357 +++++++++++++
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linux-user/arm: Remove bogus SVC 0xf0002 handling
109
target/arm/helper.h | 2 +
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linux-user/arm: Handle invalid arm-specific syscalls correctly
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target/arm/internals.h | 11 +
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linux-user/arm: Fix identification of syscall numbers
111
target/arm/translate-a32.h | 3 +
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target/arm: Remove unused GEN_NEON_INTEGER_OP macro
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target/arm/translate.h | 10 +
58
target/arm: Allow user-mode code to write CPSR.E via MSR
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target/arm/m-nocp.decode | 24 +
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linux-user/arm/signal.c: Drop TARGET_CONFIG_CPU_32
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target/arm/mve.decode | 240 +++++++++
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target/arm/vfp.decode | 14 -
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hw/acpi/ghes-stub.c | 22 +
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hw/acpi/ghes.c | 17 +
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target/arm/cpu64.c | 2 +-
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target/arm/kvm64.c | 6 +-
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target/arm/mte_helper.c | 82 +--
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target/arm/mve_helper.c | 1160 +++++++++++++++++++++++++++++++++++++++++
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target/arm/translate-m-nocp.c | 550 +++++++++++++++++++
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target/arm/translate-mve.c | 759 +++++++++++++++++++++++++++
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target/arm/translate-vfp.c | 741 +++++++-------------------
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tcg/tcg-op-gvec.c | 20 +-
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MAINTAINERS | 1 +
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hw/acpi/meson.build | 6 +-
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target/arm/meson.build | 1 +
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27 files changed, 3578 insertions(+), 629 deletions(-)
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create mode 100644 docs/system/arm/emulation.rst
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create mode 100644 docs/system/arm/nrf.rst
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create mode 100644 target/arm/helper-mve.h
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create mode 100644 hw/acpi/ghes-stub.c
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create mode 100644 target/arm/mve_helper.c
60
135
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Philippe Mathieu-Daudé (4):
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hw/arm/integratorcp: Replace hw_error() by qemu_log_mask()
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hw/arm/pxa2xx: Replace hw_error() by qemu_log_mask()
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hw/char/xilinx_uartlite: Replace hw_error() by qemu_log_mask()
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hw/timer/exynos4210_mct: Replace hw_error() by qemu_log_mask()
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Richard Henderson (2):
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target/arm: Use tcg_gen_gvec_mov for clear_vec_high
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target/arm: Use clear_vec_high more effectively
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Thomas Huth (1):
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tests/acceptance: Add a test for the canon-a1100 machine
73
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docs/system/arm/integratorcp.rst | 4 +-
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docs/system/arm/mps2.rst | 29 +++
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docs/system/arm/musca.rst | 31 +++
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docs/system/arm/vexpress.rst | 60 ++++++
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docs/system/target-arm.rst | 20 +-
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include/hw/arm/fsl-imx25.h | 5 +
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include/hw/arm/fsl-imx31.h | 4 +
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include/hw/arm/fsl-imx6.h | 2 +-
82
include/hw/arm/fsl-imx6ul.h | 2 +-
83
include/hw/arm/fsl-imx7.h | 23 ++-
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include/hw/misc/imx2_wdt.h | 33 ----
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include/hw/watchdog/wdt_imx2.h | 90 +++++++++
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target/arm/cpu.h | 2 +-
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hw/arm/fsl-imx25.c | 10 +
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hw/arm/fsl-imx31.c | 6 +
89
hw/arm/fsl-imx6.c | 9 +
90
hw/arm/fsl-imx6ul.c | 10 +
91
hw/arm/fsl-imx7.c | 35 ++++
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hw/arm/integratorcp.c | 23 ++-
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hw/arm/pxa2xx_gpio.c | 7 +-
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hw/char/xilinx_uartlite.c | 5 +-
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hw/display/pxa2xx_lcd.c | 8 +-
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hw/dma/pxa2xx_dma.c | 14 +-
97
hw/gpio/pl061.c | 12 +-
98
hw/misc/imx2_wdt.c | 90 ---------
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hw/timer/exynos4210_mct.c | 12 +-
100
hw/watchdog/wdt_imx2.c | 304 +++++++++++++++++++++++++++++
101
linux-user/arm/cpu_loop.c | 145 ++++++++------
102
linux-user/arm/signal.c | 15 +-
103
target/arm/translate-a64.c | 63 +++---
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target/arm/translate.c | 23 ---
105
MAINTAINERS | 6 +
106
hw/arm/Kconfig | 5 +
107
hw/misc/Makefile.objs | 1 -
108
hw/watchdog/Kconfig | 3 +
109
hw/watchdog/Makefile.objs | 1 +
110
tests/acceptance/machine_arm_canona1100.py | 35 ++++
111
37 files changed, 855 insertions(+), 292 deletions(-)
112
create mode 100644 docs/system/arm/mps2.rst
113
create mode 100644 docs/system/arm/musca.rst
114
create mode 100644 docs/system/arm/vexpress.rst
115
delete mode 100644 include/hw/misc/imx2_wdt.h
116
create mode 100644 include/hw/watchdog/wdt_imx2.h
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delete mode 100644 hw/misc/imx2_wdt.c
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create mode 100644 hw/watchdog/wdt_imx2.c
119
create mode 100644 tests/acceptance/machine_arm_canona1100.py
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