[PULL v2 00/29] target-arm queue
[PULL v2 00/29] target-arm queue
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v2: added Property array terminator (which caused crashes on
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v2: drop pvpanic-pci patches.
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various non-x86 host architectures).
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The following changes since commit ae3aa5da96f4ccf0c2a28851449d92db9fcfad71:
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The following changes since commit f1fcb6851aba6dd9838886dc179717a11e344a1c:
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Merge remote-tracking branch 'remotes/berrange/tags/socket-next-pull-request' into staging (2020-05-21 16:47:28 +0100)
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Merge remote-tracking branch 'remotes/huth-gitlab/tags/pull-request-2021-01-19' into staging (2021-01-19 11:57:07 +0000)
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are available in the Git repository at:
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are available in the Git repository at:
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https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20200521-1
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https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20210119-1
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for you to fetch changes up to fafe7229272f39500c14845bc7ea60a8504a5a20:
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for you to fetch changes up to b93f4fbdc48283a39089469c44a5529d79dc40a8:
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linux-user/arm/signal.c: Drop TARGET_CONFIG_CPU_32 (2020-05-21 22:05:27 +0100)
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docs: Build and install all the docs in a single manual (2021-01-19 15:45:14 +0000)
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----------------------------------------------------------------
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----------------------------------------------------------------
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target-arm queue:
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target-arm queue:
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* tests/acceptance: Add a test for the canon-a1100 machine
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* Implement IMPDEF pauth algorithm
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* docs/system: Document some of the Arm development boards
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* Support ARMv8.4-SEL2
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* linux-user: make BKPT insn cause SIGTRAP, not be a syscall
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* Fix bug where we were truncating predicate vector lengths in SVE insns
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* target/arm: Remove unused GEN_NEON_INTEGER_OP macro
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* npcm7xx_adc-test: Fix memleak in adc_qom_set
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* fsl-imx25, fsl-imx31, fsl-imx6, fsl-imx6ul, fsl-imx7: implement watchdog
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* target/arm/m_helper: Silence GCC 10 maybe-uninitialized error
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* hw/arm: Use qemu_log_mask() instead of hw_error() in various places
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* docs: Build and install all the docs in a single manual
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* ARM: PL061: Introduce N_GPIOS
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* target/arm: Improve clear_vec_high() usage
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* target/arm: Allow user-mode code to write CPSR.E via MSR
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* linux-user/arm: Reset CPSR_E when entering a signal handler
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* linux-user/arm/signal.c: Drop TARGET_CONFIG_CPU_32
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----------------------------------------------------------------
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----------------------------------------------------------------
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Amanieu d'Antras (1):
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Gan Qixin (1):
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linux-user/arm: Reset CPSR_E when entering a signal handler
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npcm7xx_adc-test: Fix memleak in adc_qom_set
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Geert Uytterhoeven (1):
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Peter Maydell (1):
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ARM: PL061: Introduce N_GPIOS
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docs: Build and install all the docs in a single manual
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Guenter Roeck (8):
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Philippe Mathieu-Daudé (1):
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hw: Move i.MX watchdog driver to hw/watchdog
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target/arm/m_helper: Silence GCC 10 maybe-uninitialized error
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hw/watchdog: Implement full i.MX watchdog support
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hw/arm/fsl-imx25: Wire up watchdog
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hw/arm/fsl-imx31: Wire up watchdog
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hw/arm/fsl-imx6: Connect watchdog interrupts
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hw/arm/fsl-imx6ul: Connect watchdog interrupts
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hw/arm/fsl-imx7: Instantiate various unimplemented devices
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hw/arm/fsl-imx7: Connect watchdog interrupts
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Peter Maydell (12):
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Richard Henderson (7):
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docs/system: Add 'Arm' to the Integrator/CP document title
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target/arm: Implement an IMPDEF pauth algorithm
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docs/system: Sort Arm board index into alphabetical order
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target/arm: Add cpu properties to control pauth
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docs/system: Document Arm Versatile Express boards
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target/arm: Use object_property_add_bool for "sve" property
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docs/system: Document the various MPS2 models
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target/arm: Introduce PREDDESC field definitions
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docs/system: Document Musca boards
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target/arm: Update PFIRST, PNEXT for pred_desc
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linux-user/arm: BKPT should cause SIGTRAP, not be a syscall
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target/arm: Update ZIP, UZP, TRN for pred_desc
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linux-user/arm: Remove bogus SVC 0xf0002 handling
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target/arm: Update REV, PUNPK for pred_desc
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linux-user/arm: Handle invalid arm-specific syscalls correctly
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linux-user/arm: Fix identification of syscall numbers
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target/arm: Remove unused GEN_NEON_INTEGER_OP macro
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target/arm: Allow user-mode code to write CPSR.E via MSR
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linux-user/arm/signal.c: Drop TARGET_CONFIG_CPU_32
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Philippe Mathieu-Daudé (4):
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Rémi Denis-Courmont (19):
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hw/arm/integratorcp: Replace hw_error() by qemu_log_mask()
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target/arm: remove redundant tests
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hw/arm/pxa2xx: Replace hw_error() by qemu_log_mask()
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target/arm: add arm_is_el2_enabled() helper
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hw/char/xilinx_uartlite: Replace hw_error() by qemu_log_mask()
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target/arm: use arm_is_el2_enabled() where applicable
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hw/timer/exynos4210_mct: Replace hw_error() by qemu_log_mask()
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target/arm: use arm_hcr_el2_eff() where applicable
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target/arm: factor MDCR_EL2 common handling
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target/arm: Define isar_feature function to test for presence of SEL2
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target/arm: add 64-bit S-EL2 to EL exception table
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target/arm: add MMU stage 1 for Secure EL2
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target/arm: add ARMv8.4-SEL2 system registers
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target/arm: handle VMID change in secure state
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target/arm: do S1_ptw_translate() before address space lookup
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target/arm: translate NS bit in page-walks
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target/arm: generalize 2-stage page-walk condition
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target/arm: secure stage 2 translation regime
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target/arm: set HPFAR_EL2.NS on secure stage 2 faults
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target/arm: revector to run-time pick target EL
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target/arm: Implement SCR_EL2.EEL2
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target/arm: enable Secure EL2 in max CPU
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target/arm: refactor vae1_tlbmask()
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Richard Henderson (2):
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docs/conf.py | 46 ++++-
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target/arm: Use tcg_gen_gvec_mov for clear_vec_high
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docs/devel/conf.py | 15 --
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target/arm: Use clear_vec_high more effectively
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docs/index.html.in | 17 --
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docs/interop/conf.py | 28 ---
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docs/meson.build | 64 +++---
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docs/specs/conf.py | 16 --
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docs/system/arm/cpu-features.rst | 21 ++
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docs/system/conf.py | 28 ---
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docs/tools/conf.py | 37 ----
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docs/user/conf.py | 15 --
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include/qemu/xxhash.h | 98 +++++++++
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target/arm/cpu-param.h | 2 +-
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target/arm/cpu.h | 107 ++++++++--
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target/arm/internals.h | 45 +++++
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target/arm/cpu.c | 23 ++-
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target/arm/cpu64.c | 65 ++++--
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target/arm/helper-a64.c | 8 +-
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target/arm/helper.c | 414 ++++++++++++++++++++++++++-------------
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target/arm/m_helper.c | 2 +-
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target/arm/monitor.c | 1 +
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target/arm/op_helper.c | 4 +-
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target/arm/pauth_helper.c | 27 ++-
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target/arm/sve_helper.c | 33 ++--
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target/arm/tlb_helper.c | 3 +
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target/arm/translate-a64.c | 4 +
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target/arm/translate-sve.c | 31 ++-
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target/arm/translate.c | 36 +++-
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tests/qtest/arm-cpu-features.c | 13 ++
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tests/qtest/npcm7xx_adc-test.c | 1 +
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.gitlab-ci.yml | 4 +-
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30 files changed, 770 insertions(+), 438 deletions(-)
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delete mode 100644 docs/devel/conf.py
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delete mode 100644 docs/index.html.in
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delete mode 100644 docs/interop/conf.py
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delete mode 100644 docs/specs/conf.py
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delete mode 100644 docs/system/conf.py
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delete mode 100644 docs/tools/conf.py
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delete mode 100644 docs/user/conf.py
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Thomas Huth (1):
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tests/acceptance: Add a test for the canon-a1100 machine
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docs/system/arm/integratorcp.rst | 4 +-
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docs/system/arm/mps2.rst | 29 +++
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docs/system/arm/musca.rst | 31 +++
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docs/system/arm/vexpress.rst | 60 ++++++
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docs/system/target-arm.rst | 20 +-
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include/hw/arm/fsl-imx25.h | 5 +
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include/hw/arm/fsl-imx31.h | 4 +
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include/hw/arm/fsl-imx6.h | 2 +-
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include/hw/arm/fsl-imx6ul.h | 2 +-
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include/hw/arm/fsl-imx7.h | 23 ++-
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include/hw/misc/imx2_wdt.h | 33 ----
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include/hw/watchdog/wdt_imx2.h | 90 +++++++++
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target/arm/cpu.h | 2 +-
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hw/arm/fsl-imx25.c | 10 +
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hw/arm/fsl-imx31.c | 6 +
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hw/arm/fsl-imx6.c | 9 +
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hw/arm/fsl-imx6ul.c | 10 +
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hw/arm/fsl-imx7.c | 35 ++++
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hw/arm/integratorcp.c | 23 ++-
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hw/arm/pxa2xx_gpio.c | 7 +-
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hw/char/xilinx_uartlite.c | 5 +-
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hw/display/pxa2xx_lcd.c | 8 +-
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hw/dma/pxa2xx_dma.c | 14 +-
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hw/gpio/pl061.c | 12 +-
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hw/misc/imx2_wdt.c | 90 ---------
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hw/timer/exynos4210_mct.c | 12 +-
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hw/watchdog/wdt_imx2.c | 304 +++++++++++++++++++++++++++++
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linux-user/arm/cpu_loop.c | 145 ++++++++------
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linux-user/arm/signal.c | 15 +-
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target/arm/translate-a64.c | 63 +++---
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target/arm/translate.c | 23 ---
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MAINTAINERS | 6 +
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hw/arm/Kconfig | 5 +
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hw/misc/Makefile.objs | 1 -
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hw/watchdog/Kconfig | 3 +
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hw/watchdog/Makefile.objs | 1 +
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tests/acceptance/machine_arm_canona1100.py | 35 ++++
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37 files changed, 855 insertions(+), 292 deletions(-)
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create mode 100644 docs/system/arm/mps2.rst
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create mode 100644 docs/system/arm/musca.rst
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create mode 100644 docs/system/arm/vexpress.rst
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delete mode 100644 include/hw/misc/imx2_wdt.h
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create mode 100644 include/hw/watchdog/wdt_imx2.h
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delete mode 100644 hw/misc/imx2_wdt.c
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create mode 100644 hw/watchdog/wdt_imx2.c
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create mode 100644 tests/acceptance/machine_arm_canona1100.py
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