[PATCH 20/24] riscv: Fix type of SiFive[EU]SocState, member parent_obj

Markus Armbruster posted 24 patches 5 years, 6 months ago
Maintainers: Sagar Karandikar <sagark@eecs.berkeley.edu>, Fabien Chouteau <chouteau@adacore.com>, Peter Maydell <peter.maydell@linaro.org>, Alistair Francis <Alistair.Francis@wdc.com>, Bastian Koppelmann <kbastian@mail.uni-paderborn.de>, Alistair Francis <alistair@alistair23.me>, Paolo Bonzini <pbonzini@redhat.com>, "Edgar E. Iglesias" <edgar.iglesias@gmail.com>, Andrzej Zaborowski <balrogg@gmail.com>, KONRAD Frederic <frederic.konrad@adacore.com>, "Daniel P. Berrangé" <berrange@redhat.com>, Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>, Artyom Tarasenko <atar4qemu@gmail.com>, Eduardo Habkost <ehabkost@redhat.com>, Laurent Vivier <laurent@vivier.eu>, David Gibson <david@gibson.dropbear.id.au>, Palmer Dabbelt <palmer@dabbelt.com>
There is a newer version of this series
[PATCH 20/24] riscv: Fix type of SiFive[EU]SocState, member parent_obj
Posted by Markus Armbruster 5 years, 6 months ago
Device "riscv.sifive.e.soc" is a direct subtype of TYPE_DEVICE, but
its instance struct SiFiveESoCState's member @parent_obj is
SysBusDevice instead of DeviceState.  Correct that.

Same for "riscv.sifive.u.soc"'s instance struct SiFiveUSoCState.

Cc: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Alistair Francis <Alistair.Francis@wdc.com>
Cc: Sagar Karandikar <sagark@eecs.berkeley.edu>
Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Cc: qemu-riscv@nongnu.org
Signed-off-by: Markus Armbruster <armbru@redhat.com>
---
 include/hw/riscv/sifive_e.h | 2 +-
 include/hw/riscv/sifive_u.h | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/hw/riscv/sifive_e.h b/include/hw/riscv/sifive_e.h
index 25ce7aa9d5..f05644df7c 100644
--- a/include/hw/riscv/sifive_e.h
+++ b/include/hw/riscv/sifive_e.h
@@ -29,7 +29,7 @@
 
 typedef struct SiFiveESoCState {
     /*< private >*/
-    SysBusDevice parent_obj;
+    DeviceState parent_obj;
 
     /*< public >*/
     RISCVHartArrayState cpus;
diff --git a/include/hw/riscv/sifive_u.h b/include/hw/riscv/sifive_u.h
index 16c297ec5f..5f62cf5f85 100644
--- a/include/hw/riscv/sifive_u.h
+++ b/include/hw/riscv/sifive_u.h
@@ -31,7 +31,7 @@
 
 typedef struct SiFiveUSoCState {
     /*< private >*/
-    SysBusDevice parent_obj;
+    DeviceState parent_obj;
 
     /*< public >*/
     CPUClusterState e_cluster;
-- 
2.21.1


Re: [PATCH 20/24] riscv: Fix type of SiFive[EU]SocState, member parent_obj
Posted by Philippe Mathieu-Daudé 5 years, 6 months ago
On 5/18/20 7:04 AM, Markus Armbruster wrote:
> Device "riscv.sifive.e.soc" is a direct subtype of TYPE_DEVICE, but
> its instance struct SiFiveESoCState's member @parent_obj is
> SysBusDevice instead of DeviceState.  Correct that.
> 
> Same for "riscv.sifive.u.soc"'s instance struct SiFiveUSoCState.
> 
> Cc: Palmer Dabbelt <palmer@dabbelt.com>
> Cc: Alistair Francis <Alistair.Francis@wdc.com>
> Cc: Sagar Karandikar <sagark@eecs.berkeley.edu>
> Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
> Cc: qemu-riscv@nongnu.org
> Signed-off-by: Markus Armbruster <armbru@redhat.com>
> ---
>   include/hw/riscv/sifive_e.h | 2 +-
>   include/hw/riscv/sifive_u.h | 2 +-
>   2 files changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/include/hw/riscv/sifive_e.h b/include/hw/riscv/sifive_e.h
> index 25ce7aa9d5..f05644df7c 100644
> --- a/include/hw/riscv/sifive_e.h
> +++ b/include/hw/riscv/sifive_e.h
> @@ -29,7 +29,7 @@
>   
>   typedef struct SiFiveESoCState {
>       /*< private >*/
> -    SysBusDevice parent_obj;
> +    DeviceState parent_obj;
>   
>       /*< public >*/
>       RISCVHartArrayState cpus;
> diff --git a/include/hw/riscv/sifive_u.h b/include/hw/riscv/sifive_u.h
> index 16c297ec5f..5f62cf5f85 100644
> --- a/include/hw/riscv/sifive_u.h
> +++ b/include/hw/riscv/sifive_u.h
> @@ -31,7 +31,7 @@
>   
>   typedef struct SiFiveUSoCState {
>       /*< private >*/
> -    SysBusDevice parent_obj;
> +    DeviceState parent_obj;
>   
>       /*< public >*/
>       CPUClusterState e_cluster;
> 

Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>


Re: [PATCH 20/24] riscv: Fix type of SiFive[EU]SocState, member parent_obj
Posted by Alistair Francis 5 years, 6 months ago
On Sun, May 17, 2020 at 10:07 PM Markus Armbruster <armbru@redhat.com> wrote:
>
> Device "riscv.sifive.e.soc" is a direct subtype of TYPE_DEVICE, but
> its instance struct SiFiveESoCState's member @parent_obj is
> SysBusDevice instead of DeviceState.  Correct that.
>
> Same for "riscv.sifive.u.soc"'s instance struct SiFiveUSoCState.
>
> Cc: Palmer Dabbelt <palmer@dabbelt.com>
> Cc: Alistair Francis <Alistair.Francis@wdc.com>
> Cc: Sagar Karandikar <sagark@eecs.berkeley.edu>
> Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
> Cc: qemu-riscv@nongnu.org
> Signed-off-by: Markus Armbruster <armbru@redhat.com>

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>  include/hw/riscv/sifive_e.h | 2 +-
>  include/hw/riscv/sifive_u.h | 2 +-
>  2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/include/hw/riscv/sifive_e.h b/include/hw/riscv/sifive_e.h
> index 25ce7aa9d5..f05644df7c 100644
> --- a/include/hw/riscv/sifive_e.h
> +++ b/include/hw/riscv/sifive_e.h
> @@ -29,7 +29,7 @@
>
>  typedef struct SiFiveESoCState {
>      /*< private >*/
> -    SysBusDevice parent_obj;
> +    DeviceState parent_obj;
>
>      /*< public >*/
>      RISCVHartArrayState cpus;
> diff --git a/include/hw/riscv/sifive_u.h b/include/hw/riscv/sifive_u.h
> index 16c297ec5f..5f62cf5f85 100644
> --- a/include/hw/riscv/sifive_u.h
> +++ b/include/hw/riscv/sifive_u.h
> @@ -31,7 +31,7 @@
>
>  typedef struct SiFiveUSoCState {
>      /*< private >*/
> -    SysBusDevice parent_obj;
> +    DeviceState parent_obj;
>
>      /*< public >*/
>      CPUClusterState e_cluster;
> --
> 2.21.1
>
>