[PULL 27/31] target/arm/cpu: Update coding style to make checkpatch.pl happy

Maintainers: Alistair Francis <alistair.francis@wdc.com>, "Michael S. Tsirkin" <mst@redhat.com>, "Daniel P. Berrangé" <berrange@redhat.com>, Eduardo Habkost <ehabkost@redhat.com>, Alistair Francis <alistair@alistair23.me>, David Gibson <david@gibson.dropbear.id.au>, Jason Wang <jasowang@redhat.com>, Paolo Bonzini <pbonzini@redhat.com>, "Marc-André Lureau" <marcandre.lureau@redhat.com>, "Edgar E. Iglesias" <edgar.iglesias@gmail.com>, Igor Mammedov <imammedo@redhat.com>, Peter Maydell <peter.maydell@linaro.org>
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[PULL 27/31] target/arm/cpu: Update coding style to make checkpatch.pl happy
Posted by Peter Maydell 5 years ago
From: Philippe Mathieu-Daudé <philmd@redhat.com>

We will move this code in the next commit. Clean it up
first to avoid checkpatch.pl errors.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-id: 20200423073358.27155-5-philmd@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 target/arm/cpu.c | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 30e961f7754..a1e38b38ba1 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -582,7 +582,8 @@ static bool arm_v7m_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
     CPUARMState *env = &cpu->env;
     bool ret = false;
 
-    /* ARMv7-M interrupt masking works differently than -A or -R.
+    /*
+     * ARMv7-M interrupt masking works differently than -A or -R.
      * There is no FIQ/IRQ distinction. Instead of I and F bits
      * masking FIQ and IRQ interrupts, an exception is taken only
      * if it is higher priority than the current execution priority
@@ -1912,7 +1913,8 @@ static void arm1026_initfn(Object *obj)
 static void arm1136_r2_initfn(Object *obj)
 {
     ARMCPU *cpu = ARM_CPU(obj);
-    /* What qemu calls "arm1136_r2" is actually the 1136 r0p2, ie an
+    /*
+     * What qemu calls "arm1136_r2" is actually the 1136 r0p2, ie an
      * older core than plain "arm1136". In particular this does not
      * have the v6K features.
      * These ID register values are correct for 1136 but may be wrong
@@ -2698,7 +2700,8 @@ static const ARMCPUInfo arm_cpus[] = {
     { .name = "arm926",      .initfn = arm926_initfn },
     { .name = "arm946",      .initfn = arm946_initfn },
     { .name = "arm1026",     .initfn = arm1026_initfn },
-    /* What QEMU calls "arm1136-r2" is actually the 1136 r0p2, i.e. an
+    /*
+     * What QEMU calls "arm1136-r2" is actually the 1136 r0p2, i.e. an
      * older core than plain "arm1136". In particular this does not
      * have the v6K features.
      */
-- 
2.20.1


Re: [PULL 27/31] target/arm/cpu: Update coding style to make checkpatch.pl happy
Posted by Philippe Mathieu-Daudé 5 years ago
On 4/30/20 1:51 PM, Peter Maydell wrote:
> From: Philippe Mathieu-Daudé <philmd@redhat.com>
> 
> We will move this code in the next commit. Clean it up
> first to avoid checkpatch.pl errors.

Oops this isn't the next commit anymore :S

> 
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
> Message-id: 20200423073358.27155-5-philmd@redhat.com
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
>   target/arm/cpu.c | 9 ++++++---
>   1 file changed, 6 insertions(+), 3 deletions(-)
> 
> diff --git a/target/arm/cpu.c b/target/arm/cpu.c
> index 30e961f7754..a1e38b38ba1 100644
> --- a/target/arm/cpu.c
> +++ b/target/arm/cpu.c
> @@ -582,7 +582,8 @@ static bool arm_v7m_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
>       CPUARMState *env = &cpu->env;
>       bool ret = false;
>   
> -    /* ARMv7-M interrupt masking works differently than -A or -R.
> +    /*
> +     * ARMv7-M interrupt masking works differently than -A or -R.
>        * There is no FIQ/IRQ distinction. Instead of I and F bits
>        * masking FIQ and IRQ interrupts, an exception is taken only
>        * if it is higher priority than the current execution priority
> @@ -1912,7 +1913,8 @@ static void arm1026_initfn(Object *obj)
>   static void arm1136_r2_initfn(Object *obj)
>   {
>       ARMCPU *cpu = ARM_CPU(obj);
> -    /* What qemu calls "arm1136_r2" is actually the 1136 r0p2, ie an
> +    /*
> +     * What qemu calls "arm1136_r2" is actually the 1136 r0p2, ie an
>        * older core than plain "arm1136". In particular this does not
>        * have the v6K features.
>        * These ID register values are correct for 1136 but may be wrong
> @@ -2698,7 +2700,8 @@ static const ARMCPUInfo arm_cpus[] = {
>       { .name = "arm926",      .initfn = arm926_initfn },
>       { .name = "arm946",      .initfn = arm946_initfn },
>       { .name = "arm1026",     .initfn = arm1026_initfn },
> -    /* What QEMU calls "arm1136-r2" is actually the 1136 r0p2, i.e. an
> +    /*
> +     * What QEMU calls "arm1136-r2" is actually the 1136 r0p2, i.e. an
>        * older core than plain "arm1136". In particular this does not
>        * have the v6K features.
>        */
>