Stephen, what I was looking for when I talked about modifying
the existing helpers is patch 1, which simplifies the final 3
patches for the new SVE2 insns.

In the process I found that the existing implementation of the
AdvSIMD insns is buggy wrt SVE.  We need to clear the bits in
the Zreg destination beyond the first 128.

I could have done this via clear_vec_high in translate-a64.c,
but since we already have a function call, we're better off
doing the clearing out of line.  This means adding a desc
parameter so that we know the total vector length.


r~


Based-on: https://github.com/rth7680/qemu/commit/8c3a91e4e487ef840193a489e5457165530666fc

Richard Henderson (9):
  target/arm: Convert aes and sm4 to gvec helpers
  target/arm: Convert rax1 to gvec helpers
  target/arm: Convert sha512 and sm3 to gvec helpers
  target/arm: Convert sha1 and sha256 to gvec helpers
  target/arm: Split helper_crypto_sha1_3reg
  target/arm: Split helper_crypto_sm3tt
  target/arm: Implement SVE2 crypto unary operations
  target/arm: Implement SVE2 crypto destructive binary operations
  target/arm: Implement SVE2 crypto constructive binary operations

 target/arm/cpu.h           |  10 ++
 target/arm/helper.h        |  45 ++++---
 target/arm/translate-a64.h |   2 +
 target/arm/vec_internal.h  |  10 ++
 target/arm/sve.decode      |  17 +++
 target/arm/crypto_helper.c | 267 ++++++++++++++++++++++++++-----------
 target/arm/translate-a64.c | 211 +++++++++++++----------------
 target/arm/translate-sve.c |  79 +++++++++++
 target/arm/translate.c     | 125 +++++++++--------
 target/arm/vec_helper.c    |  10 --
 10 files changed, 491 insertions(+), 285 deletions(-)

-- 
2.20.1