From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
Add support for SD.
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
---
hw/arm/xlnx-versal.c | 31 +++++++++++++++++++++++++++++++
include/hw/arm/xlnx-versal.h | 12 ++++++++++++
2 files changed, 43 insertions(+)
diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c
index c8a296e2e0..e263bdf77a 100644
--- a/hw/arm/xlnx-versal.c
+++ b/hw/arm/xlnx-versal.c
@@ -210,6 +210,36 @@ static void versal_create_admas(Versal *s, qemu_irq *pic)
}
}
+#define SDHCI_CAPABILITIES 0x280737ec6481 /* Same as on ZynqMP. */
+static void versal_create_sds(Versal *s, qemu_irq *pic)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(s->pmc.iou.sd); i++) {
+ DeviceState *dev;
+ MemoryRegion *mr;
+
+ sysbus_init_child_obj(OBJECT(s), "sd[*]",
+ &s->pmc.iou.sd[i], sizeof(s->pmc.iou.sd[i]),
+ TYPE_SYSBUS_SDHCI);
+ dev = DEVICE(&s->pmc.iou.sd[i]);
+
+ object_property_set_uint(OBJECT(dev),
+ 3, "sd-spec-version", &error_fatal);
+ object_property_set_uint(OBJECT(dev), SDHCI_CAPABILITIES, "capareg",
+ &error_fatal);
+ object_property_set_uint(OBJECT(dev), UHS_I, "uhs", &error_fatal);
+ qdev_init_nofail(dev);
+
+ mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0);
+ memory_region_add_subregion(&s->mr_ps,
+ MM_PMC_SD0 + i * MM_PMC_SD0_SIZE, mr);
+
+ sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0,
+ pic[VERSAL_SD0_IRQ_0 + i * 2]);
+ }
+}
+
/* This takes the board allocated linear DDR memory and creates aliases
* for each split DDR range/aperture on the Versal address map.
*/
@@ -292,6 +322,7 @@ static void versal_realize(DeviceState *dev, Error **errp)
versal_create_uarts(s, pic);
versal_create_gems(s, pic);
versal_create_admas(s, pic);
+ versal_create_sds(s, pic);
versal_map_ddr(s);
versal_unimp(s);
diff --git a/include/hw/arm/xlnx-versal.h b/include/hw/arm/xlnx-versal.h
index 426b66449d..e11693e29d 100644
--- a/include/hw/arm/xlnx-versal.h
+++ b/include/hw/arm/xlnx-versal.h
@@ -14,6 +14,7 @@
#include "hw/sysbus.h"
#include "hw/arm/boot.h"
+#include "hw/sd/sdhci.h"
#include "hw/intc/arm_gicv3.h"
#include "hw/char/pl011.h"
#include "hw/dma/xlnx-zdma.h"
@@ -26,6 +27,7 @@
#define XLNX_VERSAL_NR_UARTS 2
#define XLNX_VERSAL_NR_GEMS 2
#define XLNX_VERSAL_NR_ADMAS 8
+#define XLNX_VERSAL_NR_SDS 2
#define XLNX_VERSAL_NR_IRQS 192
typedef struct Versal {
@@ -58,6 +60,13 @@ typedef struct Versal {
} iou;
} lpd;
+ /* The Platform Management Controller subsystem. */
+ struct {
+ struct {
+ SDHCIState sd[XLNX_VERSAL_NR_SDS];
+ } iou;
+ } pmc;
+
struct {
MemoryRegion *mr_ddr;
uint32_t psci_conduit;
@@ -80,6 +89,7 @@ typedef struct Versal {
#define VERSAL_GEM1_IRQ_0 58
#define VERSAL_GEM1_WAKE_IRQ_0 59
#define VERSAL_ADMA_IRQ_0 60
+#define VERSAL_SD0_IRQ_0 126
/* Architecturally reserved IRQs suitable for virtualization. */
#define VERSAL_RSVD_IRQ_FIRST 111
@@ -129,6 +139,8 @@ typedef struct Versal {
#define MM_FPD_CRF 0xfd1a0000U
#define MM_FPD_CRF_SIZE 0x140000
+#define MM_PMC_SD0 0xf1040000U
+#define MM_PMC_SD0_SIZE 0x10000
#define MM_PMC_CRP 0xf1260000U
#define MM_PMC_CRP_SIZE 0x10000
#endif
--
2.20.1
On Mon, Apr 27, 2020 at 11:23 AM Edgar E. Iglesias
<edgar.iglesias@gmail.com> wrote:
>
> From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
>
> Add support for SD.
>
> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> hw/arm/xlnx-versal.c | 31 +++++++++++++++++++++++++++++++
> include/hw/arm/xlnx-versal.h | 12 ++++++++++++
> 2 files changed, 43 insertions(+)
>
> diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c
> index c8a296e2e0..e263bdf77a 100644
> --- a/hw/arm/xlnx-versal.c
> +++ b/hw/arm/xlnx-versal.c
> @@ -210,6 +210,36 @@ static void versal_create_admas(Versal *s, qemu_irq *pic)
> }
> }
>
> +#define SDHCI_CAPABILITIES 0x280737ec6481 /* Same as on ZynqMP. */
> +static void versal_create_sds(Versal *s, qemu_irq *pic)
> +{
> + int i;
> +
> + for (i = 0; i < ARRAY_SIZE(s->pmc.iou.sd); i++) {
> + DeviceState *dev;
> + MemoryRegion *mr;
> +
> + sysbus_init_child_obj(OBJECT(s), "sd[*]",
> + &s->pmc.iou.sd[i], sizeof(s->pmc.iou.sd[i]),
> + TYPE_SYSBUS_SDHCI);
> + dev = DEVICE(&s->pmc.iou.sd[i]);
> +
> + object_property_set_uint(OBJECT(dev),
> + 3, "sd-spec-version", &error_fatal);
> + object_property_set_uint(OBJECT(dev), SDHCI_CAPABILITIES, "capareg",
> + &error_fatal);
> + object_property_set_uint(OBJECT(dev), UHS_I, "uhs", &error_fatal);
> + qdev_init_nofail(dev);
> +
> + mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0);
> + memory_region_add_subregion(&s->mr_ps,
> + MM_PMC_SD0 + i * MM_PMC_SD0_SIZE, mr);
> +
> + sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0,
> + pic[VERSAL_SD0_IRQ_0 + i * 2]);
> + }
> +}
> +
> /* This takes the board allocated linear DDR memory and creates aliases
> * for each split DDR range/aperture on the Versal address map.
> */
> @@ -292,6 +322,7 @@ static void versal_realize(DeviceState *dev, Error **errp)
> versal_create_uarts(s, pic);
> versal_create_gems(s, pic);
> versal_create_admas(s, pic);
> + versal_create_sds(s, pic);
> versal_map_ddr(s);
> versal_unimp(s);
>
> diff --git a/include/hw/arm/xlnx-versal.h b/include/hw/arm/xlnx-versal.h
> index 426b66449d..e11693e29d 100644
> --- a/include/hw/arm/xlnx-versal.h
> +++ b/include/hw/arm/xlnx-versal.h
> @@ -14,6 +14,7 @@
>
> #include "hw/sysbus.h"
> #include "hw/arm/boot.h"
> +#include "hw/sd/sdhci.h"
> #include "hw/intc/arm_gicv3.h"
> #include "hw/char/pl011.h"
> #include "hw/dma/xlnx-zdma.h"
> @@ -26,6 +27,7 @@
> #define XLNX_VERSAL_NR_UARTS 2
> #define XLNX_VERSAL_NR_GEMS 2
> #define XLNX_VERSAL_NR_ADMAS 8
> +#define XLNX_VERSAL_NR_SDS 2
> #define XLNX_VERSAL_NR_IRQS 192
>
> typedef struct Versal {
> @@ -58,6 +60,13 @@ typedef struct Versal {
> } iou;
> } lpd;
>
> + /* The Platform Management Controller subsystem. */
> + struct {
> + struct {
> + SDHCIState sd[XLNX_VERSAL_NR_SDS];
> + } iou;
> + } pmc;
> +
> struct {
> MemoryRegion *mr_ddr;
> uint32_t psci_conduit;
> @@ -80,6 +89,7 @@ typedef struct Versal {
> #define VERSAL_GEM1_IRQ_0 58
> #define VERSAL_GEM1_WAKE_IRQ_0 59
> #define VERSAL_ADMA_IRQ_0 60
> +#define VERSAL_SD0_IRQ_0 126
>
> /* Architecturally reserved IRQs suitable for virtualization. */
> #define VERSAL_RSVD_IRQ_FIRST 111
> @@ -129,6 +139,8 @@ typedef struct Versal {
> #define MM_FPD_CRF 0xfd1a0000U
> #define MM_FPD_CRF_SIZE 0x140000
>
> +#define MM_PMC_SD0 0xf1040000U
> +#define MM_PMC_SD0_SIZE 0x10000
> #define MM_PMC_CRP 0xf1260000U
> #define MM_PMC_CRP_SIZE 0x10000
> #endif
> --
> 2.20.1
>
>
On 4/27/20 8:16 PM, Edgar E. Iglesias wrote:
> From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
>
> Add support for SD.
>
> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
> ---
> hw/arm/xlnx-versal.c | 31 +++++++++++++++++++++++++++++++
> include/hw/arm/xlnx-versal.h | 12 ++++++++++++
> 2 files changed, 43 insertions(+)
>
> diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c
> index c8a296e2e0..e263bdf77a 100644
> --- a/hw/arm/xlnx-versal.c
> +++ b/hw/arm/xlnx-versal.c
> @@ -210,6 +210,36 @@ static void versal_create_admas(Versal *s, qemu_irq *pic)
> }
> }
>
> +#define SDHCI_CAPABILITIES 0x280737ec6481 /* Same as on ZynqMP. */
> +static void versal_create_sds(Versal *s, qemu_irq *pic)
> +{
> + int i;
> +
> + for (i = 0; i < ARRAY_SIZE(s->pmc.iou.sd); i++) {
> + DeviceState *dev;
> + MemoryRegion *mr;
> +
> + sysbus_init_child_obj(OBJECT(s), "sd[*]",
> + &s->pmc.iou.sd[i], sizeof(s->pmc.iou.sd[i]),
> + TYPE_SYSBUS_SDHCI);
> + dev = DEVICE(&s->pmc.iou.sd[i]);
> +
> + object_property_set_uint(OBJECT(dev),
> + 3, "sd-spec-version", &error_fatal);
> + object_property_set_uint(OBJECT(dev), SDHCI_CAPABILITIES, "capareg",
> + &error_fatal);
> + object_property_set_uint(OBJECT(dev), UHS_I, "uhs", &error_fatal);
> + qdev_init_nofail(dev);
> +
> + mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0);
> + memory_region_add_subregion(&s->mr_ps,
> + MM_PMC_SD0 + i * MM_PMC_SD0_SIZE, mr);
> +
> + sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0,
> + pic[VERSAL_SD0_IRQ_0 + i * 2]);
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> + }
> +}
> +
> /* This takes the board allocated linear DDR memory and creates aliases
> * for each split DDR range/aperture on the Versal address map.
> */
> @@ -292,6 +322,7 @@ static void versal_realize(DeviceState *dev, Error **errp)
> versal_create_uarts(s, pic);
> versal_create_gems(s, pic);
> versal_create_admas(s, pic);
> + versal_create_sds(s, pic);
> versal_map_ddr(s);
> versal_unimp(s);
>
> diff --git a/include/hw/arm/xlnx-versal.h b/include/hw/arm/xlnx-versal.h
> index 426b66449d..e11693e29d 100644
> --- a/include/hw/arm/xlnx-versal.h
> +++ b/include/hw/arm/xlnx-versal.h
> @@ -14,6 +14,7 @@
>
> #include "hw/sysbus.h"
> #include "hw/arm/boot.h"
> +#include "hw/sd/sdhci.h"
> #include "hw/intc/arm_gicv3.h"
> #include "hw/char/pl011.h"
> #include "hw/dma/xlnx-zdma.h"
> @@ -26,6 +27,7 @@
> #define XLNX_VERSAL_NR_UARTS 2
> #define XLNX_VERSAL_NR_GEMS 2
> #define XLNX_VERSAL_NR_ADMAS 8
> +#define XLNX_VERSAL_NR_SDS 2
> #define XLNX_VERSAL_NR_IRQS 192
>
> typedef struct Versal {
> @@ -58,6 +60,13 @@ typedef struct Versal {
> } iou;
> } lpd;
>
> + /* The Platform Management Controller subsystem. */
> + struct {
> + struct {
> + SDHCIState sd[XLNX_VERSAL_NR_SDS];
> + } iou;
> + } pmc;
> +
> struct {
> MemoryRegion *mr_ddr;
> uint32_t psci_conduit;
> @@ -80,6 +89,7 @@ typedef struct Versal {
> #define VERSAL_GEM1_IRQ_0 58
> #define VERSAL_GEM1_WAKE_IRQ_0 59
> #define VERSAL_ADMA_IRQ_0 60
> +#define VERSAL_SD0_IRQ_0 126
>
> /* Architecturally reserved IRQs suitable for virtualization. */
> #define VERSAL_RSVD_IRQ_FIRST 111
> @@ -129,6 +139,8 @@ typedef struct Versal {
> #define MM_FPD_CRF 0xfd1a0000U
> #define MM_FPD_CRF_SIZE 0x140000
>
> +#define MM_PMC_SD0 0xf1040000U
> +#define MM_PMC_SD0_SIZE 0x10000
> #define MM_PMC_CRP 0xf1260000U
> #define MM_PMC_CRP_SIZE 0x10000
> #endif
>
On 4/27/20 8:16 PM, Edgar E. Iglesias wrote:
> From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
>
> Add support for SD.
>
> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Luc Michel <luc.michel@greensocs.com>
> ---
> hw/arm/xlnx-versal.c | 31 +++++++++++++++++++++++++++++++
> include/hw/arm/xlnx-versal.h | 12 ++++++++++++
> 2 files changed, 43 insertions(+)
>
> diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c
> index c8a296e2e0..e263bdf77a 100644
> --- a/hw/arm/xlnx-versal.c
> +++ b/hw/arm/xlnx-versal.c
> @@ -210,6 +210,36 @@ static void versal_create_admas(Versal *s, qemu_irq *pic)
> }
> }
>
> +#define SDHCI_CAPABILITIES 0x280737ec6481 /* Same as on ZynqMP. */
> +static void versal_create_sds(Versal *s, qemu_irq *pic)
> +{
> + int i;
> +
> + for (i = 0; i < ARRAY_SIZE(s->pmc.iou.sd); i++) {
> + DeviceState *dev;
> + MemoryRegion *mr;
> +
> + sysbus_init_child_obj(OBJECT(s), "sd[*]",
> + &s->pmc.iou.sd[i], sizeof(s->pmc.iou.sd[i]),
> + TYPE_SYSBUS_SDHCI);
> + dev = DEVICE(&s->pmc.iou.sd[i]);
> +
> + object_property_set_uint(OBJECT(dev),
> + 3, "sd-spec-version", &error_fatal);
> + object_property_set_uint(OBJECT(dev), SDHCI_CAPABILITIES, "capareg",
> + &error_fatal);
> + object_property_set_uint(OBJECT(dev), UHS_I, "uhs", &error_fatal);
> + qdev_init_nofail(dev);
> +
> + mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0);
> + memory_region_add_subregion(&s->mr_ps,
> + MM_PMC_SD0 + i * MM_PMC_SD0_SIZE, mr);
> +
> + sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0,
> + pic[VERSAL_SD0_IRQ_0 + i * 2]);
> + }
> +}
> +
> /* This takes the board allocated linear DDR memory and creates aliases
> * for each split DDR range/aperture on the Versal address map.
> */
> @@ -292,6 +322,7 @@ static void versal_realize(DeviceState *dev, Error **errp)
> versal_create_uarts(s, pic);
> versal_create_gems(s, pic);
> versal_create_admas(s, pic);
> + versal_create_sds(s, pic);
> versal_map_ddr(s);
> versal_unimp(s);
>
> diff --git a/include/hw/arm/xlnx-versal.h b/include/hw/arm/xlnx-versal.h
> index 426b66449d..e11693e29d 100644
> --- a/include/hw/arm/xlnx-versal.h
> +++ b/include/hw/arm/xlnx-versal.h
> @@ -14,6 +14,7 @@
>
> #include "hw/sysbus.h"
> #include "hw/arm/boot.h"
> +#include "hw/sd/sdhci.h"
> #include "hw/intc/arm_gicv3.h"
> #include "hw/char/pl011.h"
> #include "hw/dma/xlnx-zdma.h"
> @@ -26,6 +27,7 @@
> #define XLNX_VERSAL_NR_UARTS 2
> #define XLNX_VERSAL_NR_GEMS 2
> #define XLNX_VERSAL_NR_ADMAS 8
> +#define XLNX_VERSAL_NR_SDS 2
> #define XLNX_VERSAL_NR_IRQS 192
>
> typedef struct Versal {
> @@ -58,6 +60,13 @@ typedef struct Versal {
> } iou;
> } lpd;
>
> + /* The Platform Management Controller subsystem. */
> + struct {
> + struct {
> + SDHCIState sd[XLNX_VERSAL_NR_SDS];
> + } iou;
> + } pmc;
> +
> struct {
> MemoryRegion *mr_ddr;
> uint32_t psci_conduit;
> @@ -80,6 +89,7 @@ typedef struct Versal {
> #define VERSAL_GEM1_IRQ_0 58
> #define VERSAL_GEM1_WAKE_IRQ_0 59
> #define VERSAL_ADMA_IRQ_0 60
> +#define VERSAL_SD0_IRQ_0 126
>
> /* Architecturally reserved IRQs suitable for virtualization. */
> #define VERSAL_RSVD_IRQ_FIRST 111
> @@ -129,6 +139,8 @@ typedef struct Versal {
> #define MM_FPD_CRF 0xfd1a0000U
> #define MM_FPD_CRF_SIZE 0x140000
>
> +#define MM_PMC_SD0 0xf1040000U
> +#define MM_PMC_SD0_SIZE 0x10000
> #define MM_PMC_CRP 0xf1260000U
> #define MM_PMC_CRP_SIZE 0x10000
> #endif
>
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