Series comparison

-[PULL 0/5] tcg patch queue
+[PULL 0/4] tcg patch queue
-The following changes since commit 40c67636f67c2a89745f2e698522fe917326a952:
+The following changes since commit 67e41fe0cfb62e6cdfa659f0155417d17e5274ea:
-  Merge remote-tracking branch 'remotes/kraxel/tags/usb-20200317-pull-request' into staging (2020-03-17 14:00:56 +0000)
+  Merge tag 'pull-ppc-20220104' of https://github.com/legoater/qemu into staging (2022-01-04 07:23:27 -0800)
 are available in the Git repository at:
-  https://github.com/rth7680/qemu.git tags/pull-tcg-20200317
+  https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20220104
-for you to fetch changes up to 0270bd503e3699b7202200a2d693ad1feb57473f:
+for you to fetch changes up to d7478d4229f0a2b2817a55487e6b17081099fae4:
-  tcg: Remove tcg-runtime-gvec.c DO_CMP0 (2020-03-17 08:41:07 -0700)
+  common-user: Fix tail calls to safe_syscall_set_errno_tail (2022-01-04 15:41:03 -0800)
 ----------------------------------------------------------------
-Fix tcg/i386 bug vs sari_vec.
+Fix for safe_syscall_base.
-Fix tcg-runtime-gvec.c vs i386 without avx.
+Fix for folding of vector add/sub.
 Fix build on loongarch64 with gcc 8.
 Remove decl for qemu_run_machine_init_done_notifiers.
 ----------------------------------------------------------------
-Richard Henderson (5):
+Philippe Mathieu-Daudé (1):
-      tcg/i386: Bound shift count expanding sari_vec
+      linux-user: Fix trivial build error on loongarch64 hosts
       tcg: Remove CONFIG_VECTOR16
       tcg: Tidy tcg-runtime-gvec.c types
       tcg: Tidy tcg-runtime-gvec.c DUP*
       tcg: Remove tcg-runtime-gvec.c DO_CMP0
- configure                    |  56 --------
+Richard Henderson (2):
- accel/tcg/tcg-runtime-gvec.c | 298 +++++++++++++++++--------------------------
+      tcg/optimize: Fix folding of vector ops
- tcg/i386/tcg-target.inc.c    |   9 +-
+      common-user: Fix tail calls to safe_syscall_set_errno_tail
 files changed, 122 insertions(+), 241 deletions(-)
+Xiaoyao Li (1):
+      sysemu: Cleanup qemu_run_machine_init_done_notifiers()
+ include/sysemu/sysemu.h                    |  1 -
+ linux-user/host/loongarch64/host-signal.h  |  4 +--
+ tcg/optimize.c                             | 49 +++++++++++++++++++++++-------
+ common-user/host/i386/safe-syscall.inc.S   |  1 +
+ common-user/host/mips/safe-syscall.inc.S   |  1 +
+ common-user/host/x86_64/safe-syscall.inc.S |  1 +
+files changed, 42 insertions(+), 15 deletions(-)

-[PULL 1/5] tcg/i386: Bound shift count expanding sari_vec
+Deleted patch
-A given RISU testcase for SVE can produce
-tcg-op-vec.c:511: do_shifti: Assertion `i >= 0 && i < (8 << vece)' failed.
-because expand_vec_sari gave a shift count of 32 to a MO_32
-vector shift.
-In 44f1441dbe1, we changed from direct expansion of vector opcodes
-to re-use of the tcg expanders.  So while the comment correctly notes
-that the hw will handle such a shift count, we now have to take our
-own sanity checks into account.  Which is easy in this particular case.
-Fixes: 44f1441dbe1
-Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
----
- tcg/i386/tcg-target.inc.c | 9 ++++++---
-file changed, 6 insertions(+), 3 deletions(-)
-diff --git a/tcg/i386/tcg-target.inc.c b/tcg/i386/tcg-target.inc.c
-index XXXXXXX..XXXXXXX 100644
---- a/tcg/i386/tcg-target.inc.c
-+++ b/tcg/i386/tcg-target.inc.c
-@@ -XXX,XX +XXX,XX @@ static void expand_vec_sari(TCGType type, unsigned vece,
-     case MO_64:
-         if (imm <= 32) {
--            /* We can emulate a small sign extend by performing an arithmetic
-+            /*
-+             * We can emulate a small sign extend by performing an arithmetic
-              * 32-bit shift and overwriting the high half of a 64-bit logical
--             * shift (note that the ISA says shift of 32 is valid).
-+             * shift.  Note that the ISA says shift of 32 is valid, but TCG
-+             * does not, so we have to bound the smaller shift -- we get the
-+             * same result in the high half either way.
-              */
-             t1 = tcg_temp_new_vec(type);
--            tcg_gen_sari_vec(MO_32, t1, v1, imm);
-+            tcg_gen_sari_vec(MO_32, t1, v1, MIN(imm, 31));
-             tcg_gen_shri_vec(MO_64, v0, v1, imm);
-             vec_gen_4(INDEX_op_x86_blend_vec, type, MO_32,
-                       tcgv_vec_arg(v0), tcgv_vec_arg(v0),
---
-.20.1

-[PULL 2/5] tcg: Remove CONFIG_VECTOR16
+[PULL 1/4] tcg/optimize: Fix folding of vector ops
-The comment in tcg-runtime-gvec.c about CONFIG_VECTOR16 says that
+Bitwise operations are easy to fold, because the operation is
-tcg-op-gvec.c has eliminated size 8 vectors, and only passes on
+identical regardless of element size.  But add and sub need
-multiples of 16.  This may have been true of the first few operations,
+extra element size info that is not currently propagated.
 but is not true of all operations.
-In particular, multiply, shift by scalar, and compare of 8- and 16-bit
+Fixes: 2f9f08ba43d
-elements are not expanded inline if host vector operations are not
+Cc: qemu-stable@nongnu.org
-supported.
+Resolves: https://gitlab.com/qemu-project/qemu/-/issues/799
+Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
 For an x86_64 host that does not support AVX, this means that we will
 fall back to the helper, which will attempt to use SSE instructions,
 which will SEGV on an invalid 8-byte aligned memory operation.
 This patch simply removes the CONFIG_VECTOR16 code and configuration
 without further simplification.
 Buglink: https://bugs.launchpad.net/bugs/1863508
 Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 ---
- configure                    | 56 ------------------------------------
+ tcg/optimize.c | 49 ++++++++++++++++++++++++++++++++++++++-----------
- accel/tcg/tcg-runtime-gvec.c | 35 +---------------------
+file changed, 38 insertions(+), 11 deletions(-)
 files changed, 1 insertion(+), 90 deletions(-)
-diff --git a/configure b/configure
+diff --git a/tcg/optimize.c b/tcg/optimize.c
 index XXXXXXX..XXXXXXX 100755
 --- a/configure
 +++ b/configure
@@ -XXX,XX +XXX,XX @@ if  test "$plugins" = "yes" &&
        "for this purpose. You can't build with --static."
  fi
 -########################################
 -# See if 16-byte vector operations are supported.
 -# Even without a vector unit the compiler may expand these.
 -# There is a bug in old GCC for PPC that crashes here.
 -# Unfortunately it's the system compiler for Centos 7.
 -
 -cat > $TMPC << EOF
 -typedef unsigned char U1 __attribute__((vector_size(16)));
 -typedef unsigned short U2 __attribute__((vector_size(16)));
 -typedef unsigned int U4 __attribute__((vector_size(16)));
 -typedef unsigned long long U8 __attribute__((vector_size(16)));
 -typedef signed char S1 __attribute__((vector_size(16)));
 -typedef signed short S2 __attribute__((vector_size(16)));
 -typedef signed int S4 __attribute__((vector_size(16)));
 -typedef signed long long S8 __attribute__((vector_size(16)));
 -static U1 a1, b1;
 -static U2 a2, b2;
 -static U4 a4, b4;
 -static U8 a8, b8;
 -static S1 c1;
 -static S2 c2;
 -static S4 c4;
 -static S8 c8;
 -static int i;
 -void helper(void *d, void *a, int shift, int i);
 -void helper(void *d, void *a, int shift, int i)
 -{
 -  *(U1 *)(d + i) = *(U1 *)(a + i) << shift;
 -  *(U2 *)(d + i) = *(U2 *)(a + i) << shift;
 -  *(U4 *)(d + i) = *(U4 *)(a + i) << shift;
 -  *(U8 *)(d + i) = *(U8 *)(a + i) << shift;
 -}
 -int main(void)
 -{
 -  a1 += b1; a2 += b2; a4 += b4; a8 += b8;
 -  a1 -= b1; a2 -= b2; a4 -= b4; a8 -= b8;
 -  a1 *= b1; a2 *= b2; a4 *= b4; a8 *= b8;
 -  a1 &= b1; a2 &= b2; a4 &= b4; a8 &= b8;
 -  a1 |= b1; a2 |= b2; a4 |= b4; a8 |= b8;
 -  a1 ^= b1; a2 ^= b2; a4 ^= b4; a8 ^= b8;
 -  a1 <<= i; a2 <<= i; a4 <<= i; a8 <<= i;
 -  a1 >>= i; a2 >>= i; a4 >>= i; a8 >>= i;
 -  c1 >>= i; c2 >>= i; c4 >>= i; c8 >>= i;
 -  return 0;
 -}
 -EOF
 -
 -vector16=no
 -if compile_prog "" "" ; then
 -  vector16=yes
 -fi
 -
  ########################################
  # See if __attribute__((alias)) is supported.
  # This false for Xcode 9, but has been remedied for Xcode 10.
@@ -XXX,XX +XXX,XX @@ if test "$atomic64" = "yes" ; then
    echo "CONFIG_ATOMIC64=y" >> $config_host_mak
  fi
 -if test "$vector16" = "yes" ; then
 -  echo "CONFIG_VECTOR16=y" >> $config_host_mak
 -fi
 -
  if test "$attralias" = "yes" ; then
    echo "CONFIG_ATTRIBUTE_ALIAS=y" >> $config_host_mak
  fi
 diff --git a/accel/tcg/tcg-runtime-gvec.c b/accel/tcg/tcg-runtime-gvec.c
 index XXXXXXX..XXXXXXX 100644
---- a/accel/tcg/tcg-runtime-gvec.c
+--- a/tcg/optimize.c
-+++ b/accel/tcg/tcg-runtime-gvec.c
++++ b/tcg/optimize.c
-@@ -XXX,XX +XXX,XX @@
+@@ -XXX,XX +XXX,XX @@ static uint64_t do_constant_folding_2(TCGOpcode op, uint64_t x, uint64_t y)
- #include "tcg/tcg-gvec-desc.h"
+     CASE_OP_32_64(mul):
+         return x * y;
--/* Virtually all hosts support 16-byte vectors.  Those that don't can emulate
+-    CASE_OP_32_64(and):
-- * them via GCC's generic vector extension.  This turns out to be simpler and
++    CASE_OP_32_64_VEC(and):
-- * more reliable than getting the compiler to autovectorize.
+         return x & y;
-- *
-- * In tcg-op-gvec.c, we asserted that both the size and alignment of the data
+-    CASE_OP_32_64(or):
-- * are multiples of 16.
++    CASE_OP_32_64_VEC(or):
-- *
+         return x | y;
-- * When the compiler does not support all of the operations we require, the
-- * loops are written so that we can always fall back on the base types.
+-    CASE_OP_32_64(xor):
-- */
++    CASE_OP_32_64_VEC(xor):
--#ifdef CONFIG_VECTOR16
+         return x ^ y;
--typedef uint8_t vec8 __attribute__((vector_size(16)));
--typedef uint16_t vec16 __attribute__((vector_size(16)));
+     case INDEX_op_shl_i32:
--typedef uint32_t vec32 __attribute__((vector_size(16)));
+@@ -XXX,XX +XXX,XX @@ static uint64_t do_constant_folding_2(TCGOpcode op, uint64_t x, uint64_t y)
--typedef uint64_t vec64 __attribute__((vector_size(16)));
+     case INDEX_op_rotl_i64:
--
+         return rol64(x, y & 63);
--typedef int8_t svec8 __attribute__((vector_size(16)));
--typedef int16_t svec16 __attribute__((vector_size(16)));
+-    CASE_OP_32_64(not):
--typedef int32_t svec32 __attribute__((vector_size(16)));
++    CASE_OP_32_64_VEC(not):
--typedef int64_t svec64 __attribute__((vector_size(16)));
+         return ~x;
--
--#define DUP16(X)  { X, X, X, X, X, X, X, X, X, X, X, X, X, X, X, X }
+     CASE_OP_32_64(neg):
--#define DUP8(X)   { X, X, X, X, X, X, X, X }
+         return -x;
--#define DUP4(X)   { X, X, X, X }
--#define DUP2(X)   { X, X }
+-    CASE_OP_32_64(andc):
--#else
++    CASE_OP_32_64_VEC(andc):
- typedef uint8_t vec8;
+         return x & ~y;
- typedef uint16_t vec16;
- typedef uint32_t vec32;
+-    CASE_OP_32_64(orc):
-@@ -XXX,XX +XXX,XX @@ typedef int64_t svec64;
++    CASE_OP_32_64_VEC(orc):
- #define DUP8(X)   X
+         return x | ~y;
- #define DUP4(X)   X
- #define DUP2(X)   X
+     CASE_OP_32_64(eqv):
--#endif /* CONFIG_VECTOR16 */
+@@ -XXX,XX +XXX,XX @@ static bool fold_const2(OptContext *ctx, TCGOp *op)
+     return false;
- static inline void clear_high(void *d, intptr_t oprsz, uint32_t desc)
+ }
 +static bool fold_commutative(OptContext *ctx, TCGOp *op)
 +{
 +    swap_commutative(op->args[0], &op->args[1], &op->args[2]);
 +    return false;
 +}
 +
  static bool fold_const2_commutative(OptContext *ctx, TCGOp *op)
  {
-@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_sar64v)(void *d, void *a, void *b, uint32_t desc)
+     swap_commutative(op->args[0], &op->args[1], &op->args[2]);
-     clear_high(d, oprsz, desc);
+@@ -XXX,XX +XXX,XX @@ static bool fold_add(OptContext *ctx, TCGOp *op)
      return false;
  }
--/* If vectors are enabled, the compiler fills in -1 for true.
++/* We cannot as yet do_constant_folding with vectors. */
--   Otherwise, we must take care of this by hand.  */
++static bool fold_add_vec(OptContext *ctx, TCGOp *op)
--#ifdef CONFIG_VECTOR16
++{
--# define DO_CMP0(X)  X
++    if (fold_commutative(ctx, op) ||
--#else
++        fold_xi_to_x(ctx, op, 0)) {
--# define DO_CMP0(X)  -(X)
++        return true;
--#endif
++    }
-+#define DO_CMP0(X)  -(X)
++    return false;
++}
- #define DO_CMP1(NAME, TYPE, OP)                                            \
++
- void HELPER(NAME)(void *d, void *a, void *b, uint32_t desc)                \
+ static bool fold_addsub2(OptContext *ctx, TCGOp *op, bool add)
  {
      if (arg_is_const(op->args[2]) && arg_is_const(op->args[3]) &&
@@ -XXX,XX +XXX,XX @@ static bool fold_sub_to_neg(OptContext *ctx, TCGOp *op)
      return false;
  }
 -static bool fold_sub(OptContext *ctx, TCGOp *op)
 +/* We cannot as yet do_constant_folding with vectors. */
 +static bool fold_sub_vec(OptContext *ctx, TCGOp *op)
  {
 -    if (fold_const2(ctx, op) ||
 -        fold_xx_to_i(ctx, op, 0) ||
 +    if (fold_xx_to_i(ctx, op, 0) ||
          fold_xi_to_x(ctx, op, 0) ||
          fold_sub_to_neg(ctx, op)) {
          return true;
@@ -XXX,XX +XXX,XX @@ static bool fold_sub(OptContext *ctx, TCGOp *op)
      return false;
  }
 +static bool fold_sub(OptContext *ctx, TCGOp *op)
 +{
 +    return fold_const2(ctx, op) || fold_sub_vec(ctx, op);
 +}
 +
  static bool fold_sub2(OptContext *ctx, TCGOp *op)
  {
      return fold_addsub2(ctx, op, false);
@@ -XXX,XX +XXX,XX @@ void tcg_optimize(TCGContext *s)
           * Sorted alphabetically by opcode as much as possible.
           */
          switch (opc) {
 -        CASE_OP_32_64_VEC(add):
 +        CASE_OP_32_64(add):
              done = fold_add(&ctx, op);
              break;
 +        case INDEX_op_add_vec:
 +            done = fold_add_vec(&ctx, op);
 +            break;
          CASE_OP_32_64(add2):
              done = fold_add2(&ctx, op);
              break;
@@ -XXX,XX +XXX,XX @@ void tcg_optimize(TCGContext *s)
          CASE_OP_32_64(sextract):
              done = fold_sextract(&ctx, op);
              break;
 -        CASE_OP_32_64_VEC(sub):
 +        CASE_OP_32_64(sub):
              done = fold_sub(&ctx, op);
              break;
 +        case INDEX_op_sub_vec:
 +            done = fold_sub_vec(&ctx, op);
 +            break;
          CASE_OP_32_64(sub2):
              done = fold_sub2(&ctx, op);
              break;
 --
-.20.1
+.25.1

-[PULL 4/5] tcg: Tidy tcg-runtime-gvec.c DUP*
+[PULL 2/4] linux-user: Fix trivial build error on loongarch64 hosts
-Partial cleanup from the CONFIG_VECTOR16 removal.
+From: Philippe Mathieu-Daudé <f4bug@amsat.org>
 Replace the DUP* expansions with the scalar argument.
-Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
+When building using GCC 8.3.0 on loongarch64 (Loongnix) we get:
   In file included from ../linux-user/signal.c:33:
   ../linux-user/host/loongarch64/host-signal.h: In function ‘host_signal_write’:
   ../linux-user/host/loongarch64/host-signal.h:57:9: error: a label can only be part of a statement and a declaration is not a statement
          uint32_t sel = (insn >> 15) & 0b11111111111;
          ^~~~~~~~
 We don't use the 'sel' variable more than once, so drop it.
 Meson output for the record:
   Host machine cpu family: loongarch64
   Host machine cpu: loongarch64
   C compiler for the host machine: cc (gcc 8.3.0 "cc (Loongnix 8.3.0-6.lnd.vec.27) 8.3.0")
   C linker for the host machine: cc ld.bfd 2.31.1-system
 Fixes: ad812c3bd65 ("linux-user: Implement CPU-specific signal handler for loongarch64 hosts")
 Reported-by: Song Gao <gaosong@loongson.cn>
 Suggested-by: Song Gao <gaosong@loongson.cn>
 Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
 Reviewed-by: WANG Xuerui <git@xen0n.name>
 Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
 Message-Id: <20220104215027.2180972-1-f4bug@amsat.org>
 Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 ---
- accel/tcg/tcg-runtime-gvec.c | 50 +++++++++++-------------------------
+ linux-user/host/loongarch64/host-signal.h | 4 +---
-file changed, 15 insertions(+), 35 deletions(-)
+file changed, 1 insertion(+), 3 deletions(-)
-diff --git a/accel/tcg/tcg-runtime-gvec.c b/accel/tcg/tcg-runtime-gvec.c
+diff --git a/linux-user/host/loongarch64/host-signal.h b/linux-user/host/loongarch64/host-signal.h
 index XXXXXXX..XXXXXXX 100644
---- a/accel/tcg/tcg-runtime-gvec.c
+--- a/linux-user/host/loongarch64/host-signal.h
-+++ b/accel/tcg/tcg-runtime-gvec.c
++++ b/linux-user/host/loongarch64/host-signal.h
-@@ -XXX,XX +XXX,XX @@
+@@ -XXX,XX +XXX,XX @@ static inline bool host_signal_write(siginfo_t *info, ucontext_t *uc)
- #include "tcg/tcg-gvec-desc.h"
+         }
+         break;
+     case 0b001110: /* indexed, atomic, bounds-checking memory operations */
--#define DUP16(X)  X
+-        uint32_t sel = (insn >> 15) & 0b11111111111;
 -#define DUP8(X)   X
 -#define DUP4(X)   X
 -#define DUP2(X)   X
 -
- static inline void clear_high(void *d, intptr_t oprsz, uint32_t desc)
+-        switch (sel) {
- {
++        switch ((insn >> 15) & 0b11111111111) {
-     intptr_t maxsz = simd_maxsz(desc);
+         case 0b00000100000: /* stx.b */
-@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_add64)(void *d, void *a, void *b, uint32_t desc)
+         case 0b00000101000: /* stx.h */
- void HELPER(gvec_adds8)(void *d, void *a, uint64_t b, uint32_t desc)
+         case 0b00000110000: /* stx.w */
  {
      intptr_t oprsz = simd_oprsz(desc);
 -    uint8_t vecb = (uint8_t)DUP16(b);
      intptr_t i;
      for (i = 0; i < oprsz; i += sizeof(uint8_t)) {
 -        *(uint8_t *)(d + i) = *(uint8_t *)(a + i) + vecb;
 +        *(uint8_t *)(d + i) = *(uint8_t *)(a + i) + (uint8_t)b;
      }
      clear_high(d, oprsz, desc);
  }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_adds8)(void *d, void *a, uint64_t b, uint32_t desc)
  void HELPER(gvec_adds16)(void *d, void *a, uint64_t b, uint32_t desc)
  {
      intptr_t oprsz = simd_oprsz(desc);
 -    uint16_t vecb = (uint16_t)DUP8(b);
      intptr_t i;
      for (i = 0; i < oprsz; i += sizeof(uint16_t)) {
 -        *(uint16_t *)(d + i) = *(uint16_t *)(a + i) + vecb;
 +        *(uint16_t *)(d + i) = *(uint16_t *)(a + i) + (uint16_t)b;
      }
      clear_high(d, oprsz, desc);
  }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_adds16)(void *d, void *a, uint64_t b, uint32_t desc)
  void HELPER(gvec_adds32)(void *d, void *a, uint64_t b, uint32_t desc)
  {
      intptr_t oprsz = simd_oprsz(desc);
 -    uint32_t vecb = (uint32_t)DUP4(b);
      intptr_t i;
      for (i = 0; i < oprsz; i += sizeof(uint32_t)) {
 -        *(uint32_t *)(d + i) = *(uint32_t *)(a + i) + vecb;
 +        *(uint32_t *)(d + i) = *(uint32_t *)(a + i) + (uint32_t)b;
      }
      clear_high(d, oprsz, desc);
  }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_adds32)(void *d, void *a, uint64_t b, uint32_t desc)
  void HELPER(gvec_adds64)(void *d, void *a, uint64_t b, uint32_t desc)
  {
      intptr_t oprsz = simd_oprsz(desc);
 -    uint64_t vecb = (uint64_t)DUP2(b);
      intptr_t i;
      for (i = 0; i < oprsz; i += sizeof(uint64_t)) {
 -        *(uint64_t *)(d + i) = *(uint64_t *)(a + i) + vecb;
 +        *(uint64_t *)(d + i) = *(uint64_t *)(a + i) + b;
      }
      clear_high(d, oprsz, desc);
  }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_sub64)(void *d, void *a, void *b, uint32_t desc)
  void HELPER(gvec_subs8)(void *d, void *a, uint64_t b, uint32_t desc)
  {
      intptr_t oprsz = simd_oprsz(desc);
 -    uint8_t vecb = (uint8_t)DUP16(b);
      intptr_t i;
      for (i = 0; i < oprsz; i += sizeof(uint8_t)) {
 -        *(uint8_t *)(d + i) = *(uint8_t *)(a + i) - vecb;
 +        *(uint8_t *)(d + i) = *(uint8_t *)(a + i) - (uint8_t)b;
      }
      clear_high(d, oprsz, desc);
  }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_subs8)(void *d, void *a, uint64_t b, uint32_t desc)
  void HELPER(gvec_subs16)(void *d, void *a, uint64_t b, uint32_t desc)
  {
      intptr_t oprsz = simd_oprsz(desc);
 -    uint16_t vecb = (uint16_t)DUP8(b);
      intptr_t i;
      for (i = 0; i < oprsz; i += sizeof(uint16_t)) {
 -        *(uint16_t *)(d + i) = *(uint16_t *)(a + i) - vecb;
 +        *(uint16_t *)(d + i) = *(uint16_t *)(a + i) - (uint16_t)b;
      }
      clear_high(d, oprsz, desc);
  }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_subs16)(void *d, void *a, uint64_t b, uint32_t desc)
  void HELPER(gvec_subs32)(void *d, void *a, uint64_t b, uint32_t desc)
  {
      intptr_t oprsz = simd_oprsz(desc);
 -    uint32_t vecb = (uint32_t)DUP4(b);
      intptr_t i;
      for (i = 0; i < oprsz; i += sizeof(uint32_t)) {
 -        *(uint32_t *)(d + i) = *(uint32_t *)(a + i) - vecb;
 +        *(uint32_t *)(d + i) = *(uint32_t *)(a + i) - (uint32_t)b;
      }
      clear_high(d, oprsz, desc);
  }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_subs32)(void *d, void *a, uint64_t b, uint32_t desc)
  void HELPER(gvec_subs64)(void *d, void *a, uint64_t b, uint32_t desc)
  {
      intptr_t oprsz = simd_oprsz(desc);
 -    uint64_t vecb = (uint64_t)DUP2(b);
      intptr_t i;
      for (i = 0; i < oprsz; i += sizeof(uint64_t)) {
 -        *(uint64_t *)(d + i) = *(uint64_t *)(a + i) - vecb;
 +        *(uint64_t *)(d + i) = *(uint64_t *)(a + i) - b;
      }
      clear_high(d, oprsz, desc);
  }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_mul64)(void *d, void *a, void *b, uint32_t desc)
  void HELPER(gvec_muls8)(void *d, void *a, uint64_t b, uint32_t desc)
  {
      intptr_t oprsz = simd_oprsz(desc);
 -    uint8_t vecb = (uint8_t)DUP16(b);
      intptr_t i;
      for (i = 0; i < oprsz; i += sizeof(uint8_t)) {
 -        *(uint8_t *)(d + i) = *(uint8_t *)(a + i) * vecb;
 +        *(uint8_t *)(d + i) = *(uint8_t *)(a + i) * (uint8_t)b;
      }
      clear_high(d, oprsz, desc);
  }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_muls8)(void *d, void *a, uint64_t b, uint32_t desc)
  void HELPER(gvec_muls16)(void *d, void *a, uint64_t b, uint32_t desc)
  {
      intptr_t oprsz = simd_oprsz(desc);
 -    uint16_t vecb = (uint16_t)DUP8(b);
      intptr_t i;
      for (i = 0; i < oprsz; i += sizeof(uint16_t)) {
 -        *(uint16_t *)(d + i) = *(uint16_t *)(a + i) * vecb;
 +        *(uint16_t *)(d + i) = *(uint16_t *)(a + i) * (uint16_t)b;
      }
      clear_high(d, oprsz, desc);
  }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_muls16)(void *d, void *a, uint64_t b, uint32_t desc)
  void HELPER(gvec_muls32)(void *d, void *a, uint64_t b, uint32_t desc)
  {
      intptr_t oprsz = simd_oprsz(desc);
 -    uint32_t vecb = (uint32_t)DUP4(b);
      intptr_t i;
      for (i = 0; i < oprsz; i += sizeof(uint32_t)) {
 -        *(uint32_t *)(d + i) = *(uint32_t *)(a + i) * vecb;
 +        *(uint32_t *)(d + i) = *(uint32_t *)(a + i) * (uint32_t)b;
      }
      clear_high(d, oprsz, desc);
  }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_muls32)(void *d, void *a, uint64_t b, uint32_t desc)
  void HELPER(gvec_muls64)(void *d, void *a, uint64_t b, uint32_t desc)
  {
      intptr_t oprsz = simd_oprsz(desc);
 -    uint64_t vecb = (uint64_t)DUP2(b);
      intptr_t i;
      for (i = 0; i < oprsz; i += sizeof(uint64_t)) {
 -        *(uint64_t *)(d + i) = *(uint64_t *)(a + i) * vecb;
 +        *(uint64_t *)(d + i) = *(uint64_t *)(a + i) * b;
      }
      clear_high(d, oprsz, desc);
  }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_eqv)(void *d, void *a, void *b, uint32_t desc)
  void HELPER(gvec_ands)(void *d, void *a, uint64_t b, uint32_t desc)
  {
      intptr_t oprsz = simd_oprsz(desc);
 -    uint64_t vecb = (uint64_t)DUP2(b);
      intptr_t i;
      for (i = 0; i < oprsz; i += sizeof(uint64_t)) {
 -        *(uint64_t *)(d + i) = *(uint64_t *)(a + i) & vecb;
 +        *(uint64_t *)(d + i) = *(uint64_t *)(a + i) & b;
      }
      clear_high(d, oprsz, desc);
  }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_ands)(void *d, void *a, uint64_t b, uint32_t desc)
  void HELPER(gvec_xors)(void *d, void *a, uint64_t b, uint32_t desc)
  {
      intptr_t oprsz = simd_oprsz(desc);
 -    uint64_t vecb = (uint64_t)DUP2(b);
      intptr_t i;
      for (i = 0; i < oprsz; i += sizeof(uint64_t)) {
 -        *(uint64_t *)(d + i) = *(uint64_t *)(a + i) ^ vecb;
 +        *(uint64_t *)(d + i) = *(uint64_t *)(a + i) ^ b;
      }
      clear_high(d, oprsz, desc);
  }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_xors)(void *d, void *a, uint64_t b, uint32_t desc)
  void HELPER(gvec_ors)(void *d, void *a, uint64_t b, uint32_t desc)
  {
      intptr_t oprsz = simd_oprsz(desc);
 -    uint64_t vecb = (uint64_t)DUP2(b);
      intptr_t i;
      for (i = 0; i < oprsz; i += sizeof(uint64_t)) {
 -        *(uint64_t *)(d + i) = *(uint64_t *)(a + i) | vecb;
 +        *(uint64_t *)(d + i) = *(uint64_t *)(a + i) | b;
      }
      clear_high(d, oprsz, desc);
  }
 --
-.20.1
+.25.1

-[PULL 3/5] tcg: Tidy tcg-runtime-gvec.c types
+[PULL 3/4] sysemu: Cleanup qemu_run_machine_init_done_notifiers()
-Partial cleanup from the CONFIG_VECTOR16 removal.
+From: Xiaoyao Li <xiaoyao.li@intel.com>
 Replace the vec* types with their scalar expansions.
-Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
+Remove qemu_run_machine_init_done_notifiers() since no implementation
 and user.
 Fixes: f66dc8737c9 ("vl: move all generic initialization out of vl.c")
 Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com>
 Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
 Message-Id: <20220104024136.1433545-1-xiaoyao.li@intel.com>
 Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 ---
- accel/tcg/tcg-runtime-gvec.c | 270 +++++++++++++++++------------------
+ include/sysemu/sysemu.h | 1 -
-file changed, 130 insertions(+), 140 deletions(-)
+file changed, 1 deletion(-)
-diff --git a/accel/tcg/tcg-runtime-gvec.c b/accel/tcg/tcg-runtime-gvec.c
+diff --git a/include/sysemu/sysemu.h b/include/sysemu/sysemu.h
 index XXXXXXX..XXXXXXX 100644
---- a/accel/tcg/tcg-runtime-gvec.c
+--- a/include/sysemu/sysemu.h
-+++ b/accel/tcg/tcg-runtime-gvec.c
++++ b/include/sysemu/sysemu.h
-@@ -XXX,XX +XXX,XX @@
+@@ -XXX,XX +XXX,XX @@ extern bool qemu_uuid_set;
- #include "tcg/tcg-gvec-desc.h"
+ void qemu_add_exit_notifier(Notifier *notify);
+ void qemu_remove_exit_notifier(Notifier *notify);
--typedef uint8_t vec8;
+-void qemu_run_machine_init_done_notifiers(void);
--typedef uint16_t vec16;
+ void qemu_add_machine_init_done_notifier(Notifier *notify);
--typedef uint32_t vec32;
+ void qemu_remove_machine_init_done_notifier(Notifier *notify);
--typedef uint64_t vec64;
 -
 -typedef int8_t svec8;
 -typedef int16_t svec16;
 -typedef int32_t svec32;
 -typedef int64_t svec64;
 -
  #define DUP16(X)  X
  #define DUP8(X)   X
  #define DUP4(X)   X
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_add8)(void *d, void *a, void *b, uint32_t desc)
      intptr_t oprsz = simd_oprsz(desc);
      intptr_t i;
 -    for (i = 0; i < oprsz; i += sizeof(vec8)) {
 -        *(vec8 *)(d + i) = *(vec8 *)(a + i) + *(vec8 *)(b + i);
 +    for (i = 0; i < oprsz; i += sizeof(uint8_t)) {
 +        *(uint8_t *)(d + i) = *(uint8_t *)(a + i) + *(uint8_t *)(b + i);
      }
      clear_high(d, oprsz, desc);
  }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_add16)(void *d, void *a, void *b, uint32_t desc)
      intptr_t oprsz = simd_oprsz(desc);
      intptr_t i;
 -    for (i = 0; i < oprsz; i += sizeof(vec16)) {
 -        *(vec16 *)(d + i) = *(vec16 *)(a + i) + *(vec16 *)(b + i);
 +    for (i = 0; i < oprsz; i += sizeof(uint16_t)) {
 +        *(uint16_t *)(d + i) = *(uint16_t *)(a + i) + *(uint16_t *)(b + i);
      }
      clear_high(d, oprsz, desc);
  }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_add32)(void *d, void *a, void *b, uint32_t desc)
      intptr_t oprsz = simd_oprsz(desc);
      intptr_t i;
 -    for (i = 0; i < oprsz; i += sizeof(vec32)) {
 -        *(vec32 *)(d + i) = *(vec32 *)(a + i) + *(vec32 *)(b + i);
 +    for (i = 0; i < oprsz; i += sizeof(uint32_t)) {
 +        *(uint32_t *)(d + i) = *(uint32_t *)(a + i) + *(uint32_t *)(b + i);
      }
      clear_high(d, oprsz, desc);
  }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_add64)(void *d, void *a, void *b, uint32_t desc)
      intptr_t oprsz = simd_oprsz(desc);
      intptr_t i;
 -    for (i = 0; i < oprsz; i += sizeof(vec64)) {
 -        *(vec64 *)(d + i) = *(vec64 *)(a + i) + *(vec64 *)(b + i);
 +    for (i = 0; i < oprsz; i += sizeof(uint64_t)) {
 +        *(uint64_t *)(d + i) = *(uint64_t *)(a + i) + *(uint64_t *)(b + i);
      }
      clear_high(d, oprsz, desc);
  }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_add64)(void *d, void *a, void *b, uint32_t desc)
  void HELPER(gvec_adds8)(void *d, void *a, uint64_t b, uint32_t desc)
  {
      intptr_t oprsz = simd_oprsz(desc);
 -    vec8 vecb = (vec8)DUP16(b);
 +    uint8_t vecb = (uint8_t)DUP16(b);
      intptr_t i;
 -    for (i = 0; i < oprsz; i += sizeof(vec8)) {
 -        *(vec8 *)(d + i) = *(vec8 *)(a + i) + vecb;
 +    for (i = 0; i < oprsz; i += sizeof(uint8_t)) {
 +        *(uint8_t *)(d + i) = *(uint8_t *)(a + i) + vecb;
      }
      clear_high(d, oprsz, desc);
  }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_adds8)(void *d, void *a, uint64_t b, uint32_t desc)
  void HELPER(gvec_adds16)(void *d, void *a, uint64_t b, uint32_t desc)
  {
      intptr_t oprsz = simd_oprsz(desc);
 -    vec16 vecb = (vec16)DUP8(b);
 +    uint16_t vecb = (uint16_t)DUP8(b);
      intptr_t i;
 -    for (i = 0; i < oprsz; i += sizeof(vec16)) {
 -        *(vec16 *)(d + i) = *(vec16 *)(a + i) + vecb;
 +    for (i = 0; i < oprsz; i += sizeof(uint16_t)) {
 +        *(uint16_t *)(d + i) = *(uint16_t *)(a + i) + vecb;
      }
      clear_high(d, oprsz, desc);
  }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_adds16)(void *d, void *a, uint64_t b, uint32_t desc)
  void HELPER(gvec_adds32)(void *d, void *a, uint64_t b, uint32_t desc)
  {
      intptr_t oprsz = simd_oprsz(desc);
 -    vec32 vecb = (vec32)DUP4(b);
 +    uint32_t vecb = (uint32_t)DUP4(b);
      intptr_t i;
 -    for (i = 0; i < oprsz; i += sizeof(vec32)) {
 -        *(vec32 *)(d + i) = *(vec32 *)(a + i) + vecb;
 +    for (i = 0; i < oprsz; i += sizeof(uint32_t)) {
 +        *(uint32_t *)(d + i) = *(uint32_t *)(a + i) + vecb;
      }
      clear_high(d, oprsz, desc);
  }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_adds32)(void *d, void *a, uint64_t b, uint32_t desc)
  void HELPER(gvec_adds64)(void *d, void *a, uint64_t b, uint32_t desc)
  {
      intptr_t oprsz = simd_oprsz(desc);
 -    vec64 vecb = (vec64)DUP2(b);
 +    uint64_t vecb = (uint64_t)DUP2(b);
      intptr_t i;
 -    for (i = 0; i < oprsz; i += sizeof(vec64)) {
 -        *(vec64 *)(d + i) = *(vec64 *)(a + i) + vecb;
 +    for (i = 0; i < oprsz; i += sizeof(uint64_t)) {
 +        *(uint64_t *)(d + i) = *(uint64_t *)(a + i) + vecb;
      }
      clear_high(d, oprsz, desc);
  }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_sub8)(void *d, void *a, void *b, uint32_t desc)
      intptr_t oprsz = simd_oprsz(desc);
      intptr_t i;
 -    for (i = 0; i < oprsz; i += sizeof(vec8)) {
 -        *(vec8 *)(d + i) = *(vec8 *)(a + i) - *(vec8 *)(b + i);
 +    for (i = 0; i < oprsz; i += sizeof(uint8_t)) {
 +        *(uint8_t *)(d + i) = *(uint8_t *)(a + i) - *(uint8_t *)(b + i);
      }
      clear_high(d, oprsz, desc);
  }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_sub16)(void *d, void *a, void *b, uint32_t desc)
      intptr_t oprsz = simd_oprsz(desc);
      intptr_t i;
 -    for (i = 0; i < oprsz; i += sizeof(vec16)) {
 -        *(vec16 *)(d + i) = *(vec16 *)(a + i) - *(vec16 *)(b + i);
 +    for (i = 0; i < oprsz; i += sizeof(uint16_t)) {
 +        *(uint16_t *)(d + i) = *(uint16_t *)(a + i) - *(uint16_t *)(b + i);
      }
      clear_high(d, oprsz, desc);
  }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_sub32)(void *d, void *a, void *b, uint32_t desc)
      intptr_t oprsz = simd_oprsz(desc);
      intptr_t i;
 -    for (i = 0; i < oprsz; i += sizeof(vec32)) {
 -        *(vec32 *)(d + i) = *(vec32 *)(a + i) - *(vec32 *)(b + i);
 +    for (i = 0; i < oprsz; i += sizeof(uint32_t)) {
 +        *(uint32_t *)(d + i) = *(uint32_t *)(a + i) - *(uint32_t *)(b + i);
      }
      clear_high(d, oprsz, desc);
  }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_sub64)(void *d, void *a, void *b, uint32_t desc)
      intptr_t oprsz = simd_oprsz(desc);
      intptr_t i;
 -    for (i = 0; i < oprsz; i += sizeof(vec64)) {
 -        *(vec64 *)(d + i) = *(vec64 *)(a + i) - *(vec64 *)(b + i);
 +    for (i = 0; i < oprsz; i += sizeof(uint64_t)) {
 +        *(uint64_t *)(d + i) = *(uint64_t *)(a + i) - *(uint64_t *)(b + i);
      }
      clear_high(d, oprsz, desc);
  }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_sub64)(void *d, void *a, void *b, uint32_t desc)
  void HELPER(gvec_subs8)(void *d, void *a, uint64_t b, uint32_t desc)
  {
      intptr_t oprsz = simd_oprsz(desc);
 -    vec8 vecb = (vec8)DUP16(b);
 +    uint8_t vecb = (uint8_t)DUP16(b);
      intptr_t i;
 -    for (i = 0; i < oprsz; i += sizeof(vec8)) {
 -        *(vec8 *)(d + i) = *(vec8 *)(a + i) - vecb;
 +    for (i = 0; i < oprsz; i += sizeof(uint8_t)) {
 +        *(uint8_t *)(d + i) = *(uint8_t *)(a + i) - vecb;
      }
      clear_high(d, oprsz, desc);
  }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_subs8)(void *d, void *a, uint64_t b, uint32_t desc)
  void HELPER(gvec_subs16)(void *d, void *a, uint64_t b, uint32_t desc)
  {
      intptr_t oprsz = simd_oprsz(desc);
 -    vec16 vecb = (vec16)DUP8(b);
 +    uint16_t vecb = (uint16_t)DUP8(b);
      intptr_t i;
 -    for (i = 0; i < oprsz; i += sizeof(vec16)) {
 -        *(vec16 *)(d + i) = *(vec16 *)(a + i) - vecb;
 +    for (i = 0; i < oprsz; i += sizeof(uint16_t)) {
 +        *(uint16_t *)(d + i) = *(uint16_t *)(a + i) - vecb;
      }
      clear_high(d, oprsz, desc);
  }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_subs16)(void *d, void *a, uint64_t b, uint32_t desc)
  void HELPER(gvec_subs32)(void *d, void *a, uint64_t b, uint32_t desc)
  {
      intptr_t oprsz = simd_oprsz(desc);
 -    vec32 vecb = (vec32)DUP4(b);
 +    uint32_t vecb = (uint32_t)DUP4(b);
      intptr_t i;
 -    for (i = 0; i < oprsz; i += sizeof(vec32)) {
 -        *(vec32 *)(d + i) = *(vec32 *)(a + i) - vecb;
 +    for (i = 0; i < oprsz; i += sizeof(uint32_t)) {
 +        *(uint32_t *)(d + i) = *(uint32_t *)(a + i) - vecb;
      }
      clear_high(d, oprsz, desc);
  }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_subs32)(void *d, void *a, uint64_t b, uint32_t desc)
  void HELPER(gvec_subs64)(void *d, void *a, uint64_t b, uint32_t desc)
  {
      intptr_t oprsz = simd_oprsz(desc);
 -    vec64 vecb = (vec64)DUP2(b);
 +    uint64_t vecb = (uint64_t)DUP2(b);
      intptr_t i;
 -    for (i = 0; i < oprsz; i += sizeof(vec64)) {
 -        *(vec64 *)(d + i) = *(vec64 *)(a + i) - vecb;
 +    for (i = 0; i < oprsz; i += sizeof(uint64_t)) {
 +        *(uint64_t *)(d + i) = *(uint64_t *)(a + i) - vecb;
      }
      clear_high(d, oprsz, desc);
  }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_mul8)(void *d, void *a, void *b, uint32_t desc)
      intptr_t oprsz = simd_oprsz(desc);
      intptr_t i;
 -    for (i = 0; i < oprsz; i += sizeof(vec8)) {
 -        *(vec8 *)(d + i) = *(vec8 *)(a + i) * *(vec8 *)(b + i);
 +    for (i = 0; i < oprsz; i += sizeof(uint8_t)) {
 +        *(uint8_t *)(d + i) = *(uint8_t *)(a + i) * *(uint8_t *)(b + i);
      }
      clear_high(d, oprsz, desc);
  }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_mul16)(void *d, void *a, void *b, uint32_t desc)
      intptr_t oprsz = simd_oprsz(desc);
      intptr_t i;
 -    for (i = 0; i < oprsz; i += sizeof(vec16)) {
 -        *(vec16 *)(d + i) = *(vec16 *)(a + i) * *(vec16 *)(b + i);
 +    for (i = 0; i < oprsz; i += sizeof(uint16_t)) {
 +        *(uint16_t *)(d + i) = *(uint16_t *)(a + i) * *(uint16_t *)(b + i);
      }
      clear_high(d, oprsz, desc);
  }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_mul32)(void *d, void *a, void *b, uint32_t desc)
      intptr_t oprsz = simd_oprsz(desc);
      intptr_t i;
 -    for (i = 0; i < oprsz; i += sizeof(vec32)) {
 -        *(vec32 *)(d + i) = *(vec32 *)(a + i) * *(vec32 *)(b + i);
 +    for (i = 0; i < oprsz; i += sizeof(uint32_t)) {
 +        *(uint32_t *)(d + i) = *(uint32_t *)(a + i) * *(uint32_t *)(b + i);
      }
      clear_high(d, oprsz, desc);
  }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_mul64)(void *d, void *a, void *b, uint32_t desc)
      intptr_t oprsz = simd_oprsz(desc);
      intptr_t i;
 -    for (i = 0; i < oprsz; i += sizeof(vec64)) {
 -        *(vec64 *)(d + i) = *(vec64 *)(a + i) * *(vec64 *)(b + i);
 +    for (i = 0; i < oprsz; i += sizeof(uint64_t)) {
 +        *(uint64_t *)(d + i) = *(uint64_t *)(a + i) * *(uint64_t *)(b + i);
      }
      clear_high(d, oprsz, desc);
  }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_mul64)(void *d, void *a, void *b, uint32_t desc)
  void HELPER(gvec_muls8)(void *d, void *a, uint64_t b, uint32_t desc)
  {
      intptr_t oprsz = simd_oprsz(desc);
 -    vec8 vecb = (vec8)DUP16(b);
 +    uint8_t vecb = (uint8_t)DUP16(b);
      intptr_t i;
 -    for (i = 0; i < oprsz; i += sizeof(vec8)) {
 -        *(vec8 *)(d + i) = *(vec8 *)(a + i) * vecb;
 +    for (i = 0; i < oprsz; i += sizeof(uint8_t)) {
 +        *(uint8_t *)(d + i) = *(uint8_t *)(a + i) * vecb;
      }
      clear_high(d, oprsz, desc);
  }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_muls8)(void *d, void *a, uint64_t b, uint32_t desc)
  void HELPER(gvec_muls16)(void *d, void *a, uint64_t b, uint32_t desc)
  {
      intptr_t oprsz = simd_oprsz(desc);
 -    vec16 vecb = (vec16)DUP8(b);
 +    uint16_t vecb = (uint16_t)DUP8(b);
      intptr_t i;
 -    for (i = 0; i < oprsz; i += sizeof(vec16)) {
 -        *(vec16 *)(d + i) = *(vec16 *)(a + i) * vecb;
 +    for (i = 0; i < oprsz; i += sizeof(uint16_t)) {
 +        *(uint16_t *)(d + i) = *(uint16_t *)(a + i) * vecb;
      }
      clear_high(d, oprsz, desc);
  }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_muls16)(void *d, void *a, uint64_t b, uint32_t desc)
  void HELPER(gvec_muls32)(void *d, void *a, uint64_t b, uint32_t desc)
  {
      intptr_t oprsz = simd_oprsz(desc);
 -    vec32 vecb = (vec32)DUP4(b);
 +    uint32_t vecb = (uint32_t)DUP4(b);
      intptr_t i;
 -    for (i = 0; i < oprsz; i += sizeof(vec32)) {
 -        *(vec32 *)(d + i) = *(vec32 *)(a + i) * vecb;
 +    for (i = 0; i < oprsz; i += sizeof(uint32_t)) {
 +        *(uint32_t *)(d + i) = *(uint32_t *)(a + i) * vecb;
      }
      clear_high(d, oprsz, desc);
  }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_muls32)(void *d, void *a, uint64_t b, uint32_t desc)
  void HELPER(gvec_muls64)(void *d, void *a, uint64_t b, uint32_t desc)
  {
      intptr_t oprsz = simd_oprsz(desc);
 -    vec64 vecb = (vec64)DUP2(b);
 +    uint64_t vecb = (uint64_t)DUP2(b);
      intptr_t i;
 -    for (i = 0; i < oprsz; i += sizeof(vec64)) {
 -        *(vec64 *)(d + i) = *(vec64 *)(a + i) * vecb;
 +    for (i = 0; i < oprsz; i += sizeof(uint64_t)) {
 +        *(uint64_t *)(d + i) = *(uint64_t *)(a + i) * vecb;
      }
      clear_high(d, oprsz, desc);
  }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_neg8)(void *d, void *a, uint32_t desc)
      intptr_t oprsz = simd_oprsz(desc);
      intptr_t i;
 -    for (i = 0; i < oprsz; i += sizeof(vec8)) {
 -        *(vec8 *)(d + i) = -*(vec8 *)(a + i);
 +    for (i = 0; i < oprsz; i += sizeof(uint8_t)) {
 +        *(uint8_t *)(d + i) = -*(uint8_t *)(a + i);
      }
      clear_high(d, oprsz, desc);
  }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_neg16)(void *d, void *a, uint32_t desc)
      intptr_t oprsz = simd_oprsz(desc);
      intptr_t i;
 -    for (i = 0; i < oprsz; i += sizeof(vec16)) {
 -        *(vec16 *)(d + i) = -*(vec16 *)(a + i);
 +    for (i = 0; i < oprsz; i += sizeof(uint16_t)) {
 +        *(uint16_t *)(d + i) = -*(uint16_t *)(a + i);
      }
      clear_high(d, oprsz, desc);
  }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_neg32)(void *d, void *a, uint32_t desc)
      intptr_t oprsz = simd_oprsz(desc);
      intptr_t i;
 -    for (i = 0; i < oprsz; i += sizeof(vec32)) {
 -        *(vec32 *)(d + i) = -*(vec32 *)(a + i);
 +    for (i = 0; i < oprsz; i += sizeof(uint32_t)) {
 +        *(uint32_t *)(d + i) = -*(uint32_t *)(a + i);
      }
      clear_high(d, oprsz, desc);
  }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_neg64)(void *d, void *a, uint32_t desc)
      intptr_t oprsz = simd_oprsz(desc);
      intptr_t i;
 -    for (i = 0; i < oprsz; i += sizeof(vec64)) {
 -        *(vec64 *)(d + i) = -*(vec64 *)(a + i);
 +    for (i = 0; i < oprsz; i += sizeof(uint64_t)) {
 +        *(uint64_t *)(d + i) = -*(uint64_t *)(a + i);
      }
      clear_high(d, oprsz, desc);
  }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_not)(void *d, void *a, uint32_t desc)
      intptr_t oprsz = simd_oprsz(desc);
      intptr_t i;
 -    for (i = 0; i < oprsz; i += sizeof(vec64)) {
 -        *(vec64 *)(d + i) = ~*(vec64 *)(a + i);
 +    for (i = 0; i < oprsz; i += sizeof(uint64_t)) {
 +        *(uint64_t *)(d + i) = ~*(uint64_t *)(a + i);
      }
      clear_high(d, oprsz, desc);
  }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_and)(void *d, void *a, void *b, uint32_t desc)
      intptr_t oprsz = simd_oprsz(desc);
      intptr_t i;
 -    for (i = 0; i < oprsz; i += sizeof(vec64)) {
 -        *(vec64 *)(d + i) = *(vec64 *)(a + i) & *(vec64 *)(b + i);
 +    for (i = 0; i < oprsz; i += sizeof(uint64_t)) {
 +        *(uint64_t *)(d + i) = *(uint64_t *)(a + i) & *(uint64_t *)(b + i);
      }
      clear_high(d, oprsz, desc);
  }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_or)(void *d, void *a, void *b, uint32_t desc)
      intptr_t oprsz = simd_oprsz(desc);
      intptr_t i;
 -    for (i = 0; i < oprsz; i += sizeof(vec64)) {
 -        *(vec64 *)(d + i) = *(vec64 *)(a + i) | *(vec64 *)(b + i);
 +    for (i = 0; i < oprsz; i += sizeof(uint64_t)) {
 +        *(uint64_t *)(d + i) = *(uint64_t *)(a + i) | *(uint64_t *)(b + i);
      }
      clear_high(d, oprsz, desc);
  }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_xor)(void *d, void *a, void *b, uint32_t desc)
      intptr_t oprsz = simd_oprsz(desc);
      intptr_t i;
 -    for (i = 0; i < oprsz; i += sizeof(vec64)) {
 -        *(vec64 *)(d + i) = *(vec64 *)(a + i) ^ *(vec64 *)(b + i);
 +    for (i = 0; i < oprsz; i += sizeof(uint64_t)) {
 +        *(uint64_t *)(d + i) = *(uint64_t *)(a + i) ^ *(uint64_t *)(b + i);
      }
      clear_high(d, oprsz, desc);
  }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_andc)(void *d, void *a, void *b, uint32_t desc)
      intptr_t oprsz = simd_oprsz(desc);
      intptr_t i;
 -    for (i = 0; i < oprsz; i += sizeof(vec64)) {
 -        *(vec64 *)(d + i) = *(vec64 *)(a + i) &~ *(vec64 *)(b + i);
 +    for (i = 0; i < oprsz; i += sizeof(uint64_t)) {
 +        *(uint64_t *)(d + i) = *(uint64_t *)(a + i) &~ *(uint64_t *)(b + i);
      }
      clear_high(d, oprsz, desc);
  }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_orc)(void *d, void *a, void *b, uint32_t desc)
      intptr_t oprsz = simd_oprsz(desc);
      intptr_t i;
 -    for (i = 0; i < oprsz; i += sizeof(vec64)) {
 -        *(vec64 *)(d + i) = *(vec64 *)(a + i) |~ *(vec64 *)(b + i);
 +    for (i = 0; i < oprsz; i += sizeof(uint64_t)) {
 +        *(uint64_t *)(d + i) = *(uint64_t *)(a + i) |~ *(uint64_t *)(b + i);
      }
      clear_high(d, oprsz, desc);
  }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_nand)(void *d, void *a, void *b, uint32_t desc)
      intptr_t oprsz = simd_oprsz(desc);
      intptr_t i;
 -    for (i = 0; i < oprsz; i += sizeof(vec64)) {
 -        *(vec64 *)(d + i) = ~(*(vec64 *)(a + i) & *(vec64 *)(b + i));
 +    for (i = 0; i < oprsz; i += sizeof(uint64_t)) {
 +        *(uint64_t *)(d + i) = ~(*(uint64_t *)(a + i) & *(uint64_t *)(b + i));
      }
      clear_high(d, oprsz, desc);
  }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_nor)(void *d, void *a, void *b, uint32_t desc)
      intptr_t oprsz = simd_oprsz(desc);
      intptr_t i;
 -    for (i = 0; i < oprsz; i += sizeof(vec64)) {
 -        *(vec64 *)(d + i) = ~(*(vec64 *)(a + i) | *(vec64 *)(b + i));
 +    for (i = 0; i < oprsz; i += sizeof(uint64_t)) {
 +        *(uint64_t *)(d + i) = ~(*(uint64_t *)(a + i) | *(uint64_t *)(b + i));
      }
      clear_high(d, oprsz, desc);
  }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_eqv)(void *d, void *a, void *b, uint32_t desc)
      intptr_t oprsz = simd_oprsz(desc);
      intptr_t i;
 -    for (i = 0; i < oprsz; i += sizeof(vec64)) {
 -        *(vec64 *)(d + i) = ~(*(vec64 *)(a + i) ^ *(vec64 *)(b + i));
 +    for (i = 0; i < oprsz; i += sizeof(uint64_t)) {
 +        *(uint64_t *)(d + i) = ~(*(uint64_t *)(a + i) ^ *(uint64_t *)(b + i));
      }
      clear_high(d, oprsz, desc);
  }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_eqv)(void *d, void *a, void *b, uint32_t desc)
  void HELPER(gvec_ands)(void *d, void *a, uint64_t b, uint32_t desc)
  {
      intptr_t oprsz = simd_oprsz(desc);
 -    vec64 vecb = (vec64)DUP2(b);
 +    uint64_t vecb = (uint64_t)DUP2(b);
      intptr_t i;
 -    for (i = 0; i < oprsz; i += sizeof(vec64)) {
 -        *(vec64 *)(d + i) = *(vec64 *)(a + i) & vecb;
 +    for (i = 0; i < oprsz; i += sizeof(uint64_t)) {
 +        *(uint64_t *)(d + i) = *(uint64_t *)(a + i) & vecb;
      }
      clear_high(d, oprsz, desc);
  }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_ands)(void *d, void *a, uint64_t b, uint32_t desc)
  void HELPER(gvec_xors)(void *d, void *a, uint64_t b, uint32_t desc)
  {
      intptr_t oprsz = simd_oprsz(desc);
 -    vec64 vecb = (vec64)DUP2(b);
 +    uint64_t vecb = (uint64_t)DUP2(b);
      intptr_t i;
 -    for (i = 0; i < oprsz; i += sizeof(vec64)) {
 -        *(vec64 *)(d + i) = *(vec64 *)(a + i) ^ vecb;
 +    for (i = 0; i < oprsz; i += sizeof(uint64_t)) {
 +        *(uint64_t *)(d + i) = *(uint64_t *)(a + i) ^ vecb;
      }
      clear_high(d, oprsz, desc);
  }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_xors)(void *d, void *a, uint64_t b, uint32_t desc)
  void HELPER(gvec_ors)(void *d, void *a, uint64_t b, uint32_t desc)
  {
      intptr_t oprsz = simd_oprsz(desc);
 -    vec64 vecb = (vec64)DUP2(b);
 +    uint64_t vecb = (uint64_t)DUP2(b);
      intptr_t i;
 -    for (i = 0; i < oprsz; i += sizeof(vec64)) {
 -        *(vec64 *)(d + i) = *(vec64 *)(a + i) | vecb;
 +    for (i = 0; i < oprsz; i += sizeof(uint64_t)) {
 +        *(uint64_t *)(d + i) = *(uint64_t *)(a + i) | vecb;
      }
      clear_high(d, oprsz, desc);
  }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_shl8i)(void *d, void *a, uint32_t desc)
      int shift = simd_data(desc);
      intptr_t i;
 -    for (i = 0; i < oprsz; i += sizeof(vec8)) {
 -        *(vec8 *)(d + i) = *(vec8 *)(a + i) << shift;
 +    for (i = 0; i < oprsz; i += sizeof(uint8_t)) {
 +        *(uint8_t *)(d + i) = *(uint8_t *)(a + i) << shift;
      }
      clear_high(d, oprsz, desc);
  }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_shl16i)(void *d, void *a, uint32_t desc)
      int shift = simd_data(desc);
      intptr_t i;
 -    for (i = 0; i < oprsz; i += sizeof(vec16)) {
 -        *(vec16 *)(d + i) = *(vec16 *)(a + i) << shift;
 +    for (i = 0; i < oprsz; i += sizeof(uint16_t)) {
 +        *(uint16_t *)(d + i) = *(uint16_t *)(a + i) << shift;
      }
      clear_high(d, oprsz, desc);
  }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_shl32i)(void *d, void *a, uint32_t desc)
      int shift = simd_data(desc);
      intptr_t i;
 -    for (i = 0; i < oprsz; i += sizeof(vec32)) {
 -        *(vec32 *)(d + i) = *(vec32 *)(a + i) << shift;
 +    for (i = 0; i < oprsz; i += sizeof(uint32_t)) {
 +        *(uint32_t *)(d + i) = *(uint32_t *)(a + i) << shift;
      }
      clear_high(d, oprsz, desc);
  }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_shl64i)(void *d, void *a, uint32_t desc)
      int shift = simd_data(desc);
      intptr_t i;
 -    for (i = 0; i < oprsz; i += sizeof(vec64)) {
 -        *(vec64 *)(d + i) = *(vec64 *)(a + i) << shift;
 +    for (i = 0; i < oprsz; i += sizeof(uint64_t)) {
 +        *(uint64_t *)(d + i) = *(uint64_t *)(a + i) << shift;
      }
      clear_high(d, oprsz, desc);
  }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_shr8i)(void *d, void *a, uint32_t desc)
      int shift = simd_data(desc);
      intptr_t i;
 -    for (i = 0; i < oprsz; i += sizeof(vec8)) {
 -        *(vec8 *)(d + i) = *(vec8 *)(a + i) >> shift;
 +    for (i = 0; i < oprsz; i += sizeof(uint8_t)) {
 +        *(uint8_t *)(d + i) = *(uint8_t *)(a + i) >> shift;
      }
      clear_high(d, oprsz, desc);
  }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_shr16i)(void *d, void *a, uint32_t desc)
      int shift = simd_data(desc);
      intptr_t i;
 -    for (i = 0; i < oprsz; i += sizeof(vec16)) {
 -        *(vec16 *)(d + i) = *(vec16 *)(a + i) >> shift;
 +    for (i = 0; i < oprsz; i += sizeof(uint16_t)) {
 +        *(uint16_t *)(d + i) = *(uint16_t *)(a + i) >> shift;
      }
      clear_high(d, oprsz, desc);
  }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_shr32i)(void *d, void *a, uint32_t desc)
      int shift = simd_data(desc);
      intptr_t i;
 -    for (i = 0; i < oprsz; i += sizeof(vec32)) {
 -        *(vec32 *)(d + i) = *(vec32 *)(a + i) >> shift;
 +    for (i = 0; i < oprsz; i += sizeof(uint32_t)) {
 +        *(uint32_t *)(d + i) = *(uint32_t *)(a + i) >> shift;
      }
      clear_high(d, oprsz, desc);
  }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_shr64i)(void *d, void *a, uint32_t desc)
      int shift = simd_data(desc);
      intptr_t i;
 -    for (i = 0; i < oprsz; i += sizeof(vec64)) {
 -        *(vec64 *)(d + i) = *(vec64 *)(a + i) >> shift;
 +    for (i = 0; i < oprsz; i += sizeof(uint64_t)) {
 +        *(uint64_t *)(d + i) = *(uint64_t *)(a + i) >> shift;
      }
      clear_high(d, oprsz, desc);
  }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_sar8i)(void *d, void *a, uint32_t desc)
      int shift = simd_data(desc);
      intptr_t i;
 -    for (i = 0; i < oprsz; i += sizeof(vec8)) {
 -        *(svec8 *)(d + i) = *(svec8 *)(a + i) >> shift;
 +    for (i = 0; i < oprsz; i += sizeof(uint8_t)) {
 +        *(int8_t *)(d + i) = *(int8_t *)(a + i) >> shift;
      }
      clear_high(d, oprsz, desc);
  }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_sar16i)(void *d, void *a, uint32_t desc)
      int shift = simd_data(desc);
      intptr_t i;
 -    for (i = 0; i < oprsz; i += sizeof(vec16)) {
 -        *(svec16 *)(d + i) = *(svec16 *)(a + i) >> shift;
 +    for (i = 0; i < oprsz; i += sizeof(uint16_t)) {
 +        *(int16_t *)(d + i) = *(int16_t *)(a + i) >> shift;
      }
      clear_high(d, oprsz, desc);
  }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_sar32i)(void *d, void *a, uint32_t desc)
      int shift = simd_data(desc);
      intptr_t i;
 -    for (i = 0; i < oprsz; i += sizeof(vec32)) {
 -        *(svec32 *)(d + i) = *(svec32 *)(a + i) >> shift;
 +    for (i = 0; i < oprsz; i += sizeof(uint32_t)) {
 +        *(int32_t *)(d + i) = *(int32_t *)(a + i) >> shift;
      }
      clear_high(d, oprsz, desc);
  }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_sar64i)(void *d, void *a, uint32_t desc)
      int shift = simd_data(desc);
      intptr_t i;
 -    for (i = 0; i < oprsz; i += sizeof(vec64)) {
 -        *(svec64 *)(d + i) = *(svec64 *)(a + i) >> shift;
 +    for (i = 0; i < oprsz; i += sizeof(uint64_t)) {
 +        *(int64_t *)(d + i) = *(int64_t *)(a + i) >> shift;
      }
      clear_high(d, oprsz, desc);
  }
@@ -XXX,XX +XXX,XX @@ void HELPER(NAME)(void *d, void *a, void *b, uint32_t desc)                \
  }
  #define DO_CMP2(SZ) \
 -    DO_CMP1(gvec_eq##SZ, vec##SZ, ==)    \
 -    DO_CMP1(gvec_ne##SZ, vec##SZ, !=)    \
 -    DO_CMP1(gvec_lt##SZ, svec##SZ, <)    \
 -    DO_CMP1(gvec_le##SZ, svec##SZ, <=)   \
 -    DO_CMP1(gvec_ltu##SZ, vec##SZ, <)    \
 -    DO_CMP1(gvec_leu##SZ, vec##SZ, <=)
 +    DO_CMP1(gvec_eq##SZ, uint##SZ##_t, ==)    \
 +    DO_CMP1(gvec_ne##SZ, uint##SZ##_t, !=)    \
 +    DO_CMP1(gvec_lt##SZ, int##SZ##_t, <)      \
 +    DO_CMP1(gvec_le##SZ, int##SZ##_t, <=)     \
 +    DO_CMP1(gvec_ltu##SZ, uint##SZ##_t, <)    \
 +    DO_CMP1(gvec_leu##SZ, uint##SZ##_t, <=)
  DO_CMP2(8)
  DO_CMP2(16)
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_bitsel)(void *d, void *a, void *b, void *c, uint32_t desc)
      intptr_t oprsz = simd_oprsz(desc);
      intptr_t i;
 -    for (i = 0; i < oprsz; i += sizeof(vec64)) {
 -        vec64 aa = *(vec64 *)(a + i);
 -        vec64 bb = *(vec64 *)(b + i);
 -        vec64 cc = *(vec64 *)(c + i);
 -        *(vec64 *)(d + i) = (bb & aa) | (cc & ~aa);
 +    for (i = 0; i < oprsz; i += sizeof(uint64_t)) {
 +        uint64_t aa = *(uint64_t *)(a + i);
 +        uint64_t bb = *(uint64_t *)(b + i);
 +        uint64_t cc = *(uint64_t *)(c + i);
 +        *(uint64_t *)(d + i) = (bb & aa) | (cc & ~aa);
      }
      clear_high(d, oprsz, desc);
  }
 --
-.20.1
+.25.1

-[PULL 5/5] tcg: Remove tcg-runtime-gvec.c DO_CMP0
+[PULL 4/4] common-user: Fix tail calls to safe_syscall_set_errno_tail
-Partial cleanup from the CONFIG_VECTOR16 removal.
+For the ABIs in which the syscall return register is not
-Replace DO_CMP0 with its scalar expansion, a simple negation.
+also the first function argument register, move the errno
 value into the correct place.
+Fixes: a3310c0397e2 ("linux-user: Move syscall error detection into safe_syscall_base")
+Reported-by: Laurent Vivier <laurent@vivier.eu>
+Tested-by: Laurent Vivier <laurent@vivier.eu>
+Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
 Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
+Message-Id: <20220104190454.542225-1-richard.henderson@linaro.org>
 ---
- accel/tcg/tcg-runtime-gvec.c | 5 +----
+ common-user/host/i386/safe-syscall.inc.S   | 1 +
-file changed, 1 insertion(+), 4 deletions(-)
+ common-user/host/mips/safe-syscall.inc.S   | 1 +
  common-user/host/x86_64/safe-syscall.inc.S | 1 +
 files changed, 3 insertions(+)
-diff --git a/accel/tcg/tcg-runtime-gvec.c b/accel/tcg/tcg-runtime-gvec.c
+diff --git a/common-user/host/i386/safe-syscall.inc.S b/common-user/host/i386/safe-syscall.inc.S
 index XXXXXXX..XXXXXXX 100644
---- a/accel/tcg/tcg-runtime-gvec.c
+--- a/common-user/host/i386/safe-syscall.inc.S
-+++ b/accel/tcg/tcg-runtime-gvec.c
++++ b/common-user/host/i386/safe-syscall.inc.S
-@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_sar64v)(void *d, void *a, void *b, uint32_t desc)
+@@ -XXX,XX +XXX,XX @@ safe_syscall_end:
-     clear_high(d, oprsz, desc);
+         pop     %ebp
- }
+         .cfi_adjust_cfa_offset -4
+         .cfi_restore ebp
--#define DO_CMP0(X)  -(X)
++        mov     %eax, (%esp)
--
+         jmp     safe_syscall_set_errno_tail
- #define DO_CMP1(NAME, TYPE, OP)                                            \
- void HELPER(NAME)(void *d, void *a, void *b, uint32_t desc)                \
+         .cfi_endproc
- {                                                                          \
+diff --git a/common-user/host/mips/safe-syscall.inc.S b/common-user/host/mips/safe-syscall.inc.S
-     intptr_t oprsz = simd_oprsz(desc);                                     \
+index XXXXXXX..XXXXXXX 100644
-     intptr_t i;                                                            \
+--- a/common-user/host/mips/safe-syscall.inc.S
-     for (i = 0; i < oprsz; i += sizeof(TYPE)) {                            \
++++ b/common-user/host/mips/safe-syscall.inc.S
--        *(TYPE *)(d + i) = DO_CMP0(*(TYPE *)(a + i) OP *(TYPE *)(b + i));  \
+@@ -XXX,XX +XXX,XX @@ safe_syscall_end:
-+        *(TYPE *)(d + i) = -(*(TYPE *)(a + i) OP *(TYPE *)(b + i));        \
+:      USE_ALT_CP(t0)
-     }                                                                      \
+         SETUP_GPX(t1)
-     clear_high(d, oprsz, desc);                                            \
+         SETUP_GPX64(t0, t1)
- }
++        move    a0, v0
-@@ -XXX,XX +XXX,XX @@ DO_CMP2(16)
+         PTR_LA  t9, safe_syscall_set_errno_tail
- DO_CMP2(32)
+         jr      t9
- DO_CMP2(64)
+diff --git a/common-user/host/x86_64/safe-syscall.inc.S b/common-user/host/x86_64/safe-syscall.inc.S
--#undef DO_CMP0
+index XXXXXXX..XXXXXXX 100644
- #undef DO_CMP1
+--- a/common-user/host/x86_64/safe-syscall.inc.S
- #undef DO_CMP2
++++ b/common-user/host/x86_64/safe-syscall.inc.S
@@ -XXX,XX +XXX,XX @@ safe_syscall_end:
 :      pop     %rbp
          .cfi_def_cfa_offset 8
          .cfi_restore rbp
 +        mov     %eax, %edi
          jmp     safe_syscall_set_errno_tail
          .cfi_endproc
 --
-.20.1
+.25.1

The following changes since commit 40c67636f67c2a89745f2e698522fe917326a952:

Merge remote-tracking branch 'remotes/kraxel/tags/usb-20200317-pull-request' into staging (2020-03-17 14:00:56 +0000)

are available in the Git repository at:

https://github.com/rth7680/qemu.git tags/pull-tcg-20200317

for you to fetch changes up to 0270bd503e3699b7202200a2d693ad1feb57473f:

tcg: Remove tcg-runtime-gvec.c DO_CMP0 (2020-03-17 08:41:07 -0700)

----------------------------------------------------------------
Fix tcg/i386 bug vs sari_vec.
Fix tcg-runtime-gvec.c vs i386 without avx.

----------------------------------------------------------------
Richard Henderson (5):
      tcg/i386: Bound shift count expanding sari_vec
      tcg: Remove CONFIG_VECTOR16
      tcg: Tidy tcg-runtime-gvec.c types
      tcg: Tidy tcg-runtime-gvec.c DUP*
      tcg: Remove tcg-runtime-gvec.c DO_CMP0

configure                    |  56 --------
 accel/tcg/tcg-runtime-gvec.c | 298 +++++++++++++++++--------------------------
 tcg/i386/tcg-target.inc.c    |   9 +-
 3 files changed, 122 insertions(+), 241 deletions(-)

A given RISU testcase for SVE can produce

tcg-op-vec.c:511: do_shifti: Assertion `i >= 0 && i < (8 << vece)' failed.

because expand_vec_sari gave a shift count of 32 to a MO_32
vector shift.

In 44f1441dbe1, we changed from direct expansion of vector opcodes
to re-use of the tcg expanders.  So while the comment correctly notes
that the hw will handle such a shift count, we now have to take our
own sanity checks into account.  Which is easy in this particular case.

Fixes: 44f1441dbe1
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 tcg/i386/tcg-target.inc.c | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/tcg/i386/tcg-target.inc.c b/tcg/i386/tcg-target.inc.c
index XXXXXXX..XXXXXXX 100644
--- a/tcg/i386/tcg-target.inc.c
+++ b/tcg/i386/tcg-target.inc.c
@@ -XXX,XX +XXX,XX @@ static void expand_vec_sari(TCGType type, unsigned vece,
 
     case MO_64:
         if (imm <= 32) {
-            /* We can emulate a small sign extend by performing an arithmetic
+            /*
+             * We can emulate a small sign extend by performing an arithmetic
              * 32-bit shift and overwriting the high half of a 64-bit logical
-             * shift (note that the ISA says shift of 32 is valid).
+             * shift.  Note that the ISA says shift of 32 is valid, but TCG
+             * does not, so we have to bound the smaller shift -- we get the
+             * same result in the high half either way.
              */
             t1 = tcg_temp_new_vec(type);
-            tcg_gen_sari_vec(MO_32, t1, v1, imm);
+            tcg_gen_sari_vec(MO_32, t1, v1, MIN(imm, 31));
             tcg_gen_shri_vec(MO_64, v0, v1, imm);
             vec_gen_4(INDEX_op_x86_blend_vec, type, MO_32,
                       tcgv_vec_arg(v0), tcgv_vec_arg(v0),
-- 
2.20.1

The comment in tcg-runtime-gvec.c about CONFIG_VECTOR16 says that
tcg-op-gvec.c has eliminated size 8 vectors, and only passes on
multiples of 16.  This may have been true of the first few operations,
but is not true of all operations.

In particular, multiply, shift by scalar, and compare of 8- and 16-bit
elements are not expanded inline if host vector operations are not
supported.

For an x86_64 host that does not support AVX, this means that we will
fall back to the helper, which will attempt to use SSE instructions,
which will SEGV on an invalid 8-byte aligned memory operation.

This patch simply removes the CONFIG_VECTOR16 code and configuration
without further simplification.

Buglink: https://bugs.launchpad.net/bugs/1863508
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 configure                    | 56 ------------------------------------
 accel/tcg/tcg-runtime-gvec.c | 35 +---------------------
 2 files changed, 1 insertion(+), 90 deletions(-)

diff --git a/configure b/configure
index XXXXXXX..XXXXXXX 100755
--- a/configure
+++ b/configure
@@ -XXX,XX +XXX,XX @@ if  test "$plugins" = "yes" &&
       "for this purpose. You can't build with --static."
 fi
 
-########################################
-# See if 16-byte vector operations are supported.
-# Even without a vector unit the compiler may expand these.
-# There is a bug in old GCC for PPC that crashes here.
-# Unfortunately it's the system compiler for Centos 7.
-
-cat > $TMPC << EOF
-typedef unsigned char U1 __attribute__((vector_size(16)));
-typedef unsigned short U2 __attribute__((vector_size(16)));
-typedef unsigned int U4 __attribute__((vector_size(16)));
-typedef unsigned long long U8 __attribute__((vector_size(16)));
-typedef signed char S1 __attribute__((vector_size(16)));
-typedef signed short S2 __attribute__((vector_size(16)));
-typedef signed int S4 __attribute__((vector_size(16)));
-typedef signed long long S8 __attribute__((vector_size(16)));
-static U1 a1, b1;
-static U2 a2, b2;
-static U4 a4, b4;
-static U8 a8, b8;
-static S1 c1;
-static S2 c2;
-static S4 c4;
-static S8 c8;
-static int i;
-void helper(void *d, void *a, int shift, int i);
-void helper(void *d, void *a, int shift, int i)
-{
-  *(U1 *)(d + i) = *(U1 *)(a + i) << shift;
-  *(U2 *)(d + i) = *(U2 *)(a + i) << shift;
-  *(U4 *)(d + i) = *(U4 *)(a + i) << shift;
-  *(U8 *)(d + i) = *(U8 *)(a + i) << shift;
-}
-int main(void)
-{
-  a1 += b1; a2 += b2; a4 += b4; a8 += b8;
-  a1 -= b1; a2 -= b2; a4 -= b4; a8 -= b8;
-  a1 *= b1; a2 *= b2; a4 *= b4; a8 *= b8;
-  a1 &= b1; a2 &= b2; a4 &= b4; a8 &= b8;
-  a1 |= b1; a2 |= b2; a4 |= b4; a8 |= b8;
-  a1 ^= b1; a2 ^= b2; a4 ^= b4; a8 ^= b8;
-  a1 <<= i; a2 <<= i; a4 <<= i; a8 <<= i;
-  a1 >>= i; a2 >>= i; a4 >>= i; a8 >>= i;
-  c1 >>= i; c2 >>= i; c4 >>= i; c8 >>= i;
-  return 0;
-}
-EOF
-
-vector16=no
-if compile_prog "" "" ; then
-  vector16=yes
-fi
-
 ########################################
 # See if __attribute__((alias)) is supported.
 # This false for Xcode 9, but has been remedied for Xcode 10.
@@ -XXX,XX +XXX,XX @@ if test "$atomic64" = "yes" ; then
   echo "CONFIG_ATOMIC64=y" >> $config_host_mak
 fi
 
-if test "$vector16" = "yes" ; then
-  echo "CONFIG_VECTOR16=y" >> $config_host_mak
-fi
-
 if test "$attralias" = "yes" ; then
   echo "CONFIG_ATTRIBUTE_ALIAS=y" >> $config_host_mak
 fi
diff --git a/accel/tcg/tcg-runtime-gvec.c b/accel/tcg/tcg-runtime-gvec.c
index XXXXXXX..XXXXXXX 100644
--- a/accel/tcg/tcg-runtime-gvec.c
+++ b/accel/tcg/tcg-runtime-gvec.c
@@ -XXX,XX +XXX,XX @@
 #include "tcg/tcg-gvec-desc.h"
 
 
-/* Virtually all hosts support 16-byte vectors.  Those that don't can emulate
- * them via GCC's generic vector extension.  This turns out to be simpler and
- * more reliable than getting the compiler to autovectorize.
- *
- * In tcg-op-gvec.c, we asserted that both the size and alignment of the data
- * are multiples of 16.
- *
- * When the compiler does not support all of the operations we require, the
- * loops are written so that we can always fall back on the base types.
- */
-#ifdef CONFIG_VECTOR16
-typedef uint8_t vec8 __attribute__((vector_size(16)));
-typedef uint16_t vec16 __attribute__((vector_size(16)));
-typedef uint32_t vec32 __attribute__((vector_size(16)));
-typedef uint64_t vec64 __attribute__((vector_size(16)));
-
-typedef int8_t svec8 __attribute__((vector_size(16)));
-typedef int16_t svec16 __attribute__((vector_size(16)));
-typedef int32_t svec32 __attribute__((vector_size(16)));
-typedef int64_t svec64 __attribute__((vector_size(16)));
-
-#define DUP16(X)  { X, X, X, X, X, X, X, X, X, X, X, X, X, X, X, X }
-#define DUP8(X)   { X, X, X, X, X, X, X, X }
-#define DUP4(X)   { X, X, X, X }
-#define DUP2(X)   { X, X }
-#else
 typedef uint8_t vec8;
 typedef uint16_t vec16;
 typedef uint32_t vec32;
@@ -XXX,XX +XXX,XX @@ typedef int64_t svec64;
 #define DUP8(X)   X
 #define DUP4(X)   X
 #define DUP2(X)   X
-#endif /* CONFIG_VECTOR16 */
 
 static inline void clear_high(void *d, intptr_t oprsz, uint32_t desc)
 {
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_sar64v)(void *d, void *a, void *b, uint32_t desc)
     clear_high(d, oprsz, desc);
 }
 
-/* If vectors are enabled, the compiler fills in -1 for true.
-   Otherwise, we must take care of this by hand.  */
-#ifdef CONFIG_VECTOR16
-# define DO_CMP0(X)  X
-#else
-# define DO_CMP0(X)  -(X)
-#endif
+#define DO_CMP0(X)  -(X)
 
 #define DO_CMP1(NAME, TYPE, OP)                                            \
 void HELPER(NAME)(void *d, void *a, void *b, uint32_t desc)                \
-- 
2.20.1

Partial cleanup from the CONFIG_VECTOR16 removal.
Replace the vec* types with their scalar expansions.

Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 accel/tcg/tcg-runtime-gvec.c | 270 +++++++++++++++++------------------
 1 file changed, 130 insertions(+), 140 deletions(-)

diff --git a/accel/tcg/tcg-runtime-gvec.c b/accel/tcg/tcg-runtime-gvec.c
index XXXXXXX..XXXXXXX 100644
--- a/accel/tcg/tcg-runtime-gvec.c
+++ b/accel/tcg/tcg-runtime-gvec.c
@@ -XXX,XX +XXX,XX @@
 #include "tcg/tcg-gvec-desc.h"
 
 
-typedef uint8_t vec8;
-typedef uint16_t vec16;
-typedef uint32_t vec32;
-typedef uint64_t vec64;
-
-typedef int8_t svec8;
-typedef int16_t svec16;
-typedef int32_t svec32;
-typedef int64_t svec64;
-
 #define DUP16(X)  X
 #define DUP8(X)   X
 #define DUP4(X)   X
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_add8)(void *d, void *a, void *b, uint32_t desc)
     intptr_t oprsz = simd_oprsz(desc);
     intptr_t i;
 
-    for (i = 0; i < oprsz; i += sizeof(vec8)) {
-        *(vec8 *)(d + i) = *(vec8 *)(a + i) + *(vec8 *)(b + i);
+    for (i = 0; i < oprsz; i += sizeof(uint8_t)) {
+        *(uint8_t *)(d + i) = *(uint8_t *)(a + i) + *(uint8_t *)(b + i);
     }
     clear_high(d, oprsz, desc);
 }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_add16)(void *d, void *a, void *b, uint32_t desc)
     intptr_t oprsz = simd_oprsz(desc);
     intptr_t i;
 
-    for (i = 0; i < oprsz; i += sizeof(vec16)) {
-        *(vec16 *)(d + i) = *(vec16 *)(a + i) + *(vec16 *)(b + i);
+    for (i = 0; i < oprsz; i += sizeof(uint16_t)) {
+        *(uint16_t *)(d + i) = *(uint16_t *)(a + i) + *(uint16_t *)(b + i);
     }
     clear_high(d, oprsz, desc);
 }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_add32)(void *d, void *a, void *b, uint32_t desc)
     intptr_t oprsz = simd_oprsz(desc);
     intptr_t i;
 
-    for (i = 0; i < oprsz; i += sizeof(vec32)) {
-        *(vec32 *)(d + i) = *(vec32 *)(a + i) + *(vec32 *)(b + i);
+    for (i = 0; i < oprsz; i += sizeof(uint32_t)) {
+        *(uint32_t *)(d + i) = *(uint32_t *)(a + i) + *(uint32_t *)(b + i);
     }
     clear_high(d, oprsz, desc);
 }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_add64)(void *d, void *a, void *b, uint32_t desc)
     intptr_t oprsz = simd_oprsz(desc);
     intptr_t i;
 
-    for (i = 0; i < oprsz; i += sizeof(vec64)) {
-        *(vec64 *)(d + i) = *(vec64 *)(a + i) + *(vec64 *)(b + i);
+    for (i = 0; i < oprsz; i += sizeof(uint64_t)) {
+        *(uint64_t *)(d + i) = *(uint64_t *)(a + i) + *(uint64_t *)(b + i);
     }
     clear_high(d, oprsz, desc);
 }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_add64)(void *d, void *a, void *b, uint32_t desc)
 void HELPER(gvec_adds8)(void *d, void *a, uint64_t b, uint32_t desc)
 {
     intptr_t oprsz = simd_oprsz(desc);
-    vec8 vecb = (vec8)DUP16(b);
+    uint8_t vecb = (uint8_t)DUP16(b);
     intptr_t i;
 
-    for (i = 0; i < oprsz; i += sizeof(vec8)) {
-        *(vec8 *)(d + i) = *(vec8 *)(a + i) + vecb;
+    for (i = 0; i < oprsz; i += sizeof(uint8_t)) {
+        *(uint8_t *)(d + i) = *(uint8_t *)(a + i) + vecb;
     }
     clear_high(d, oprsz, desc);
 }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_adds8)(void *d, void *a, uint64_t b, uint32_t desc)
 void HELPER(gvec_adds16)(void *d, void *a, uint64_t b, uint32_t desc)
 {
     intptr_t oprsz = simd_oprsz(desc);
-    vec16 vecb = (vec16)DUP8(b);
+    uint16_t vecb = (uint16_t)DUP8(b);
     intptr_t i;
 
-    for (i = 0; i < oprsz; i += sizeof(vec16)) {
-        *(vec16 *)(d + i) = *(vec16 *)(a + i) + vecb;
+    for (i = 0; i < oprsz; i += sizeof(uint16_t)) {
+        *(uint16_t *)(d + i) = *(uint16_t *)(a + i) + vecb;
     }
     clear_high(d, oprsz, desc);
 }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_adds16)(void *d, void *a, uint64_t b, uint32_t desc)
 void HELPER(gvec_adds32)(void *d, void *a, uint64_t b, uint32_t desc)
 {
     intptr_t oprsz = simd_oprsz(desc);
-    vec32 vecb = (vec32)DUP4(b);
+    uint32_t vecb = (uint32_t)DUP4(b);
     intptr_t i;
 
-    for (i = 0; i < oprsz; i += sizeof(vec32)) {
-        *(vec32 *)(d + i) = *(vec32 *)(a + i) + vecb;
+    for (i = 0; i < oprsz; i += sizeof(uint32_t)) {
+        *(uint32_t *)(d + i) = *(uint32_t *)(a + i) + vecb;
     }
     clear_high(d, oprsz, desc);
 }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_adds32)(void *d, void *a, uint64_t b, uint32_t desc)
 void HELPER(gvec_adds64)(void *d, void *a, uint64_t b, uint32_t desc)
 {
     intptr_t oprsz = simd_oprsz(desc);
-    vec64 vecb = (vec64)DUP2(b);
+    uint64_t vecb = (uint64_t)DUP2(b);
     intptr_t i;
 
-    for (i = 0; i < oprsz; i += sizeof(vec64)) {
-        *(vec64 *)(d + i) = *(vec64 *)(a + i) + vecb;
+    for (i = 0; i < oprsz; i += sizeof(uint64_t)) {
+        *(uint64_t *)(d + i) = *(uint64_t *)(a + i) + vecb;
     }
     clear_high(d, oprsz, desc);
 }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_sub8)(void *d, void *a, void *b, uint32_t desc)
     intptr_t oprsz = simd_oprsz(desc);
     intptr_t i;
 
-    for (i = 0; i < oprsz; i += sizeof(vec8)) {
-        *(vec8 *)(d + i) = *(vec8 *)(a + i) - *(vec8 *)(b + i);
+    for (i = 0; i < oprsz; i += sizeof(uint8_t)) {
+        *(uint8_t *)(d + i) = *(uint8_t *)(a + i) - *(uint8_t *)(b + i);
     }
     clear_high(d, oprsz, desc);
 }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_sub16)(void *d, void *a, void *b, uint32_t desc)
     intptr_t oprsz = simd_oprsz(desc);
     intptr_t i;
 
-    for (i = 0; i < oprsz; i += sizeof(vec16)) {
-        *(vec16 *)(d + i) = *(vec16 *)(a + i) - *(vec16 *)(b + i);
+    for (i = 0; i < oprsz; i += sizeof(uint16_t)) {
+        *(uint16_t *)(d + i) = *(uint16_t *)(a + i) - *(uint16_t *)(b + i);
     }
     clear_high(d, oprsz, desc);
 }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_sub32)(void *d, void *a, void *b, uint32_t desc)
     intptr_t oprsz = simd_oprsz(desc);
     intptr_t i;
 
-    for (i = 0; i < oprsz; i += sizeof(vec32)) {
-        *(vec32 *)(d + i) = *(vec32 *)(a + i) - *(vec32 *)(b + i);
+    for (i = 0; i < oprsz; i += sizeof(uint32_t)) {
+        *(uint32_t *)(d + i) = *(uint32_t *)(a + i) - *(uint32_t *)(b + i);
     }
     clear_high(d, oprsz, desc);
 }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_sub64)(void *d, void *a, void *b, uint32_t desc)
     intptr_t oprsz = simd_oprsz(desc);
     intptr_t i;
 
-    for (i = 0; i < oprsz; i += sizeof(vec64)) {
-        *(vec64 *)(d + i) = *(vec64 *)(a + i) - *(vec64 *)(b + i);
+    for (i = 0; i < oprsz; i += sizeof(uint64_t)) {
+        *(uint64_t *)(d + i) = *(uint64_t *)(a + i) - *(uint64_t *)(b + i);
     }
     clear_high(d, oprsz, desc);
 }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_sub64)(void *d, void *a, void *b, uint32_t desc)
 void HELPER(gvec_subs8)(void *d, void *a, uint64_t b, uint32_t desc)
 {
     intptr_t oprsz = simd_oprsz(desc);
-    vec8 vecb = (vec8)DUP16(b);
+    uint8_t vecb = (uint8_t)DUP16(b);
     intptr_t i;
 
-    for (i = 0; i < oprsz; i += sizeof(vec8)) {
-        *(vec8 *)(d + i) = *(vec8 *)(a + i) - vecb;
+    for (i = 0; i < oprsz; i += sizeof(uint8_t)) {
+        *(uint8_t *)(d + i) = *(uint8_t *)(a + i) - vecb;
     }
     clear_high(d, oprsz, desc);
 }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_subs8)(void *d, void *a, uint64_t b, uint32_t desc)
 void HELPER(gvec_subs16)(void *d, void *a, uint64_t b, uint32_t desc)
 {
     intptr_t oprsz = simd_oprsz(desc);
-    vec16 vecb = (vec16)DUP8(b);
+    uint16_t vecb = (uint16_t)DUP8(b);
     intptr_t i;
 
-    for (i = 0; i < oprsz; i += sizeof(vec16)) {
-        *(vec16 *)(d + i) = *(vec16 *)(a + i) - vecb;
+    for (i = 0; i < oprsz; i += sizeof(uint16_t)) {
+        *(uint16_t *)(d + i) = *(uint16_t *)(a + i) - vecb;
     }
     clear_high(d, oprsz, desc);
 }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_subs16)(void *d, void *a, uint64_t b, uint32_t desc)
 void HELPER(gvec_subs32)(void *d, void *a, uint64_t b, uint32_t desc)
 {
     intptr_t oprsz = simd_oprsz(desc);
-    vec32 vecb = (vec32)DUP4(b);
+    uint32_t vecb = (uint32_t)DUP4(b);
     intptr_t i;
 
-    for (i = 0; i < oprsz; i += sizeof(vec32)) {
-        *(vec32 *)(d + i) = *(vec32 *)(a + i) - vecb;
+    for (i = 0; i < oprsz; i += sizeof(uint32_t)) {
+        *(uint32_t *)(d + i) = *(uint32_t *)(a + i) - vecb;
     }
     clear_high(d, oprsz, desc);
 }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_subs32)(void *d, void *a, uint64_t b, uint32_t desc)
 void HELPER(gvec_subs64)(void *d, void *a, uint64_t b, uint32_t desc)
 {
     intptr_t oprsz = simd_oprsz(desc);
-    vec64 vecb = (vec64)DUP2(b);
+    uint64_t vecb = (uint64_t)DUP2(b);
     intptr_t i;
 
-    for (i = 0; i < oprsz; i += sizeof(vec64)) {
-        *(vec64 *)(d + i) = *(vec64 *)(a + i) - vecb;
+    for (i = 0; i < oprsz; i += sizeof(uint64_t)) {
+        *(uint64_t *)(d + i) = *(uint64_t *)(a + i) - vecb;
     }
     clear_high(d, oprsz, desc);
 }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_mul8)(void *d, void *a, void *b, uint32_t desc)
     intptr_t oprsz = simd_oprsz(desc);
     intptr_t i;
 
-    for (i = 0; i < oprsz; i += sizeof(vec8)) {
-        *(vec8 *)(d + i) = *(vec8 *)(a + i) * *(vec8 *)(b + i);
+    for (i = 0; i < oprsz; i += sizeof(uint8_t)) {
+        *(uint8_t *)(d + i) = *(uint8_t *)(a + i) * *(uint8_t *)(b + i);
     }
     clear_high(d, oprsz, desc);
 }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_mul16)(void *d, void *a, void *b, uint32_t desc)
     intptr_t oprsz = simd_oprsz(desc);
     intptr_t i;
 
-    for (i = 0; i < oprsz; i += sizeof(vec16)) {
-        *(vec16 *)(d + i) = *(vec16 *)(a + i) * *(vec16 *)(b + i);
+    for (i = 0; i < oprsz; i += sizeof(uint16_t)) {
+        *(uint16_t *)(d + i) = *(uint16_t *)(a + i) * *(uint16_t *)(b + i);
     }
     clear_high(d, oprsz, desc);
 }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_mul32)(void *d, void *a, void *b, uint32_t desc)
     intptr_t oprsz = simd_oprsz(desc);
     intptr_t i;
 
-    for (i = 0; i < oprsz; i += sizeof(vec32)) {
-        *(vec32 *)(d + i) = *(vec32 *)(a + i) * *(vec32 *)(b + i);
+    for (i = 0; i < oprsz; i += sizeof(uint32_t)) {
+        *(uint32_t *)(d + i) = *(uint32_t *)(a + i) * *(uint32_t *)(b + i);
     }
     clear_high(d, oprsz, desc);
 }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_mul64)(void *d, void *a, void *b, uint32_t desc)
     intptr_t oprsz = simd_oprsz(desc);
     intptr_t i;
 
-    for (i = 0; i < oprsz; i += sizeof(vec64)) {
-        *(vec64 *)(d + i) = *(vec64 *)(a + i) * *(vec64 *)(b + i);
+    for (i = 0; i < oprsz; i += sizeof(uint64_t)) {
+        *(uint64_t *)(d + i) = *(uint64_t *)(a + i) * *(uint64_t *)(b + i);
     }
     clear_high(d, oprsz, desc);
 }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_mul64)(void *d, void *a, void *b, uint32_t desc)
 void HELPER(gvec_muls8)(void *d, void *a, uint64_t b, uint32_t desc)
 {
     intptr_t oprsz = simd_oprsz(desc);
-    vec8 vecb = (vec8)DUP16(b);
+    uint8_t vecb = (uint8_t)DUP16(b);
     intptr_t i;
 
-    for (i = 0; i < oprsz; i += sizeof(vec8)) {
-        *(vec8 *)(d + i) = *(vec8 *)(a + i) * vecb;
+    for (i = 0; i < oprsz; i += sizeof(uint8_t)) {
+        *(uint8_t *)(d + i) = *(uint8_t *)(a + i) * vecb;
     }
     clear_high(d, oprsz, desc);
 }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_muls8)(void *d, void *a, uint64_t b, uint32_t desc)
 void HELPER(gvec_muls16)(void *d, void *a, uint64_t b, uint32_t desc)
 {
     intptr_t oprsz = simd_oprsz(desc);
-    vec16 vecb = (vec16)DUP8(b);
+    uint16_t vecb = (uint16_t)DUP8(b);
     intptr_t i;
 
-    for (i = 0; i < oprsz; i += sizeof(vec16)) {
-        *(vec16 *)(d + i) = *(vec16 *)(a + i) * vecb;
+    for (i = 0; i < oprsz; i += sizeof(uint16_t)) {
+        *(uint16_t *)(d + i) = *(uint16_t *)(a + i) * vecb;
     }
     clear_high(d, oprsz, desc);
 }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_muls16)(void *d, void *a, uint64_t b, uint32_t desc)
 void HELPER(gvec_muls32)(void *d, void *a, uint64_t b, uint32_t desc)
 {
     intptr_t oprsz = simd_oprsz(desc);
-    vec32 vecb = (vec32)DUP4(b);
+    uint32_t vecb = (uint32_t)DUP4(b);
     intptr_t i;
 
-    for (i = 0; i < oprsz; i += sizeof(vec32)) {
-        *(vec32 *)(d + i) = *(vec32 *)(a + i) * vecb;
+    for (i = 0; i < oprsz; i += sizeof(uint32_t)) {
+        *(uint32_t *)(d + i) = *(uint32_t *)(a + i) * vecb;
     }
     clear_high(d, oprsz, desc);
 }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_muls32)(void *d, void *a, uint64_t b, uint32_t desc)
 void HELPER(gvec_muls64)(void *d, void *a, uint64_t b, uint32_t desc)
 {
     intptr_t oprsz = simd_oprsz(desc);
-    vec64 vecb = (vec64)DUP2(b);
+    uint64_t vecb = (uint64_t)DUP2(b);
     intptr_t i;
 
-    for (i = 0; i < oprsz; i += sizeof(vec64)) {
-        *(vec64 *)(d + i) = *(vec64 *)(a + i) * vecb;
+    for (i = 0; i < oprsz; i += sizeof(uint64_t)) {
+        *(uint64_t *)(d + i) = *(uint64_t *)(a + i) * vecb;
     }
     clear_high(d, oprsz, desc);
 }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_neg8)(void *d, void *a, uint32_t desc)
     intptr_t oprsz = simd_oprsz(desc);
     intptr_t i;
 
-    for (i = 0; i < oprsz; i += sizeof(vec8)) {
-        *(vec8 *)(d + i) = -*(vec8 *)(a + i);
+    for (i = 0; i < oprsz; i += sizeof(uint8_t)) {
+        *(uint8_t *)(d + i) = -*(uint8_t *)(a + i);
     }
     clear_high(d, oprsz, desc);
 }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_neg16)(void *d, void *a, uint32_t desc)
     intptr_t oprsz = simd_oprsz(desc);
     intptr_t i;
 
-    for (i = 0; i < oprsz; i += sizeof(vec16)) {
-        *(vec16 *)(d + i) = -*(vec16 *)(a + i);
+    for (i = 0; i < oprsz; i += sizeof(uint16_t)) {
+        *(uint16_t *)(d + i) = -*(uint16_t *)(a + i);
     }
     clear_high(d, oprsz, desc);
 }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_neg32)(void *d, void *a, uint32_t desc)
     intptr_t oprsz = simd_oprsz(desc);
     intptr_t i;
 
-    for (i = 0; i < oprsz; i += sizeof(vec32)) {
-        *(vec32 *)(d + i) = -*(vec32 *)(a + i);
+    for (i = 0; i < oprsz; i += sizeof(uint32_t)) {
+        *(uint32_t *)(d + i) = -*(uint32_t *)(a + i);
     }
     clear_high(d, oprsz, desc);
 }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_neg64)(void *d, void *a, uint32_t desc)
     intptr_t oprsz = simd_oprsz(desc);
     intptr_t i;
 
-    for (i = 0; i < oprsz; i += sizeof(vec64)) {
-        *(vec64 *)(d + i) = -*(vec64 *)(a + i);
+    for (i = 0; i < oprsz; i += sizeof(uint64_t)) {
+        *(uint64_t *)(d + i) = -*(uint64_t *)(a + i);
     }
     clear_high(d, oprsz, desc);
 }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_not)(void *d, void *a, uint32_t desc)
     intptr_t oprsz = simd_oprsz(desc);
     intptr_t i;
 
-    for (i = 0; i < oprsz; i += sizeof(vec64)) {
-        *(vec64 *)(d + i) = ~*(vec64 *)(a + i);
+    for (i = 0; i < oprsz; i += sizeof(uint64_t)) {
+        *(uint64_t *)(d + i) = ~*(uint64_t *)(a + i);
     }
     clear_high(d, oprsz, desc);
 }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_and)(void *d, void *a, void *b, uint32_t desc)
     intptr_t oprsz = simd_oprsz(desc);
     intptr_t i;
 
-    for (i = 0; i < oprsz; i += sizeof(vec64)) {
-        *(vec64 *)(d + i) = *(vec64 *)(a + i) & *(vec64 *)(b + i);
+    for (i = 0; i < oprsz; i += sizeof(uint64_t)) {
+        *(uint64_t *)(d + i) = *(uint64_t *)(a + i) & *(uint64_t *)(b + i);
     }
     clear_high(d, oprsz, desc);
 }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_or)(void *d, void *a, void *b, uint32_t desc)
     intptr_t oprsz = simd_oprsz(desc);
     intptr_t i;
 
-    for (i = 0; i < oprsz; i += sizeof(vec64)) {
-        *(vec64 *)(d + i) = *(vec64 *)(a + i) | *(vec64 *)(b + i);
+    for (i = 0; i < oprsz; i += sizeof(uint64_t)) {
+        *(uint64_t *)(d + i) = *(uint64_t *)(a + i) | *(uint64_t *)(b + i);
     }
     clear_high(d, oprsz, desc);
 }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_xor)(void *d, void *a, void *b, uint32_t desc)
     intptr_t oprsz = simd_oprsz(desc);
     intptr_t i;
 
-    for (i = 0; i < oprsz; i += sizeof(vec64)) {
-        *(vec64 *)(d + i) = *(vec64 *)(a + i) ^ *(vec64 *)(b + i);
+    for (i = 0; i < oprsz; i += sizeof(uint64_t)) {
+        *(uint64_t *)(d + i) = *(uint64_t *)(a + i) ^ *(uint64_t *)(b + i);
     }
     clear_high(d, oprsz, desc);
 }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_andc)(void *d, void *a, void *b, uint32_t desc)
     intptr_t oprsz = simd_oprsz(desc);
     intptr_t i;
 
-    for (i = 0; i < oprsz; i += sizeof(vec64)) {
-        *(vec64 *)(d + i) = *(vec64 *)(a + i) &~ *(vec64 *)(b + i);
+    for (i = 0; i < oprsz; i += sizeof(uint64_t)) {
+        *(uint64_t *)(d + i) = *(uint64_t *)(a + i) &~ *(uint64_t *)(b + i);
     }
     clear_high(d, oprsz, desc);
 }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_orc)(void *d, void *a, void *b, uint32_t desc)
     intptr_t oprsz = simd_oprsz(desc);
     intptr_t i;
 
-    for (i = 0; i < oprsz; i += sizeof(vec64)) {
-        *(vec64 *)(d + i) = *(vec64 *)(a + i) |~ *(vec64 *)(b + i);
+    for (i = 0; i < oprsz; i += sizeof(uint64_t)) {
+        *(uint64_t *)(d + i) = *(uint64_t *)(a + i) |~ *(uint64_t *)(b + i);
     }
     clear_high(d, oprsz, desc);
 }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_nand)(void *d, void *a, void *b, uint32_t desc)
     intptr_t oprsz = simd_oprsz(desc);
     intptr_t i;
 
-    for (i = 0; i < oprsz; i += sizeof(vec64)) {
-        *(vec64 *)(d + i) = ~(*(vec64 *)(a + i) & *(vec64 *)(b + i));
+    for (i = 0; i < oprsz; i += sizeof(uint64_t)) {
+        *(uint64_t *)(d + i) = ~(*(uint64_t *)(a + i) & *(uint64_t *)(b + i));
     }
     clear_high(d, oprsz, desc);
 }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_nor)(void *d, void *a, void *b, uint32_t desc)
     intptr_t oprsz = simd_oprsz(desc);
     intptr_t i;
 
-    for (i = 0; i < oprsz; i += sizeof(vec64)) {
-        *(vec64 *)(d + i) = ~(*(vec64 *)(a + i) | *(vec64 *)(b + i));
+    for (i = 0; i < oprsz; i += sizeof(uint64_t)) {
+        *(uint64_t *)(d + i) = ~(*(uint64_t *)(a + i) | *(uint64_t *)(b + i));
     }
     clear_high(d, oprsz, desc);
 }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_eqv)(void *d, void *a, void *b, uint32_t desc)
     intptr_t oprsz = simd_oprsz(desc);
     intptr_t i;
 
-    for (i = 0; i < oprsz; i += sizeof(vec64)) {
-        *(vec64 *)(d + i) = ~(*(vec64 *)(a + i) ^ *(vec64 *)(b + i));
+    for (i = 0; i < oprsz; i += sizeof(uint64_t)) {
+        *(uint64_t *)(d + i) = ~(*(uint64_t *)(a + i) ^ *(uint64_t *)(b + i));
     }
     clear_high(d, oprsz, desc);
 }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_eqv)(void *d, void *a, void *b, uint32_t desc)
 void HELPER(gvec_ands)(void *d, void *a, uint64_t b, uint32_t desc)
 {
     intptr_t oprsz = simd_oprsz(desc);
-    vec64 vecb = (vec64)DUP2(b);
+    uint64_t vecb = (uint64_t)DUP2(b);
     intptr_t i;
 
-    for (i = 0; i < oprsz; i += sizeof(vec64)) {
-        *(vec64 *)(d + i) = *(vec64 *)(a + i) & vecb;
+    for (i = 0; i < oprsz; i += sizeof(uint64_t)) {
+        *(uint64_t *)(d + i) = *(uint64_t *)(a + i) & vecb;
     }
     clear_high(d, oprsz, desc);
 }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_ands)(void *d, void *a, uint64_t b, uint32_t desc)
 void HELPER(gvec_xors)(void *d, void *a, uint64_t b, uint32_t desc)
 {
     intptr_t oprsz = simd_oprsz(desc);
-    vec64 vecb = (vec64)DUP2(b);
+    uint64_t vecb = (uint64_t)DUP2(b);
     intptr_t i;
 
-    for (i = 0; i < oprsz; i += sizeof(vec64)) {
-        *(vec64 *)(d + i) = *(vec64 *)(a + i) ^ vecb;
+    for (i = 0; i < oprsz; i += sizeof(uint64_t)) {
+        *(uint64_t *)(d + i) = *(uint64_t *)(a + i) ^ vecb;
     }
     clear_high(d, oprsz, desc);
 }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_xors)(void *d, void *a, uint64_t b, uint32_t desc)
 void HELPER(gvec_ors)(void *d, void *a, uint64_t b, uint32_t desc)
 {
     intptr_t oprsz = simd_oprsz(desc);
-    vec64 vecb = (vec64)DUP2(b);
+    uint64_t vecb = (uint64_t)DUP2(b);
     intptr_t i;
 
-    for (i = 0; i < oprsz; i += sizeof(vec64)) {
-        *(vec64 *)(d + i) = *(vec64 *)(a + i) | vecb;
+    for (i = 0; i < oprsz; i += sizeof(uint64_t)) {
+        *(uint64_t *)(d + i) = *(uint64_t *)(a + i) | vecb;
     }
     clear_high(d, oprsz, desc);
 }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_shl8i)(void *d, void *a, uint32_t desc)
     int shift = simd_data(desc);
     intptr_t i;
 
-    for (i = 0; i < oprsz; i += sizeof(vec8)) {
-        *(vec8 *)(d + i) = *(vec8 *)(a + i) << shift;
+    for (i = 0; i < oprsz; i += sizeof(uint8_t)) {
+        *(uint8_t *)(d + i) = *(uint8_t *)(a + i) << shift;
     }
     clear_high(d, oprsz, desc);
 }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_shl16i)(void *d, void *a, uint32_t desc)
     int shift = simd_data(desc);
     intptr_t i;
 
-    for (i = 0; i < oprsz; i += sizeof(vec16)) {
-        *(vec16 *)(d + i) = *(vec16 *)(a + i) << shift;
+    for (i = 0; i < oprsz; i += sizeof(uint16_t)) {
+        *(uint16_t *)(d + i) = *(uint16_t *)(a + i) << shift;
     }
     clear_high(d, oprsz, desc);
 }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_shl32i)(void *d, void *a, uint32_t desc)
     int shift = simd_data(desc);
     intptr_t i;
 
-    for (i = 0; i < oprsz; i += sizeof(vec32)) {
-        *(vec32 *)(d + i) = *(vec32 *)(a + i) << shift;
+    for (i = 0; i < oprsz; i += sizeof(uint32_t)) {
+        *(uint32_t *)(d + i) = *(uint32_t *)(a + i) << shift;
     }
     clear_high(d, oprsz, desc);
 }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_shl64i)(void *d, void *a, uint32_t desc)
     int shift = simd_data(desc);
     intptr_t i;
 
-    for (i = 0; i < oprsz; i += sizeof(vec64)) {
-        *(vec64 *)(d + i) = *(vec64 *)(a + i) << shift;
+    for (i = 0; i < oprsz; i += sizeof(uint64_t)) {
+        *(uint64_t *)(d + i) = *(uint64_t *)(a + i) << shift;
     }
     clear_high(d, oprsz, desc);
 }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_shr8i)(void *d, void *a, uint32_t desc)
     int shift = simd_data(desc);
     intptr_t i;
 
-    for (i = 0; i < oprsz; i += sizeof(vec8)) {
-        *(vec8 *)(d + i) = *(vec8 *)(a + i) >> shift;
+    for (i = 0; i < oprsz; i += sizeof(uint8_t)) {
+        *(uint8_t *)(d + i) = *(uint8_t *)(a + i) >> shift;
     }
     clear_high(d, oprsz, desc);
 }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_shr16i)(void *d, void *a, uint32_t desc)
     int shift = simd_data(desc);
     intptr_t i;
 
-    for (i = 0; i < oprsz; i += sizeof(vec16)) {
-        *(vec16 *)(d + i) = *(vec16 *)(a + i) >> shift;
+    for (i = 0; i < oprsz; i += sizeof(uint16_t)) {
+        *(uint16_t *)(d + i) = *(uint16_t *)(a + i) >> shift;
     }
     clear_high(d, oprsz, desc);
 }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_shr32i)(void *d, void *a, uint32_t desc)
     int shift = simd_data(desc);
     intptr_t i;
 
-    for (i = 0; i < oprsz; i += sizeof(vec32)) {
-        *(vec32 *)(d + i) = *(vec32 *)(a + i) >> shift;
+    for (i = 0; i < oprsz; i += sizeof(uint32_t)) {
+        *(uint32_t *)(d + i) = *(uint32_t *)(a + i) >> shift;
     }
     clear_high(d, oprsz, desc);
 }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_shr64i)(void *d, void *a, uint32_t desc)
     int shift = simd_data(desc);
     intptr_t i;
 
-    for (i = 0; i < oprsz; i += sizeof(vec64)) {
-        *(vec64 *)(d + i) = *(vec64 *)(a + i) >> shift;
+    for (i = 0; i < oprsz; i += sizeof(uint64_t)) {
+        *(uint64_t *)(d + i) = *(uint64_t *)(a + i) >> shift;
     }
     clear_high(d, oprsz, desc);
 }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_sar8i)(void *d, void *a, uint32_t desc)
     int shift = simd_data(desc);
     intptr_t i;
 
-    for (i = 0; i < oprsz; i += sizeof(vec8)) {
-        *(svec8 *)(d + i) = *(svec8 *)(a + i) >> shift;
+    for (i = 0; i < oprsz; i += sizeof(uint8_t)) {
+        *(int8_t *)(d + i) = *(int8_t *)(a + i) >> shift;
     }
     clear_high(d, oprsz, desc);
 }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_sar16i)(void *d, void *a, uint32_t desc)
     int shift = simd_data(desc);
     intptr_t i;
 
-    for (i = 0; i < oprsz; i += sizeof(vec16)) {
-        *(svec16 *)(d + i) = *(svec16 *)(a + i) >> shift;
+    for (i = 0; i < oprsz; i += sizeof(uint16_t)) {
+        *(int16_t *)(d + i) = *(int16_t *)(a + i) >> shift;
     }
     clear_high(d, oprsz, desc);
 }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_sar32i)(void *d, void *a, uint32_t desc)
     int shift = simd_data(desc);
     intptr_t i;
 
-    for (i = 0; i < oprsz; i += sizeof(vec32)) {
-        *(svec32 *)(d + i) = *(svec32 *)(a + i) >> shift;
+    for (i = 0; i < oprsz; i += sizeof(uint32_t)) {
+        *(int32_t *)(d + i) = *(int32_t *)(a + i) >> shift;
     }
     clear_high(d, oprsz, desc);
 }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_sar64i)(void *d, void *a, uint32_t desc)
     int shift = simd_data(desc);
     intptr_t i;
 
-    for (i = 0; i < oprsz; i += sizeof(vec64)) {
-        *(svec64 *)(d + i) = *(svec64 *)(a + i) >> shift;
+    for (i = 0; i < oprsz; i += sizeof(uint64_t)) {
+        *(int64_t *)(d + i) = *(int64_t *)(a + i) >> shift;
     }
     clear_high(d, oprsz, desc);
 }
@@ -XXX,XX +XXX,XX @@ void HELPER(NAME)(void *d, void *a, void *b, uint32_t desc)                \
 }
 
 #define DO_CMP2(SZ) \
-    DO_CMP1(gvec_eq##SZ, vec##SZ, ==)    \
-    DO_CMP1(gvec_ne##SZ, vec##SZ, !=)    \
-    DO_CMP1(gvec_lt##SZ, svec##SZ, <)    \
-    DO_CMP1(gvec_le##SZ, svec##SZ, <=)   \
-    DO_CMP1(gvec_ltu##SZ, vec##SZ, <)    \
-    DO_CMP1(gvec_leu##SZ, vec##SZ, <=)
+    DO_CMP1(gvec_eq##SZ, uint##SZ##_t, ==)    \
+    DO_CMP1(gvec_ne##SZ, uint##SZ##_t, !=)    \
+    DO_CMP1(gvec_lt##SZ, int##SZ##_t, <)      \
+    DO_CMP1(gvec_le##SZ, int##SZ##_t, <=)     \
+    DO_CMP1(gvec_ltu##SZ, uint##SZ##_t, <)    \
+    DO_CMP1(gvec_leu##SZ, uint##SZ##_t, <=)
 
 DO_CMP2(8)
 DO_CMP2(16)
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_bitsel)(void *d, void *a, void *b, void *c, uint32_t desc)
     intptr_t oprsz = simd_oprsz(desc);
     intptr_t i;
 
-    for (i = 0; i < oprsz; i += sizeof(vec64)) {
-        vec64 aa = *(vec64 *)(a + i);
-        vec64 bb = *(vec64 *)(b + i);
-        vec64 cc = *(vec64 *)(c + i);
-        *(vec64 *)(d + i) = (bb & aa) | (cc & ~aa);
+    for (i = 0; i < oprsz; i += sizeof(uint64_t)) {
+        uint64_t aa = *(uint64_t *)(a + i);
+        uint64_t bb = *(uint64_t *)(b + i);
+        uint64_t cc = *(uint64_t *)(c + i);
+        *(uint64_t *)(d + i) = (bb & aa) | (cc & ~aa);
     }
     clear_high(d, oprsz, desc);
 }
-- 
2.20.1

Partial cleanup from the CONFIG_VECTOR16 removal.
Replace the DUP* expansions with the scalar argument.

Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 accel/tcg/tcg-runtime-gvec.c | 50 +++++++++++-------------------------
 1 file changed, 15 insertions(+), 35 deletions(-)

diff --git a/accel/tcg/tcg-runtime-gvec.c b/accel/tcg/tcg-runtime-gvec.c
index XXXXXXX..XXXXXXX 100644
--- a/accel/tcg/tcg-runtime-gvec.c
+++ b/accel/tcg/tcg-runtime-gvec.c
@@ -XXX,XX +XXX,XX @@
 #include "tcg/tcg-gvec-desc.h"
 
 
-#define DUP16(X)  X
-#define DUP8(X)   X
-#define DUP4(X)   X
-#define DUP2(X)   X
-
 static inline void clear_high(void *d, intptr_t oprsz, uint32_t desc)
 {
     intptr_t maxsz = simd_maxsz(desc);
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_add64)(void *d, void *a, void *b, uint32_t desc)
 void HELPER(gvec_adds8)(void *d, void *a, uint64_t b, uint32_t desc)
 {
     intptr_t oprsz = simd_oprsz(desc);
-    uint8_t vecb = (uint8_t)DUP16(b);
     intptr_t i;
 
     for (i = 0; i < oprsz; i += sizeof(uint8_t)) {
-        *(uint8_t *)(d + i) = *(uint8_t *)(a + i) + vecb;
+        *(uint8_t *)(d + i) = *(uint8_t *)(a + i) + (uint8_t)b;
     }
     clear_high(d, oprsz, desc);
 }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_adds8)(void *d, void *a, uint64_t b, uint32_t desc)
 void HELPER(gvec_adds16)(void *d, void *a, uint64_t b, uint32_t desc)
 {
     intptr_t oprsz = simd_oprsz(desc);
-    uint16_t vecb = (uint16_t)DUP8(b);
     intptr_t i;
 
     for (i = 0; i < oprsz; i += sizeof(uint16_t)) {
-        *(uint16_t *)(d + i) = *(uint16_t *)(a + i) + vecb;
+        *(uint16_t *)(d + i) = *(uint16_t *)(a + i) + (uint16_t)b;
     }
     clear_high(d, oprsz, desc);
 }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_adds16)(void *d, void *a, uint64_t b, uint32_t desc)
 void HELPER(gvec_adds32)(void *d, void *a, uint64_t b, uint32_t desc)
 {
     intptr_t oprsz = simd_oprsz(desc);
-    uint32_t vecb = (uint32_t)DUP4(b);
     intptr_t i;
 
     for (i = 0; i < oprsz; i += sizeof(uint32_t)) {
-        *(uint32_t *)(d + i) = *(uint32_t *)(a + i) + vecb;
+        *(uint32_t *)(d + i) = *(uint32_t *)(a + i) + (uint32_t)b;
     }
     clear_high(d, oprsz, desc);
 }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_adds32)(void *d, void *a, uint64_t b, uint32_t desc)
 void HELPER(gvec_adds64)(void *d, void *a, uint64_t b, uint32_t desc)
 {
     intptr_t oprsz = simd_oprsz(desc);
-    uint64_t vecb = (uint64_t)DUP2(b);
     intptr_t i;
 
     for (i = 0; i < oprsz; i += sizeof(uint64_t)) {
-        *(uint64_t *)(d + i) = *(uint64_t *)(a + i) + vecb;
+        *(uint64_t *)(d + i) = *(uint64_t *)(a + i) + b;
     }
     clear_high(d, oprsz, desc);
 }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_sub64)(void *d, void *a, void *b, uint32_t desc)
 void HELPER(gvec_subs8)(void *d, void *a, uint64_t b, uint32_t desc)
 {
     intptr_t oprsz = simd_oprsz(desc);
-    uint8_t vecb = (uint8_t)DUP16(b);
     intptr_t i;
 
     for (i = 0; i < oprsz; i += sizeof(uint8_t)) {
-        *(uint8_t *)(d + i) = *(uint8_t *)(a + i) - vecb;
+        *(uint8_t *)(d + i) = *(uint8_t *)(a + i) - (uint8_t)b;
     }
     clear_high(d, oprsz, desc);
 }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_subs8)(void *d, void *a, uint64_t b, uint32_t desc)
 void HELPER(gvec_subs16)(void *d, void *a, uint64_t b, uint32_t desc)
 {
     intptr_t oprsz = simd_oprsz(desc);
-    uint16_t vecb = (uint16_t)DUP8(b);
     intptr_t i;
 
     for (i = 0; i < oprsz; i += sizeof(uint16_t)) {
-        *(uint16_t *)(d + i) = *(uint16_t *)(a + i) - vecb;
+        *(uint16_t *)(d + i) = *(uint16_t *)(a + i) - (uint16_t)b;
     }
     clear_high(d, oprsz, desc);
 }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_subs16)(void *d, void *a, uint64_t b, uint32_t desc)
 void HELPER(gvec_subs32)(void *d, void *a, uint64_t b, uint32_t desc)
 {
     intptr_t oprsz = simd_oprsz(desc);
-    uint32_t vecb = (uint32_t)DUP4(b);
     intptr_t i;
 
     for (i = 0; i < oprsz; i += sizeof(uint32_t)) {
-        *(uint32_t *)(d + i) = *(uint32_t *)(a + i) - vecb;
+        *(uint32_t *)(d + i) = *(uint32_t *)(a + i) - (uint32_t)b;
     }
     clear_high(d, oprsz, desc);
 }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_subs32)(void *d, void *a, uint64_t b, uint32_t desc)
 void HELPER(gvec_subs64)(void *d, void *a, uint64_t b, uint32_t desc)
 {
     intptr_t oprsz = simd_oprsz(desc);
-    uint64_t vecb = (uint64_t)DUP2(b);
     intptr_t i;
 
     for (i = 0; i < oprsz; i += sizeof(uint64_t)) {
-        *(uint64_t *)(d + i) = *(uint64_t *)(a + i) - vecb;
+        *(uint64_t *)(d + i) = *(uint64_t *)(a + i) - b;
     }
     clear_high(d, oprsz, desc);
 }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_mul64)(void *d, void *a, void *b, uint32_t desc)
 void HELPER(gvec_muls8)(void *d, void *a, uint64_t b, uint32_t desc)
 {
     intptr_t oprsz = simd_oprsz(desc);
-    uint8_t vecb = (uint8_t)DUP16(b);
     intptr_t i;
 
     for (i = 0; i < oprsz; i += sizeof(uint8_t)) {
-        *(uint8_t *)(d + i) = *(uint8_t *)(a + i) * vecb;
+        *(uint8_t *)(d + i) = *(uint8_t *)(a + i) * (uint8_t)b;
     }
     clear_high(d, oprsz, desc);
 }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_muls8)(void *d, void *a, uint64_t b, uint32_t desc)
 void HELPER(gvec_muls16)(void *d, void *a, uint64_t b, uint32_t desc)
 {
     intptr_t oprsz = simd_oprsz(desc);
-    uint16_t vecb = (uint16_t)DUP8(b);
     intptr_t i;
 
     for (i = 0; i < oprsz; i += sizeof(uint16_t)) {
-        *(uint16_t *)(d + i) = *(uint16_t *)(a + i) * vecb;
+        *(uint16_t *)(d + i) = *(uint16_t *)(a + i) * (uint16_t)b;
     }
     clear_high(d, oprsz, desc);
 }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_muls16)(void *d, void *a, uint64_t b, uint32_t desc)
 void HELPER(gvec_muls32)(void *d, void *a, uint64_t b, uint32_t desc)
 {
     intptr_t oprsz = simd_oprsz(desc);
-    uint32_t vecb = (uint32_t)DUP4(b);
     intptr_t i;
 
     for (i = 0; i < oprsz; i += sizeof(uint32_t)) {
-        *(uint32_t *)(d + i) = *(uint32_t *)(a + i) * vecb;
+        *(uint32_t *)(d + i) = *(uint32_t *)(a + i) * (uint32_t)b;
     }
     clear_high(d, oprsz, desc);
 }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_muls32)(void *d, void *a, uint64_t b, uint32_t desc)
 void HELPER(gvec_muls64)(void *d, void *a, uint64_t b, uint32_t desc)
 {
     intptr_t oprsz = simd_oprsz(desc);
-    uint64_t vecb = (uint64_t)DUP2(b);
     intptr_t i;
 
     for (i = 0; i < oprsz; i += sizeof(uint64_t)) {
-        *(uint64_t *)(d + i) = *(uint64_t *)(a + i) * vecb;
+        *(uint64_t *)(d + i) = *(uint64_t *)(a + i) * b;
     }
     clear_high(d, oprsz, desc);
 }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_eqv)(void *d, void *a, void *b, uint32_t desc)
 void HELPER(gvec_ands)(void *d, void *a, uint64_t b, uint32_t desc)
 {
     intptr_t oprsz = simd_oprsz(desc);
-    uint64_t vecb = (uint64_t)DUP2(b);
     intptr_t i;
 
     for (i = 0; i < oprsz; i += sizeof(uint64_t)) {
-        *(uint64_t *)(d + i) = *(uint64_t *)(a + i) & vecb;
+        *(uint64_t *)(d + i) = *(uint64_t *)(a + i) & b;
     }
     clear_high(d, oprsz, desc);
 }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_ands)(void *d, void *a, uint64_t b, uint32_t desc)
 void HELPER(gvec_xors)(void *d, void *a, uint64_t b, uint32_t desc)
 {
     intptr_t oprsz = simd_oprsz(desc);
-    uint64_t vecb = (uint64_t)DUP2(b);
     intptr_t i;
 
     for (i = 0; i < oprsz; i += sizeof(uint64_t)) {
-        *(uint64_t *)(d + i) = *(uint64_t *)(a + i) ^ vecb;
+        *(uint64_t *)(d + i) = *(uint64_t *)(a + i) ^ b;
     }
     clear_high(d, oprsz, desc);
 }
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_xors)(void *d, void *a, uint64_t b, uint32_t desc)
 void HELPER(gvec_ors)(void *d, void *a, uint64_t b, uint32_t desc)
 {
     intptr_t oprsz = simd_oprsz(desc);
-    uint64_t vecb = (uint64_t)DUP2(b);
     intptr_t i;
 
     for (i = 0; i < oprsz; i += sizeof(uint64_t)) {
-        *(uint64_t *)(d + i) = *(uint64_t *)(a + i) | vecb;
+        *(uint64_t *)(d + i) = *(uint64_t *)(a + i) | b;
     }
     clear_high(d, oprsz, desc);
 }
-- 
2.20.1

Partial cleanup from the CONFIG_VECTOR16 removal.
Replace DO_CMP0 with its scalar expansion, a simple negation.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 accel/tcg/tcg-runtime-gvec.c | 5 +----
 1 file changed, 1 insertion(+), 4 deletions(-)

diff --git a/accel/tcg/tcg-runtime-gvec.c b/accel/tcg/tcg-runtime-gvec.c
index XXXXXXX..XXXXXXX 100644
--- a/accel/tcg/tcg-runtime-gvec.c
+++ b/accel/tcg/tcg-runtime-gvec.c
@@ -XXX,XX +XXX,XX @@ void HELPER(gvec_sar64v)(void *d, void *a, void *b, uint32_t desc)
     clear_high(d, oprsz, desc);
 }
 
-#define DO_CMP0(X)  -(X)
-
 #define DO_CMP1(NAME, TYPE, OP)                                            \
 void HELPER(NAME)(void *d, void *a, void *b, uint32_t desc)                \
 {                                                                          \
     intptr_t oprsz = simd_oprsz(desc);                                     \
     intptr_t i;                                                            \
     for (i = 0; i < oprsz; i += sizeof(TYPE)) {                            \
-        *(TYPE *)(d + i) = DO_CMP0(*(TYPE *)(a + i) OP *(TYPE *)(b + i));  \
+        *(TYPE *)(d + i) = -(*(TYPE *)(a + i) OP *(TYPE *)(b + i));        \
     }                                                                      \
     clear_high(d, oprsz, desc);                                            \
 }
@@ -XXX,XX +XXX,XX @@ DO_CMP2(16)
 DO_CMP2(32)
 DO_CMP2(64)
 
-#undef DO_CMP0
 #undef DO_CMP1
 #undef DO_CMP2
 
-- 
2.20.1

The following changes since commit 67e41fe0cfb62e6cdfa659f0155417d17e5274ea:

Merge tag 'pull-ppc-20220104' of https://github.com/legoater/qemu into staging (2022-01-04 07:23:27 -0800)

are available in the Git repository at:

https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20220104

for you to fetch changes up to d7478d4229f0a2b2817a55487e6b17081099fae4:

common-user: Fix tail calls to safe_syscall_set_errno_tail (2022-01-04 15:41:03 -0800)

----------------------------------------------------------------
Fix for safe_syscall_base.
Fix for folding of vector add/sub.
Fix build on loongarch64 with gcc 8.
Remove decl for qemu_run_machine_init_done_notifiers.

----------------------------------------------------------------
Philippe Mathieu-Daudé (1):
      linux-user: Fix trivial build error on loongarch64 hosts

Richard Henderson (2):
      tcg/optimize: Fix folding of vector ops
      common-user: Fix tail calls to safe_syscall_set_errno_tail

Xiaoyao Li (1):
      sysemu: Cleanup qemu_run_machine_init_done_notifiers()

include/sysemu/sysemu.h                    |  1 -
 linux-user/host/loongarch64/host-signal.h  |  4 +--
 tcg/optimize.c                             | 49 +++++++++++++++++++++++-------
 common-user/host/i386/safe-syscall.inc.S   |  1 +
 common-user/host/mips/safe-syscall.inc.S   |  1 +
 common-user/host/x86_64/safe-syscall.inc.S |  1 +
 6 files changed, 42 insertions(+), 15 deletions(-)

Bitwise operations are easy to fold, because the operation is
identical regardless of element size.  But add and sub need
extra element size info that is not currently propagated.

Fixes: 2f9f08ba43d
Cc: qemu-stable@nongnu.org
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/799
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 tcg/optimize.c | 49 ++++++++++++++++++++++++++++++++++++++-----------
 1 file changed, 38 insertions(+), 11 deletions(-)

diff --git a/tcg/optimize.c b/tcg/optimize.c
index XXXXXXX..XXXXXXX 100644
--- a/tcg/optimize.c
+++ b/tcg/optimize.c
@@ -XXX,XX +XXX,XX @@ static uint64_t do_constant_folding_2(TCGOpcode op, uint64_t x, uint64_t y)
     CASE_OP_32_64(mul):
         return x * y;
 
-    CASE_OP_32_64(and):
+    CASE_OP_32_64_VEC(and):
         return x & y;
 
-    CASE_OP_32_64(or):
+    CASE_OP_32_64_VEC(or):
         return x | y;
 
-    CASE_OP_32_64(xor):
+    CASE_OP_32_64_VEC(xor):
         return x ^ y;
 
     case INDEX_op_shl_i32:
@@ -XXX,XX +XXX,XX @@ static uint64_t do_constant_folding_2(TCGOpcode op, uint64_t x, uint64_t y)
     case INDEX_op_rotl_i64:
         return rol64(x, y & 63);
 
-    CASE_OP_32_64(not):
+    CASE_OP_32_64_VEC(not):
         return ~x;
 
     CASE_OP_32_64(neg):
         return -x;
 
-    CASE_OP_32_64(andc):
+    CASE_OP_32_64_VEC(andc):
         return x & ~y;
 
-    CASE_OP_32_64(orc):
+    CASE_OP_32_64_VEC(orc):
         return x | ~y;
 
     CASE_OP_32_64(eqv):
@@ -XXX,XX +XXX,XX @@ static bool fold_const2(OptContext *ctx, TCGOp *op)
     return false;
 }
 
+static bool fold_commutative(OptContext *ctx, TCGOp *op)
+{
+    swap_commutative(op->args[0], &op->args[1], &op->args[2]);
+    return false;
+}
+
 static bool fold_const2_commutative(OptContext *ctx, TCGOp *op)
 {
     swap_commutative(op->args[0], &op->args[1], &op->args[2]);
@@ -XXX,XX +XXX,XX @@ static bool fold_add(OptContext *ctx, TCGOp *op)
     return false;
 }
 
+/* We cannot as yet do_constant_folding with vectors. */
+static bool fold_add_vec(OptContext *ctx, TCGOp *op)
+{
+    if (fold_commutative(ctx, op) ||
+        fold_xi_to_x(ctx, op, 0)) {
+        return true;
+    }
+    return false;
+}
+
 static bool fold_addsub2(OptContext *ctx, TCGOp *op, bool add)
 {
     if (arg_is_const(op->args[2]) && arg_is_const(op->args[3]) &&
@@ -XXX,XX +XXX,XX @@ static bool fold_sub_to_neg(OptContext *ctx, TCGOp *op)
     return false;
 }
 
-static bool fold_sub(OptContext *ctx, TCGOp *op)
+/* We cannot as yet do_constant_folding with vectors. */
+static bool fold_sub_vec(OptContext *ctx, TCGOp *op)
 {
-    if (fold_const2(ctx, op) ||
-        fold_xx_to_i(ctx, op, 0) ||
+    if (fold_xx_to_i(ctx, op, 0) ||
         fold_xi_to_x(ctx, op, 0) ||
         fold_sub_to_neg(ctx, op)) {
         return true;
@@ -XXX,XX +XXX,XX @@ static bool fold_sub(OptContext *ctx, TCGOp *op)
     return false;
 }
 
+static bool fold_sub(OptContext *ctx, TCGOp *op)
+{
+    return fold_const2(ctx, op) || fold_sub_vec(ctx, op);
+}
+
 static bool fold_sub2(OptContext *ctx, TCGOp *op)
 {
     return fold_addsub2(ctx, op, false);
@@ -XXX,XX +XXX,XX @@ void tcg_optimize(TCGContext *s)
          * Sorted alphabetically by opcode as much as possible.
          */
         switch (opc) {
-        CASE_OP_32_64_VEC(add):
+        CASE_OP_32_64(add):
             done = fold_add(&ctx, op);
             break;
+        case INDEX_op_add_vec:
+            done = fold_add_vec(&ctx, op);
+            break;
         CASE_OP_32_64(add2):
             done = fold_add2(&ctx, op);
             break;
@@ -XXX,XX +XXX,XX @@ void tcg_optimize(TCGContext *s)
         CASE_OP_32_64(sextract):
             done = fold_sextract(&ctx, op);
             break;
-        CASE_OP_32_64_VEC(sub):
+        CASE_OP_32_64(sub):
             done = fold_sub(&ctx, op);
             break;
+        case INDEX_op_sub_vec:
+            done = fold_sub_vec(&ctx, op);
+            break;
         CASE_OP_32_64(sub2):
             done = fold_sub2(&ctx, op);
             break;
-- 
2.25.1

From: Philippe Mathieu-Daudé <f4bug@amsat.org>

When building using GCC 8.3.0 on loongarch64 (Loongnix) we get:

In file included from ../linux-user/signal.c:33:
  ../linux-user/host/loongarch64/host-signal.h: In function ‘host_signal_write’:
  ../linux-user/host/loongarch64/host-signal.h:57:9: error: a label can only be part of a statement and a declaration is not a statement
         uint32_t sel = (insn >> 15) & 0b11111111111;
         ^~~~~~~~

We don't use the 'sel' variable more than once, so drop it.

Meson output for the record:

Host machine cpu family: loongarch64
  Host machine cpu: loongarch64
  C compiler for the host machine: cc (gcc 8.3.0 "cc (Loongnix 8.3.0-6.lnd.vec.27) 8.3.0")
  C linker for the host machine: cc ld.bfd 2.31.1-system

Fixes: ad812c3bd65 ("linux-user: Implement CPU-specific signal handler for loongarch64 hosts")
Reported-by: Song Gao <gaosong@loongson.cn>
Suggested-by: Song Gao <gaosong@loongson.cn>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: WANG Xuerui <git@xen0n.name>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220104215027.2180972-1-f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 linux-user/host/loongarch64/host-signal.h | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/linux-user/host/loongarch64/host-signal.h b/linux-user/host/loongarch64/host-signal.h
index XXXXXXX..XXXXXXX 100644
--- a/linux-user/host/loongarch64/host-signal.h
+++ b/linux-user/host/loongarch64/host-signal.h
@@ -XXX,XX +XXX,XX @@ static inline bool host_signal_write(siginfo_t *info, ucontext_t *uc)
         }
         break;
     case 0b001110: /* indexed, atomic, bounds-checking memory operations */
-        uint32_t sel = (insn >> 15) & 0b11111111111;
-
-        switch (sel) {
+        switch ((insn >> 15) & 0b11111111111) {
         case 0b00000100000: /* stx.b */
         case 0b00000101000: /* stx.h */
         case 0b00000110000: /* stx.w */
-- 
2.25.1

For the ABIs in which the syscall return register is not
also the first function argument register, move the errno
value into the correct place.

Fixes: a3310c0397e2 ("linux-user: Move syscall error detection into safe_syscall_base")
Reported-by: Laurent Vivier <laurent@vivier.eu>
Tested-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220104190454.542225-1-richard.henderson@linaro.org>
---
 common-user/host/i386/safe-syscall.inc.S   | 1 +
 common-user/host/mips/safe-syscall.inc.S   | 1 +
 common-user/host/x86_64/safe-syscall.inc.S | 1 +
 3 files changed, 3 insertions(+)

diff --git a/common-user/host/i386/safe-syscall.inc.S b/common-user/host/i386/safe-syscall.inc.S
index XXXXXXX..XXXXXXX 100644
--- a/common-user/host/i386/safe-syscall.inc.S
+++ b/common-user/host/i386/safe-syscall.inc.S
@@ -XXX,XX +XXX,XX @@ safe_syscall_end:
         pop     %ebp
         .cfi_adjust_cfa_offset -4
         .cfi_restore ebp
+        mov     %eax, (%esp)
         jmp     safe_syscall_set_errno_tail
 
         .cfi_endproc
diff --git a/common-user/host/mips/safe-syscall.inc.S b/common-user/host/mips/safe-syscall.inc.S
index XXXXXXX..XXXXXXX 100644
--- a/common-user/host/mips/safe-syscall.inc.S
+++ b/common-user/host/mips/safe-syscall.inc.S
@@ -XXX,XX +XXX,XX @@ safe_syscall_end:
 1:      USE_ALT_CP(t0)
         SETUP_GPX(t1)
         SETUP_GPX64(t0, t1)
+        move    a0, v0
         PTR_LA  t9, safe_syscall_set_errno_tail
         jr      t9
 
diff --git a/common-user/host/x86_64/safe-syscall.inc.S b/common-user/host/x86_64/safe-syscall.inc.S
index XXXXXXX..XXXXXXX 100644
--- a/common-user/host/x86_64/safe-syscall.inc.S
+++ b/common-user/host/x86_64/safe-syscall.inc.S
@@ -XXX,XX +XXX,XX @@ safe_syscall_end:
 1:      pop     %rbp
         .cfi_def_cfa_offset 8
         .cfi_restore rbp
+        mov     %eax, %edi
         jmp     safe_syscall_set_errno_tail
         .cfi_endproc
 
-- 
2.25.1