1 | Last handful of arm patches before softfreeze... | 1 | Patches for rc1: nothing major, just some minor bugfixes and |
---|---|---|---|
2 | code cleanups. | ||
2 | 3 | ||
3 | The following changes since commit a98135f727595382e200d04c2996e868b7925a01: | 4 | -- PMM |
4 | 5 | ||
5 | Merge remote-tracking branch 'remotes/kraxel/tags/vga-20200316-pull-request' into staging (2020-03-16 14:55:59 +0000) | 6 | The following changes since commit f7e1914adad8885a5d4c70239ab90d901ed97e9f: |
7 | |||
8 | Merge remote-tracking branch 'remotes/alistair/tags/pull-riscv-to-apply-20201109' into staging (2020-11-10 09:24:56 +0000) | ||
6 | 9 | ||
7 | are available in the Git repository at: | 10 | are available in the Git repository at: |
8 | 11 | ||
9 | https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20200317 | 12 | https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20201110 |
10 | 13 | ||
11 | for you to fetch changes up to e88d3671e3bbd59d385838a4101ea19cdcf47309: | 14 | for you to fetch changes up to b6c56c8a9a4064ea783f352f43c5df6231a110fa: |
12 | 15 | ||
13 | hw/arm/pxa2xx: Do not wire up OHCI for PXA255 (2020-03-17 11:36:48 +0000) | 16 | target/arm/translate-neon.c: Handle VTBL UNDEF case before VFP access check (2020-11-10 11:03:48 +0000) |
14 | 17 | ||
15 | ---------------------------------------------------------------- | 18 | ---------------------------------------------------------------- |
16 | target-arm: | 19 | target-arm queue: |
17 | * hw/arm/pxa2xx: Do not wire up OHCI for PXA255 | 20 | * hw/arm/Kconfig: ARM_V7M depends on PTIMER |
18 | * aspeed/smc: Fix number of dummy cycles for FAST_READ_4 command | 21 | * Minor coding style fixes |
19 | * m25p80: Improve command handling for Jedec and unsupported commands | 22 | * docs: add some notes on the sbsa-ref machine |
20 | * hw/net/imx_fec: write TGSR and TCSR3 in imx_enet_write() | 23 | * hw/arm/virt: Remove dependency on Cortex-A15 MPCore peripherals |
21 | * hw/arm/fsl-imx6, imx6ul: Wire up USB controllers | 24 | * target/arm: Fix neon VTBL/VTBX for len > 1 |
22 | * hw/arm/fsl-imx6ul: Instantiate unimplemented pwm and can devices | 25 | * hw/arm/armsse: Correct expansion MPC interrupt lines |
26 | * hw/misc/stm32f2xx_syscfg: Remove extraneous IRQ | ||
27 | * hw/arm/nseries: Remove invalid/unnecessary n8x0_uart_setup() | ||
28 | * hw/arm/musicpal: Don't connect two qemu_irqs directly to the same input | ||
29 | * hw/arm/musicpal: Only use qdev_get_gpio_in() when necessary | ||
30 | * hw/arm/nseries: Check return value from load_image_targphys() | ||
31 | * tests/qtest/npcm7xx_rng-test: count runs properly | ||
32 | * target/arm/translate-neon.c: Handle VTBL UNDEF case before VFP access check | ||
23 | 33 | ||
24 | ---------------------------------------------------------------- | 34 | ---------------------------------------------------------------- |
25 | Chen Qun (1): | 35 | Alex Bennée (1): |
26 | hw/net/imx_fec: write TGSR and TCSR3 in imx_enet_write() | 36 | docs: add some notes on the sbsa-ref machine |
27 | 37 | ||
28 | Guenter Roeck (10): | 38 | AlexChen (1): |
29 | hw/usb: Add basic i.MX USB Phy support | 39 | ssi: Fix bad printf format specifiers |
30 | hw/arm/fsl-imx6ul: Fix USB interrupt numbers | ||
31 | hw/arm/fsl-imx6ul: Instantiate unimplemented pwm and can devices | ||
32 | hw/arm/fsl-imx6ul: Wire up USB controllers | ||
33 | hw/arm/fsl-imx6: Wire up USB controllers | ||
34 | m25p80: Convert to support tracing | ||
35 | m25p80: Improve command handling for Jedec commands | ||
36 | m25p80: Improve command handling for unsupported commands | ||
37 | aspeed/smc: Fix number of dummy cycles for FAST_READ_4 command | ||
38 | hw/arm/pxa2xx: Do not wire up OHCI for PXA255 | ||
39 | 40 | ||
40 | hw/usb/Makefile.objs | 2 + | 41 | Andrew Jones (1): |
41 | include/hw/arm/fsl-imx6.h | 6 ++ | 42 | hw/arm/Kconfig: ARM_V7M depends on PTIMER |
42 | include/hw/arm/fsl-imx6ul.h | 16 ++- | ||
43 | include/hw/usb/imx-usb-phy.h | 53 ++++++++++ | ||
44 | hw/arm/fsl-imx6.c | 36 +++++++ | ||
45 | hw/arm/fsl-imx6ul.c | 49 ++++++++++ | ||
46 | hw/arm/pxa2xx.c | 3 - | ||
47 | hw/block/m25p80.c | 58 +++++------ | ||
48 | hw/net/imx_fec.c | 6 +- | ||
49 | hw/ssi/aspeed_smc.c | 2 +- | ||
50 | hw/usb/imx-usb-phy.c | 225 +++++++++++++++++++++++++++++++++++++++++++ | ||
51 | MAINTAINERS | 2 + | ||
52 | hw/arm/Kconfig | 1 + | ||
53 | hw/block/trace-events | 16 +++ | ||
54 | hw/usb/Kconfig | 5 + | ||
55 | 15 files changed, 444 insertions(+), 36 deletions(-) | ||
56 | create mode 100644 include/hw/usb/imx-usb-phy.h | ||
57 | create mode 100644 hw/usb/imx-usb-phy.c | ||
58 | 43 | ||
44 | Havard Skinnemoen (1): | ||
45 | tests/qtest/npcm7xx_rng-test: count runs properly | ||
46 | |||
47 | Peter Maydell (2): | ||
48 | hw/arm/nseries: Check return value from load_image_targphys() | ||
49 | target/arm/translate-neon.c: Handle VTBL UNDEF case before VFP access check | ||
50 | |||
51 | Philippe Mathieu-Daudé (6): | ||
52 | hw/arm/virt: Remove dependency on Cortex-A15 MPCore peripherals | ||
53 | hw/arm/armsse: Correct expansion MPC interrupt lines | ||
54 | hw/misc/stm32f2xx_syscfg: Remove extraneous IRQ | ||
55 | hw/arm/nseries: Remove invalid/unnecessary n8x0_uart_setup() | ||
56 | hw/arm/musicpal: Don't connect two qemu_irqs directly to the same input | ||
57 | hw/arm/musicpal: Only use qdev_get_gpio_in() when necessary | ||
58 | |||
59 | Richard Henderson (1): | ||
60 | target/arm: Fix neon VTBL/VTBX for len > 1 | ||
61 | |||
62 | Xinhao Zhang (3): | ||
63 | target/arm: add spaces around operator | ||
64 | target/arm: Don't use '#' flag of printf format | ||
65 | target/arm: add space before the open parenthesis '(' | ||
66 | |||
67 | docs/system/arm/sbsa.rst | 32 ++++++++++++++++++++++ | ||
68 | docs/system/target-arm.rst | 1 + | ||
69 | include/hw/misc/stm32f2xx_syscfg.h | 2 -- | ||
70 | target/arm/helper.h | 2 +- | ||
71 | hw/arm/armsse.c | 3 +- | ||
72 | hw/arm/musicpal.c | 40 +++++++++++++++++---------- | ||
73 | hw/arm/nseries.c | 26 ++++++++---------- | ||
74 | hw/arm/stm32f205_soc.c | 1 - | ||
75 | hw/misc/stm32f2xx_syscfg.c | 2 -- | ||
76 | hw/ssi/imx_spi.c | 2 +- | ||
77 | hw/ssi/xilinx_spi.c | 2 +- | ||
78 | target/arm/arch_dump.c | 8 +++--- | ||
79 | target/arm/arm-semi.c | 8 +++--- | ||
80 | target/arm/helper.c | 2 +- | ||
81 | target/arm/op_helper.c | 23 +++++++++------- | ||
82 | target/arm/translate-a64.c | 4 +-- | ||
83 | target/arm/translate.c | 2 +- | ||
84 | tests/qtest/npcm7xx_rng-test.c | 2 +- | ||
85 | hw/arm/Kconfig | 3 +- | ||
86 | target/arm/translate-neon.c.inc | 56 ++++++++++++++------------------------ | ||
87 | 20 files changed, 123 insertions(+), 98 deletions(-) | ||
88 | create mode 100644 docs/system/arm/sbsa.rst | ||
89 | diff view generated by jsdifflib |
New patch | |||
---|---|---|---|
1 | From: Andrew Jones <drjones@redhat.com> | ||
1 | 2 | ||
3 | commit 32bd322a0134 ("hw/timer/armv7m_systick: Rewrite to use ptimers") | ||
4 | changed armv7m_systick to build on ptimers. Make sure we have ptimers | ||
5 | in the build when building armv7m_systick. | ||
6 | |||
7 | Signed-off-by: Andrew Jones <drjones@redhat.com> | ||
8 | Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> | ||
9 | Message-id: 20201104103343.30392-1-drjones@redhat.com | ||
10 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | ||
11 | --- | ||
12 | hw/arm/Kconfig | 1 + | ||
13 | 1 file changed, 1 insertion(+) | ||
14 | |||
15 | diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig | ||
16 | index XXXXXXX..XXXXXXX 100644 | ||
17 | --- a/hw/arm/Kconfig | ||
18 | +++ b/hw/arm/Kconfig | ||
19 | @@ -XXX,XX +XXX,XX @@ config ZYNQ | ||
20 | |||
21 | config ARM_V7M | ||
22 | bool | ||
23 | + select PTIMER | ||
24 | |||
25 | config ALLWINNER_A10 | ||
26 | bool | ||
27 | -- | ||
28 | 2.20.1 | ||
29 | |||
30 | diff view generated by jsdifflib |
New patch | |||
---|---|---|---|
1 | From: AlexChen <alex.chen@huawei.com> | ||
1 | 2 | ||
3 | We should use printf format specifier "%u" instead of "%d" for | ||
4 | argument of type "unsigned int". | ||
5 | |||
6 | Reported-by: Euler Robot <euler.robot@huawei.com> | ||
7 | Signed-off-by: Alex Chen <alex.chen@huawei.com> | ||
8 | Reviewed-by: Alistair Francis <alistair.francis@wdc.com> | ||
9 | Message-id: 5FA280F5.8060902@huawei.com | ||
10 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | ||
11 | --- | ||
12 | hw/ssi/imx_spi.c | 2 +- | ||
13 | hw/ssi/xilinx_spi.c | 2 +- | ||
14 | 2 files changed, 2 insertions(+), 2 deletions(-) | ||
15 | |||
16 | diff --git a/hw/ssi/imx_spi.c b/hw/ssi/imx_spi.c | ||
17 | index XXXXXXX..XXXXXXX 100644 | ||
18 | --- a/hw/ssi/imx_spi.c | ||
19 | +++ b/hw/ssi/imx_spi.c | ||
20 | @@ -XXX,XX +XXX,XX @@ static const char *imx_spi_reg_name(uint32_t reg) | ||
21 | case ECSPI_MSGDATA: | ||
22 | return "ECSPI_MSGDATA"; | ||
23 | default: | ||
24 | - sprintf(unknown, "%d ?", reg); | ||
25 | + sprintf(unknown, "%u ?", reg); | ||
26 | return unknown; | ||
27 | } | ||
28 | } | ||
29 | diff --git a/hw/ssi/xilinx_spi.c b/hw/ssi/xilinx_spi.c | ||
30 | index XXXXXXX..XXXXXXX 100644 | ||
31 | --- a/hw/ssi/xilinx_spi.c | ||
32 | +++ b/hw/ssi/xilinx_spi.c | ||
33 | @@ -XXX,XX +XXX,XX @@ static void xlx_spi_update_irq(XilinxSPI *s) | ||
34 | irq chain unless things really changed. */ | ||
35 | if (pending != s->irqline) { | ||
36 | s->irqline = pending; | ||
37 | - DB_PRINT("irq_change of state %d ISR:%x IER:%X\n", | ||
38 | + DB_PRINT("irq_change of state %u ISR:%x IER:%X\n", | ||
39 | pending, s->regs[R_IPISR], s->regs[R_IPIER]); | ||
40 | qemu_set_irq(s->irq, pending); | ||
41 | } | ||
42 | -- | ||
43 | 2.20.1 | ||
44 | |||
45 | diff view generated by jsdifflib |
1 | From: Guenter Roeck <linux@roeck-us.net> | 1 | From: Xinhao Zhang <zhangxinhao1@huawei.com> |
---|---|---|---|
2 | 2 | ||
3 | While at it, add some trace messages to help debug problems | 3 | Fix code style. Operator needs spaces both sides. |
4 | seen when running the latest Linux kernel. | ||
5 | 4 | ||
6 | Signed-off-by: Guenter Roeck <linux@roeck-us.net> | 5 | Signed-off-by: Xinhao Zhang <zhangxinhao1@huawei.com> |
7 | Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> | 6 | Signed-off-by: Kai Deng <dengkai1@huawei.com> |
8 | Reviewed-by: Alistair Francis <alistair.francis@wdc.com> | 7 | Message-id: 20201103114529.638233-1-zhangxinhao1@huawei.com |
9 | Reviewed-by: Cédric Le Goater <clg@kaod.org> | 8 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> |
10 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | 9 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
11 | --- | 10 | --- |
12 | hw/block/m25p80.c | 48 ++++++++++++++++++++----------------------- | 11 | target/arm/arch_dump.c | 8 ++++---- |
13 | hw/block/trace-events | 16 +++++++++++++++ | 12 | target/arm/arm-semi.c | 8 ++++---- |
14 | 2 files changed, 38 insertions(+), 26 deletions(-) | 13 | target/arm/helper.c | 2 +- |
14 | 3 files changed, 9 insertions(+), 9 deletions(-) | ||
15 | 15 | ||
16 | diff --git a/hw/block/m25p80.c b/hw/block/m25p80.c | 16 | diff --git a/target/arm/arch_dump.c b/target/arm/arch_dump.c |
17 | index XXXXXXX..XXXXXXX 100644 | 17 | index XXXXXXX..XXXXXXX 100644 |
18 | --- a/hw/block/m25p80.c | 18 | --- a/target/arm/arch_dump.c |
19 | +++ b/hw/block/m25p80.c | 19 | +++ b/target/arm/arch_dump.c |
20 | @@ -XXX,XX +XXX,XX @@ | 20 | @@ -XXX,XX +XXX,XX @@ static int aarch64_write_elf64_prfpreg(WriteCoreDumpFunction f, |
21 | #include "qemu/module.h" | 21 | |
22 | #include "qemu/error-report.h" | 22 | for (i = 0; i < 32; ++i) { |
23 | #include "qapi/error.h" | 23 | uint64_t *q = aa64_vfp_qreg(env, i); |
24 | - | 24 | - note.vfp.vregs[2*i + 0] = cpu_to_dump64(s, q[0]); |
25 | -#ifndef M25P80_ERR_DEBUG | 25 | - note.vfp.vregs[2*i + 1] = cpu_to_dump64(s, q[1]); |
26 | -#define M25P80_ERR_DEBUG 0 | 26 | + note.vfp.vregs[2 * i + 0] = cpu_to_dump64(s, q[0]); |
27 | -#endif | 27 | + note.vfp.vregs[2 * i + 1] = cpu_to_dump64(s, q[1]); |
28 | - | ||
29 | -#define DB_PRINT_L(level, ...) do { \ | ||
30 | - if (M25P80_ERR_DEBUG > (level)) { \ | ||
31 | - fprintf(stderr, ": %s: ", __func__); \ | ||
32 | - fprintf(stderr, ## __VA_ARGS__); \ | ||
33 | - } \ | ||
34 | -} while (0) | ||
35 | +#include "trace.h" | ||
36 | |||
37 | /* Fields for FlashPartInfo->flags */ | ||
38 | |||
39 | @@ -XXX,XX +XXX,XX @@ static void flash_erase(Flash *s, int offset, FlashCMD cmd) | ||
40 | abort(); | ||
41 | } | 28 | } |
42 | 29 | ||
43 | - DB_PRINT_L(0, "offset = %#x, len = %d\n", offset, len); | 30 | if (s->dump_info.d_endian == ELFDATA2MSB) { |
44 | + trace_m25p80_flash_erase(s, offset, len); | 31 | @@ -XXX,XX +XXX,XX @@ static int aarch64_write_elf64_prfpreg(WriteCoreDumpFunction f, |
45 | + | 32 | */ |
46 | if ((s->pi->flags & capa_to_assert) != capa_to_assert) { | 33 | for (i = 0; i < 32; ++i) { |
47 | qemu_log_mask(LOG_GUEST_ERROR, "M25P80: %d erase size not supported by" | 34 | uint64_t tmp = note.vfp.vregs[2*i]; |
48 | " device\n", len); | 35 | - note.vfp.vregs[2*i] = note.vfp.vregs[2*i+1]; |
49 | @@ -XXX,XX +XXX,XX @@ void flash_write8(Flash *s, uint32_t addr, uint8_t data) | 36 | - note.vfp.vregs[2*i+1] = tmp; |
37 | + note.vfp.vregs[2 * i] = note.vfp.vregs[2 * i + 1]; | ||
38 | + note.vfp.vregs[2 * i + 1] = tmp; | ||
39 | } | ||
50 | } | 40 | } |
51 | 41 | ||
52 | if ((prev ^ data) & data) { | 42 | diff --git a/target/arm/arm-semi.c b/target/arm/arm-semi.c |
53 | - DB_PRINT_L(1, "programming zero to one! addr=%" PRIx32 " %" PRIx8 | 43 | index XXXXXXX..XXXXXXX 100644 |
54 | - " -> %" PRIx8 "\n", addr, prev, data); | 44 | --- a/target/arm/arm-semi.c |
55 | + trace_m25p80_programming_zero_to_one(s, addr, prev, data); | 45 | +++ b/target/arm/arm-semi.c |
56 | } | 46 | @@ -XXX,XX +XXX,XX @@ target_ulong do_arm_semihosting(CPUARMState *env) |
57 | 47 | if (use_gdb_syscalls()) { | |
58 | if (s->pi->flags & EEPROM) { | 48 | arm_semi_open_guestfd = guestfd; |
59 | @@ -XXX,XX +XXX,XX @@ static void complete_collecting_data(Flash *s) | 49 | ret = arm_gdb_syscall(cpu, arm_semi_open_cb, "open,%s,%x,1a4", arg0, |
60 | 50 | - (int)arg2+1, gdb_open_modeflags[arg1]); | |
61 | s->state = STATE_IDLE; | 51 | + (int)arg2 + 1, gdb_open_modeflags[arg1]); |
62 | 52 | } else { | |
63 | + trace_m25p80_complete_collecting(s, s->cmd_in_progress, n, s->ear, | 53 | ret = set_swi_errno(env, open(s, open_modeflags[arg1], 0644)); |
64 | + s->cur_addr); | 54 | if (ret == (uint32_t)-1) { |
65 | + | 55 | @@ -XXX,XX +XXX,XX @@ target_ulong do_arm_semihosting(CPUARMState *env) |
66 | switch (s->cmd_in_progress) { | 56 | GET_ARG(1); |
67 | case DPP: | 57 | if (use_gdb_syscalls()) { |
68 | case QPP: | 58 | ret = arm_gdb_syscall(cpu, arm_semi_cb, "unlink,%s", |
69 | @@ -XXX,XX +XXX,XX @@ static void reset_memory(Flash *s) | 59 | - arg0, (int)arg1+1); |
70 | break; | 60 | + arg0, (int)arg1 + 1); |
71 | } | 61 | } else { |
72 | 62 | s = lock_user_string(arg0); | |
73 | - DB_PRINT_L(0, "Reset done.\n"); | 63 | if (!s) { |
74 | + trace_m25p80_reset_done(s); | 64 | @@ -XXX,XX +XXX,XX @@ target_ulong do_arm_semihosting(CPUARMState *env) |
65 | GET_ARG(3); | ||
66 | if (use_gdb_syscalls()) { | ||
67 | return arm_gdb_syscall(cpu, arm_semi_cb, "rename,%s,%s", | ||
68 | - arg0, (int)arg1+1, arg2, (int)arg3+1); | ||
69 | + arg0, (int)arg1 + 1, arg2, (int)arg3 + 1); | ||
70 | } else { | ||
71 | char *s2; | ||
72 | s = lock_user_string(arg0); | ||
73 | @@ -XXX,XX +XXX,XX @@ target_ulong do_arm_semihosting(CPUARMState *env) | ||
74 | GET_ARG(1); | ||
75 | if (use_gdb_syscalls()) { | ||
76 | return arm_gdb_syscall(cpu, arm_semi_cb, "system,%s", | ||
77 | - arg0, (int)arg1+1); | ||
78 | + arg0, (int)arg1 + 1); | ||
79 | } else { | ||
80 | s = lock_user_string(arg0); | ||
81 | if (!s) { | ||
82 | diff --git a/target/arm/helper.c b/target/arm/helper.c | ||
83 | index XXXXXXX..XXXXXXX 100644 | ||
84 | --- a/target/arm/helper.c | ||
85 | +++ b/target/arm/helper.c | ||
86 | @@ -XXX,XX +XXX,XX @@ uint32_t HELPER(usad8)(uint32_t a, uint32_t b) | ||
87 | uint32_t sum; | ||
88 | sum = do_usad(a, b); | ||
89 | sum += do_usad(a >> 8, b >> 8); | ||
90 | - sum += do_usad(a >> 16, b >>16); | ||
91 | + sum += do_usad(a >> 16, b >> 16); | ||
92 | sum += do_usad(a >> 24, b >> 24); | ||
93 | return sum; | ||
75 | } | 94 | } |
76 | |||
77 | static void decode_fast_read_cmd(Flash *s) | ||
78 | @@ -XXX,XX +XXX,XX @@ static void decode_qio_read_cmd(Flash *s) | ||
79 | |||
80 | static void decode_new_cmd(Flash *s, uint32_t value) | ||
81 | { | ||
82 | - s->cmd_in_progress = value; | ||
83 | int i; | ||
84 | - DB_PRINT_L(0, "decoded new command:%x\n", value); | ||
85 | + | ||
86 | + s->cmd_in_progress = value; | ||
87 | + trace_m25p80_command_decoded(s, value); | ||
88 | |||
89 | if (value != RESET_MEMORY) { | ||
90 | s->reset_enable = false; | ||
91 | @@ -XXX,XX +XXX,XX @@ static void decode_new_cmd(Flash *s, uint32_t value) | ||
92 | break; | ||
93 | |||
94 | case JEDEC_READ: | ||
95 | - DB_PRINT_L(0, "populated jedec code\n"); | ||
96 | + trace_m25p80_populated_jedec(s); | ||
97 | for (i = 0; i < s->pi->id_len; i++) { | ||
98 | s->data[i] = s->pi->id[i]; | ||
99 | } | ||
100 | @@ -XXX,XX +XXX,XX @@ static void decode_new_cmd(Flash *s, uint32_t value) | ||
101 | case BULK_ERASE_60: | ||
102 | case BULK_ERASE: | ||
103 | if (s->write_enable) { | ||
104 | - DB_PRINT_L(0, "chip erase\n"); | ||
105 | + trace_m25p80_chip_erase(s); | ||
106 | flash_erase(s, 0, BULK_ERASE); | ||
107 | } else { | ||
108 | qemu_log_mask(LOG_GUEST_ERROR, "M25P80: chip erase with write " | ||
109 | @@ -XXX,XX +XXX,XX @@ static int m25p80_cs(SSISlave *ss, bool select) | ||
110 | s->data_read_loop = false; | ||
111 | } | ||
112 | |||
113 | - DB_PRINT_L(0, "%sselect\n", select ? "de" : ""); | ||
114 | + trace_m25p80_select(s, select ? "de" : ""); | ||
115 | |||
116 | return 0; | ||
117 | } | ||
118 | @@ -XXX,XX +XXX,XX @@ static uint32_t m25p80_transfer8(SSISlave *ss, uint32_t tx) | ||
119 | Flash *s = M25P80(ss); | ||
120 | uint32_t r = 0; | ||
121 | |||
122 | + trace_m25p80_transfer(s, s->state, s->len, s->needed_bytes, s->pos, | ||
123 | + s->cur_addr, (uint8_t)tx); | ||
124 | + | ||
125 | switch (s->state) { | ||
126 | |||
127 | case STATE_PAGE_PROGRAM: | ||
128 | - DB_PRINT_L(1, "page program cur_addr=%#" PRIx32 " data=%" PRIx8 "\n", | ||
129 | - s->cur_addr, (uint8_t)tx); | ||
130 | + trace_m25p80_page_program(s, s->cur_addr, (uint8_t)tx); | ||
131 | flash_write8(s, s->cur_addr, (uint8_t)tx); | ||
132 | s->cur_addr = (s->cur_addr + 1) & (s->size - 1); | ||
133 | break; | ||
134 | |||
135 | case STATE_READ: | ||
136 | r = s->storage[s->cur_addr]; | ||
137 | - DB_PRINT_L(1, "READ 0x%" PRIx32 "=%" PRIx8 "\n", s->cur_addr, | ||
138 | - (uint8_t)r); | ||
139 | + trace_m25p80_read_byte(s, s->cur_addr, (uint8_t)r); | ||
140 | s->cur_addr = (s->cur_addr + 1) & (s->size - 1); | ||
141 | break; | ||
142 | |||
143 | @@ -XXX,XX +XXX,XX @@ static uint32_t m25p80_transfer8(SSISlave *ss, uint32_t tx) | ||
144 | } | ||
145 | |||
146 | r = s->data[s->pos]; | ||
147 | + trace_m25p80_read_data(s, s->pos, (uint8_t)r); | ||
148 | s->pos++; | ||
149 | if (s->pos == s->len) { | ||
150 | s->pos = 0; | ||
151 | @@ -XXX,XX +XXX,XX @@ static void m25p80_realize(SSISlave *ss, Error **errp) | ||
152 | return; | ||
153 | } | ||
154 | |||
155 | - DB_PRINT_L(0, "Binding to IF_MTD drive\n"); | ||
156 | + trace_m25p80_binding(s); | ||
157 | s->storage = blk_blockalign(s->blk, s->size); | ||
158 | |||
159 | if (blk_pread(s->blk, 0, s->storage, s->size) != s->size) { | ||
160 | @@ -XXX,XX +XXX,XX @@ static void m25p80_realize(SSISlave *ss, Error **errp) | ||
161 | return; | ||
162 | } | ||
163 | } else { | ||
164 | - DB_PRINT_L(0, "No BDRV - binding to RAM\n"); | ||
165 | + trace_m25p80_binding_no_bdrv(s); | ||
166 | s->storage = blk_blockalign(NULL, s->size); | ||
167 | memset(s->storage, 0xFF, s->size); | ||
168 | } | ||
169 | diff --git a/hw/block/trace-events b/hw/block/trace-events | ||
170 | index XXXXXXX..XXXXXXX 100644 | ||
171 | --- a/hw/block/trace-events | ||
172 | +++ b/hw/block/trace-events | ||
173 | @@ -XXX,XX +XXX,XX @@ xen_block_blockdev_add(char *str) "%s" | ||
174 | xen_block_blockdev_del(const char *node_name) "%s" | ||
175 | xen_block_device_create(unsigned int number) "%u" | ||
176 | xen_block_device_destroy(unsigned int number) "%u" | ||
177 | + | ||
178 | +# m25p80.c | ||
179 | +m25p80_flash_erase(void *s, int offset, uint32_t len) "[%p] offset = 0x%"PRIx32", len = %u" | ||
180 | +m25p80_programming_zero_to_one(void *s, uint32_t addr, uint8_t prev, uint8_t data) "[%p] programming zero to one! addr=0x%"PRIx32" 0x%"PRIx8" -> 0x%"PRIx8 | ||
181 | +m25p80_reset_done(void *s) "[%p] Reset done." | ||
182 | +m25p80_command_decoded(void *s, uint32_t cmd) "[%p] new command:0x%"PRIx32 | ||
183 | +m25p80_complete_collecting(void *s, uint32_t cmd, int n, uint8_t ear, uint32_t cur_addr) "[%p] decode cmd: 0x%"PRIx32" len %d ear 0x%"PRIx8" addr 0x%"PRIx32 | ||
184 | +m25p80_populated_jedec(void *s) "[%p] populated jedec code" | ||
185 | +m25p80_chip_erase(void *s) "[%p] chip erase" | ||
186 | +m25p80_select(void *s, const char *what) "[%p] %sselect" | ||
187 | +m25p80_page_program(void *s, uint32_t addr, uint8_t tx) "[%p] page program cur_addr=0x%"PRIx32" data=0x%"PRIx8 | ||
188 | +m25p80_transfer(void *s, uint8_t state, uint32_t len, uint8_t needed, uint32_t pos, uint32_t cur_addr, uint8_t t) "[%p] Transfer state 0x%"PRIx8" len 0x%"PRIx32" needed 0x%"PRIx8" pos 0x%"PRIx32" addr 0x%"PRIx32" tx 0x%"PRIx8 | ||
189 | +m25p80_read_byte(void *s, uint32_t addr, uint8_t v) "[%p] Read byte 0x%"PRIx32"=0x%"PRIx8 | ||
190 | +m25p80_read_data(void *s, uint32_t pos, uint8_t v) "[%p] Read data 0x%"PRIx32"=0x%"PRIx8 | ||
191 | +m25p80_binding(void *s) "[%p] Binding to IF_MTD drive" | ||
192 | +m25p80_binding_no_bdrv(void *s) "[%p] No BDRV - binding to RAM" | ||
193 | -- | 95 | -- |
194 | 2.20.1 | 96 | 2.20.1 |
195 | 97 | ||
196 | 98 | diff view generated by jsdifflib |
1 | From: Guenter Roeck <linux@roeck-us.net> | 1 | From: Xinhao Zhang <zhangxinhao1@huawei.com> |
---|---|---|---|
2 | 2 | ||
3 | With this patch, the USB controllers on 'sabrelite' are detected | 3 | Fix code style. Don't use '#' flag of printf format ('%#') in |
4 | and can be used to boot the system. | 4 | format strings, use '0x' prefix instead |
5 | 5 | ||
6 | Signed-off-by: Guenter Roeck <linux@roeck-us.net> | 6 | Signed-off-by: Xinhao Zhang <zhangxinhao1@huawei.com> |
7 | Message-id: 20200313014551.12554-6-linux@roeck-us.net | 7 | Signed-off-by: Kai Deng <dengkai1@huawei.com> |
8 | Message-id: 20201103114529.638233-2-zhangxinhao1@huawei.com | ||
8 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> | 9 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> |
9 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | 10 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
10 | --- | 11 | --- |
11 | include/hw/arm/fsl-imx6.h | 6 ++++++ | 12 | target/arm/translate-a64.c | 4 ++-- |
12 | hw/arm/fsl-imx6.c | 36 ++++++++++++++++++++++++++++++++++++ | 13 | 1 file changed, 2 insertions(+), 2 deletions(-) |
13 | 2 files changed, 42 insertions(+) | ||
14 | 14 | ||
15 | diff --git a/include/hw/arm/fsl-imx6.h b/include/hw/arm/fsl-imx6.h | 15 | diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c |
16 | index XXXXXXX..XXXXXXX 100644 | 16 | index XXXXXXX..XXXXXXX 100644 |
17 | --- a/include/hw/arm/fsl-imx6.h | 17 | --- a/target/arm/translate-a64.c |
18 | +++ b/include/hw/arm/fsl-imx6.h | 18 | +++ b/target/arm/translate-a64.c |
19 | @@ -XXX,XX +XXX,XX @@ | 19 | @@ -XXX,XX +XXX,XX @@ static void disas_simd_three_reg_same_fp16(DisasContext *s, uint32_t insn) |
20 | #include "hw/sd/sdhci.h" | 20 | gen_helper_advsimd_acgt_f16(tcg_res, tcg_op1, tcg_op2, fpst); |
21 | #include "hw/ssi/imx_spi.h" | 21 | break; |
22 | #include "hw/net/imx_fec.h" | 22 | default: |
23 | +#include "hw/usb/chipidea.h" | 23 | - fprintf(stderr, "%s: insn %#04x, fpop %#2x @ %#" PRIx64 "\n", |
24 | +#include "hw/usb/imx-usb-phy.h" | 24 | + fprintf(stderr, "%s: insn 0x%04x, fpop 0x%2x @ 0x%" PRIx64 "\n", |
25 | #include "exec/memory.h" | 25 | __func__, insn, fpopcode, s->pc_curr); |
26 | #include "cpu.h" | 26 | g_assert_not_reached(); |
27 | 27 | } | |
28 | @@ -XXX,XX +XXX,XX @@ | 28 | @@ -XXX,XX +XXX,XX @@ static void disas_simd_two_reg_misc_fp16(DisasContext *s, uint32_t insn) |
29 | #define FSL_IMX6_NUM_ESDHCS 4 | 29 | case 0x7f: /* FSQRT (vector) */ |
30 | #define FSL_IMX6_NUM_ECSPIS 5 | 30 | break; |
31 | #define FSL_IMX6_NUM_WDTS 2 | 31 | default: |
32 | +#define FSL_IMX6_NUM_USB_PHYS 2 | 32 | - fprintf(stderr, "%s: insn %#04x fpop %#2x\n", __func__, insn, fpop); |
33 | +#define FSL_IMX6_NUM_USBS 4 | 33 | + fprintf(stderr, "%s: insn 0x%04x fpop 0x%2x\n", __func__, insn, fpop); |
34 | 34 | g_assert_not_reached(); | |
35 | typedef struct FslIMX6State { | ||
36 | /*< private >*/ | ||
37 | @@ -XXX,XX +XXX,XX @@ typedef struct FslIMX6State { | ||
38 | SDHCIState esdhc[FSL_IMX6_NUM_ESDHCS]; | ||
39 | IMXSPIState spi[FSL_IMX6_NUM_ECSPIS]; | ||
40 | IMX2WdtState wdt[FSL_IMX6_NUM_WDTS]; | ||
41 | + IMXUSBPHYState usbphy[FSL_IMX6_NUM_USB_PHYS]; | ||
42 | + ChipideaState usb[FSL_IMX6_NUM_USBS]; | ||
43 | IMXFECState eth; | ||
44 | MemoryRegion rom; | ||
45 | MemoryRegion caam; | ||
46 | diff --git a/hw/arm/fsl-imx6.c b/hw/arm/fsl-imx6.c | ||
47 | index XXXXXXX..XXXXXXX 100644 | ||
48 | --- a/hw/arm/fsl-imx6.c | ||
49 | +++ b/hw/arm/fsl-imx6.c | ||
50 | @@ -XXX,XX +XXX,XX @@ | ||
51 | #include "qemu/osdep.h" | ||
52 | #include "qapi/error.h" | ||
53 | #include "hw/arm/fsl-imx6.h" | ||
54 | +#include "hw/usb/imx-usb-phy.h" | ||
55 | #include "hw/boards.h" | ||
56 | #include "hw/qdev-properties.h" | ||
57 | #include "sysemu/sysemu.h" | ||
58 | @@ -XXX,XX +XXX,XX @@ static void fsl_imx6_init(Object *obj) | ||
59 | TYPE_IMX_USDHC); | ||
60 | } | 35 | } |
61 | 36 | ||
62 | + for (i = 0; i < FSL_IMX6_NUM_USB_PHYS; i++) { | ||
63 | + snprintf(name, NAME_SIZE, "usbphy%d", i); | ||
64 | + sysbus_init_child_obj(obj, name, &s->usbphy[i], sizeof(s->usbphy[i]), | ||
65 | + TYPE_IMX_USBPHY); | ||
66 | + } | ||
67 | + for (i = 0; i < FSL_IMX6_NUM_USBS; i++) { | ||
68 | + snprintf(name, NAME_SIZE, "usb%d", i); | ||
69 | + sysbus_init_child_obj(obj, name, &s->usb[i], sizeof(s->usb[i]), | ||
70 | + TYPE_CHIPIDEA); | ||
71 | + } | ||
72 | + | ||
73 | for (i = 0; i < FSL_IMX6_NUM_ECSPIS; i++) { | ||
74 | snprintf(name, NAME_SIZE, "spi%d", i + 1); | ||
75 | sysbus_init_child_obj(obj, name, &s->spi[i], sizeof(s->spi[i]), | ||
76 | @@ -XXX,XX +XXX,XX @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp) | ||
77 | esdhc_table[i].irq)); | ||
78 | } | ||
79 | |||
80 | + /* USB */ | ||
81 | + for (i = 0; i < FSL_IMX6_NUM_USB_PHYS; i++) { | ||
82 | + object_property_set_bool(OBJECT(&s->usbphy[i]), true, "realized", | ||
83 | + &error_abort); | ||
84 | + sysbus_mmio_map(SYS_BUS_DEVICE(&s->usbphy[i]), 0, | ||
85 | + FSL_IMX6_USBPHY1_ADDR + i * 0x1000); | ||
86 | + } | ||
87 | + for (i = 0; i < FSL_IMX6_NUM_USBS; i++) { | ||
88 | + static const int FSL_IMX6_USBn_IRQ[] = { | ||
89 | + FSL_IMX6_USB_OTG_IRQ, | ||
90 | + FSL_IMX6_USB_HOST1_IRQ, | ||
91 | + FSL_IMX6_USB_HOST2_IRQ, | ||
92 | + FSL_IMX6_USB_HOST3_IRQ, | ||
93 | + }; | ||
94 | + | ||
95 | + object_property_set_bool(OBJECT(&s->usb[i]), true, "realized", | ||
96 | + &error_abort); | ||
97 | + sysbus_mmio_map(SYS_BUS_DEVICE(&s->usb[i]), 0, | ||
98 | + FSL_IMX6_USBOH3_USB_ADDR + i * 0x200); | ||
99 | + sysbus_connect_irq(SYS_BUS_DEVICE(&s->usb[i]), 0, | ||
100 | + qdev_get_gpio_in(DEVICE(&s->a9mpcore), | ||
101 | + FSL_IMX6_USBn_IRQ[i])); | ||
102 | + } | ||
103 | + | ||
104 | /* Initialize all ECSPI */ | ||
105 | for (i = 0; i < FSL_IMX6_NUM_ECSPIS; i++) { | ||
106 | static const struct { | ||
107 | -- | 37 | -- |
108 | 2.20.1 | 38 | 2.20.1 |
109 | 39 | ||
110 | 40 | diff view generated by jsdifflib |
New patch | |||
---|---|---|---|
1 | From: Xinhao Zhang <zhangxinhao1@huawei.com> | ||
1 | 2 | ||
3 | Fix code style. Space required before the open parenthesis '('. | ||
4 | |||
5 | Signed-off-by: Xinhao Zhang <zhangxinhao1@huawei.com> | ||
6 | Signed-off-by: Kai Deng <dengkai1@huawei.com> | ||
7 | Message-id: 20201103114529.638233-3-zhangxinhao1@huawei.com | ||
8 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> | ||
9 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | ||
10 | --- | ||
11 | target/arm/translate.c | 2 +- | ||
12 | 1 file changed, 1 insertion(+), 1 deletion(-) | ||
13 | |||
14 | diff --git a/target/arm/translate.c b/target/arm/translate.c | ||
15 | index XXXXXXX..XXXXXXX 100644 | ||
16 | --- a/target/arm/translate.c | ||
17 | +++ b/target/arm/translate.c | ||
18 | @@ -XXX,XX +XXX,XX @@ static void arm_tr_tb_stop(DisasContextBase *dcbase, CPUState *cpu) | ||
19 | - Hardware watchpoints. | ||
20 | Hardware breakpoints have already been handled and skip this code. | ||
21 | */ | ||
22 | - switch(dc->base.is_jmp) { | ||
23 | + switch (dc->base.is_jmp) { | ||
24 | case DISAS_NEXT: | ||
25 | case DISAS_TOO_MANY: | ||
26 | gen_goto_tb(dc, 1, dc->base.pc_next); | ||
27 | -- | ||
28 | 2.20.1 | ||
29 | |||
30 | diff view generated by jsdifflib |
New patch | |||
---|---|---|---|
1 | From: Alex Bennée <alex.bennee@linaro.org> | ||
1 | 2 | ||
3 | We should at least document what this machine is about. | ||
4 | |||
5 | Reviewed-by: Graeme Gregory <graeme@nuviainc.com> | ||
6 | Signed-off-by: Alex Bennée <alex.bennee@linaro.org> | ||
7 | Message-id: 20201104165254.24822-1-alex.bennee@linaro.org | ||
8 | Cc: Leif Lindholm <leif@nuviainc.com> | ||
9 | Cc: Shashi Mallela <shashi.mallela@linaro.org> | ||
10 | Signed-off-by: Alex Bennée <alex.bennee@linaro.org> | ||
11 | [PMM: fixed filename mismatch] | ||
12 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | ||
13 | --- | ||
14 | docs/system/arm/sbsa.rst | 32 ++++++++++++++++++++++++++++++++ | ||
15 | docs/system/target-arm.rst | 1 + | ||
16 | 2 files changed, 33 insertions(+) | ||
17 | create mode 100644 docs/system/arm/sbsa.rst | ||
18 | |||
19 | diff --git a/docs/system/arm/sbsa.rst b/docs/system/arm/sbsa.rst | ||
20 | new file mode 100644 | ||
21 | index XXXXXXX..XXXXXXX | ||
22 | --- /dev/null | ||
23 | +++ b/docs/system/arm/sbsa.rst | ||
24 | @@ -XXX,XX +XXX,XX @@ | ||
25 | +Arm Server Base System Architecture Reference board (``sbsa-ref``) | ||
26 | +================================================================== | ||
27 | + | ||
28 | +While the `virt` board is a generic board platform that doesn't match | ||
29 | +any real hardware the `sbsa-ref` board intends to look like real | ||
30 | +hardware. The `Server Base System Architecture | ||
31 | +<https://developer.arm.com/documentation/den0029/latest>` defines a | ||
32 | +minimum base line of hardware support and importantly how the firmware | ||
33 | +reports that to any operating system. It is a static system that | ||
34 | +reports a very minimal DT to the firmware for non-discoverable | ||
35 | +information about components affected by the qemu command line (i.e. | ||
36 | +cpus and memory). As a result it must have a firmware specifically | ||
37 | +built to expect a certain hardware layout (as you would in a real | ||
38 | +machine). | ||
39 | + | ||
40 | +It is intended to be a machine for developing firmware and testing | ||
41 | +standards compliance with operating systems. | ||
42 | + | ||
43 | +Supported devices | ||
44 | +""""""""""""""""" | ||
45 | + | ||
46 | +The sbsa-ref board supports: | ||
47 | + | ||
48 | + - A configurable number of AArch64 CPUs | ||
49 | + - GIC version 3 | ||
50 | + - System bus AHCI controller | ||
51 | + - System bus EHCI controller | ||
52 | + - CDROM and hard disc on AHCI bus | ||
53 | + - E1000E ethernet card on PCIe bus | ||
54 | + - VGA display adaptor on PCIe bus | ||
55 | + - A generic SBSA watchdog device | ||
56 | + | ||
57 | diff --git a/docs/system/target-arm.rst b/docs/system/target-arm.rst | ||
58 | index XXXXXXX..XXXXXXX 100644 | ||
59 | --- a/docs/system/target-arm.rst | ||
60 | +++ b/docs/system/target-arm.rst | ||
61 | @@ -XXX,XX +XXX,XX @@ undocumented; you can get a complete list by running | ||
62 | arm/mps2 | ||
63 | arm/musca | ||
64 | arm/realview | ||
65 | + arm/sbsa | ||
66 | arm/versatile | ||
67 | arm/vexpress | ||
68 | arm/aspeed | ||
69 | -- | ||
70 | 2.20.1 | ||
71 | |||
72 | diff view generated by jsdifflib |
1 | From: Chen Qun <kuhn.chenqun@huawei.com> | 1 | From: Philippe Mathieu-Daudé <philmd@redhat.com> |
---|---|---|---|
2 | 2 | ||
3 | The current code causes clang static code analyzer generate warning: | 3 | When using a Cortex-A15, the Virt machine does not use any |
4 | hw/net/imx_fec.c:858:9: warning: Value stored to 'value' is never read | 4 | MPCore peripherals. Remove the dependency. |
5 | value = value & 0x0000000f; | ||
6 | ^ ~~~~~~~~~~~~~~~~~~ | ||
7 | hw/net/imx_fec.c:864:9: warning: Value stored to 'value' is never read | ||
8 | value = value & 0x000000fd; | ||
9 | ^ ~~~~~~~~~~~~~~~~~~ | ||
10 | 5 | ||
11 | According to the definition of the function, the two “value” assignments | 6 | Fixes: 7951c7b7c05 ("hw/arm: Express dependencies of the virt machine with Kconfig") |
12 | should be written to registers. | 7 | Reported-by: Miroslav Rezanina <mrezanin@redhat.com> |
13 | 8 | Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> | |
14 | Reported-by: Euler Robot <euler.robot@huawei.com> | 9 | Message-id: 20201107114852.271922-1-philmd@redhat.com |
15 | Signed-off-by: Chen Qun <kuhn.chenqun@huawei.com> | ||
16 | Message-id: 20200313123242.13236-1-kuhn.chenqun@huawei.com | ||
17 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> | 10 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> |
18 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | 11 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
19 | --- | 12 | --- |
20 | hw/net/imx_fec.c | 6 ++++-- | 13 | hw/arm/Kconfig | 1 - |
21 | 1 file changed, 4 insertions(+), 2 deletions(-) | 14 | 1 file changed, 1 deletion(-) |
22 | 15 | ||
23 | diff --git a/hw/net/imx_fec.c b/hw/net/imx_fec.c | 16 | diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig |
24 | index XXXXXXX..XXXXXXX 100644 | 17 | index XXXXXXX..XXXXXXX 100644 |
25 | --- a/hw/net/imx_fec.c | 18 | --- a/hw/arm/Kconfig |
26 | +++ b/hw/net/imx_fec.c | 19 | +++ b/hw/arm/Kconfig |
27 | @@ -XXX,XX +XXX,XX @@ static void imx_enet_write(IMXFECState *s, uint32_t index, uint32_t value) | 20 | @@ -XXX,XX +XXX,XX @@ config ARM_VIRT |
28 | break; | 21 | imply VFIO_PLATFORM |
29 | case ENET_TGSR: | 22 | imply VFIO_XGMAC |
30 | /* implement clear timer flag */ | 23 | imply TPM_TIS_SYSBUS |
31 | - value = value & 0x0000000f; | 24 | - select A15MPCORE |
32 | + s->regs[index] &= ~(value & 0x0000000f); /* all bits W1C */ | 25 | select ACPI |
33 | break; | 26 | select ARM_SMMUV3 |
34 | case ENET_TCSR0: | 27 | select GPIO_KEY |
35 | case ENET_TCSR1: | ||
36 | case ENET_TCSR2: | ||
37 | case ENET_TCSR3: | ||
38 | - value = value & 0x000000fd; | ||
39 | + s->regs[index] &= ~(value & 0x00000080); /* W1C bits */ | ||
40 | + s->regs[index] &= ~0x0000007d; /* writable fields */ | ||
41 | + s->regs[index] |= (value & 0x0000007d); | ||
42 | break; | ||
43 | case ENET_TCCR0: | ||
44 | case ENET_TCCR1: | ||
45 | -- | 28 | -- |
46 | 2.20.1 | 29 | 2.20.1 |
47 | 30 | ||
48 | 31 | diff view generated by jsdifflib |
1 | From: Guenter Roeck <linux@roeck-us.net> | 1 | From: Richard Henderson <richard.henderson@linaro.org> |
---|---|---|---|
2 | 2 | ||
3 | PXA255 does not support a USB OHCI controller, so don't wire it up. | 3 | The helper function did not get updated when we reorganized |
4 | the vector register file for SVE. Since then, the neon dregs | ||
5 | are non-sequential and cannot be simply indexed. | ||
4 | 6 | ||
5 | Signed-off-by: Guenter Roeck <linux@roeck-us.net> | 7 | At the same time, make the helper function operate on 64-bit |
6 | Message-id: 20200313160215.28155-1-linux@roeck-us.net | 8 | quantities so that we do not have to call it twice. |
9 | |||
10 | Fixes: c39c2b9043e | ||
11 | Reported-by: Ard Biesheuvel <ardb@kernel.org> | ||
12 | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> | ||
13 | [PMM: use aa32_vfp_dreg() rather than opencoding] | ||
14 | Message-id: 20201105171126.88014-1-richard.henderson@linaro.org | ||
7 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> | 15 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> |
8 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | 16 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
9 | --- | 17 | --- |
10 | hw/arm/pxa2xx.c | 3 --- | 18 | target/arm/helper.h | 2 +- |
11 | 1 file changed, 3 deletions(-) | 19 | target/arm/op_helper.c | 23 +++++++++-------- |
20 | target/arm/translate-neon.c.inc | 44 +++++++++++---------------------- | ||
21 | 3 files changed, 29 insertions(+), 40 deletions(-) | ||
12 | 22 | ||
13 | diff --git a/hw/arm/pxa2xx.c b/hw/arm/pxa2xx.c | 23 | diff --git a/target/arm/helper.h b/target/arm/helper.h |
14 | index XXXXXXX..XXXXXXX 100644 | 24 | index XXXXXXX..XXXXXXX 100644 |
15 | --- a/hw/arm/pxa2xx.c | 25 | --- a/target/arm/helper.h |
16 | +++ b/hw/arm/pxa2xx.c | 26 | +++ b/target/arm/helper.h |
17 | @@ -XXX,XX +XXX,XX @@ PXA2xxState *pxa255_init(MemoryRegion *address_space, unsigned int sdram_size) | 27 | @@ -XXX,XX +XXX,XX @@ DEF_HELPER_FLAGS_2(rsqrte_f32, TCG_CALL_NO_RWG, f32, f32, ptr) |
18 | s->ssp[i] = (SSIBus *)qdev_get_child_bus(dev, "ssi"); | 28 | DEF_HELPER_FLAGS_2(rsqrte_f64, TCG_CALL_NO_RWG, f64, f64, ptr) |
29 | DEF_HELPER_FLAGS_1(recpe_u32, TCG_CALL_NO_RWG, i32, i32) | ||
30 | DEF_HELPER_FLAGS_1(rsqrte_u32, TCG_CALL_NO_RWG, i32, i32) | ||
31 | -DEF_HELPER_FLAGS_4(neon_tbl, TCG_CALL_NO_RWG, i32, i32, i32, ptr, i32) | ||
32 | +DEF_HELPER_FLAGS_4(neon_tbl, TCG_CALL_NO_RWG, i64, env, i32, i64, i64) | ||
33 | |||
34 | DEF_HELPER_3(shl_cc, i32, env, i32, i32) | ||
35 | DEF_HELPER_3(shr_cc, i32, env, i32, i32) | ||
36 | diff --git a/target/arm/op_helper.c b/target/arm/op_helper.c | ||
37 | index XXXXXXX..XXXXXXX 100644 | ||
38 | --- a/target/arm/op_helper.c | ||
39 | +++ b/target/arm/op_helper.c | ||
40 | @@ -XXX,XX +XXX,XX @@ void raise_exception_ra(CPUARMState *env, uint32_t excp, uint32_t syndrome, | ||
41 | cpu_loop_exit_restore(cs, ra); | ||
42 | } | ||
43 | |||
44 | -uint32_t HELPER(neon_tbl)(uint32_t ireg, uint32_t def, void *vn, | ||
45 | - uint32_t maxindex) | ||
46 | +uint64_t HELPER(neon_tbl)(CPUARMState *env, uint32_t desc, | ||
47 | + uint64_t ireg, uint64_t def) | ||
48 | { | ||
49 | - uint32_t val, shift; | ||
50 | - uint64_t *table = vn; | ||
51 | + uint64_t tmp, val = 0; | ||
52 | + uint32_t maxindex = ((desc & 3) + 1) * 8; | ||
53 | + uint32_t base_reg = desc >> 2; | ||
54 | + uint32_t shift, index, reg; | ||
55 | |||
56 | - val = 0; | ||
57 | - for (shift = 0; shift < 32; shift += 8) { | ||
58 | - uint32_t index = (ireg >> shift) & 0xff; | ||
59 | + for (shift = 0; shift < 64; shift += 8) { | ||
60 | + index = (ireg >> shift) & 0xff; | ||
61 | if (index < maxindex) { | ||
62 | - uint32_t tmp = (table[index >> 3] >> ((index & 7) << 3)) & 0xff; | ||
63 | - val |= tmp << shift; | ||
64 | + reg = base_reg + (index >> 3); | ||
65 | + tmp = *aa32_vfp_dreg(env, reg); | ||
66 | + tmp = ((tmp >> ((index & 7) << 3)) & 0xff) << shift; | ||
67 | } else { | ||
68 | - val |= def & (0xff << shift); | ||
69 | + tmp = def & (0xffull << shift); | ||
70 | } | ||
71 | + val |= tmp; | ||
19 | } | 72 | } |
20 | 73 | return val; | |
21 | - sysbus_create_simple("sysbus-ohci", 0x4c000000, | 74 | } |
22 | - qdev_get_gpio_in(s->pic, PXA2XX_PIC_USBH1)); | 75 | diff --git a/target/arm/translate-neon.c.inc b/target/arm/translate-neon.c.inc |
23 | - | 76 | index XXXXXXX..XXXXXXX 100644 |
24 | s->pcmcia[0] = pxa2xx_pcmcia_init(address_space, 0x20000000); | 77 | --- a/target/arm/translate-neon.c.inc |
25 | s->pcmcia[1] = pxa2xx_pcmcia_init(address_space, 0x30000000); | 78 | +++ b/target/arm/translate-neon.c.inc |
79 | @@ -XXX,XX +XXX,XX @@ static bool trans_VEXT(DisasContext *s, arg_VEXT *a) | ||
80 | |||
81 | static bool trans_VTBL(DisasContext *s, arg_VTBL *a) | ||
82 | { | ||
83 | - int n; | ||
84 | - TCGv_i32 tmp, tmp2, tmp3, tmp4; | ||
85 | - TCGv_ptr ptr1; | ||
86 | + TCGv_i64 val, def; | ||
87 | + TCGv_i32 desc; | ||
88 | |||
89 | if (!arm_dc_feature(s, ARM_FEATURE_NEON)) { | ||
90 | return false; | ||
91 | @@ -XXX,XX +XXX,XX @@ static bool trans_VTBL(DisasContext *s, arg_VTBL *a) | ||
92 | return true; | ||
93 | } | ||
94 | |||
95 | - n = a->len + 1; | ||
96 | - if ((a->vn + n) > 32) { | ||
97 | + if ((a->vn + a->len + 1) > 32) { | ||
98 | /* | ||
99 | * This is UNPREDICTABLE; we choose to UNDEF to avoid the | ||
100 | * helper function running off the end of the register file. | ||
101 | */ | ||
102 | return false; | ||
103 | } | ||
104 | - n <<= 3; | ||
105 | - tmp = tcg_temp_new_i32(); | ||
106 | - if (a->op) { | ||
107 | - read_neon_element32(tmp, a->vd, 0, MO_32); | ||
108 | - } else { | ||
109 | - tcg_gen_movi_i32(tmp, 0); | ||
110 | - } | ||
111 | - tmp2 = tcg_temp_new_i32(); | ||
112 | - read_neon_element32(tmp2, a->vm, 0, MO_32); | ||
113 | - ptr1 = vfp_reg_ptr(true, a->vn); | ||
114 | - tmp4 = tcg_const_i32(n); | ||
115 | - gen_helper_neon_tbl(tmp2, tmp2, tmp, ptr1, tmp4); | ||
116 | |||
117 | + desc = tcg_const_i32((a->vn << 2) | a->len); | ||
118 | + def = tcg_temp_new_i64(); | ||
119 | if (a->op) { | ||
120 | - read_neon_element32(tmp, a->vd, 1, MO_32); | ||
121 | + read_neon_element64(def, a->vd, 0, MO_64); | ||
122 | } else { | ||
123 | - tcg_gen_movi_i32(tmp, 0); | ||
124 | + tcg_gen_movi_i64(def, 0); | ||
125 | } | ||
126 | - tmp3 = tcg_temp_new_i32(); | ||
127 | - read_neon_element32(tmp3, a->vm, 1, MO_32); | ||
128 | - gen_helper_neon_tbl(tmp3, tmp3, tmp, ptr1, tmp4); | ||
129 | - tcg_temp_free_i32(tmp); | ||
130 | - tcg_temp_free_i32(tmp4); | ||
131 | - tcg_temp_free_ptr(ptr1); | ||
132 | + val = tcg_temp_new_i64(); | ||
133 | + read_neon_element64(val, a->vm, 0, MO_64); | ||
134 | |||
135 | - write_neon_element32(tmp2, a->vd, 0, MO_32); | ||
136 | - write_neon_element32(tmp3, a->vd, 1, MO_32); | ||
137 | - tcg_temp_free_i32(tmp2); | ||
138 | - tcg_temp_free_i32(tmp3); | ||
139 | + gen_helper_neon_tbl(val, cpu_env, desc, val, def); | ||
140 | + write_neon_element64(val, a->vd, 0, MO_64); | ||
141 | + | ||
142 | + tcg_temp_free_i64(def); | ||
143 | + tcg_temp_free_i64(val); | ||
144 | + tcg_temp_free_i32(desc); | ||
145 | return true; | ||
146 | } | ||
26 | 147 | ||
27 | -- | 148 | -- |
28 | 2.20.1 | 149 | 2.20.1 |
29 | 150 | ||
30 | 151 | diff view generated by jsdifflib |
1 | From: Guenter Roeck <linux@roeck-us.net> | 1 | From: Philippe Mathieu-Daudé <f4bug@amsat.org> |
---|---|---|---|
2 | 2 | ||
3 | Recent Linux kernels (post v4.20) crash due to accesses to flexcan | 3 | We can use one MPC per SRAM bank, but we currently only wire the |
4 | and pwm controllers. Instantiate as unimplemented devices to work | 4 | IRQ from the first expansion MPC to the IRQ splitter. Fix that. |
5 | around the problem. | ||
6 | 5 | ||
7 | Signed-off-by: Guenter Roeck <linux@roeck-us.net> | 6 | Fixes: bb75e16d5e6 ("hw/arm/iotkit: Wire up MPC interrupt lines") |
8 | Message-id: 20200313014551.12554-4-linux@roeck-us.net | 7 | Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> |
8 | Message-id: 20201107193403.436146-2-f4bug@amsat.org | ||
9 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> | 9 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> |
10 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | 10 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
11 | --- | 11 | --- |
12 | hw/arm/fsl-imx6ul.c | 14 ++++++++++++++ | 12 | hw/arm/armsse.c | 3 ++- |
13 | 1 file changed, 14 insertions(+) | 13 | 1 file changed, 2 insertions(+), 1 deletion(-) |
14 | 14 | ||
15 | diff --git a/hw/arm/fsl-imx6ul.c b/hw/arm/fsl-imx6ul.c | 15 | diff --git a/hw/arm/armsse.c b/hw/arm/armsse.c |
16 | index XXXXXXX..XXXXXXX 100644 | 16 | index XXXXXXX..XXXXXXX 100644 |
17 | --- a/hw/arm/fsl-imx6ul.c | 17 | --- a/hw/arm/armsse.c |
18 | +++ b/hw/arm/fsl-imx6ul.c | 18 | +++ b/hw/arm/armsse.c |
19 | @@ -XXX,XX +XXX,XX @@ static void fsl_imx6ul_realize(DeviceState *dev, Error **errp) | 19 | @@ -XXX,XX +XXX,XX @@ static void armsse_realize(DeviceState *dev, Error **errp) |
20 | */ | 20 | qdev_get_gpio_in(dev_splitter, 0)); |
21 | create_unimplemented_device("sdma", FSL_IMX6UL_SDMA_ADDR, 0x4000); | 21 | qdev_connect_gpio_out(dev_splitter, 0, |
22 | 22 | qdev_get_gpio_in_named(dev_secctl, | |
23 | + /* | 23 | - "mpc_status", 0)); |
24 | + * PWM | 24 | + "mpc_status", |
25 | + */ | 25 | + i - IOTS_NUM_EXP_MPC)); |
26 | + create_unimplemented_device("pwm1", FSL_IMX6UL_PWM1_ADDR, 0x4000); | 26 | } |
27 | + create_unimplemented_device("pwm2", FSL_IMX6UL_PWM2_ADDR, 0x4000); | 27 | |
28 | + create_unimplemented_device("pwm3", FSL_IMX6UL_PWM3_ADDR, 0x4000); | 28 | qdev_connect_gpio_out(dev_splitter, 1, |
29 | + create_unimplemented_device("pwm4", FSL_IMX6UL_PWM4_ADDR, 0x4000); | ||
30 | + | ||
31 | + /* | ||
32 | + * CAN | ||
33 | + */ | ||
34 | + create_unimplemented_device("can1", FSL_IMX6UL_CAN1_ADDR, 0x4000); | ||
35 | + create_unimplemented_device("can2", FSL_IMX6UL_CAN2_ADDR, 0x4000); | ||
36 | + | ||
37 | /* | ||
38 | * APHB_DMA | ||
39 | */ | ||
40 | -- | 29 | -- |
41 | 2.20.1 | 30 | 2.20.1 |
42 | 31 | ||
43 | 32 | diff view generated by jsdifflib |
1 | From: Guenter Roeck <linux@roeck-us.net> | 1 | From: Philippe Mathieu-Daudé <f4bug@amsat.org> |
---|---|---|---|
2 | 2 | ||
3 | IMX6UL USB controllers are quite similar to IMX7 USB controllers. | 3 | The system configuration controller (SYSCFG) doesn't have |
4 | Wire them up the same way. | 4 | any output IRQ (and the INTC input #71 belongs to the UART6). |
5 | Remove the invalid code. | ||
5 | 6 | ||
6 | The only real difference is that wiring up phy devices is necessary | 7 | Fixes: db635521a02 ("stm32f205: Add the stm32f205 SoC") |
7 | to avoid phy reset timeouts in the Linux kernel. | 8 | Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> |
8 | 9 | Message-id: 20201107193403.436146-3-f4bug@amsat.org | |
9 | Signed-off-by: Guenter Roeck <linux@roeck-us.net> | ||
10 | Message-id: 20200313014551.12554-5-linux@roeck-us.net | ||
11 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> | 10 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> |
12 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | 11 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
13 | --- | 12 | --- |
14 | include/hw/arm/fsl-imx6ul.h | 10 ++++++++++ | 13 | include/hw/misc/stm32f2xx_syscfg.h | 2 -- |
15 | hw/arm/fsl-imx6ul.c | 35 +++++++++++++++++++++++++++++++++++ | 14 | hw/arm/stm32f205_soc.c | 1 - |
16 | 2 files changed, 45 insertions(+) | 15 | hw/misc/stm32f2xx_syscfg.c | 2 -- |
16 | 3 files changed, 5 deletions(-) | ||
17 | 17 | ||
18 | diff --git a/include/hw/arm/fsl-imx6ul.h b/include/hw/arm/fsl-imx6ul.h | 18 | diff --git a/include/hw/misc/stm32f2xx_syscfg.h b/include/hw/misc/stm32f2xx_syscfg.h |
19 | index XXXXXXX..XXXXXXX 100644 | 19 | index XXXXXXX..XXXXXXX 100644 |
20 | --- a/include/hw/arm/fsl-imx6ul.h | 20 | --- a/include/hw/misc/stm32f2xx_syscfg.h |
21 | +++ b/include/hw/arm/fsl-imx6ul.h | 21 | +++ b/include/hw/misc/stm32f2xx_syscfg.h |
22 | @@ -XXX,XX +XXX,XX @@ | 22 | @@ -XXX,XX +XXX,XX @@ struct STM32F2XXSyscfgState { |
23 | #include "hw/sd/sdhci.h" | 23 | uint32_t syscfg_exticr3; |
24 | #include "hw/ssi/imx_spi.h" | 24 | uint32_t syscfg_exticr4; |
25 | #include "hw/net/imx_fec.h" | 25 | uint32_t syscfg_cmpcr; |
26 | +#include "hw/usb/chipidea.h" | 26 | - |
27 | +#include "hw/usb/imx-usb-phy.h" | 27 | - qemu_irq irq; |
28 | #include "exec/memory.h" | ||
29 | #include "cpu.h" | ||
30 | |||
31 | @@ -XXX,XX +XXX,XX @@ enum FslIMX6ULConfiguration { | ||
32 | FSL_IMX6UL_NUM_I2CS = 4, | ||
33 | FSL_IMX6UL_NUM_ECSPIS = 4, | ||
34 | FSL_IMX6UL_NUM_ADCS = 2, | ||
35 | + FSL_IMX6UL_NUM_USB_PHYS = 2, | ||
36 | + FSL_IMX6UL_NUM_USBS = 2, | ||
37 | }; | 28 | }; |
38 | 29 | ||
39 | typedef struct FslIMX6ULState { | 30 | #endif /* HW_STM32F2XX_SYSCFG_H */ |
40 | @@ -XXX,XX +XXX,XX @@ typedef struct FslIMX6ULState { | 31 | diff --git a/hw/arm/stm32f205_soc.c b/hw/arm/stm32f205_soc.c |
41 | IMXFECState eth[FSL_IMX6UL_NUM_ETHS]; | ||
42 | SDHCIState usdhc[FSL_IMX6UL_NUM_USDHCS]; | ||
43 | IMX2WdtState wdt[FSL_IMX6UL_NUM_WDTS]; | ||
44 | + IMXUSBPHYState usbphy[FSL_IMX6UL_NUM_USB_PHYS]; | ||
45 | + ChipideaState usb[FSL_IMX6UL_NUM_USBS]; | ||
46 | MemoryRegion rom; | ||
47 | MemoryRegion caam; | ||
48 | MemoryRegion ocram; | ||
49 | @@ -XXX,XX +XXX,XX @@ enum FslIMX6ULMemoryMap { | ||
50 | FSL_IMX6UL_EPIT2_ADDR = 0x020D4000, | ||
51 | FSL_IMX6UL_EPIT1_ADDR = 0x020D0000, | ||
52 | FSL_IMX6UL_SNVS_HP_ADDR = 0x020CC000, | ||
53 | + FSL_IMX6UL_USBPHY2_ADDR = 0x020CA000, | ||
54 | + FSL_IMX6UL_USBPHY2_SIZE = (4 * 1024), | ||
55 | + FSL_IMX6UL_USBPHY1_ADDR = 0x020C9000, | ||
56 | + FSL_IMX6UL_USBPHY1_SIZE = (4 * 1024), | ||
57 | FSL_IMX6UL_ANALOG_ADDR = 0x020C8000, | ||
58 | FSL_IMX6UL_CCM_ADDR = 0x020C4000, | ||
59 | FSL_IMX6UL_WDOG2_ADDR = 0x020C0000, | ||
60 | diff --git a/hw/arm/fsl-imx6ul.c b/hw/arm/fsl-imx6ul.c | ||
61 | index XXXXXXX..XXXXXXX 100644 | 32 | index XXXXXXX..XXXXXXX 100644 |
62 | --- a/hw/arm/fsl-imx6ul.c | 33 | --- a/hw/arm/stm32f205_soc.c |
63 | +++ b/hw/arm/fsl-imx6ul.c | 34 | +++ b/hw/arm/stm32f205_soc.c |
64 | @@ -XXX,XX +XXX,XX @@ | 35 | @@ -XXX,XX +XXX,XX @@ static void stm32f205_soc_realize(DeviceState *dev_soc, Error **errp) |
65 | #include "qapi/error.h" | ||
66 | #include "hw/arm/fsl-imx6ul.h" | ||
67 | #include "hw/misc/unimp.h" | ||
68 | +#include "hw/usb/imx-usb-phy.h" | ||
69 | #include "hw/boards.h" | ||
70 | #include "sysemu/sysemu.h" | ||
71 | #include "qemu/error-report.h" | ||
72 | @@ -XXX,XX +XXX,XX @@ static void fsl_imx6ul_init(Object *obj) | ||
73 | TYPE_IMX_ENET); | ||
74 | } | 36 | } |
75 | 37 | busdev = SYS_BUS_DEVICE(dev); | |
76 | + /* USB */ | 38 | sysbus_mmio_map(busdev, 0, 0x40013800); |
77 | + for (i = 0; i < FSL_IMX6UL_NUM_USB_PHYS; i++) { | 39 | - sysbus_connect_irq(busdev, 0, qdev_get_gpio_in(armv7m, 71)); |
78 | + snprintf(name, NAME_SIZE, "usbphy%d", i); | 40 | |
79 | + sysbus_init_child_obj(obj, name, &s->usbphy[i], sizeof(s->usbphy[i]), | 41 | /* Attach UART (uses USART registers) and USART controllers */ |
80 | + TYPE_IMX_USBPHY); | 42 | for (i = 0; i < STM_NUM_USARTS; i++) { |
81 | + } | 43 | diff --git a/hw/misc/stm32f2xx_syscfg.c b/hw/misc/stm32f2xx_syscfg.c |
82 | + for (i = 0; i < FSL_IMX6UL_NUM_USBS; i++) { | 44 | index XXXXXXX..XXXXXXX 100644 |
83 | + snprintf(name, NAME_SIZE, "usb%d", i); | 45 | --- a/hw/misc/stm32f2xx_syscfg.c |
84 | + sysbus_init_child_obj(obj, name, &s->usb[i], sizeof(s->usb[i]), | 46 | +++ b/hw/misc/stm32f2xx_syscfg.c |
85 | + TYPE_CHIPIDEA); | 47 | @@ -XXX,XX +XXX,XX @@ static void stm32f2xx_syscfg_init(Object *obj) |
86 | + } | 48 | { |
87 | + | 49 | STM32F2XXSyscfgState *s = STM32F2XX_SYSCFG(obj); |
88 | /* | 50 | |
89 | * SDHCI | 51 | - sysbus_init_irq(SYS_BUS_DEVICE(obj), &s->irq); |
90 | */ | 52 | - |
91 | @@ -XXX,XX +XXX,XX @@ static void fsl_imx6ul_realize(DeviceState *dev, Error **errp) | 53 | memory_region_init_io(&s->mmio, obj, &stm32f2xx_syscfg_ops, s, |
92 | FSL_IMX6UL_ENETn_TIMER_IRQ[i])); | 54 | TYPE_STM32F2XX_SYSCFG, 0x400); |
93 | } | 55 | sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->mmio); |
94 | |||
95 | + /* USB */ | ||
96 | + for (i = 0; i < FSL_IMX6UL_NUM_USB_PHYS; i++) { | ||
97 | + object_property_set_bool(OBJECT(&s->usbphy[i]), true, "realized", | ||
98 | + &error_abort); | ||
99 | + sysbus_mmio_map(SYS_BUS_DEVICE(&s->usbphy[i]), 0, | ||
100 | + FSL_IMX6UL_USBPHY1_ADDR + i * 0x1000); | ||
101 | + } | ||
102 | + | ||
103 | + for (i = 0; i < FSL_IMX6UL_NUM_USBS; i++) { | ||
104 | + static const int FSL_IMX6UL_USBn_IRQ[] = { | ||
105 | + FSL_IMX6UL_USB1_IRQ, | ||
106 | + FSL_IMX6UL_USB2_IRQ, | ||
107 | + }; | ||
108 | + object_property_set_bool(OBJECT(&s->usb[i]), true, "realized", | ||
109 | + &error_abort); | ||
110 | + sysbus_mmio_map(SYS_BUS_DEVICE(&s->usb[i]), 0, | ||
111 | + FSL_IMX6UL_USBO2_USB_ADDR + i * 0x200); | ||
112 | + sysbus_connect_irq(SYS_BUS_DEVICE(&s->usb[i]), 0, | ||
113 | + qdev_get_gpio_in(DEVICE(&s->a7mpcore), | ||
114 | + FSL_IMX6UL_USBn_IRQ[i])); | ||
115 | + } | ||
116 | + | ||
117 | /* | ||
118 | * USDHC | ||
119 | */ | ||
120 | -- | 56 | -- |
121 | 2.20.1 | 57 | 2.20.1 |
122 | 58 | ||
123 | 59 | diff view generated by jsdifflib |
1 | From: Guenter Roeck <linux@roeck-us.net> | 1 | From: Philippe Mathieu-Daudé <f4bug@amsat.org> |
---|---|---|---|
2 | 2 | ||
3 | Whenever an unsupported command is encountered, the current code | 3 | omap2420_mpu_init() introduced in commit 827df9f3c5f ("Add basic |
4 | interprets each transferred byte as new command. Most of the time, those | 4 | OMAP2 chip support") takes care of creating the 3 UARTs. |
5 | 'commands' are interpreted as new unknown commands. However, in rare | ||
6 | cases, it may be that for example address or length information | ||
7 | passed with the original command is by itself a valid command. | ||
8 | If that happens, the state machine may get completely confused and, | ||
9 | worst case, start writing data into the flash or even erase it. | ||
10 | 5 | ||
11 | To avoid the problem, transition into STATE_READING_DATA and keep | 6 | Then commit 58a26b477e9 ("Emulate a serial bluetooth HCI with H4+ |
12 | sending a value of 0 until the chip is deselected after encountering | 7 | extensions and attach to n8x0's UART") added n8x0_uart_setup() |
13 | an unsupported command. | 8 | which create the UART and connects it to an IRQ output, |
9 | overwritting the existing peripheral and its IRQ connection. | ||
10 | This is incorrect. | ||
14 | 11 | ||
15 | Signed-off-by: Guenter Roeck <linux@roeck-us.net> | 12 | Fortunately we don't need to fix this, because commit 6da68df7f9b |
16 | Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> | 13 | ("hw/arm/nseries: Replace the bluetooth chardev with a "null" |
17 | Reviewed-by: Cédric Le Goater <clg@kaod.org> | 14 | chardev") removed the use of this peripheral. We can simply |
15 | remove the code. | ||
16 | |||
17 | Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> | ||
18 | Message-id: 20201107193403.436146-4-f4bug@amsat.org | ||
19 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> | ||
18 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | 20 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
19 | --- | 21 | --- |
20 | hw/block/m25p80.c | 5 +++++ | 22 | hw/arm/nseries.c | 11 ----------- |
21 | 1 file changed, 5 insertions(+) | 23 | 1 file changed, 11 deletions(-) |
22 | 24 | ||
23 | diff --git a/hw/block/m25p80.c b/hw/block/m25p80.c | 25 | diff --git a/hw/arm/nseries.c b/hw/arm/nseries.c |
24 | index XXXXXXX..XXXXXXX 100644 | 26 | index XXXXXXX..XXXXXXX 100644 |
25 | --- a/hw/block/m25p80.c | 27 | --- a/hw/arm/nseries.c |
26 | +++ b/hw/block/m25p80.c | 28 | +++ b/hw/arm/nseries.c |
27 | @@ -XXX,XX +XXX,XX @@ static void decode_new_cmd(Flash *s, uint32_t value) | 29 | @@ -XXX,XX +XXX,XX @@ static void n8x0_cbus_setup(struct n800_s *s) |
28 | s->quad_enable = false; | 30 | cbus_attach(cbus, s->tahvo = tahvo_init(tahvo_irq, 1)); |
29 | break; | 31 | } |
30 | default: | 32 | |
31 | + s->pos = 0; | 33 | -static void n8x0_uart_setup(struct n800_s *s) |
32 | + s->len = 1; | 34 | -{ |
33 | + s->state = STATE_READING_DATA; | 35 | - Chardev *radio = qemu_chr_new("bt-dummy-uart", "null", NULL); |
34 | + s->data_read_loop = true; | 36 | - /* |
35 | + s->data[0] = 0; | 37 | - * Note: We used to connect N8X0_BT_RESET_GPIO and N8X0_BT_WKUP_GPIO |
36 | qemu_log_mask(LOG_GUEST_ERROR, "M25P80: Unknown cmd %x\n", value); | 38 | - * here, but this code has been removed with the bluetooth backend. |
37 | break; | 39 | - */ |
40 | - omap_uart_attach(s->mpu->uart[BT_UART], radio); | ||
41 | -} | ||
42 | - | ||
43 | static void n8x0_usb_setup(struct n800_s *s) | ||
44 | { | ||
45 | SysBusDevice *dev; | ||
46 | @@ -XXX,XX +XXX,XX @@ static void n8x0_init(MachineState *machine, | ||
47 | n8x0_spi_setup(s); | ||
48 | n8x0_dss_setup(s); | ||
49 | n8x0_cbus_setup(s); | ||
50 | - n8x0_uart_setup(s); | ||
51 | if (machine_usb(machine)) { | ||
52 | n8x0_usb_setup(s); | ||
38 | } | 53 | } |
39 | -- | 54 | -- |
40 | 2.20.1 | 55 | 2.20.1 |
41 | 56 | ||
42 | 57 | diff view generated by jsdifflib |
1 | From: Guenter Roeck <linux@roeck-us.net> | 1 | From: Philippe Mathieu-Daudé <f4bug@amsat.org> |
---|---|---|---|
2 | 2 | ||
3 | Add basic USB PHY support as implemented in i.MX23, i.MX28, i.MX6, | 3 | The MusicPal board code connects both of the IRQ outputs of the UART |
4 | and i.MX7 SoCs. | 4 | to the same INTC qemu_irq. Connecting two qemu_irqs outputs directly |
5 | to the same input is not valid as it produces subtly wrong behaviour | ||
6 | (for instance if both the IRQ lines are high, and then one goes | ||
7 | low, the INTC input will see this as a high-to-low transition | ||
8 | even though the second IRQ line should still be holding it high). | ||
5 | 9 | ||
6 | The only support really needed - at least to boot Linux - is support | 10 | This kind of wiring needs an explicitly created OR gate; add one. |
7 | for soft reset, which needs to reset various registers to their initial | ||
8 | value. Otherwise, just record register values. | ||
9 | 11 | ||
12 | Inspired-by: Peter Maydell <peter.maydell@linaro.org> | ||
13 | Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> | ||
14 | Message-id: 20201107193403.436146-5-f4bug@amsat.org | ||
10 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> | 15 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> |
11 | Signed-off-by: Guenter Roeck <linux@roeck-us.net> | ||
12 | Message-id: 20200313014551.12554-2-linux@roeck-us.net | ||
13 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | 16 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
14 | --- | 17 | --- |
15 | hw/usb/Makefile.objs | 2 + | 18 | hw/arm/musicpal.c | 17 +++++++++++++---- |
16 | include/hw/usb/imx-usb-phy.h | 53 +++++++++ | 19 | hw/arm/Kconfig | 1 + |
17 | hw/usb/imx-usb-phy.c | 225 +++++++++++++++++++++++++++++++++++ | 20 | 2 files changed, 14 insertions(+), 4 deletions(-) |
18 | MAINTAINERS | 2 + | ||
19 | hw/arm/Kconfig | 1 + | ||
20 | hw/usb/Kconfig | 5 + | ||
21 | 6 files changed, 288 insertions(+) | ||
22 | create mode 100644 include/hw/usb/imx-usb-phy.h | ||
23 | create mode 100644 hw/usb/imx-usb-phy.c | ||
24 | 21 | ||
25 | diff --git a/hw/usb/Makefile.objs b/hw/usb/Makefile.objs | 22 | diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c |
26 | index XXXXXXX..XXXXXXX 100644 | 23 | index XXXXXXX..XXXXXXX 100644 |
27 | --- a/hw/usb/Makefile.objs | 24 | --- a/hw/arm/musicpal.c |
28 | +++ b/hw/usb/Makefile.objs | 25 | +++ b/hw/arm/musicpal.c |
29 | @@ -XXX,XX +XXX,XX @@ common-obj-$(CONFIG_XEN) += xen-usb.o | 26 | @@ -XXX,XX +XXX,XX @@ |
30 | xen-usb.o-cflags := $(LIBUSB_CFLAGS) | 27 | #include "ui/console.h" |
31 | xen-usb.o-libs := $(LIBUSB_LIBS) | 28 | #include "hw/i2c/i2c.h" |
32 | endif | 29 | #include "hw/irq.h" |
30 | +#include "hw/or-irq.h" | ||
31 | #include "hw/audio/wm8750.h" | ||
32 | #include "sysemu/block-backend.h" | ||
33 | #include "sysemu/runstate.h" | ||
34 | @@ -XXX,XX +XXX,XX @@ | ||
35 | #define MP_TIMER4_IRQ 7 | ||
36 | #define MP_EHCI_IRQ 8 | ||
37 | #define MP_ETH_IRQ 9 | ||
38 | -#define MP_UART1_IRQ 11 | ||
39 | -#define MP_UART2_IRQ 11 | ||
40 | +#define MP_UART_SHARED_IRQ 11 | ||
41 | #define MP_GPIO_IRQ 12 | ||
42 | #define MP_RTC_IRQ 28 | ||
43 | #define MP_AUDIO_IRQ 30 | ||
44 | @@ -XXX,XX +XXX,XX @@ static void musicpal_init(MachineState *machine) | ||
45 | ARMCPU *cpu; | ||
46 | qemu_irq pic[32]; | ||
47 | DeviceState *dev; | ||
48 | + DeviceState *uart_orgate; | ||
49 | DeviceState *i2c_dev; | ||
50 | DeviceState *lcd_dev; | ||
51 | DeviceState *key_dev; | ||
52 | @@ -XXX,XX +XXX,XX @@ static void musicpal_init(MachineState *machine) | ||
53 | pic[MP_TIMER2_IRQ], pic[MP_TIMER3_IRQ], | ||
54 | pic[MP_TIMER4_IRQ], NULL); | ||
55 | |||
56 | - serial_mm_init(address_space_mem, MP_UART1_BASE, 2, pic[MP_UART1_IRQ], | ||
57 | + /* Logically OR both UART IRQs together */ | ||
58 | + uart_orgate = DEVICE(object_new(TYPE_OR_IRQ)); | ||
59 | + object_property_set_int(OBJECT(uart_orgate), "num-lines", 2, &error_fatal); | ||
60 | + qdev_realize_and_unref(uart_orgate, NULL, &error_fatal); | ||
61 | + qdev_connect_gpio_out(DEVICE(uart_orgate), 0, pic[MP_UART_SHARED_IRQ]); | ||
33 | + | 62 | + |
34 | +common-obj-$(CONFIG_IMX_USBPHY) += imx-usb-phy.o | 63 | + serial_mm_init(address_space_mem, MP_UART1_BASE, 2, |
35 | diff --git a/include/hw/usb/imx-usb-phy.h b/include/hw/usb/imx-usb-phy.h | 64 | + qdev_get_gpio_in(uart_orgate, 0), |
36 | new file mode 100644 | 65 | 1825000, serial_hd(0), DEVICE_NATIVE_ENDIAN); |
37 | index XXXXXXX..XXXXXXX | 66 | - serial_mm_init(address_space_mem, MP_UART2_BASE, 2, pic[MP_UART2_IRQ], |
38 | --- /dev/null | 67 | + serial_mm_init(address_space_mem, MP_UART2_BASE, 2, |
39 | +++ b/include/hw/usb/imx-usb-phy.h | 68 | + qdev_get_gpio_in(uart_orgate, 1), |
40 | @@ -XXX,XX +XXX,XX @@ | 69 | 1825000, serial_hd(1), DEVICE_NATIVE_ENDIAN); |
41 | +#ifndef IMX_USB_PHY_H | 70 | |
42 | +#define IMX_USB_PHY_H | 71 | /* Register flash */ |
43 | + | ||
44 | +#include "hw/sysbus.h" | ||
45 | +#include "qemu/bitops.h" | ||
46 | + | ||
47 | +enum IMXUsbPhyRegisters { | ||
48 | + USBPHY_PWD, | ||
49 | + USBPHY_PWD_SET, | ||
50 | + USBPHY_PWD_CLR, | ||
51 | + USBPHY_PWD_TOG, | ||
52 | + USBPHY_TX, | ||
53 | + USBPHY_TX_SET, | ||
54 | + USBPHY_TX_CLR, | ||
55 | + USBPHY_TX_TOG, | ||
56 | + USBPHY_RX, | ||
57 | + USBPHY_RX_SET, | ||
58 | + USBPHY_RX_CLR, | ||
59 | + USBPHY_RX_TOG, | ||
60 | + USBPHY_CTRL, | ||
61 | + USBPHY_CTRL_SET, | ||
62 | + USBPHY_CTRL_CLR, | ||
63 | + USBPHY_CTRL_TOG, | ||
64 | + USBPHY_STATUS, | ||
65 | + USBPHY_DEBUG = 0x14, | ||
66 | + USBPHY_DEBUG_SET, | ||
67 | + USBPHY_DEBUG_CLR, | ||
68 | + USBPHY_DEBUG_TOG, | ||
69 | + USBPHY_DEBUG0_STATUS, | ||
70 | + USBPHY_DEBUG1 = 0x1c, | ||
71 | + USBPHY_DEBUG1_SET, | ||
72 | + USBPHY_DEBUG1_CLR, | ||
73 | + USBPHY_DEBUG1_TOG, | ||
74 | + USBPHY_VERSION, | ||
75 | + USBPHY_MAX | ||
76 | +}; | ||
77 | + | ||
78 | +#define USBPHY_CTRL_SFTRST BIT(31) | ||
79 | + | ||
80 | +#define TYPE_IMX_USBPHY "imx.usbphy" | ||
81 | +#define IMX_USBPHY(obj) OBJECT_CHECK(IMXUSBPHYState, (obj), TYPE_IMX_USBPHY) | ||
82 | + | ||
83 | +typedef struct IMXUSBPHYState { | ||
84 | + /* <private> */ | ||
85 | + SysBusDevice parent_obj; | ||
86 | + | ||
87 | + /* <public> */ | ||
88 | + MemoryRegion iomem; | ||
89 | + | ||
90 | + uint32_t usbphy[USBPHY_MAX]; | ||
91 | +} IMXUSBPHYState; | ||
92 | + | ||
93 | +#endif /* IMX_USB_PHY_H */ | ||
94 | diff --git a/hw/usb/imx-usb-phy.c b/hw/usb/imx-usb-phy.c | ||
95 | new file mode 100644 | ||
96 | index XXXXXXX..XXXXXXX | ||
97 | --- /dev/null | ||
98 | +++ b/hw/usb/imx-usb-phy.c | ||
99 | @@ -XXX,XX +XXX,XX @@ | ||
100 | +/* | ||
101 | + * i.MX USB PHY | ||
102 | + * | ||
103 | + * Copyright (c) 2020 Guenter Roeck <linux@roeck-us.net> | ||
104 | + * | ||
105 | + * This work is licensed under the terms of the GNU GPL, version 2 or later. | ||
106 | + * See the COPYING file in the top-level directory. | ||
107 | + * | ||
108 | + * We need to implement basic reset control in the PHY control register. | ||
109 | + * For everything else, it is sufficient to set whatever is written. | ||
110 | + */ | ||
111 | + | ||
112 | +#include "qemu/osdep.h" | ||
113 | +#include "hw/usb/imx-usb-phy.h" | ||
114 | +#include "migration/vmstate.h" | ||
115 | +#include "qemu/log.h" | ||
116 | +#include "qemu/module.h" | ||
117 | + | ||
118 | +static const VMStateDescription vmstate_imx_usbphy = { | ||
119 | + .name = TYPE_IMX_USBPHY, | ||
120 | + .version_id = 1, | ||
121 | + .minimum_version_id = 1, | ||
122 | + .fields = (VMStateField[]) { | ||
123 | + VMSTATE_UINT32_ARRAY(usbphy, IMXUSBPHYState, USBPHY_MAX), | ||
124 | + VMSTATE_END_OF_LIST() | ||
125 | + }, | ||
126 | +}; | ||
127 | + | ||
128 | +static void imx_usbphy_softreset(IMXUSBPHYState *s) | ||
129 | +{ | ||
130 | + s->usbphy[USBPHY_PWD] = 0x001e1c00; | ||
131 | + s->usbphy[USBPHY_TX] = 0x10060607; | ||
132 | + s->usbphy[USBPHY_RX] = 0x00000000; | ||
133 | + s->usbphy[USBPHY_CTRL] = 0xc0200000; | ||
134 | +} | ||
135 | + | ||
136 | +static void imx_usbphy_reset(DeviceState *dev) | ||
137 | +{ | ||
138 | + IMXUSBPHYState *s = IMX_USBPHY(dev); | ||
139 | + | ||
140 | + s->usbphy[USBPHY_STATUS] = 0x00000000; | ||
141 | + s->usbphy[USBPHY_DEBUG] = 0x7f180000; | ||
142 | + s->usbphy[USBPHY_DEBUG0_STATUS] = 0x00000000; | ||
143 | + s->usbphy[USBPHY_DEBUG1] = 0x00001000; | ||
144 | + s->usbphy[USBPHY_VERSION] = 0x04020000; | ||
145 | + | ||
146 | + imx_usbphy_softreset(s); | ||
147 | +} | ||
148 | + | ||
149 | +static uint64_t imx_usbphy_read(void *opaque, hwaddr offset, unsigned size) | ||
150 | +{ | ||
151 | + IMXUSBPHYState *s = (IMXUSBPHYState *)opaque; | ||
152 | + uint32_t index = offset >> 2; | ||
153 | + uint32_t value; | ||
154 | + | ||
155 | + switch (index) { | ||
156 | + case USBPHY_PWD_SET: | ||
157 | + case USBPHY_TX_SET: | ||
158 | + case USBPHY_RX_SET: | ||
159 | + case USBPHY_CTRL_SET: | ||
160 | + case USBPHY_DEBUG_SET: | ||
161 | + case USBPHY_DEBUG1_SET: | ||
162 | + /* | ||
163 | + * All REG_NAME_SET register access are in fact targeting the | ||
164 | + * REG_NAME register. | ||
165 | + */ | ||
166 | + value = s->usbphy[index - 1]; | ||
167 | + break; | ||
168 | + case USBPHY_PWD_CLR: | ||
169 | + case USBPHY_TX_CLR: | ||
170 | + case USBPHY_RX_CLR: | ||
171 | + case USBPHY_CTRL_CLR: | ||
172 | + case USBPHY_DEBUG_CLR: | ||
173 | + case USBPHY_DEBUG1_CLR: | ||
174 | + /* | ||
175 | + * All REG_NAME_CLR register access are in fact targeting the | ||
176 | + * REG_NAME register. | ||
177 | + */ | ||
178 | + value = s->usbphy[index - 2]; | ||
179 | + break; | ||
180 | + case USBPHY_PWD_TOG: | ||
181 | + case USBPHY_TX_TOG: | ||
182 | + case USBPHY_RX_TOG: | ||
183 | + case USBPHY_CTRL_TOG: | ||
184 | + case USBPHY_DEBUG_TOG: | ||
185 | + case USBPHY_DEBUG1_TOG: | ||
186 | + /* | ||
187 | + * All REG_NAME_TOG register access are in fact targeting the | ||
188 | + * REG_NAME register. | ||
189 | + */ | ||
190 | + value = s->usbphy[index - 3]; | ||
191 | + break; | ||
192 | + default: | ||
193 | + value = s->usbphy[index]; | ||
194 | + break; | ||
195 | + } | ||
196 | + return (uint64_t)value; | ||
197 | +} | ||
198 | + | ||
199 | +static void imx_usbphy_write(void *opaque, hwaddr offset, uint64_t value, | ||
200 | + unsigned size) | ||
201 | +{ | ||
202 | + IMXUSBPHYState *s = (IMXUSBPHYState *)opaque; | ||
203 | + uint32_t index = offset >> 2; | ||
204 | + | ||
205 | + switch (index) { | ||
206 | + case USBPHY_CTRL: | ||
207 | + s->usbphy[index] = value; | ||
208 | + if (value & USBPHY_CTRL_SFTRST) { | ||
209 | + imx_usbphy_softreset(s); | ||
210 | + } | ||
211 | + break; | ||
212 | + case USBPHY_PWD: | ||
213 | + case USBPHY_TX: | ||
214 | + case USBPHY_RX: | ||
215 | + case USBPHY_STATUS: | ||
216 | + case USBPHY_DEBUG: | ||
217 | + case USBPHY_DEBUG1: | ||
218 | + s->usbphy[index] = value; | ||
219 | + break; | ||
220 | + case USBPHY_CTRL_SET: | ||
221 | + s->usbphy[index - 1] |= value; | ||
222 | + if (value & USBPHY_CTRL_SFTRST) { | ||
223 | + imx_usbphy_softreset(s); | ||
224 | + } | ||
225 | + break; | ||
226 | + case USBPHY_PWD_SET: | ||
227 | + case USBPHY_TX_SET: | ||
228 | + case USBPHY_RX_SET: | ||
229 | + case USBPHY_DEBUG_SET: | ||
230 | + case USBPHY_DEBUG1_SET: | ||
231 | + /* | ||
232 | + * All REG_NAME_SET register access are in fact targeting the | ||
233 | + * REG_NAME register. So we change the value of the REG_NAME | ||
234 | + * register, setting bits passed in the value. | ||
235 | + */ | ||
236 | + s->usbphy[index - 1] |= value; | ||
237 | + break; | ||
238 | + case USBPHY_PWD_CLR: | ||
239 | + case USBPHY_TX_CLR: | ||
240 | + case USBPHY_RX_CLR: | ||
241 | + case USBPHY_CTRL_CLR: | ||
242 | + case USBPHY_DEBUG_CLR: | ||
243 | + case USBPHY_DEBUG1_CLR: | ||
244 | + /* | ||
245 | + * All REG_NAME_CLR register access are in fact targeting the | ||
246 | + * REG_NAME register. So we change the value of the REG_NAME | ||
247 | + * register, unsetting bits passed in the value. | ||
248 | + */ | ||
249 | + s->usbphy[index - 2] &= ~value; | ||
250 | + break; | ||
251 | + case USBPHY_CTRL_TOG: | ||
252 | + s->usbphy[index - 3] ^= value; | ||
253 | + if ((value & USBPHY_CTRL_SFTRST) && | ||
254 | + (s->usbphy[index - 3] & USBPHY_CTRL_SFTRST)) { | ||
255 | + imx_usbphy_softreset(s); | ||
256 | + } | ||
257 | + break; | ||
258 | + case USBPHY_PWD_TOG: | ||
259 | + case USBPHY_TX_TOG: | ||
260 | + case USBPHY_RX_TOG: | ||
261 | + case USBPHY_DEBUG_TOG: | ||
262 | + case USBPHY_DEBUG1_TOG: | ||
263 | + /* | ||
264 | + * All REG_NAME_TOG register access are in fact targeting the | ||
265 | + * REG_NAME register. So we change the value of the REG_NAME | ||
266 | + * register, toggling bits passed in the value. | ||
267 | + */ | ||
268 | + s->usbphy[index - 3] ^= value; | ||
269 | + break; | ||
270 | + default: | ||
271 | + /* Other registers are read-only */ | ||
272 | + break; | ||
273 | + } | ||
274 | +} | ||
275 | + | ||
276 | +static const struct MemoryRegionOps imx_usbphy_ops = { | ||
277 | + .read = imx_usbphy_read, | ||
278 | + .write = imx_usbphy_write, | ||
279 | + .endianness = DEVICE_NATIVE_ENDIAN, | ||
280 | + .valid = { | ||
281 | + /* | ||
282 | + * Our device would not work correctly if the guest was doing | ||
283 | + * unaligned access. This might not be a limitation on the real | ||
284 | + * device but in practice there is no reason for a guest to access | ||
285 | + * this device unaligned. | ||
286 | + */ | ||
287 | + .min_access_size = 4, | ||
288 | + .max_access_size = 4, | ||
289 | + .unaligned = false, | ||
290 | + }, | ||
291 | +}; | ||
292 | + | ||
293 | +static void imx_usbphy_realize(DeviceState *dev, Error **errp) | ||
294 | +{ | ||
295 | + IMXUSBPHYState *s = IMX_USBPHY(dev); | ||
296 | + | ||
297 | + memory_region_init_io(&s->iomem, OBJECT(s), &imx_usbphy_ops, s, | ||
298 | + "imx-usbphy", 0x1000); | ||
299 | + sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->iomem); | ||
300 | +} | ||
301 | + | ||
302 | +static void imx_usbphy_class_init(ObjectClass *klass, void *data) | ||
303 | +{ | ||
304 | + DeviceClass *dc = DEVICE_CLASS(klass); | ||
305 | + | ||
306 | + dc->reset = imx_usbphy_reset; | ||
307 | + dc->vmsd = &vmstate_imx_usbphy; | ||
308 | + dc->desc = "i.MX USB PHY Module"; | ||
309 | + dc->realize = imx_usbphy_realize; | ||
310 | +} | ||
311 | + | ||
312 | +static const TypeInfo imx_usbphy_info = { | ||
313 | + .name = TYPE_IMX_USBPHY, | ||
314 | + .parent = TYPE_SYS_BUS_DEVICE, | ||
315 | + .instance_size = sizeof(IMXUSBPHYState), | ||
316 | + .class_init = imx_usbphy_class_init, | ||
317 | +}; | ||
318 | + | ||
319 | +static void imx_usbphy_register_types(void) | ||
320 | +{ | ||
321 | + type_register_static(&imx_usbphy_info); | ||
322 | +} | ||
323 | + | ||
324 | +type_init(imx_usbphy_register_types) | ||
325 | diff --git a/MAINTAINERS b/MAINTAINERS | ||
326 | index XXXXXXX..XXXXXXX 100644 | ||
327 | --- a/MAINTAINERS | ||
328 | +++ b/MAINTAINERS | ||
329 | @@ -XXX,XX +XXX,XX @@ F: hw/arm/sabrelite.c | ||
330 | F: hw/arm/fsl-imx6.c | ||
331 | F: hw/misc/imx6_*.c | ||
332 | F: hw/ssi/imx_spi.c | ||
333 | +F: hw/usb/imx-usb-phy.c | ||
334 | +F: include/hw/usb/imx-usb-phy.h | ||
335 | F: include/hw/arm/fsl-imx6.h | ||
336 | F: include/hw/misc/imx6_*.h | ||
337 | F: include/hw/ssi/imx_spi.h | ||
338 | diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig | 72 | diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig |
339 | index XXXXXXX..XXXXXXX 100644 | 73 | index XXXXXXX..XXXXXXX 100644 |
340 | --- a/hw/arm/Kconfig | 74 | --- a/hw/arm/Kconfig |
341 | +++ b/hw/arm/Kconfig | 75 | +++ b/hw/arm/Kconfig |
342 | @@ -XXX,XX +XXX,XX @@ config FSL_IMX6 | 76 | @@ -XXX,XX +XXX,XX @@ config MUSCA |
343 | select IMX | 77 | |
344 | select IMX_FEC | 78 | config MUSICPAL |
345 | select IMX_I2C | ||
346 | + select IMX_USBPHY | ||
347 | select SDHCI | ||
348 | |||
349 | config ASPEED_SOC | ||
350 | diff --git a/hw/usb/Kconfig b/hw/usb/Kconfig | ||
351 | index XXXXXXX..XXXXXXX 100644 | ||
352 | --- a/hw/usb/Kconfig | ||
353 | +++ b/hw/usb/Kconfig | ||
354 | @@ -XXX,XX +XXX,XX @@ config USB_STORAGE_MTP | ||
355 | bool | 79 | bool |
356 | default y | 80 | + select OR_IRQ |
357 | depends on USB | 81 | select BITBANG_I2C |
358 | + | 82 | select MARVELL_88W8618 |
359 | +config IMX_USBPHY | 83 | select PTIMER |
360 | + bool | ||
361 | + default y | ||
362 | + depends on USB | ||
363 | -- | 84 | -- |
364 | 2.20.1 | 85 | 2.20.1 |
365 | 86 | ||
366 | 87 | diff view generated by jsdifflib |
1 | From: Guenter Roeck <linux@roeck-us.net> | 1 | From: Philippe Mathieu-Daudé <f4bug@amsat.org> |
---|---|---|---|
2 | 2 | ||
3 | USB1 and USB2 interrupt numbers were swapped. USB_PHY2 interrupt number | 3 | We don't need to fill the full pic[] array if we only use |
4 | is 45. That didn't really matter up to now since the interrupts were not | 4 | few of the interrupt lines. Directly call qdev_get_gpio_in() |
5 | used, but it needs to be fixed to be able to wire up the USB controllers. | 5 | when necessary. |
6 | 6 | ||
7 | Fixes: 31cbf933f0e ("i.MX6UL: Add i.MX6UL SOC") | 7 | Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> |
8 | Signed-off-by: Guenter Roeck <linux@roeck-us.net> | 8 | Message-id: 20201107193403.436146-6-f4bug@amsat.org |
9 | Message-id: 20200313014551.12554-3-linux@roeck-us.net | ||
10 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> | 9 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> |
11 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | 10 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
12 | --- | 11 | --- |
13 | include/hw/arm/fsl-imx6ul.h | 6 +++--- | 12 | hw/arm/musicpal.c | 25 +++++++++++++------------ |
14 | 1 file changed, 3 insertions(+), 3 deletions(-) | 13 | 1 file changed, 13 insertions(+), 12 deletions(-) |
15 | 14 | ||
16 | diff --git a/include/hw/arm/fsl-imx6ul.h b/include/hw/arm/fsl-imx6ul.h | 15 | diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c |
17 | index XXXXXXX..XXXXXXX 100644 | 16 | index XXXXXXX..XXXXXXX 100644 |
18 | --- a/include/hw/arm/fsl-imx6ul.h | 17 | --- a/hw/arm/musicpal.c |
19 | +++ b/include/hw/arm/fsl-imx6ul.h | 18 | +++ b/hw/arm/musicpal.c |
20 | @@ -XXX,XX +XXX,XX @@ enum FslIMX6ULIRQs { | 19 | @@ -XXX,XX +XXX,XX @@ static struct arm_boot_info musicpal_binfo = { |
21 | FSL_IMX6UL_UART7_IRQ = 39, | 20 | static void musicpal_init(MachineState *machine) |
22 | FSL_IMX6UL_UART8_IRQ = 40, | 21 | { |
23 | 22 | ARMCPU *cpu; | |
24 | - FSL_IMX6UL_USB1_IRQ = 42, | 23 | - qemu_irq pic[32]; |
25 | - FSL_IMX6UL_USB2_IRQ = 43, | 24 | DeviceState *dev; |
26 | + FSL_IMX6UL_USB1_IRQ = 43, | 25 | + DeviceState *pic; |
27 | + FSL_IMX6UL_USB2_IRQ = 42, | 26 | DeviceState *uart_orgate; |
28 | FSL_IMX6UL_USB_PHY1_IRQ = 44, | 27 | DeviceState *i2c_dev; |
29 | - FSL_IMX6UL_USB_PHY2_IRQ = 44, | 28 | DeviceState *lcd_dev; |
30 | + FSL_IMX6UL_USB_PHY2_IRQ = 45, | 29 | @@ -XXX,XX +XXX,XX @@ static void musicpal_init(MachineState *machine) |
31 | 30 | &error_fatal); | |
32 | FSL_IMX6UL_CAAM_JQ2_IRQ = 46, | 31 | memory_region_add_subregion(address_space_mem, MP_SRAM_BASE, sram); |
33 | FSL_IMX6UL_CAAM_ERR_IRQ = 47, | 32 | |
33 | - dev = sysbus_create_simple(TYPE_MV88W8618_PIC, MP_PIC_BASE, | ||
34 | + pic = sysbus_create_simple(TYPE_MV88W8618_PIC, MP_PIC_BASE, | ||
35 | qdev_get_gpio_in(DEVICE(cpu), ARM_CPU_IRQ)); | ||
36 | - for (i = 0; i < 32; i++) { | ||
37 | - pic[i] = qdev_get_gpio_in(dev, i); | ||
38 | - } | ||
39 | - sysbus_create_varargs(TYPE_MV88W8618_PIT, MP_PIT_BASE, pic[MP_TIMER1_IRQ], | ||
40 | - pic[MP_TIMER2_IRQ], pic[MP_TIMER3_IRQ], | ||
41 | - pic[MP_TIMER4_IRQ], NULL); | ||
42 | + sysbus_create_varargs(TYPE_MV88W8618_PIT, MP_PIT_BASE, | ||
43 | + qdev_get_gpio_in(pic, MP_TIMER1_IRQ), | ||
44 | + qdev_get_gpio_in(pic, MP_TIMER2_IRQ), | ||
45 | + qdev_get_gpio_in(pic, MP_TIMER3_IRQ), | ||
46 | + qdev_get_gpio_in(pic, MP_TIMER4_IRQ), NULL); | ||
47 | |||
48 | /* Logically OR both UART IRQs together */ | ||
49 | uart_orgate = DEVICE(object_new(TYPE_OR_IRQ)); | ||
50 | object_property_set_int(OBJECT(uart_orgate), "num-lines", 2, &error_fatal); | ||
51 | qdev_realize_and_unref(uart_orgate, NULL, &error_fatal); | ||
52 | - qdev_connect_gpio_out(DEVICE(uart_orgate), 0, pic[MP_UART_SHARED_IRQ]); | ||
53 | + qdev_connect_gpio_out(DEVICE(uart_orgate), 0, | ||
54 | + qdev_get_gpio_in(pic, MP_UART_SHARED_IRQ)); | ||
55 | |||
56 | serial_mm_init(address_space_mem, MP_UART1_BASE, 2, | ||
57 | qdev_get_gpio_in(uart_orgate, 0), | ||
58 | @@ -XXX,XX +XXX,XX @@ static void musicpal_init(MachineState *machine) | ||
59 | OBJECT(get_system_memory()), &error_fatal); | ||
60 | sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); | ||
61 | sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, MP_ETH_BASE); | ||
62 | - sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, pic[MP_ETH_IRQ]); | ||
63 | + sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, | ||
64 | + qdev_get_gpio_in(pic, MP_ETH_IRQ)); | ||
65 | |||
66 | sysbus_create_simple("mv88w8618_wlan", MP_WLAN_BASE, NULL); | ||
67 | |||
68 | sysbus_create_simple(TYPE_MUSICPAL_MISC, MP_MISC_BASE, NULL); | ||
69 | |||
70 | dev = sysbus_create_simple(TYPE_MUSICPAL_GPIO, MP_GPIO_BASE, | ||
71 | - pic[MP_GPIO_IRQ]); | ||
72 | + qdev_get_gpio_in(pic, MP_GPIO_IRQ)); | ||
73 | i2c_dev = sysbus_create_simple("gpio_i2c", -1, NULL); | ||
74 | i2c = (I2CBus *)qdev_get_child_bus(i2c_dev, "i2c"); | ||
75 | |||
76 | @@ -XXX,XX +XXX,XX @@ static void musicpal_init(MachineState *machine) | ||
77 | NULL); | ||
78 | sysbus_realize_and_unref(s, &error_fatal); | ||
79 | sysbus_mmio_map(s, 0, MP_AUDIO_BASE); | ||
80 | - sysbus_connect_irq(s, 0, pic[MP_AUDIO_IRQ]); | ||
81 | + sysbus_connect_irq(s, 0, qdev_get_gpio_in(pic, MP_AUDIO_IRQ)); | ||
82 | |||
83 | musicpal_binfo.ram_size = MP_RAM_DEFAULT_SIZE; | ||
84 | arm_load_kernel(cpu, machine, &musicpal_binfo); | ||
34 | -- | 85 | -- |
35 | 2.20.1 | 86 | 2.20.1 |
36 | 87 | ||
37 | 88 | diff view generated by jsdifflib |
1 | From: Guenter Roeck <linux@roeck-us.net> | 1 | The nseries machines have a codepath that allows them to load a |
---|---|---|---|
2 | secondary bootloader. This code wasn't checking that the | ||
3 | load_image_targphys() succeeded. Check the return value and report | ||
4 | the error to the user. | ||
2 | 5 | ||
3 | When requesting JEDEC data using the JEDEC_READ command, the Linux kernel | 6 | While we're in the vicinity, fix the comment style of the |
4 | always requests 6 bytes. The current implementation only returns three | 7 | comment documenting what this image load is doing. |
5 | bytes, and interprets the remaining three bytes as new commands. | ||
6 | While this does not matter most of the time, it is at the very least | ||
7 | confusing. To avoid the problem, always report up to 6 bytes of JEDEC | ||
8 | data. Fill remaining data with 0. | ||
9 | 8 | ||
10 | Signed-off-by: Guenter Roeck <linux@roeck-us.net> | 9 | Fixes: Coverity CID 1192904 |
11 | Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> | ||
12 | Reviewed-by: Alistair Francis <alistair.francis@wdc.com> | ||
13 | Reviewed-by: Cédric Le Goater <clg@kaod.org> | ||
14 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | 10 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
11 | Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> | ||
12 | Message-id: 20201103114918.11807-1-peter.maydell@linaro.org | ||
15 | --- | 13 | --- |
16 | hw/block/m25p80.c | 5 ++++- | 14 | hw/arm/nseries.c | 15 +++++++++++---- |
17 | 1 file changed, 4 insertions(+), 1 deletion(-) | 15 | 1 file changed, 11 insertions(+), 4 deletions(-) |
18 | 16 | ||
19 | diff --git a/hw/block/m25p80.c b/hw/block/m25p80.c | 17 | diff --git a/hw/arm/nseries.c b/hw/arm/nseries.c |
20 | index XXXXXXX..XXXXXXX 100644 | 18 | index XXXXXXX..XXXXXXX 100644 |
21 | --- a/hw/block/m25p80.c | 19 | --- a/hw/arm/nseries.c |
22 | +++ b/hw/block/m25p80.c | 20 | +++ b/hw/arm/nseries.c |
23 | @@ -XXX,XX +XXX,XX @@ static void decode_new_cmd(Flash *s, uint32_t value) | 21 | @@ -XXX,XX +XXX,XX @@ static void n8x0_init(MachineState *machine, |
24 | for (i = 0; i < s->pi->id_len; i++) { | 22 | /* No, wait, better start at the ROM. */ |
25 | s->data[i] = s->pi->id[i]; | 23 | s->mpu->cpu->env.regs[15] = OMAP2_Q2_BASE + 0x400000; |
26 | } | 24 | |
27 | + for (; i < SPI_NOR_MAX_ID_LEN; i++) { | 25 | - /* This is intended for loading the `secondary.bin' program from |
28 | + s->data[i] = 0; | 26 | + /* |
27 | + * This is intended for loading the `secondary.bin' program from | ||
28 | * Nokia images (the NOLO bootloader). The entry point seems | ||
29 | * to be at OMAP2_Q2_BASE + 0x400000. | ||
30 | * | ||
31 | @@ -XXX,XX +XXX,XX @@ static void n8x0_init(MachineState *machine, | ||
32 | * for them the entry point needs to be set to OMAP2_SRAM_BASE. | ||
33 | * | ||
34 | * The code above is for loading the `zImage' file from Nokia | ||
35 | - * images. */ | ||
36 | - load_image_targphys(option_rom[0].name, OMAP2_Q2_BASE + 0x400000, | ||
37 | - machine->ram_size - 0x400000); | ||
38 | + * images. | ||
39 | + */ | ||
40 | + if (load_image_targphys(option_rom[0].name, | ||
41 | + OMAP2_Q2_BASE + 0x400000, | ||
42 | + machine->ram_size - 0x400000) < 0) { | ||
43 | + error_report("Failed to load secondary bootloader %s", | ||
44 | + option_rom[0].name); | ||
45 | + exit(EXIT_FAILURE); | ||
29 | + } | 46 | + } |
30 | 47 | ||
31 | - s->len = s->pi->id_len; | 48 | n800_setup_nolo_tags(nolo_tags); |
32 | + s->len = SPI_NOR_MAX_ID_LEN; | 49 | cpu_physical_memory_write(OMAP2_SRAM_BASE, nolo_tags, 0x10000); |
33 | s->pos = 0; | ||
34 | s->state = STATE_READING_DATA; | ||
35 | break; | ||
36 | -- | 50 | -- |
37 | 2.20.1 | 51 | 2.20.1 |
38 | 52 | ||
39 | 53 | diff view generated by jsdifflib |
1 | From: Guenter Roeck <linux@roeck-us.net> | 1 | From: Havard Skinnemoen <hskinnemoen@google.com> |
---|---|---|---|
2 | 2 | ||
3 | The Linux kernel recently started using FAST_READ_4 commands. | 3 | The number of runs is equal to the number of 0-1 and 1-0 transitions, |
4 | This results in flash read failures. At the same time, the m25p80 | 4 | plus one. Currently, it's counting the number of times these transitions |
5 | emulation is seen to read 8 more bytes than expected. Adjusting the | 5 | do _not_ happen, plus one. |
6 | expected number of dummy cycles to match FAST_READ fixes the problem. | ||
7 | 6 | ||
8 | Fixes: f95c4bffdc4c ("aspeed/smc: snoop SPI transfers to fake dummy cycles") | 7 | Source: |
9 | Reviewed-by: Cédric Le Goater <clg@kaod.org> | 8 | https://nvlpubs.nist.gov/nistpubs/Legacy/SP/nistspecialpublication800-22r1a.pdf |
10 | Signed-off-by: Guenter Roeck <linux@roeck-us.net> | 9 | section 2.3.4 point (3). |
11 | Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> | 10 | |
11 | Signed-off-by: Havard Skinnemoen <hskinnemoen@google.com> | ||
12 | Message-id: 20201103011457.2959989-2-hskinnemoen@google.com | ||
13 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> | ||
12 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | 14 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
13 | --- | 15 | --- |
14 | hw/ssi/aspeed_smc.c | 2 +- | 16 | tests/qtest/npcm7xx_rng-test.c | 2 +- |
15 | 1 file changed, 1 insertion(+), 1 deletion(-) | 17 | 1 file changed, 1 insertion(+), 1 deletion(-) |
16 | 18 | ||
17 | diff --git a/hw/ssi/aspeed_smc.c b/hw/ssi/aspeed_smc.c | 19 | diff --git a/tests/qtest/npcm7xx_rng-test.c b/tests/qtest/npcm7xx_rng-test.c |
18 | index XXXXXXX..XXXXXXX 100644 | 20 | index XXXXXXX..XXXXXXX 100644 |
19 | --- a/hw/ssi/aspeed_smc.c | 21 | --- a/tests/qtest/npcm7xx_rng-test.c |
20 | +++ b/hw/ssi/aspeed_smc.c | 22 | +++ b/tests/qtest/npcm7xx_rng-test.c |
21 | @@ -XXX,XX +XXX,XX @@ static int aspeed_smc_num_dummies(uint8_t command) | 23 | @@ -XXX,XX +XXX,XX @@ static double calc_runs_p(const unsigned long *buf, unsigned int nr_bits) |
22 | case FAST_READ: | 24 | pi = (double)nr_ones / nr_bits; |
23 | case DOR: | 25 | |
24 | case QOR: | 26 | for (k = 0; k < nr_bits - 1; k++) { |
25 | + case FAST_READ_4: | 27 | - vn_obs += !(test_bit(k, buf) ^ test_bit(k + 1, buf)); |
26 | case DOR_4: | 28 | + vn_obs += (test_bit(k, buf) ^ test_bit(k + 1, buf)); |
27 | case QOR_4: | 29 | } |
28 | return 1; | 30 | vn_obs += 1; |
29 | case DIOR: | 31 | |
30 | - case FAST_READ_4: | ||
31 | case DIOR_4: | ||
32 | return 2; | ||
33 | case QIOR: | ||
34 | -- | 32 | -- |
35 | 2.20.1 | 33 | 2.20.1 |
36 | 34 | ||
37 | 35 | diff view generated by jsdifflib |
New patch | |||
---|---|---|---|
1 | Checks for UNDEF cases should go before the "is VFP enabled?" access | ||
2 | check, except in special cases. Move a stray UNDEF check in the VTBL | ||
3 | trans function up above the access check. | ||
1 | 4 | ||
5 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | ||
6 | Reviewed-by: Richard Henderson <richard.henderson@linaro.org> | ||
7 | Message-id: 20201109145324.2859-1-peter.maydell@linaro.org | ||
8 | --- | ||
9 | target/arm/translate-neon.c.inc | 8 ++++---- | ||
10 | 1 file changed, 4 insertions(+), 4 deletions(-) | ||
11 | |||
12 | diff --git a/target/arm/translate-neon.c.inc b/target/arm/translate-neon.c.inc | ||
13 | index XXXXXXX..XXXXXXX 100644 | ||
14 | --- a/target/arm/translate-neon.c.inc | ||
15 | +++ b/target/arm/translate-neon.c.inc | ||
16 | @@ -XXX,XX +XXX,XX @@ static bool trans_VTBL(DisasContext *s, arg_VTBL *a) | ||
17 | return false; | ||
18 | } | ||
19 | |||
20 | - if (!vfp_access_check(s)) { | ||
21 | - return true; | ||
22 | - } | ||
23 | - | ||
24 | if ((a->vn + a->len + 1) > 32) { | ||
25 | /* | ||
26 | * This is UNPREDICTABLE; we choose to UNDEF to avoid the | ||
27 | @@ -XXX,XX +XXX,XX @@ static bool trans_VTBL(DisasContext *s, arg_VTBL *a) | ||
28 | return false; | ||
29 | } | ||
30 | |||
31 | + if (!vfp_access_check(s)) { | ||
32 | + return true; | ||
33 | + } | ||
34 | + | ||
35 | desc = tcg_const_i32((a->vn << 2) | a->len); | ||
36 | def = tcg_temp_new_i64(); | ||
37 | if (a->op) { | ||
38 | -- | ||
39 | 2.20.1 | ||
40 | |||
41 | diff view generated by jsdifflib |