target/i386/cpu.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
In the Intel SDM, "Table 18-2. Association of Fixed-Function
Performance Counters with Architectural Performance Events",
we may have a new fixed counter 'TOPDOWN.SLOTS' (since Icelake),
which counts the number of available slots for an unhalted
logical processor. Check commit 6017608936 in the kernel tree.
Signed-off-by: Like Xu <like.xu@linux.intel.com>
---
target/i386/cpu.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index 576f309bbf..ec2b67d425 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -1185,7 +1185,7 @@ typedef struct {
#define CPU_NB_REGS CPU_NB_REGS32
#endif
-#define MAX_FIXED_COUNTERS 3
+#define MAX_FIXED_COUNTERS 4
#define MAX_GP_COUNTERS (MSR_IA32_PERF_STATUS - MSR_P6_EVNTSEL0)
#define TARGET_INSN_START_EXTRA_WORDS 1
--
2.21.1
Anyone to help review this change? Thanks, Like Xu On 2020/3/17 13:54, Like Xu wrote: > In the Intel SDM, "Table 18-2. Association of Fixed-Function > Performance Counters with Architectural Performance Events", > we may have a new fixed counter 'TOPDOWN.SLOTS' (since Icelake), > which counts the number of available slots for an unhalted > logical processor. Check commit 6017608936 in the kernel tree. > > Signed-off-by: Like Xu <like.xu@linux.intel.com> > --- > target/i386/cpu.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/target/i386/cpu.h b/target/i386/cpu.h > index 576f309bbf..ec2b67d425 100644 > --- a/target/i386/cpu.h > +++ b/target/i386/cpu.h > @@ -1185,7 +1185,7 @@ typedef struct { > #define CPU_NB_REGS CPU_NB_REGS32 > #endif > > -#define MAX_FIXED_COUNTERS 3 > +#define MAX_FIXED_COUNTERS 4 > #define MAX_GP_COUNTERS (MSR_IA32_PERF_STATUS - MSR_P6_EVNTSEL0) > > #define TARGET_INSN_START_EXTRA_WORDS 1 >
On 17/03/20 06:54, Like Xu wrote: > In the Intel SDM, "Table 18-2. Association of Fixed-Function > Performance Counters with Architectural Performance Events", > we may have a new fixed counter 'TOPDOWN.SLOTS' (since Icelake), > which counts the number of available slots for an unhalted > logical processor. Check commit 6017608936 in the kernel tree. > > Signed-off-by: Like Xu <like.xu@linux.intel.com> > --- > target/i386/cpu.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/target/i386/cpu.h b/target/i386/cpu.h > index 576f309bbf..ec2b67d425 100644 > --- a/target/i386/cpu.h > +++ b/target/i386/cpu.h > @@ -1185,7 +1185,7 @@ typedef struct { > #define CPU_NB_REGS CPU_NB_REGS32 > #endif > > -#define MAX_FIXED_COUNTERS 3 > +#define MAX_FIXED_COUNTERS 4 > #define MAX_GP_COUNTERS (MSR_IA32_PERF_STATUS - MSR_P6_EVNTSEL0) > > #define TARGET_INSN_START_EXTRA_WORDS 1 > Hi Like, the problem with this patch is that it breaks live migration; the vmstate_msr_architectural_pmu record hardcodes MAX_FIXED_COUNTERS as the number of registers. So it's more complicated, you need to add a new subsection (following vmstate_msr_architectural_pmu) and transmit it only if the 4th counter is nonzero (instead of the more complicated check in pmu_enable_needed). Just to be safe, I'd make the new subsection hold 16 counters and bump MAX_FIXED_COUNTERS to 16. Thanks, Paolo
On 2020/3/27 2:48, Paolo Bonzini wrote: > On 17/03/20 06:54, Like Xu wrote: >> In the Intel SDM, "Table 18-2. Association of Fixed-Function >> Performance Counters with Architectural Performance Events", >> we may have a new fixed counter 'TOPDOWN.SLOTS' (since Icelake), >> which counts the number of available slots for an unhalted >> logical processor. Check commit 6017608936 in the kernel tree. >> >> Signed-off-by: Like Xu <like.xu@linux.intel.com> >> --- >> target/i386/cpu.h | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/target/i386/cpu.h b/target/i386/cpu.h >> index 576f309bbf..ec2b67d425 100644 >> --- a/target/i386/cpu.h >> +++ b/target/i386/cpu.h >> @@ -1185,7 +1185,7 @@ typedef struct { >> #define CPU_NB_REGS CPU_NB_REGS32 >> #endif >> >> -#define MAX_FIXED_COUNTERS 3 >> +#define MAX_FIXED_COUNTERS 4 >> #define MAX_GP_COUNTERS (MSR_IA32_PERF_STATUS - MSR_P6_EVNTSEL0) >> >> #define TARGET_INSN_START_EXTRA_WORDS 1 >> > > Hi Like, the problem with this patch is that it breaks live migration; > the vmstate_msr_architectural_pmu record hardcodes MAX_FIXED_COUNTERS as > the number of registers. > > So it's more complicated, you need to add a new subsection (following > vmstate_msr_architectural_pmu) and transmit it only if the 4th counter > is nonzero (instead of the more complicated check in pmu_enable_needed). > Just to be safe, I'd make the new subsection hold 16 counters and bump > MAX_FIXED_COUNTERS to 16. The new MAX_FIXED_COUNTERS looks good to me and and let me follow up this live migration issue. Thanks, Like Xu > > Thanks, > > Paolo > >
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