[PATCH v6 38/42] target/arm: Set PSTATE.TCO on exception entry

Richard Henderson posted 42 patches 5 years, 6 months ago
There is a newer version of this series
[PATCH v6 38/42] target/arm: Set PSTATE.TCO on exception entry
Posted by Richard Henderson 5 years, 6 months ago
D1.10 specifies that exception handlers begin with tag checks overridden.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
v2: Only set if MTE feature present.
---
 target/arm/helper.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/target/arm/helper.c b/target/arm/helper.c
index 44e7c0d19b..b38dc74733 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -9664,6 +9664,9 @@ static void arm_cpu_do_interrupt_aarch64(CPUState *cs)
             break;
         }
     }
+    if (cpu_isar_feature(aa64_mte, cpu)) {
+        new_mode |= PSTATE_TCO;
+    }
 
     pstate_write(env, PSTATE_DAIF | new_mode);
     env->aarch64 = 1;
-- 
2.20.1