[PATCH v7 00/17] target/ppc: Correct some errors with real mode handling

David Gibson posted 17 patches 4 years, 2 months ago
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git fetch https://github.com/patchew-project/qemu tags/patchew/20200303034351.333043-1-david@gibson.dropbear.id.au
Maintainers: David Gibson <david@gibson.dropbear.id.au>
hw/ppc/spapr.c                  | 125 +++++++------
hw/ppc/spapr_cpu_core.c         |  10 +-
hw/ppc/spapr_hcall.c            |   4 +-
include/hw/ppc/spapr.h          |   4 +-
target/ppc/cpu-qom.h            |   1 +
target/ppc/cpu.h                |  25 +--
target/ppc/kvm.c                |   5 +-
target/ppc/kvm_ppc.h            |   7 +-
target/ppc/mmu-hash64.c         | 319 ++++++++++++--------------------
target/ppc/translate_init.inc.c |  63 ++++---
10 files changed, 246 insertions(+), 317 deletions(-)
[PATCH v7 00/17] target/ppc: Correct some errors with real mode handling
Posted by David Gibson 4 years, 2 months ago
POWER "book S" (server class) cpus have a concept of "real mode" where
MMU translation is disabled... sort of.  In fact this can mean a bunch
of slightly different things when hypervisor mode and other
considerations are present.

We had some errors in edge cases here, so clean some things up and
correct them.

Some of those limitations caused problems with calculating the size of
the Real Mode Area of pseries guests, so continue on to clean up and
correct those calculations as well.

Changes since v6:
 * Removed a no-longer-meaningful comment
 * Reworked RMLS handling for brevity and clarity
 * Fix some earlier rebase damage that mixed hunks between some patches
 * Fix a compile error mid-series
 * Fix a bug caused by patch re-ordering
 * Fixed some bugs in RMA calculation due to muddling local and global
   copies of the rma size
Changes since v5:
 * Fixed an error in the sense of a test (pointed out by Fabiano Rosas)
Changes since v4:
 * Some tiny cosmetic fixes to the original patches
 * Added a bunch of extra patches correcting RMA calculation
Changes since v3:
 * Fix style errors reported by checkpatch
Changes since v2:
 * Removed 32-bit hypervisor stubs more completely
 * Minor polish based on review comments
Changes since RFCv1:
 * Add a number of extra patches taking advantage of the initial
   cleanups

David Gibson (17):
  ppc: Remove stub support for 32-bit hypervisor mode
  ppc: Remove stub of PPC970 HID4 implementation
  target/ppc: Correct handling of real mode accesses with vhyp on hash
    MMU
  target/ppc: Introduce ppc_hash64_use_vrma() helper
  spapr, ppc: Remove VPM0/RMLS hacks for POWER9
  target/ppc: Remove RMOR register from POWER9 & POWER10
  target/ppc: Use class fields to simplify LPCR masking
  target/ppc: Streamline calculation of RMA limit from LPCR[RMLS]
  target/ppc: Correct RMLS table
  target/ppc: Only calculate RMLS derived RMA limit on demand
  target/ppc: Don't store VRMA SLBE persistently
  spapr: Don't use weird units for MIN_RMA_SLOF
  spapr,ppc: Simplify signature of kvmppc_rma_size()
  spapr: Don't attempt to clamp RMA to VRMA constraint
  spapr: Don't clamp RMA to 16GiB on new machine types
  spapr: Clean up RMA size calculation
  spapr: Fold spapr_node0_size() into its only caller

 hw/ppc/spapr.c                  | 125 +++++++------
 hw/ppc/spapr_cpu_core.c         |  10 +-
 hw/ppc/spapr_hcall.c            |   4 +-
 include/hw/ppc/spapr.h          |   4 +-
 target/ppc/cpu-qom.h            |   1 +
 target/ppc/cpu.h                |  25 +--
 target/ppc/kvm.c                |   5 +-
 target/ppc/kvm_ppc.h            |   7 +-
 target/ppc/mmu-hash64.c         | 319 ++++++++++++--------------------
 target/ppc/translate_init.inc.c |  63 ++++---
 10 files changed, 246 insertions(+), 317 deletions(-)

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2.24.1