[PATCH v2 0/4] target/arm vector improvements

Richard Henderson posted 4 patches 4 years, 2 months ago
Test docker-quick@centos7 passed
Test FreeBSD passed
Test docker-mingw@fedora passed
Test checkpatch failed
Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20200216214232.4230-1-richard.henderson@linaro.org
target/arm/helper-sve.h    |   2 +
target/arm/helper.h        |  21 ++-
target/arm/translate.h     |   6 +
target/arm/neon_helper.c   | 117 -------------
target/arm/translate-a64.c |  83 ++++-----
target/arm/translate.c     | 348 ++++++++++++++++++++++++++++++++-----
target/arm/vec_helper.c    | 211 ++++++++++++++++++++++
7 files changed, 560 insertions(+), 228 deletions(-)
[PATCH v2 0/4] target/arm vector improvements
Posted by Richard Henderson 4 years, 2 months ago
Changes for v2:

* Rename function arguments as requested by ajb.
* Minor optimization in helper_gvec_pmul_b.

Original blurb:

The first patch has been seen before.

  https://patchwork.ozlabs.org/patch/1115039/

It had a bug and I didn't fix it right away and then forgot.
Fixed now; I had mixed up the operand ordering for aarch32.

The next 3 are something that I noticed while doing other stuff.

In particular, pmull is used heavily during https transfers.
While cloning a repository, the old code peaks at 27% of the
total runtime, as measured by perf top.  The new code does
not quite reach 3% repeating the same clone.

In addition, the new helper functions are in the form that
will be required for the implementation of SVE2.


r~

Richard Henderson (4):
  target/arm: Vectorize USHL and SSHL
  target/arm: Convert PMUL.8 to gvec
  target/arm: Convert PMULL.64 to gvec
  target/arm: Convert PMULL.8 to gvec

 target/arm/helper-sve.h    |   2 +
 target/arm/helper.h        |  21 ++-
 target/arm/translate.h     |   6 +
 target/arm/neon_helper.c   | 117 -------------
 target/arm/translate-a64.c |  83 ++++-----
 target/arm/translate.c     | 348 ++++++++++++++++++++++++++++++++-----
 target/arm/vec_helper.c    | 211 ++++++++++++++++++++++
 7 files changed, 560 insertions(+), 228 deletions(-)

-- 
2.20.1


Re: [PATCH v2 0/4] target/arm vector improvements
Posted by no-reply@patchew.org 4 years, 2 months ago
Patchew URL: https://patchew.org/QEMU/20200216214232.4230-1-richard.henderson@linaro.org/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Subject: [PATCH v2 0/4] target/arm vector improvements
Message-id: 20200216214232.4230-1-richard.henderson@linaro.org
Type: series

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git rev-parse base > /dev/null || exit 0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

From https://github.com/patchew-project/qemu
 * [new tag]         patchew/20200216214232.4230-1-richard.henderson@linaro.org -> patchew/20200216214232.4230-1-richard.henderson@linaro.org
Switched to a new branch 'test'
2236552 target/arm: Convert PMULL.8 to gvec
8892524 target/arm: Convert PMULL.64 to gvec
a438d40 target/arm: Convert PMUL.8 to gvec
39164de target/arm: Vectorize USHL and SSHL

=== OUTPUT BEGIN ===
1/4 Checking commit 39164de944d5 (target/arm: Vectorize USHL and SSHL)
ERROR: trailing statements should be on next line
#161: FILE: target/arm/translate.c:3578:
+            case 2: gen_ushl_i32(var, var, shift); break;

ERROR: trailing statements should be on next line
#168: FILE: target/arm/translate.c:3584:
+            case 2: gen_sshl_i32(var, var, shift); break;

total: 2 errors, 0 warnings, 569 lines checked

Patch 1/4 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

2/4 Checking commit a438d4012b70 (target/arm: Convert PMUL.8 to gvec)
3/4 Checking commit 889252410254 (target/arm: Convert PMULL.64 to gvec)
4/4 Checking commit 2236552a4b44 (target/arm: Convert PMULL.8 to gvec)
=== OUTPUT END ===

Test command exited with code: 1


The full log is available at
http://patchew.org/logs/20200216214232.4230-1-richard.henderson@linaro.org/testing.checkpatch/?type=message.
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Please send your feedback to patchew-devel@redhat.com
Re: [PATCH v2 0/4] target/arm vector improvements
Posted by Peter Maydell 4 years, 2 months ago
On Sun, 16 Feb 2020 at 21:42, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> Changes for v2:
>
> * Rename function arguments as requested by ajb.
> * Minor optimization in helper_gvec_pmul_b.
>
> Original blurb:
>
> The first patch has been seen before.
>
>   https://patchwork.ozlabs.org/patch/1115039/
>
> It had a bug and I didn't fix it right away and then forgot.
> Fixed now; I had mixed up the operand ordering for aarch32.
>
> The next 3 are something that I noticed while doing other stuff.
>
> In particular, pmull is used heavily during https transfers.
> While cloning a repository, the old code peaks at 27% of the
> total runtime, as measured by perf top.  The new code does
> not quite reach 3% repeating the same clone.
>
> In addition, the new helper functions are in the form that
> will be required for the implementation of SVE2.



Applied to target-arm.next, thanks.

-- PMM