[PULL 0/3] tcg patch queue
[PULL 0/4] tcg patch queue
1
The following changes since commit e18e5501d8ac692d32657a3e1ef545b14e72b730:
1
Pretty small still, but there are two patches that ought
2
to get backported to stable, so no point in delaying.
2
3
3
Merge remote-tracking branch 'remotes/dgilbert-gitlab/tags/pull-virtiofs-20200210' into staging (2020-02-10 18:09:14 +0000)
4
r~
5
6
The following changes since commit a5ba0a7e4e150d1350a041f0d0ef9ca6c8d7c307:
7
8
Merge tag 'pull-aspeed-20241211' of https://github.com/legoater/qemu into staging (2024-12-11 15:16:47 +0000)
4
9
5
are available in the Git repository at:
10
are available in the Git repository at:
6
11
7
https://github.com/rth7680/qemu.git tags/pull-tcg-20200212
12
https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20241212
8
13
9
for you to fetch changes up to 2445971604c1cfd3ec484457159f4ac300fb04d2:
14
for you to fetch changes up to 7ac87b14a92234b6a89b701b4043ad6cf8bdcccf:
10
15
11
tcg: Add tcg_gen_gvec_5_ptr (2020-02-12 14:58:36 -0800)
16
target/sparc: Use memcpy() and remove memcpy32() (2024-12-12 14:28:38 -0600)
12
17
13
----------------------------------------------------------------
18
----------------------------------------------------------------
14
Fix breakpoint invalidation.
19
tcg: Reset free_temps before tcg_optimize
15
Add support for tcg helpers with 7 arguments.
20
tcg/riscv: Fix StoreStore barrier generation
16
Add support for gvec helpers with 5 arguments.
21
include/exec: Introduce fpst alias in helper-head.h.inc
22
target/sparc: Use memcpy() and remove memcpy32()
17
23
18
----------------------------------------------------------------
24
----------------------------------------------------------------
19
Max Filippov (1):
25
Philippe Mathieu-Daudé (1):
20
exec: flush CPU TB cache in breakpoint_invalidate
26
target/sparc: Use memcpy() and remove memcpy32()
21
27
22
Richard Henderson (1):
28
Richard Henderson (2):
23
tcg: Add tcg_gen_gvec_5_ptr
29
tcg: Reset free_temps before tcg_optimize
30
include/exec: Introduce fpst alias in helper-head.h.inc
24
31
25
Taylor Simpson (1):
32
Roman Artemev (1):
26
tcg: Add support for a helper with 7 arguments
33
tcg/riscv: Fix StoreStore barrier generation
27
34
28
include/exec/helper-gen.h | 13 +++++++++++++
35
include/tcg/tcg-temp-internal.h | 6 ++++++
29
include/exec/helper-head.h | 2 ++
36
accel/tcg/plugin-gen.c | 2 +-
30
include/exec/helper-proto.h | 6 ++++++
37
target/sparc/win_helper.c | 26 ++++++++------------------
31
include/exec/helper-tcg.h | 7 +++++++
38
tcg/tcg.c | 5 ++++-
32
include/tcg/tcg-op-gvec.h | 7 +++++++
39
include/exec/helper-head.h.inc | 3 +++
33
exec.c | 15 +++++++--------
40
tcg/riscv/tcg-target.c.inc | 2 +-
34
tcg/tcg-op-gvec.c | 32 ++++++++++++++++++++++++++++++++
41
6 files changed, 23 insertions(+), 21 deletions(-)
35
7 files changed, 74 insertions(+), 8 deletions(-)
36
42
diff view generated by jsdifflib
[PULL 3/3] tcg: Add tcg_gen_gvec_5_ptr
[PULL 1/4] tcg: Reset free_temps before tcg_optimize
1
Extend the vector generator infrastructure to handle
1
When allocating new temps during tcg_optmize, do not re-use
2
5 vector arguments.
2
any EBB temps that were used within the TB. We do not have
3
any idea what span of the TB in which the temp was live.
3
4
4
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
5
Introduce tcg_temp_ebb_reset_freed and use before tcg_optimize,
5
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
6
as well as replacing the equivalent in plugin_gen_inject and
6
Reviewed-by: Taylor Simpson <tsimpson@quicinc.com>
7
tcg_func_start.
8
9
Cc: qemu-stable@nongnu.org
10
Fixes: fb04ab7ddd8 ("tcg/optimize: Lower TCG_COND_TST{EQ,NE} if unsupported")
11
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2711
12
Reported-by: wannacu <wannacu2049@gmail.com>
7
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
13
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
15
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
8
---
16
---
9
include/tcg/tcg-op-gvec.h | 7 +++++++
17
include/tcg/tcg-temp-internal.h | 6 ++++++
10
tcg/tcg-op-gvec.c | 32 ++++++++++++++++++++++++++++++++
18
accel/tcg/plugin-gen.c | 2 +-
11
2 files changed, 39 insertions(+)
19
tcg/tcg.c | 5 ++++-
20
3 files changed, 11 insertions(+), 2 deletions(-)
12
21
13
diff --git a/include/tcg/tcg-op-gvec.h b/include/tcg/tcg-op-gvec.h
22
diff --git a/include/tcg/tcg-temp-internal.h b/include/tcg/tcg-temp-internal.h
14
index XXXXXXX..XXXXXXX 100644
23
index XXXXXXX..XXXXXXX 100644
15
--- a/include/tcg/tcg-op-gvec.h
24
--- a/include/tcg/tcg-temp-internal.h
16
+++ b/include/tcg/tcg-op-gvec.h
25
+++ b/include/tcg/tcg-temp-internal.h
17
@@ -XXX,XX +XXX,XX @@ void tcg_gen_gvec_4_ptr(uint32_t dofs, uint32_t aofs, uint32_t bofs,
26
@@ -XXX,XX +XXX,XX @@ TCGv_i64 tcg_temp_ebb_new_i64(void);
18
uint32_t maxsz, int32_t data,
27
TCGv_ptr tcg_temp_ebb_new_ptr(void);
19
gen_helper_gvec_4_ptr *fn);
28
TCGv_i128 tcg_temp_ebb_new_i128(void);
20
29
21
+typedef void gen_helper_gvec_5_ptr(TCGv_ptr, TCGv_ptr, TCGv_ptr, TCGv_ptr,
30
+/* Forget all freed EBB temps, so that new allocations produce new temps. */
22
+ TCGv_ptr, TCGv_ptr, TCGv_i32);
31
+static inline void tcg_temp_ebb_reset_freed(TCGContext *s)
23
+void tcg_gen_gvec_5_ptr(uint32_t dofs, uint32_t aofs, uint32_t bofs,
24
+ uint32_t cofs, uint32_t eofs, TCGv_ptr ptr,
25
+ uint32_t oprsz, uint32_t maxsz, int32_t data,
26
+ gen_helper_gvec_5_ptr *fn);
27
+
28
/* Expand a gvec operation. Either inline or out-of-line depending on
29
the actual vector size and the operations supported by the host. */
30
typedef struct {
31
diff --git a/tcg/tcg-op-gvec.c b/tcg/tcg-op-gvec.c
32
index XXXXXXX..XXXXXXX 100644
33
--- a/tcg/tcg-op-gvec.c
34
+++ b/tcg/tcg-op-gvec.c
35
@@ -XXX,XX +XXX,XX @@ void tcg_gen_gvec_4_ptr(uint32_t dofs, uint32_t aofs, uint32_t bofs,
36
tcg_temp_free_i32(desc);
37
}
38
39
+/* Generate a call to a gvec-style helper with five vector operands
40
+ and an extra pointer operand. */
41
+void tcg_gen_gvec_5_ptr(uint32_t dofs, uint32_t aofs, uint32_t bofs,
42
+ uint32_t cofs, uint32_t eofs, TCGv_ptr ptr,
43
+ uint32_t oprsz, uint32_t maxsz, int32_t data,
44
+ gen_helper_gvec_5_ptr *fn)
45
+{
32
+{
46
+ TCGv_ptr a0, a1, a2, a3, a4;
33
+ memset(s->free_temps, 0, sizeof(s->free_temps));
47
+ TCGv_i32 desc = tcg_const_i32(simd_desc(oprsz, maxsz, data));
48
+
49
+ a0 = tcg_temp_new_ptr();
50
+ a1 = tcg_temp_new_ptr();
51
+ a2 = tcg_temp_new_ptr();
52
+ a3 = tcg_temp_new_ptr();
53
+ a4 = tcg_temp_new_ptr();
54
+
55
+ tcg_gen_addi_ptr(a0, cpu_env, dofs);
56
+ tcg_gen_addi_ptr(a1, cpu_env, aofs);
57
+ tcg_gen_addi_ptr(a2, cpu_env, bofs);
58
+ tcg_gen_addi_ptr(a3, cpu_env, cofs);
59
+ tcg_gen_addi_ptr(a4, cpu_env, eofs);
60
+
61
+ fn(a0, a1, a2, a3, a4, ptr, desc);
62
+
63
+ tcg_temp_free_ptr(a0);
64
+ tcg_temp_free_ptr(a1);
65
+ tcg_temp_free_ptr(a2);
66
+ tcg_temp_free_ptr(a3);
67
+ tcg_temp_free_ptr(a4);
68
+ tcg_temp_free_i32(desc);
69
+}
34
+}
70
+
35
+
71
/* Return true if we want to implement something of OPRSZ bytes
36
#endif /* TCG_TEMP_FREE_H */
72
in units of LNSZ. This limits the expansion of inline code. */
37
diff --git a/accel/tcg/plugin-gen.c b/accel/tcg/plugin-gen.c
73
static inline bool check_size_impl(uint32_t oprsz, uint32_t lnsz)
38
index XXXXXXX..XXXXXXX 100644
39
--- a/accel/tcg/plugin-gen.c
40
+++ b/accel/tcg/plugin-gen.c
41
@@ -XXX,XX +XXX,XX @@ static void plugin_gen_inject(struct qemu_plugin_tb *plugin_tb)
42
* that might be live within the existing opcode stream.
43
* The simplest solution is to release them all and create new.
44
*/
45
- memset(tcg_ctx->free_temps, 0, sizeof(tcg_ctx->free_temps));
46
+ tcg_temp_ebb_reset_freed(tcg_ctx);
47
48
QTAILQ_FOREACH_SAFE(op, &tcg_ctx->ops, link, next) {
49
switch (op->opc) {
50
diff --git a/tcg/tcg.c b/tcg/tcg.c
51
index XXXXXXX..XXXXXXX 100644
52
--- a/tcg/tcg.c
53
+++ b/tcg/tcg.c
54
@@ -XXX,XX +XXX,XX @@ void tcg_func_start(TCGContext *s)
55
s->nb_temps = s->nb_globals;
56
57
/* No temps have been previously allocated for size or locality. */
58
- memset(s->free_temps, 0, sizeof(s->free_temps));
59
+ tcg_temp_ebb_reset_freed(s);
60
61
/* No constant temps have been previously allocated. */
62
for (int i = 0; i < TCG_TYPE_COUNT; ++i) {
63
@@ -XXX,XX +XXX,XX @@ int tcg_gen_code(TCGContext *s, TranslationBlock *tb, uint64_t pc_start)
64
}
65
#endif
66
67
+ /* Do not reuse any EBB that may be allocated within the TB. */
68
+ tcg_temp_ebb_reset_freed(s);
69
+
70
tcg_optimize(s);
71
72
reachable_code_pass(s);
74
--
73
--
75
2.20.1
74
2.43.0
76
75
77
76
diff view generated by jsdifflib
New patch
[PULL 2/4] tcg/riscv: Fix StoreStore barrier generation
1
From: Roman Artemev <roman.artemev@syntacore.com>
1
2
3
On RISC-V to StoreStore barrier corresponds
4
`fence w, w` not `fence r, r`
5
6
Cc: qemu-stable@nongnu.org
7
Fixes: efbea94c76b ("tcg/riscv: Add slowpath load and store instructions")
8
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
9
Signed-off-by: Denis Tomashev <denis.tomashev@syntacore.com>
10
Signed-off-by: Roman Artemev <roman.artemev@syntacore.com>
11
Message-ID: <e2f2131e294a49e79959d4fa9ec02cf4@syntacore.com>
12
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
13
---
14
tcg/riscv/tcg-target.c.inc | 2 +-
15
1 file changed, 1 insertion(+), 1 deletion(-)
16
17
diff --git a/tcg/riscv/tcg-target.c.inc b/tcg/riscv/tcg-target.c.inc
18
index XXXXXXX..XXXXXXX 100644
19
--- a/tcg/riscv/tcg-target.c.inc
20
+++ b/tcg/riscv/tcg-target.c.inc
21
@@ -XXX,XX +XXX,XX @@ static void tcg_out_mb(TCGContext *s, TCGArg a0)
22
insn |= 0x02100000;
23
}
24
if (a0 & TCG_MO_ST_ST) {
25
- insn |= 0x02200000;
26
+ insn |= 0x01100000;
27
}
28
tcg_out32(s, insn);
29
}
30
--
31
2.43.0
diff view generated by jsdifflib
[PULL 2/3] tcg: Add support for a helper with 7 arguments
[PULL 3/4] include/exec: Introduce fpst alias in helper-head.h.inc
1
From: Taylor Simpson <tsimpson@quicinc.com>
1
This allows targets to declare that the helper requires a
2
float_status pointer and instead of a generic void pointer.
2
3
3
Currently, helpers can only take up to 6 arguments. This patch adds the
4
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
4
capability for up to 7 arguments. I have tested it with the Hexagon port
5
that I am preparing for submission.
6
7
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
8
Message-Id: <1580942510-2820-1-git-send-email-tsimpson@quicinc.com>
9
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
10
---
6
---
11
include/exec/helper-gen.h | 13 +++++++++++++
7
include/exec/helper-head.h.inc | 3 +++
12
include/exec/helper-head.h | 2 ++
8
1 file changed, 3 insertions(+)
13
include/exec/helper-proto.h | 6 ++++++
14
include/exec/helper-tcg.h | 7 +++++++
15
4 files changed, 28 insertions(+)
16
9
17
diff --git a/include/exec/helper-gen.h b/include/exec/helper-gen.h
10
diff --git a/include/exec/helper-head.h.inc b/include/exec/helper-head.h.inc
18
index XXXXXXX..XXXXXXX 100644
11
index XXXXXXX..XXXXXXX 100644
19
--- a/include/exec/helper-gen.h
12
--- a/include/exec/helper-head.h.inc
20
+++ b/include/exec/helper-gen.h
13
+++ b/include/exec/helper-head.h.inc
21
@@ -XXX,XX +XXX,XX @@ static inline void glue(gen_helper_, name)(dh_retvar_decl(ret) \
22
tcg_gen_callN(HELPER(name), dh_retvar(ret), 6, args); \
23
}
24
25
+#define DEF_HELPER_FLAGS_7(name, flags, ret, t1, t2, t3, t4, t5, t6, t7)\
26
+static inline void glue(gen_helper_, name)(dh_retvar_decl(ret) \
27
+ dh_arg_decl(t1, 1), dh_arg_decl(t2, 2), dh_arg_decl(t3, 3), \
28
+ dh_arg_decl(t4, 4), dh_arg_decl(t5, 5), dh_arg_decl(t6, 6), \
29
+ dh_arg_decl(t7, 7)) \
30
+{ \
31
+ TCGTemp *args[7] = { dh_arg(t1, 1), dh_arg(t2, 2), dh_arg(t3, 3), \
32
+ dh_arg(t4, 4), dh_arg(t5, 5), dh_arg(t6, 6), \
33
+ dh_arg(t7, 7) }; \
34
+ tcg_gen_callN(HELPER(name), dh_retvar(ret), 7, args); \
35
+}
36
+
37
#include "helper.h"
38
#include "trace/generated-helpers.h"
39
#include "trace/generated-helpers-wrappers.h"
40
@@ -XXX,XX +XXX,XX @@ static inline void glue(gen_helper_, name)(dh_retvar_decl(ret) \
41
#undef DEF_HELPER_FLAGS_4
42
#undef DEF_HELPER_FLAGS_5
43
#undef DEF_HELPER_FLAGS_6
44
+#undef DEF_HELPER_FLAGS_7
45
#undef GEN_HELPER
46
47
#endif /* HELPER_GEN_H */
48
diff --git a/include/exec/helper-head.h b/include/exec/helper-head.h
49
index XXXXXXX..XXXXXXX 100644
50
--- a/include/exec/helper-head.h
51
+++ b/include/exec/helper-head.h
52
@@ -XXX,XX +XXX,XX @@
14
@@ -XXX,XX +XXX,XX @@
53
DEF_HELPER_FLAGS_5(name, 0, ret, t1, t2, t3, t4, t5)
15
#define dh_alias_ptr ptr
54
#define DEF_HELPER_6(name, ret, t1, t2, t3, t4, t5, t6) \
16
#define dh_alias_cptr ptr
55
DEF_HELPER_FLAGS_6(name, 0, ret, t1, t2, t3, t4, t5, t6)
17
#define dh_alias_env ptr
56
+#define DEF_HELPER_7(name, ret, t1, t2, t3, t4, t5, t6, t7) \
18
+#define dh_alias_fpst ptr
57
+ DEF_HELPER_FLAGS_7(name, 0, ret, t1, t2, t3, t4, t5, t6, t7)
19
#define dh_alias_void void
58
20
#define dh_alias_noreturn noreturn
59
/* MAX_OPC_PARAM_IARGS must be set to n if last entry is DEF_HELPER_FLAGS_n. */
21
#define dh_alias(t) glue(dh_alias_, t)
60
61
diff --git a/include/exec/helper-proto.h b/include/exec/helper-proto.h
62
index XXXXXXX..XXXXXXX 100644
63
--- a/include/exec/helper-proto.h
64
+++ b/include/exec/helper-proto.h
65
@@ -XXX,XX +XXX,XX @@ dh_ctype(ret) HELPER(name) (dh_ctype(t1), dh_ctype(t2), dh_ctype(t3), \
66
dh_ctype(ret) HELPER(name) (dh_ctype(t1), dh_ctype(t2), dh_ctype(t3), \
67
dh_ctype(t4), dh_ctype(t5), dh_ctype(t6));
68
69
+#define DEF_HELPER_FLAGS_7(name, flags, ret, t1, t2, t3, t4, t5, t6, t7) \
70
+dh_ctype(ret) HELPER(name) (dh_ctype(t1), dh_ctype(t2), dh_ctype(t3), \
71
+ dh_ctype(t4), dh_ctype(t5), dh_ctype(t6), \
72
+ dh_ctype(t7));
73
+
74
#include "helper.h"
75
#include "trace/generated-helpers.h"
76
#include "tcg-runtime.h"
77
@@ -XXX,XX +XXX,XX @@ dh_ctype(ret) HELPER(name) (dh_ctype(t1), dh_ctype(t2), dh_ctype(t3), \
78
#undef DEF_HELPER_FLAGS_4
79
#undef DEF_HELPER_FLAGS_5
80
#undef DEF_HELPER_FLAGS_6
81
+#undef DEF_HELPER_FLAGS_7
82
83
#endif /* HELPER_PROTO_H */
84
diff --git a/include/exec/helper-tcg.h b/include/exec/helper-tcg.h
85
index XXXXXXX..XXXXXXX 100644
86
--- a/include/exec/helper-tcg.h
87
+++ b/include/exec/helper-tcg.h
88
@@ -XXX,XX +XXX,XX @@
22
@@ -XXX,XX +XXX,XX @@
89
| dh_sizemask(t2, 2) | dh_sizemask(t3, 3) | dh_sizemask(t4, 4) \
23
#define dh_ctype_ptr void *
90
| dh_sizemask(t5, 5) | dh_sizemask(t6, 6) },
24
#define dh_ctype_cptr const void *
91
25
#define dh_ctype_env CPUArchState *
92
+#define DEF_HELPER_FLAGS_7(NAME, FLAGS, ret, t1, t2, t3, t4, t5, t6, t7) \
26
+#define dh_ctype_fpst float_status *
93
+ { .func = HELPER(NAME), .name = str(NAME), .flags = FLAGS, \
27
#define dh_ctype_void void
94
+ .sizemask = dh_sizemask(ret, 0) | dh_sizemask(t1, 1) \
28
#define dh_ctype_noreturn G_NORETURN void
95
+ | dh_sizemask(t2, 2) | dh_sizemask(t3, 3) | dh_sizemask(t4, 4) \
29
#define dh_ctype(t) dh_ctype_##t
96
+ | dh_sizemask(t5, 5) | dh_sizemask(t6, 6) | dh_sizemask(t7, 7) },
97
+
98
#include "helper.h"
99
#include "trace/generated-helpers.h"
100
#include "tcg-runtime.h"
101
@@ -XXX,XX +XXX,XX @@
30
@@ -XXX,XX +XXX,XX @@
102
#undef DEF_HELPER_FLAGS_4
31
#define dh_typecode_f64 dh_typecode_i64
103
#undef DEF_HELPER_FLAGS_5
32
#define dh_typecode_cptr dh_typecode_ptr
104
#undef DEF_HELPER_FLAGS_6
33
#define dh_typecode_env dh_typecode_ptr
105
+#undef DEF_HELPER_FLAGS_7
34
+#define dh_typecode_fpst dh_typecode_ptr
106
35
#define dh_typecode(t) dh_typecode_##t
107
#endif /* HELPER_TCG_H */
36
37
#define dh_callflag_i32 0
108
--
38
--
109
2.20.1
39
2.43.0
110
40
111
41
diff view generated by jsdifflib
[PULL 1/3] exec: flush CPU TB cache in breakpoint_invalidate
[PULL 4/4] target/sparc: Use memcpy() and remove memcpy32()
1
From: Max Filippov <jcmvbkbc@gmail.com>
1
From: Philippe Mathieu-Daudé <philmd@linaro.org>
2
2
3
When a breakpoint is inserted at location for which there's currently no
3
Rather than manually copying each register, use
4
virtual to physical translation no action is taken on CPU TB cache. If a
4
the libc memcpy(), which is well optimized nowadays.
5
TB for that virtual address already exists but is not visible ATM the
6
breakpoint won't be hit next time an instruction at that address will be
7
executed.
8
5
9
Flush entire CPU TB cache in breakpoint_invalidate to force
6
Suggested-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
10
re-translation of all TBs for the breakpoint address.
7
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
11
12
This change fixes the following scenario:
13
- linux user application is running
14
- a breakpoint is inserted from QEMU gdbstub for a user address that is
15
not currently present in the target CPU TLB
16
- an instruction at that address is executed, but the external debugger
17
doesn't get control.
18
19
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
8
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
20
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
9
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
21
Message-Id: <20191127220602.10827-2-jcmvbkbc@gmail.com>
10
Message-ID: <20241205205418.67613-1-philmd@linaro.org>
22
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
11
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
23
---
12
---
24
exec.c | 15 +++++++--------
13
target/sparc/win_helper.c | 26 ++++++++------------------
25
1 file changed, 7 insertions(+), 8 deletions(-)
14
1 file changed, 8 insertions(+), 18 deletions(-)
26
15
27
diff --git a/exec.c b/exec.c
16
diff --git a/target/sparc/win_helper.c b/target/sparc/win_helper.c
28
index XXXXXXX..XXXXXXX 100644
17
index XXXXXXX..XXXXXXX 100644
29
--- a/exec.c
18
--- a/target/sparc/win_helper.c
30
+++ b/exec.c
19
+++ b/target/sparc/win_helper.c
31
@@ -XXX,XX +XXX,XX @@ void tb_invalidate_phys_addr(AddressSpace *as, hwaddr addr, MemTxAttrs attrs)
20
@@ -XXX,XX +XXX,XX @@
32
21
#include "exec/helper-proto.h"
33
static void breakpoint_invalidate(CPUState *cpu, target_ulong pc)
22
#include "trace.h"
23
24
-static inline void memcpy32(target_ulong *dst, const target_ulong *src)
25
-{
26
- dst[0] = src[0];
27
- dst[1] = src[1];
28
- dst[2] = src[2];
29
- dst[3] = src[3];
30
- dst[4] = src[4];
31
- dst[5] = src[5];
32
- dst[6] = src[6];
33
- dst[7] = src[7];
34
-}
35
-
36
void cpu_set_cwp(CPUSPARCState *env, int new_cwp)
34
{
37
{
35
- MemTxAttrs attrs;
38
/* put the modified wrap registers at their proper location */
36
- hwaddr phys = cpu_get_phys_page_attrs_debug(cpu, pc, &attrs);
39
if (env->cwp == env->nwindows - 1) {
37
- int asidx = cpu_asidx_from_attrs(cpu, attrs);
40
- memcpy32(env->regbase, env->regbase + env->nwindows * 16);
38
- if (phys != -1) {
41
+ memcpy(env->regbase, env->regbase + env->nwindows * 16,
39
- /* Locks grabbed by tb_invalidate_phys_addr */
42
+ sizeof(env->gregs));
40
- tb_invalidate_phys_addr(cpu->cpu_ases[asidx].as,
43
}
41
- phys | (pc & ~TARGET_PAGE_MASK), attrs);
44
env->cwp = new_cwp;
42
- }
45
43
+ /*
46
/* put the wrap registers at their temporary location */
44
+ * There may not be a virtual to physical translation for the pc
47
if (new_cwp == env->nwindows - 1) {
45
+ * right now, but there may exist cached TB for this pc.
48
- memcpy32(env->regbase + env->nwindows * 16, env->regbase);
46
+ * Flush the whole TB cache to force re-translation of such TBs.
49
+ memcpy(env->regbase + env->nwindows * 16, env->regbase,
47
+ * This is heavyweight, but we're debugging anyway.
50
+ sizeof(env->gregs));
48
+ */
51
}
49
+ tb_flush(cpu);
52
env->regwptr = env->regbase + (new_cwp * 16);
50
}
53
}
51
#endif
54
@@ -XXX,XX +XXX,XX @@ void cpu_gl_switch_gregs(CPUSPARCState *env, uint32_t new_gl)
52
55
dst = get_gl_gregset(env, env->gl);
56
57
if (src != dst) {
58
- memcpy32(dst, env->gregs);
59
- memcpy32(env->gregs, src);
60
+ memcpy(dst, env->gregs, sizeof(env->gregs));
61
+ memcpy(env->gregs, src, sizeof(env->gregs));
62
}
63
}
64
65
@@ -XXX,XX +XXX,XX @@ void cpu_change_pstate(CPUSPARCState *env, uint32_t new_pstate)
66
/* Switch global register bank */
67
src = get_gregset(env, new_pstate_regs);
68
dst = get_gregset(env, pstate_regs);
69
- memcpy32(dst, env->gregs);
70
- memcpy32(env->gregs, src);
71
+ memcpy(dst, env->gregs, sizeof(env->gregs));
72
+ memcpy(env->gregs, src, sizeof(env->gregs));
73
} else {
74
trace_win_helper_no_switch_pstate(new_pstate_regs);
75
}
53
--
76
--
54
2.20.1
77
2.43.0
55
78
56
79
diff view generated by jsdifflib

Patchew 2.1-devel-b67e4c2

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