1
The following changes since commit e18e5501d8ac692d32657a3e1ef545b14e72b730:
1
The following changes since commit 67e41fe0cfb62e6cdfa659f0155417d17e5274ea:
2
2
3
Merge remote-tracking branch 'remotes/dgilbert-gitlab/tags/pull-virtiofs-20200210' into staging (2020-02-10 18:09:14 +0000)
3
Merge tag 'pull-ppc-20220104' of https://github.com/legoater/qemu into staging (2022-01-04 07:23:27 -0800)
4
4
5
are available in the Git repository at:
5
are available in the Git repository at:
6
6
7
https://github.com/rth7680/qemu.git tags/pull-tcg-20200212
7
https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20220104
8
8
9
for you to fetch changes up to 2445971604c1cfd3ec484457159f4ac300fb04d2:
9
for you to fetch changes up to d7478d4229f0a2b2817a55487e6b17081099fae4:
10
10
11
tcg: Add tcg_gen_gvec_5_ptr (2020-02-12 14:58:36 -0800)
11
common-user: Fix tail calls to safe_syscall_set_errno_tail (2022-01-04 15:41:03 -0800)
12
12
13
----------------------------------------------------------------
13
----------------------------------------------------------------
14
Fix breakpoint invalidation.
14
Fix for safe_syscall_base.
15
Add support for tcg helpers with 7 arguments.
15
Fix for folding of vector add/sub.
16
Add support for gvec helpers with 5 arguments.
16
Fix build on loongarch64 with gcc 8.
17
Remove decl for qemu_run_machine_init_done_notifiers.
17
18
18
----------------------------------------------------------------
19
----------------------------------------------------------------
19
Max Filippov (1):
20
Philippe Mathieu-Daudé (1):
20
exec: flush CPU TB cache in breakpoint_invalidate
21
linux-user: Fix trivial build error on loongarch64 hosts
21
22
22
Richard Henderson (1):
23
Richard Henderson (2):
23
tcg: Add tcg_gen_gvec_5_ptr
24
tcg/optimize: Fix folding of vector ops
25
common-user: Fix tail calls to safe_syscall_set_errno_tail
24
26
25
Taylor Simpson (1):
27
Xiaoyao Li (1):
26
tcg: Add support for a helper with 7 arguments
28
sysemu: Cleanup qemu_run_machine_init_done_notifiers()
27
29
28
include/exec/helper-gen.h | 13 +++++++++++++
30
include/sysemu/sysemu.h | 1 -
29
include/exec/helper-head.h | 2 ++
31
linux-user/host/loongarch64/host-signal.h | 4 +--
30
include/exec/helper-proto.h | 6 ++++++
32
tcg/optimize.c | 49 +++++++++++++++++++++++-------
31
include/exec/helper-tcg.h | 7 +++++++
33
common-user/host/i386/safe-syscall.inc.S | 1 +
32
include/tcg/tcg-op-gvec.h | 7 +++++++
34
common-user/host/mips/safe-syscall.inc.S | 1 +
33
exec.c | 15 +++++++--------
35
common-user/host/x86_64/safe-syscall.inc.S | 1 +
34
tcg/tcg-op-gvec.c | 32 ++++++++++++++++++++++++++++++++
36
6 files changed, 42 insertions(+), 15 deletions(-)
35
7 files changed, 74 insertions(+), 8 deletions(-)
36
37
diff view generated by jsdifflib
1
Extend the vector generator infrastructure to handle
1
Bitwise operations are easy to fold, because the operation is
2
5 vector arguments.
2
identical regardless of element size. But add and sub need
3
extra element size info that is not currently propagated.
3
4
4
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
5
Fixes: 2f9f08ba43d
5
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
6
Cc: qemu-stable@nongnu.org
6
Reviewed-by: Taylor Simpson <tsimpson@quicinc.com>
7
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/799
8
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
7
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
8
---
10
---
9
include/tcg/tcg-op-gvec.h | 7 +++++++
11
tcg/optimize.c | 49 ++++++++++++++++++++++++++++++++++++++-----------
10
tcg/tcg-op-gvec.c | 32 ++++++++++++++++++++++++++++++++
12
1 file changed, 38 insertions(+), 11 deletions(-)
11
2 files changed, 39 insertions(+)
12
13
13
diff --git a/include/tcg/tcg-op-gvec.h b/include/tcg/tcg-op-gvec.h
14
diff --git a/tcg/optimize.c b/tcg/optimize.c
14
index XXXXXXX..XXXXXXX 100644
15
index XXXXXXX..XXXXXXX 100644
15
--- a/include/tcg/tcg-op-gvec.h
16
--- a/tcg/optimize.c
16
+++ b/include/tcg/tcg-op-gvec.h
17
+++ b/tcg/optimize.c
17
@@ -XXX,XX +XXX,XX @@ void tcg_gen_gvec_4_ptr(uint32_t dofs, uint32_t aofs, uint32_t bofs,
18
@@ -XXX,XX +XXX,XX @@ static uint64_t do_constant_folding_2(TCGOpcode op, uint64_t x, uint64_t y)
18
uint32_t maxsz, int32_t data,
19
CASE_OP_32_64(mul):
19
gen_helper_gvec_4_ptr *fn);
20
return x * y;
20
21
21
+typedef void gen_helper_gvec_5_ptr(TCGv_ptr, TCGv_ptr, TCGv_ptr, TCGv_ptr,
22
- CASE_OP_32_64(and):
22
+ TCGv_ptr, TCGv_ptr, TCGv_i32);
23
+ CASE_OP_32_64_VEC(and):
23
+void tcg_gen_gvec_5_ptr(uint32_t dofs, uint32_t aofs, uint32_t bofs,
24
return x & y;
24
+ uint32_t cofs, uint32_t eofs, TCGv_ptr ptr,
25
25
+ uint32_t oprsz, uint32_t maxsz, int32_t data,
26
- CASE_OP_32_64(or):
26
+ gen_helper_gvec_5_ptr *fn);
27
+ CASE_OP_32_64_VEC(or):
27
+
28
return x | y;
28
/* Expand a gvec operation. Either inline or out-of-line depending on
29
29
the actual vector size and the operations supported by the host. */
30
- CASE_OP_32_64(xor):
30
typedef struct {
31
+ CASE_OP_32_64_VEC(xor):
31
diff --git a/tcg/tcg-op-gvec.c b/tcg/tcg-op-gvec.c
32
return x ^ y;
32
index XXXXXXX..XXXXXXX 100644
33
33
--- a/tcg/tcg-op-gvec.c
34
case INDEX_op_shl_i32:
34
+++ b/tcg/tcg-op-gvec.c
35
@@ -XXX,XX +XXX,XX @@ static uint64_t do_constant_folding_2(TCGOpcode op, uint64_t x, uint64_t y)
35
@@ -XXX,XX +XXX,XX @@ void tcg_gen_gvec_4_ptr(uint32_t dofs, uint32_t aofs, uint32_t bofs,
36
case INDEX_op_rotl_i64:
36
tcg_temp_free_i32(desc);
37
return rol64(x, y & 63);
38
39
- CASE_OP_32_64(not):
40
+ CASE_OP_32_64_VEC(not):
41
return ~x;
42
43
CASE_OP_32_64(neg):
44
return -x;
45
46
- CASE_OP_32_64(andc):
47
+ CASE_OP_32_64_VEC(andc):
48
return x & ~y;
49
50
- CASE_OP_32_64(orc):
51
+ CASE_OP_32_64_VEC(orc):
52
return x | ~y;
53
54
CASE_OP_32_64(eqv):
55
@@ -XXX,XX +XXX,XX @@ static bool fold_const2(OptContext *ctx, TCGOp *op)
56
return false;
37
}
57
}
38
58
39
+/* Generate a call to a gvec-style helper with five vector operands
59
+static bool fold_commutative(OptContext *ctx, TCGOp *op)
40
+ and an extra pointer operand. */
41
+void tcg_gen_gvec_5_ptr(uint32_t dofs, uint32_t aofs, uint32_t bofs,
42
+ uint32_t cofs, uint32_t eofs, TCGv_ptr ptr,
43
+ uint32_t oprsz, uint32_t maxsz, int32_t data,
44
+ gen_helper_gvec_5_ptr *fn)
45
+{
60
+{
46
+ TCGv_ptr a0, a1, a2, a3, a4;
61
+ swap_commutative(op->args[0], &op->args[1], &op->args[2]);
47
+ TCGv_i32 desc = tcg_const_i32(simd_desc(oprsz, maxsz, data));
62
+ return false;
48
+
49
+ a0 = tcg_temp_new_ptr();
50
+ a1 = tcg_temp_new_ptr();
51
+ a2 = tcg_temp_new_ptr();
52
+ a3 = tcg_temp_new_ptr();
53
+ a4 = tcg_temp_new_ptr();
54
+
55
+ tcg_gen_addi_ptr(a0, cpu_env, dofs);
56
+ tcg_gen_addi_ptr(a1, cpu_env, aofs);
57
+ tcg_gen_addi_ptr(a2, cpu_env, bofs);
58
+ tcg_gen_addi_ptr(a3, cpu_env, cofs);
59
+ tcg_gen_addi_ptr(a4, cpu_env, eofs);
60
+
61
+ fn(a0, a1, a2, a3, a4, ptr, desc);
62
+
63
+ tcg_temp_free_ptr(a0);
64
+ tcg_temp_free_ptr(a1);
65
+ tcg_temp_free_ptr(a2);
66
+ tcg_temp_free_ptr(a3);
67
+ tcg_temp_free_ptr(a4);
68
+ tcg_temp_free_i32(desc);
69
+}
63
+}
70
+
64
+
71
/* Return true if we want to implement something of OPRSZ bytes
65
static bool fold_const2_commutative(OptContext *ctx, TCGOp *op)
72
in units of LNSZ. This limits the expansion of inline code. */
66
{
73
static inline bool check_size_impl(uint32_t oprsz, uint32_t lnsz)
67
swap_commutative(op->args[0], &op->args[1], &op->args[2]);
68
@@ -XXX,XX +XXX,XX @@ static bool fold_add(OptContext *ctx, TCGOp *op)
69
return false;
70
}
71
72
+/* We cannot as yet do_constant_folding with vectors. */
73
+static bool fold_add_vec(OptContext *ctx, TCGOp *op)
74
+{
75
+ if (fold_commutative(ctx, op) ||
76
+ fold_xi_to_x(ctx, op, 0)) {
77
+ return true;
78
+ }
79
+ return false;
80
+}
81
+
82
static bool fold_addsub2(OptContext *ctx, TCGOp *op, bool add)
83
{
84
if (arg_is_const(op->args[2]) && arg_is_const(op->args[3]) &&
85
@@ -XXX,XX +XXX,XX @@ static bool fold_sub_to_neg(OptContext *ctx, TCGOp *op)
86
return false;
87
}
88
89
-static bool fold_sub(OptContext *ctx, TCGOp *op)
90
+/* We cannot as yet do_constant_folding with vectors. */
91
+static bool fold_sub_vec(OptContext *ctx, TCGOp *op)
92
{
93
- if (fold_const2(ctx, op) ||
94
- fold_xx_to_i(ctx, op, 0) ||
95
+ if (fold_xx_to_i(ctx, op, 0) ||
96
fold_xi_to_x(ctx, op, 0) ||
97
fold_sub_to_neg(ctx, op)) {
98
return true;
99
@@ -XXX,XX +XXX,XX @@ static bool fold_sub(OptContext *ctx, TCGOp *op)
100
return false;
101
}
102
103
+static bool fold_sub(OptContext *ctx, TCGOp *op)
104
+{
105
+ return fold_const2(ctx, op) || fold_sub_vec(ctx, op);
106
+}
107
+
108
static bool fold_sub2(OptContext *ctx, TCGOp *op)
109
{
110
return fold_addsub2(ctx, op, false);
111
@@ -XXX,XX +XXX,XX @@ void tcg_optimize(TCGContext *s)
112
* Sorted alphabetically by opcode as much as possible.
113
*/
114
switch (opc) {
115
- CASE_OP_32_64_VEC(add):
116
+ CASE_OP_32_64(add):
117
done = fold_add(&ctx, op);
118
break;
119
+ case INDEX_op_add_vec:
120
+ done = fold_add_vec(&ctx, op);
121
+ break;
122
CASE_OP_32_64(add2):
123
done = fold_add2(&ctx, op);
124
break;
125
@@ -XXX,XX +XXX,XX @@ void tcg_optimize(TCGContext *s)
126
CASE_OP_32_64(sextract):
127
done = fold_sextract(&ctx, op);
128
break;
129
- CASE_OP_32_64_VEC(sub):
130
+ CASE_OP_32_64(sub):
131
done = fold_sub(&ctx, op);
132
break;
133
+ case INDEX_op_sub_vec:
134
+ done = fold_sub_vec(&ctx, op);
135
+ break;
136
CASE_OP_32_64(sub2):
137
done = fold_sub2(&ctx, op);
138
break;
74
--
139
--
75
2.20.1
140
2.25.1
76
141
77
142
diff view generated by jsdifflib
1
From: Taylor Simpson <tsimpson@quicinc.com>
1
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
2
2
3
Currently, helpers can only take up to 6 arguments. This patch adds the
3
When building using GCC 8.3.0 on loongarch64 (Loongnix) we get:
4
capability for up to 7 arguments. I have tested it with the Hexagon port
5
that I am preparing for submission.
6
4
7
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
5
In file included from ../linux-user/signal.c:33:
8
Message-Id: <1580942510-2820-1-git-send-email-tsimpson@quicinc.com>
6
../linux-user/host/loongarch64/host-signal.h: In function ‘host_signal_write’:
7
../linux-user/host/loongarch64/host-signal.h:57:9: error: a label can only be part of a statement and a declaration is not a statement
8
uint32_t sel = (insn >> 15) & 0b11111111111;
9
^~~~~~~~
10
11
We don't use the 'sel' variable more than once, so drop it.
12
13
Meson output for the record:
14
15
Host machine cpu family: loongarch64
16
Host machine cpu: loongarch64
17
C compiler for the host machine: cc (gcc 8.3.0 "cc (Loongnix 8.3.0-6.lnd.vec.27) 8.3.0")
18
C linker for the host machine: cc ld.bfd 2.31.1-system
19
20
Fixes: ad812c3bd65 ("linux-user: Implement CPU-specific signal handler for loongarch64 hosts")
21
Reported-by: Song Gao <gaosong@loongson.cn>
22
Suggested-by: Song Gao <gaosong@loongson.cn>
23
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
24
Reviewed-by: WANG Xuerui <git@xen0n.name>
25
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
26
Message-Id: <20220104215027.2180972-1-f4bug@amsat.org>
9
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
27
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
10
---
28
---
11
include/exec/helper-gen.h | 13 +++++++++++++
29
linux-user/host/loongarch64/host-signal.h | 4 +---
12
include/exec/helper-head.h | 2 ++
30
1 file changed, 1 insertion(+), 3 deletions(-)
13
include/exec/helper-proto.h | 6 ++++++
14
include/exec/helper-tcg.h | 7 +++++++
15
4 files changed, 28 insertions(+)
16
31
17
diff --git a/include/exec/helper-gen.h b/include/exec/helper-gen.h
32
diff --git a/linux-user/host/loongarch64/host-signal.h b/linux-user/host/loongarch64/host-signal.h
18
index XXXXXXX..XXXXXXX 100644
33
index XXXXXXX..XXXXXXX 100644
19
--- a/include/exec/helper-gen.h
34
--- a/linux-user/host/loongarch64/host-signal.h
20
+++ b/include/exec/helper-gen.h
35
+++ b/linux-user/host/loongarch64/host-signal.h
21
@@ -XXX,XX +XXX,XX @@ static inline void glue(gen_helper_, name)(dh_retvar_decl(ret) \
36
@@ -XXX,XX +XXX,XX @@ static inline bool host_signal_write(siginfo_t *info, ucontext_t *uc)
22
tcg_gen_callN(HELPER(name), dh_retvar(ret), 6, args); \
37
}
23
}
38
break;
24
39
case 0b001110: /* indexed, atomic, bounds-checking memory operations */
25
+#define DEF_HELPER_FLAGS_7(name, flags, ret, t1, t2, t3, t4, t5, t6, t7)\
40
- uint32_t sel = (insn >> 15) & 0b11111111111;
26
+static inline void glue(gen_helper_, name)(dh_retvar_decl(ret) \
41
-
27
+ dh_arg_decl(t1, 1), dh_arg_decl(t2, 2), dh_arg_decl(t3, 3), \
42
- switch (sel) {
28
+ dh_arg_decl(t4, 4), dh_arg_decl(t5, 5), dh_arg_decl(t6, 6), \
43
+ switch ((insn >> 15) & 0b11111111111) {
29
+ dh_arg_decl(t7, 7)) \
44
case 0b00000100000: /* stx.b */
30
+{ \
45
case 0b00000101000: /* stx.h */
31
+ TCGTemp *args[7] = { dh_arg(t1, 1), dh_arg(t2, 2), dh_arg(t3, 3), \
46
case 0b00000110000: /* stx.w */
32
+ dh_arg(t4, 4), dh_arg(t5, 5), dh_arg(t6, 6), \
33
+ dh_arg(t7, 7) }; \
34
+ tcg_gen_callN(HELPER(name), dh_retvar(ret), 7, args); \
35
+}
36
+
37
#include "helper.h"
38
#include "trace/generated-helpers.h"
39
#include "trace/generated-helpers-wrappers.h"
40
@@ -XXX,XX +XXX,XX @@ static inline void glue(gen_helper_, name)(dh_retvar_decl(ret) \
41
#undef DEF_HELPER_FLAGS_4
42
#undef DEF_HELPER_FLAGS_5
43
#undef DEF_HELPER_FLAGS_6
44
+#undef DEF_HELPER_FLAGS_7
45
#undef GEN_HELPER
46
47
#endif /* HELPER_GEN_H */
48
diff --git a/include/exec/helper-head.h b/include/exec/helper-head.h
49
index XXXXXXX..XXXXXXX 100644
50
--- a/include/exec/helper-head.h
51
+++ b/include/exec/helper-head.h
52
@@ -XXX,XX +XXX,XX @@
53
DEF_HELPER_FLAGS_5(name, 0, ret, t1, t2, t3, t4, t5)
54
#define DEF_HELPER_6(name, ret, t1, t2, t3, t4, t5, t6) \
55
DEF_HELPER_FLAGS_6(name, 0, ret, t1, t2, t3, t4, t5, t6)
56
+#define DEF_HELPER_7(name, ret, t1, t2, t3, t4, t5, t6, t7) \
57
+ DEF_HELPER_FLAGS_7(name, 0, ret, t1, t2, t3, t4, t5, t6, t7)
58
59
/* MAX_OPC_PARAM_IARGS must be set to n if last entry is DEF_HELPER_FLAGS_n. */
60
61
diff --git a/include/exec/helper-proto.h b/include/exec/helper-proto.h
62
index XXXXXXX..XXXXXXX 100644
63
--- a/include/exec/helper-proto.h
64
+++ b/include/exec/helper-proto.h
65
@@ -XXX,XX +XXX,XX @@ dh_ctype(ret) HELPER(name) (dh_ctype(t1), dh_ctype(t2), dh_ctype(t3), \
66
dh_ctype(ret) HELPER(name) (dh_ctype(t1), dh_ctype(t2), dh_ctype(t3), \
67
dh_ctype(t4), dh_ctype(t5), dh_ctype(t6));
68
69
+#define DEF_HELPER_FLAGS_7(name, flags, ret, t1, t2, t3, t4, t5, t6, t7) \
70
+dh_ctype(ret) HELPER(name) (dh_ctype(t1), dh_ctype(t2), dh_ctype(t3), \
71
+ dh_ctype(t4), dh_ctype(t5), dh_ctype(t6), \
72
+ dh_ctype(t7));
73
+
74
#include "helper.h"
75
#include "trace/generated-helpers.h"
76
#include "tcg-runtime.h"
77
@@ -XXX,XX +XXX,XX @@ dh_ctype(ret) HELPER(name) (dh_ctype(t1), dh_ctype(t2), dh_ctype(t3), \
78
#undef DEF_HELPER_FLAGS_4
79
#undef DEF_HELPER_FLAGS_5
80
#undef DEF_HELPER_FLAGS_6
81
+#undef DEF_HELPER_FLAGS_7
82
83
#endif /* HELPER_PROTO_H */
84
diff --git a/include/exec/helper-tcg.h b/include/exec/helper-tcg.h
85
index XXXXXXX..XXXXXXX 100644
86
--- a/include/exec/helper-tcg.h
87
+++ b/include/exec/helper-tcg.h
88
@@ -XXX,XX +XXX,XX @@
89
| dh_sizemask(t2, 2) | dh_sizemask(t3, 3) | dh_sizemask(t4, 4) \
90
| dh_sizemask(t5, 5) | dh_sizemask(t6, 6) },
91
92
+#define DEF_HELPER_FLAGS_7(NAME, FLAGS, ret, t1, t2, t3, t4, t5, t6, t7) \
93
+ { .func = HELPER(NAME), .name = str(NAME), .flags = FLAGS, \
94
+ .sizemask = dh_sizemask(ret, 0) | dh_sizemask(t1, 1) \
95
+ | dh_sizemask(t2, 2) | dh_sizemask(t3, 3) | dh_sizemask(t4, 4) \
96
+ | dh_sizemask(t5, 5) | dh_sizemask(t6, 6) | dh_sizemask(t7, 7) },
97
+
98
#include "helper.h"
99
#include "trace/generated-helpers.h"
100
#include "tcg-runtime.h"
101
@@ -XXX,XX +XXX,XX @@
102
#undef DEF_HELPER_FLAGS_4
103
#undef DEF_HELPER_FLAGS_5
104
#undef DEF_HELPER_FLAGS_6
105
+#undef DEF_HELPER_FLAGS_7
106
107
#endif /* HELPER_TCG_H */
108
--
47
--
109
2.20.1
48
2.25.1
110
49
111
50
diff view generated by jsdifflib
1
From: Max Filippov <jcmvbkbc@gmail.com>
1
From: Xiaoyao Li <xiaoyao.li@intel.com>
2
2
3
When a breakpoint is inserted at location for which there's currently no
3
Remove qemu_run_machine_init_done_notifiers() since no implementation
4
virtual to physical translation no action is taken on CPU TB cache. If a
4
and user.
5
TB for that virtual address already exists but is not visible ATM the
6
breakpoint won't be hit next time an instruction at that address will be
7
executed.
8
5
9
Flush entire CPU TB cache in breakpoint_invalidate to force
6
Fixes: f66dc8737c9 ("vl: move all generic initialization out of vl.c")
10
re-translation of all TBs for the breakpoint address.
7
Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com>
11
8
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
12
This change fixes the following scenario:
9
Message-Id: <20220104024136.1433545-1-xiaoyao.li@intel.com>
13
- linux user application is running
14
- a breakpoint is inserted from QEMU gdbstub for a user address that is
15
not currently present in the target CPU TLB
16
- an instruction at that address is executed, but the external debugger
17
doesn't get control.
18
19
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
20
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
21
Message-Id: <20191127220602.10827-2-jcmvbkbc@gmail.com>
22
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
10
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
23
---
11
---
24
exec.c | 15 +++++++--------
12
include/sysemu/sysemu.h | 1 -
25
1 file changed, 7 insertions(+), 8 deletions(-)
13
1 file changed, 1 deletion(-)
26
14
27
diff --git a/exec.c b/exec.c
15
diff --git a/include/sysemu/sysemu.h b/include/sysemu/sysemu.h
28
index XXXXXXX..XXXXXXX 100644
16
index XXXXXXX..XXXXXXX 100644
29
--- a/exec.c
17
--- a/include/sysemu/sysemu.h
30
+++ b/exec.c
18
+++ b/include/sysemu/sysemu.h
31
@@ -XXX,XX +XXX,XX @@ void tb_invalidate_phys_addr(AddressSpace *as, hwaddr addr, MemTxAttrs attrs)
19
@@ -XXX,XX +XXX,XX @@ extern bool qemu_uuid_set;
32
20
void qemu_add_exit_notifier(Notifier *notify);
33
static void breakpoint_invalidate(CPUState *cpu, target_ulong pc)
21
void qemu_remove_exit_notifier(Notifier *notify);
34
{
22
35
- MemTxAttrs attrs;
23
-void qemu_run_machine_init_done_notifiers(void);
36
- hwaddr phys = cpu_get_phys_page_attrs_debug(cpu, pc, &attrs);
24
void qemu_add_machine_init_done_notifier(Notifier *notify);
37
- int asidx = cpu_asidx_from_attrs(cpu, attrs);
25
void qemu_remove_machine_init_done_notifier(Notifier *notify);
38
- if (phys != -1) {
39
- /* Locks grabbed by tb_invalidate_phys_addr */
40
- tb_invalidate_phys_addr(cpu->cpu_ases[asidx].as,
41
- phys | (pc & ~TARGET_PAGE_MASK), attrs);
42
- }
43
+ /*
44
+ * There may not be a virtual to physical translation for the pc
45
+ * right now, but there may exist cached TB for this pc.
46
+ * Flush the whole TB cache to force re-translation of such TBs.
47
+ * This is heavyweight, but we're debugging anyway.
48
+ */
49
+ tb_flush(cpu);
50
}
51
#endif
52
26
53
--
27
--
54
2.20.1
28
2.25.1
55
29
56
30
diff view generated by jsdifflib
New patch
1
For the ABIs in which the syscall return register is not
2
also the first function argument register, move the errno
3
value into the correct place.
1
4
5
Fixes: a3310c0397e2 ("linux-user: Move syscall error detection into safe_syscall_base")
6
Reported-by: Laurent Vivier <laurent@vivier.eu>
7
Tested-by: Laurent Vivier <laurent@vivier.eu>
8
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
9
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
10
Message-Id: <20220104190454.542225-1-richard.henderson@linaro.org>
11
---
12
common-user/host/i386/safe-syscall.inc.S | 1 +
13
common-user/host/mips/safe-syscall.inc.S | 1 +
14
common-user/host/x86_64/safe-syscall.inc.S | 1 +
15
3 files changed, 3 insertions(+)
16
17
diff --git a/common-user/host/i386/safe-syscall.inc.S b/common-user/host/i386/safe-syscall.inc.S
18
index XXXXXXX..XXXXXXX 100644
19
--- a/common-user/host/i386/safe-syscall.inc.S
20
+++ b/common-user/host/i386/safe-syscall.inc.S
21
@@ -XXX,XX +XXX,XX @@ safe_syscall_end:
22
pop %ebp
23
.cfi_adjust_cfa_offset -4
24
.cfi_restore ebp
25
+ mov %eax, (%esp)
26
jmp safe_syscall_set_errno_tail
27
28
.cfi_endproc
29
diff --git a/common-user/host/mips/safe-syscall.inc.S b/common-user/host/mips/safe-syscall.inc.S
30
index XXXXXXX..XXXXXXX 100644
31
--- a/common-user/host/mips/safe-syscall.inc.S
32
+++ b/common-user/host/mips/safe-syscall.inc.S
33
@@ -XXX,XX +XXX,XX @@ safe_syscall_end:
34
1: USE_ALT_CP(t0)
35
SETUP_GPX(t1)
36
SETUP_GPX64(t0, t1)
37
+ move a0, v0
38
PTR_LA t9, safe_syscall_set_errno_tail
39
jr t9
40
41
diff --git a/common-user/host/x86_64/safe-syscall.inc.S b/common-user/host/x86_64/safe-syscall.inc.S
42
index XXXXXXX..XXXXXXX 100644
43
--- a/common-user/host/x86_64/safe-syscall.inc.S
44
+++ b/common-user/host/x86_64/safe-syscall.inc.S
45
@@ -XXX,XX +XXX,XX @@ safe_syscall_end:
46
1: pop %rbp
47
.cfi_def_cfa_offset 8
48
.cfi_restore rbp
49
+ mov %eax, %edi
50
jmp safe_syscall_set_errno_tail
51
.cfi_endproc
52
53
--
54
2.25.1
55
56
diff view generated by jsdifflib