1
The following changes since commit e18e5501d8ac692d32657a3e1ef545b14e72b730:
1
V2 fixes an error in patch 22 wrt MacOS.
2
It's a shame we don't have public CI for that.
2
3
3
Merge remote-tracking branch 'remotes/dgilbert-gitlab/tags/pull-virtiofs-20200210' into staging (2020-02-10 18:09:14 +0000)
4
5
r~
6
7
8
The following changes since commit 894fc4fd670aaf04a67dc7507739f914ff4bacf2:
9
10
Merge remote-tracking branch 'remotes/jasowang/tags/net-pull-request' into staging (2021-06-11 09:21:48 +0100)
4
11
5
are available in the Git repository at:
12
are available in the Git repository at:
6
13
7
https://github.com/rth7680/qemu.git tags/pull-tcg-20200212
14
https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20210613
8
15
9
for you to fetch changes up to 2445971604c1cfd3ec484457159f4ac300fb04d2:
16
for you to fetch changes up to a5a8b84772e13066c6c45f480cc5b5312bbde08e:
10
17
11
tcg: Add tcg_gen_gvec_5_ptr (2020-02-12 14:58:36 -0800)
18
docs/devel: Explain in more detail the TB chaining mechanisms (2021-06-13 17:42:40 -0700)
12
19
13
----------------------------------------------------------------
20
----------------------------------------------------------------
14
Fix breakpoint invalidation.
21
Clean up code_gen_buffer allocation.
15
Add support for tcg helpers with 7 arguments.
22
Add tcg_remove_ops_after.
16
Add support for gvec helpers with 5 arguments.
23
Fix tcg_constant_* documentation.
24
Improve TB chaining documentation.
25
Fix float32_exp2.
26
Fix arm tcg_out_op function signature.
17
27
18
----------------------------------------------------------------
28
----------------------------------------------------------------
19
Max Filippov (1):
29
Jose R. Ziviani (1):
20
exec: flush CPU TB cache in breakpoint_invalidate
30
tcg/arm: Fix tcg_out_op function signature
21
31
22
Richard Henderson (1):
32
Luis Pires (1):
23
tcg: Add tcg_gen_gvec_5_ptr
33
docs/devel: Explain in more detail the TB chaining mechanisms
24
34
25
Taylor Simpson (1):
35
Richard Henderson (32):
26
tcg: Add support for a helper with 7 arguments
36
meson: Split out tcg/meson.build
37
meson: Split out fpu/meson.build
38
tcg: Re-order tcg_region_init vs tcg_prologue_init
39
tcg: Remove error return from tcg_region_initial_alloc__locked
40
tcg: Split out tcg_region_initial_alloc
41
tcg: Split out tcg_region_prologue_set
42
tcg: Split out region.c
43
accel/tcg: Inline cpu_gen_init
44
accel/tcg: Move alloc_code_gen_buffer to tcg/region.c
45
accel/tcg: Rename tcg_init to tcg_init_machine
46
tcg: Create tcg_init
47
accel/tcg: Merge tcg_exec_init into tcg_init_machine
48
accel/tcg: Use MiB in tcg_init_machine
49
accel/tcg: Pass down max_cpus to tcg_init
50
tcg: Introduce tcg_max_ctxs
51
tcg: Move MAX_CODE_GEN_BUFFER_SIZE to tcg-target.h
52
tcg: Replace region.end with region.total_size
53
tcg: Rename region.start to region.after_prologue
54
tcg: Tidy tcg_n_regions
55
tcg: Tidy split_cross_256mb
56
tcg: Move in_code_gen_buffer and tests to region.c
57
tcg: Allocate code_gen_buffer into struct tcg_region_state
58
tcg: Return the map protection from alloc_code_gen_buffer
59
tcg: Sink qemu_madvise call to common code
60
util/osdep: Add qemu_mprotect_rw
61
tcg: Round the tb_size default from qemu_get_host_physmem
62
tcg: Merge buffer protection and guard page protection
63
tcg: When allocating for !splitwx, begin with PROT_NONE
64
tcg: Move tcg_init_ctx and tcg_ctx from accel/tcg/
65
tcg: Introduce tcg_remove_ops_after
66
tcg: Fix documentation for tcg_constant_* vs tcg_temp_free_*
67
softfloat: Fix tp init in float32_exp2
27
68
28
include/exec/helper-gen.h | 13 +++++++++++++
69
docs/devel/tcg.rst | 101 ++++-
29
include/exec/helper-head.h | 2 ++
70
meson.build | 12 +-
30
include/exec/helper-proto.h | 6 ++++++
71
accel/tcg/internal.h | 2 +
31
include/exec/helper-tcg.h | 7 +++++++
72
include/qemu/osdep.h | 1 +
32
include/tcg/tcg-op-gvec.h | 7 +++++++
73
include/sysemu/tcg.h | 2 -
33
exec.c | 15 +++++++--------
74
include/tcg/tcg.h | 28 +-
34
tcg/tcg-op-gvec.c | 32 ++++++++++++++++++++++++++++++++
75
tcg/aarch64/tcg-target.h | 1 +
35
7 files changed, 74 insertions(+), 8 deletions(-)
76
tcg/arm/tcg-target.h | 1 +
77
tcg/i386/tcg-target.h | 2 +
78
tcg/mips/tcg-target.h | 6 +
79
tcg/ppc/tcg-target.h | 2 +
80
tcg/riscv/tcg-target.h | 1 +
81
tcg/s390/tcg-target.h | 3 +
82
tcg/sparc/tcg-target.h | 1 +
83
tcg/tcg-internal.h | 40 ++
84
tcg/tci/tcg-target.h | 1 +
85
accel/tcg/tcg-all.c | 32 +-
86
accel/tcg/translate-all.c | 439 +-------------------
87
bsd-user/main.c | 3 +-
88
fpu/softfloat.c | 2 +-
89
linux-user/main.c | 1 -
90
tcg/region.c | 999 ++++++++++++++++++++++++++++++++++++++++++++++
91
tcg/tcg.c | 649 +++---------------------------
92
util/osdep.c | 9 +
93
tcg/arm/tcg-target.c.inc | 3 +-
94
fpu/meson.build | 1 +
95
tcg/meson.build | 14 +
96
27 files changed, 1266 insertions(+), 1090 deletions(-)
97
create mode 100644 tcg/tcg-internal.h
98
create mode 100644 tcg/region.c
99
create mode 100644 fpu/meson.build
100
create mode 100644 tcg/meson.build
36
101
diff view generated by jsdifflib
Deleted patch
1
From: Max Filippov <jcmvbkbc@gmail.com>
2
1
3
When a breakpoint is inserted at location for which there's currently no
4
virtual to physical translation no action is taken on CPU TB cache. If a
5
TB for that virtual address already exists but is not visible ATM the
6
breakpoint won't be hit next time an instruction at that address will be
7
executed.
8
9
Flush entire CPU TB cache in breakpoint_invalidate to force
10
re-translation of all TBs for the breakpoint address.
11
12
This change fixes the following scenario:
13
- linux user application is running
14
- a breakpoint is inserted from QEMU gdbstub for a user address that is
15
not currently present in the target CPU TLB
16
- an instruction at that address is executed, but the external debugger
17
doesn't get control.
18
19
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
20
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
21
Message-Id: <20191127220602.10827-2-jcmvbkbc@gmail.com>
22
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
23
---
24
exec.c | 15 +++++++--------
25
1 file changed, 7 insertions(+), 8 deletions(-)
26
27
diff --git a/exec.c b/exec.c
28
index XXXXXXX..XXXXXXX 100644
29
--- a/exec.c
30
+++ b/exec.c
31
@@ -XXX,XX +XXX,XX @@ void tb_invalidate_phys_addr(AddressSpace *as, hwaddr addr, MemTxAttrs attrs)
32
33
static void breakpoint_invalidate(CPUState *cpu, target_ulong pc)
34
{
35
- MemTxAttrs attrs;
36
- hwaddr phys = cpu_get_phys_page_attrs_debug(cpu, pc, &attrs);
37
- int asidx = cpu_asidx_from_attrs(cpu, attrs);
38
- if (phys != -1) {
39
- /* Locks grabbed by tb_invalidate_phys_addr */
40
- tb_invalidate_phys_addr(cpu->cpu_ases[asidx].as,
41
- phys | (pc & ~TARGET_PAGE_MASK), attrs);
42
- }
43
+ /*
44
+ * There may not be a virtual to physical translation for the pc
45
+ * right now, but there may exist cached TB for this pc.
46
+ * Flush the whole TB cache to force re-translation of such TBs.
47
+ * This is heavyweight, but we're debugging anyway.
48
+ */
49
+ tb_flush(cpu);
50
}
51
#endif
52
53
--
54
2.20.1
55
56
diff view generated by jsdifflib
1
From: Taylor Simpson <tsimpson@quicinc.com>
1
Do not mess around with setting values within tcg_init_ctx.
2
Put the values into 'region' directly, which is where they
3
will live for the lifetime of the program.
2
4
3
Currently, helpers can only take up to 6 arguments. This patch adds the
5
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
4
capability for up to 7 arguments. I have tested it with the Hexagon port
6
Reviewed-by: Luis Pires <luis.pires@eldorado.org.br>
5
that I am preparing for submission.
6
7
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
8
Message-Id: <1580942510-2820-1-git-send-email-tsimpson@quicinc.com>
9
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
7
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
10
---
8
---
11
include/exec/helper-gen.h | 13 +++++++++++++
9
tcg/region.c | 64 ++++++++++++++++++++++------------------------------
12
include/exec/helper-head.h | 2 ++
10
1 file changed, 27 insertions(+), 37 deletions(-)
13
include/exec/helper-proto.h | 6 ++++++
14
include/exec/helper-tcg.h | 7 +++++++
15
4 files changed, 28 insertions(+)
16
11
17
diff --git a/include/exec/helper-gen.h b/include/exec/helper-gen.h
12
diff --git a/tcg/region.c b/tcg/region.c
18
index XXXXXXX..XXXXXXX 100644
13
index XXXXXXX..XXXXXXX 100644
19
--- a/include/exec/helper-gen.h
14
--- a/tcg/region.c
20
+++ b/include/exec/helper-gen.h
15
+++ b/tcg/region.c
21
@@ -XXX,XX +XXX,XX @@ static inline void glue(gen_helper_, name)(dh_retvar_decl(ret) \
16
@@ -XXX,XX +XXX,XX @@ static size_t tree_size;
22
tcg_gen_callN(HELPER(name), dh_retvar(ret), 6, args); \
17
18
bool in_code_gen_buffer(const void *p)
19
{
20
- const TCGContext *s = &tcg_init_ctx;
21
/*
22
* Much like it is valid to have a pointer to the byte past the
23
* end of an array (so long as you don't dereference it), allow
24
* a pointer to the byte past the end of the code gen buffer.
25
*/
26
- return (size_t)(p - s->code_gen_buffer) <= s->code_gen_buffer_size;
27
+ return (size_t)(p - region.start_aligned) <= region.total_size;
23
}
28
}
24
29
25
+#define DEF_HELPER_FLAGS_7(name, flags, ret, t1, t2, t3, t4, t5, t6, t7)\
30
#ifdef CONFIG_DEBUG_TCG
26
+static inline void glue(gen_helper_, name)(dh_retvar_decl(ret) \
31
@@ -XXX,XX +XXX,XX @@ static bool alloc_code_gen_buffer(size_t tb_size, int splitwx, Error **errp)
27
+ dh_arg_decl(t1, 1), dh_arg_decl(t2, 2), dh_arg_decl(t3, 3), \
32
}
28
+ dh_arg_decl(t4, 4), dh_arg_decl(t5, 5), dh_arg_decl(t6, 6), \
33
qemu_madvise(buf, size, QEMU_MADV_HUGEPAGE);
29
+ dh_arg_decl(t7, 7)) \
34
30
+{ \
35
- tcg_ctx->code_gen_buffer = buf;
31
+ TCGTemp *args[7] = { dh_arg(t1, 1), dh_arg(t2, 2), dh_arg(t3, 3), \
36
- tcg_ctx->code_gen_buffer_size = size;
32
+ dh_arg(t4, 4), dh_arg(t5, 5), dh_arg(t6, 6), \
37
+ region.start_aligned = buf;
33
+ dh_arg(t7, 7) }; \
38
+ region.total_size = size;
34
+ tcg_gen_callN(HELPER(name), dh_retvar(ret), 7, args); \
39
return true;
35
+}
40
}
41
#elif defined(_WIN32)
42
@@ -XXX,XX +XXX,XX @@ static bool alloc_code_gen_buffer(size_t size, int splitwx, Error **errp)
43
return false;
44
}
45
46
- tcg_ctx->code_gen_buffer = buf;
47
- tcg_ctx->code_gen_buffer_size = size;
48
+ region.start_aligned = buf;
49
+ region.total_size = size;
50
return true;
51
}
52
#else
53
@@ -XXX,XX +XXX,XX @@ static bool alloc_code_gen_buffer_anon(size_t size, int prot,
54
/* Request large pages for the buffer. */
55
qemu_madvise(buf, size, QEMU_MADV_HUGEPAGE);
56
57
- tcg_ctx->code_gen_buffer = buf;
58
- tcg_ctx->code_gen_buffer_size = size;
59
+ region.start_aligned = buf;
60
+ region.total_size = size;
61
return true;
62
}
63
64
@@ -XXX,XX +XXX,XX @@ static bool alloc_code_gen_buffer_splitwx_memfd(size_t size, Error **errp)
65
return false;
66
}
67
/* The size of the mapping may have been adjusted. */
68
- size = tcg_ctx->code_gen_buffer_size;
69
- buf_rx = tcg_ctx->code_gen_buffer;
70
+ buf_rx = region.start_aligned;
71
+ size = region.total_size;
72
#endif
73
74
buf_rw = qemu_memfd_alloc("tcg-jit", size, 0, &fd, errp);
75
@@ -XXX,XX +XXX,XX @@ static bool alloc_code_gen_buffer_splitwx_memfd(size_t size, Error **errp)
76
#endif
77
78
close(fd);
79
- tcg_ctx->code_gen_buffer = buf_rw;
80
- tcg_ctx->code_gen_buffer_size = size;
81
+ region.start_aligned = buf_rw;
82
+ region.total_size = size;
83
tcg_splitwx_diff = buf_rx - buf_rw;
84
85
/* Request large pages for the buffer and the splitwx. */
86
@@ -XXX,XX +XXX,XX @@ static bool alloc_code_gen_buffer_splitwx_vmremap(size_t size, Error **errp)
87
return false;
88
}
89
90
- buf_rw = (mach_vm_address_t)tcg_ctx->code_gen_buffer;
91
+ buf_rw = (mach_vm_address_t)region.start_aligned;
92
buf_rx = 0;
93
ret = mach_vm_remap(mach_task_self(),
94
&buf_rx,
95
@@ -XXX,XX +XXX,XX @@ static bool alloc_code_gen_buffer(size_t size, int splitwx, Error **errp)
96
*/
97
void tcg_region_init(size_t tb_size, int splitwx, unsigned max_cpus)
98
{
99
- void *buf, *aligned, *end;
100
- size_t total_size;
101
size_t page_size;
102
size_t region_size;
103
- size_t n_regions;
104
size_t i;
105
bool ok;
106
107
@@ -XXX,XX +XXX,XX @@ void tcg_region_init(size_t tb_size, int splitwx, unsigned max_cpus)
108
splitwx, &error_fatal);
109
assert(ok);
110
111
- buf = tcg_init_ctx.code_gen_buffer;
112
- total_size = tcg_init_ctx.code_gen_buffer_size;
113
- page_size = qemu_real_host_page_size;
114
- n_regions = tcg_n_regions(total_size, max_cpus);
115
-
116
- /* The first region will be 'aligned - buf' bytes larger than the others */
117
- aligned = QEMU_ALIGN_PTR_UP(buf, page_size);
118
- g_assert(aligned < tcg_init_ctx.code_gen_buffer + total_size);
119
-
120
/*
121
* Make region_size a multiple of page_size, using aligned as the start.
122
* As a result of this we might end up with a few extra pages at the end of
123
* the buffer; we will assign those to the last region.
124
*/
125
- region_size = (total_size - (aligned - buf)) / n_regions;
126
+ region.n = tcg_n_regions(region.total_size, max_cpus);
127
+ page_size = qemu_real_host_page_size;
128
+ region_size = region.total_size / region.n;
129
region_size = QEMU_ALIGN_DOWN(region_size, page_size);
130
131
/* A region must have at least 2 pages; one code, one guard */
132
g_assert(region_size >= 2 * page_size);
133
+ region.stride = region_size;
36
+
134
+
37
#include "helper.h"
135
+ /* Reserve space for guard pages. */
38
#include "trace/generated-helpers.h"
136
+ region.size = region_size - page_size;
39
#include "trace/generated-helpers-wrappers.h"
137
+ region.total_size -= page_size;
40
@@ -XXX,XX +XXX,XX @@ static inline void glue(gen_helper_, name)(dh_retvar_decl(ret) \
41
#undef DEF_HELPER_FLAGS_4
42
#undef DEF_HELPER_FLAGS_5
43
#undef DEF_HELPER_FLAGS_6
44
+#undef DEF_HELPER_FLAGS_7
45
#undef GEN_HELPER
46
47
#endif /* HELPER_GEN_H */
48
diff --git a/include/exec/helper-head.h b/include/exec/helper-head.h
49
index XXXXXXX..XXXXXXX 100644
50
--- a/include/exec/helper-head.h
51
+++ b/include/exec/helper-head.h
52
@@ -XXX,XX +XXX,XX @@
53
DEF_HELPER_FLAGS_5(name, 0, ret, t1, t2, t3, t4, t5)
54
#define DEF_HELPER_6(name, ret, t1, t2, t3, t4, t5, t6) \
55
DEF_HELPER_FLAGS_6(name, 0, ret, t1, t2, t3, t4, t5, t6)
56
+#define DEF_HELPER_7(name, ret, t1, t2, t3, t4, t5, t6, t7) \
57
+ DEF_HELPER_FLAGS_7(name, 0, ret, t1, t2, t3, t4, t5, t6, t7)
58
59
/* MAX_OPC_PARAM_IARGS must be set to n if last entry is DEF_HELPER_FLAGS_n. */
60
61
diff --git a/include/exec/helper-proto.h b/include/exec/helper-proto.h
62
index XXXXXXX..XXXXXXX 100644
63
--- a/include/exec/helper-proto.h
64
+++ b/include/exec/helper-proto.h
65
@@ -XXX,XX +XXX,XX @@ dh_ctype(ret) HELPER(name) (dh_ctype(t1), dh_ctype(t2), dh_ctype(t3), \
66
dh_ctype(ret) HELPER(name) (dh_ctype(t1), dh_ctype(t2), dh_ctype(t3), \
67
dh_ctype(t4), dh_ctype(t5), dh_ctype(t6));
68
69
+#define DEF_HELPER_FLAGS_7(name, flags, ret, t1, t2, t3, t4, t5, t6, t7) \
70
+dh_ctype(ret) HELPER(name) (dh_ctype(t1), dh_ctype(t2), dh_ctype(t3), \
71
+ dh_ctype(t4), dh_ctype(t5), dh_ctype(t6), \
72
+ dh_ctype(t7));
73
+
138
+
74
#include "helper.h"
139
+ /*
75
#include "trace/generated-helpers.h"
140
+ * The first region will be smaller than the others, via the prologue,
76
#include "tcg-runtime.h"
141
+ * which has yet to be allocated. For now, the first region begins at
77
@@ -XXX,XX +XXX,XX @@ dh_ctype(ret) HELPER(name) (dh_ctype(t1), dh_ctype(t2), dh_ctype(t3), \
142
+ * the page boundary.
78
#undef DEF_HELPER_FLAGS_4
143
+ */
79
#undef DEF_HELPER_FLAGS_5
144
+ region.after_prologue = region.start_aligned;
80
#undef DEF_HELPER_FLAGS_6
145
81
+#undef DEF_HELPER_FLAGS_7
146
/* init the region struct */
82
147
qemu_mutex_init(&region.lock);
83
#endif /* HELPER_PROTO_H */
148
- region.n = n_regions;
84
diff --git a/include/exec/helper-tcg.h b/include/exec/helper-tcg.h
149
- region.size = region_size - page_size;
85
index XXXXXXX..XXXXXXX 100644
150
- region.stride = region_size;
86
--- a/include/exec/helper-tcg.h
151
- region.after_prologue = buf;
87
+++ b/include/exec/helper-tcg.h
152
- region.start_aligned = aligned;
88
@@ -XXX,XX +XXX,XX @@
153
- /* page-align the end, since its last page will be a guard page */
89
| dh_sizemask(t2, 2) | dh_sizemask(t3, 3) | dh_sizemask(t4, 4) \
154
- end = QEMU_ALIGN_PTR_DOWN(buf + total_size, page_size);
90
| dh_sizemask(t5, 5) | dh_sizemask(t6, 6) },
155
- /* account for that last guard page */
91
156
- end -= page_size;
92
+#define DEF_HELPER_FLAGS_7(NAME, FLAGS, ret, t1, t2, t3, t4, t5, t6, t7) \
157
- total_size = end - aligned;
93
+ { .func = HELPER(NAME), .name = str(NAME), .flags = FLAGS, \
158
- region.total_size = total_size;
94
+ .sizemask = dh_sizemask(ret, 0) | dh_sizemask(t1, 1) \
159
95
+ | dh_sizemask(t2, 2) | dh_sizemask(t3, 3) | dh_sizemask(t4, 4) \
160
/*
96
+ | dh_sizemask(t5, 5) | dh_sizemask(t6, 6) | dh_sizemask(t7, 7) },
161
* Set guard pages in the rw buffer, as that's the one into which
97
+
98
#include "helper.h"
99
#include "trace/generated-helpers.h"
100
#include "tcg-runtime.h"
101
@@ -XXX,XX +XXX,XX @@
102
#undef DEF_HELPER_FLAGS_4
103
#undef DEF_HELPER_FLAGS_5
104
#undef DEF_HELPER_FLAGS_6
105
+#undef DEF_HELPER_FLAGS_7
106
107
#endif /* HELPER_TCG_H */
108
--
162
--
109
2.20.1
163
2.25.1
110
164
111
165
diff view generated by jsdifflib
Deleted patch
1
Extend the vector generator infrastructure to handle
2
5 vector arguments.
3
1
4
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
5
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
6
Reviewed-by: Taylor Simpson <tsimpson@quicinc.com>
7
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
8
---
9
include/tcg/tcg-op-gvec.h | 7 +++++++
10
tcg/tcg-op-gvec.c | 32 ++++++++++++++++++++++++++++++++
11
2 files changed, 39 insertions(+)
12
13
diff --git a/include/tcg/tcg-op-gvec.h b/include/tcg/tcg-op-gvec.h
14
index XXXXXXX..XXXXXXX 100644
15
--- a/include/tcg/tcg-op-gvec.h
16
+++ b/include/tcg/tcg-op-gvec.h
17
@@ -XXX,XX +XXX,XX @@ void tcg_gen_gvec_4_ptr(uint32_t dofs, uint32_t aofs, uint32_t bofs,
18
uint32_t maxsz, int32_t data,
19
gen_helper_gvec_4_ptr *fn);
20
21
+typedef void gen_helper_gvec_5_ptr(TCGv_ptr, TCGv_ptr, TCGv_ptr, TCGv_ptr,
22
+ TCGv_ptr, TCGv_ptr, TCGv_i32);
23
+void tcg_gen_gvec_5_ptr(uint32_t dofs, uint32_t aofs, uint32_t bofs,
24
+ uint32_t cofs, uint32_t eofs, TCGv_ptr ptr,
25
+ uint32_t oprsz, uint32_t maxsz, int32_t data,
26
+ gen_helper_gvec_5_ptr *fn);
27
+
28
/* Expand a gvec operation. Either inline or out-of-line depending on
29
the actual vector size and the operations supported by the host. */
30
typedef struct {
31
diff --git a/tcg/tcg-op-gvec.c b/tcg/tcg-op-gvec.c
32
index XXXXXXX..XXXXXXX 100644
33
--- a/tcg/tcg-op-gvec.c
34
+++ b/tcg/tcg-op-gvec.c
35
@@ -XXX,XX +XXX,XX @@ void tcg_gen_gvec_4_ptr(uint32_t dofs, uint32_t aofs, uint32_t bofs,
36
tcg_temp_free_i32(desc);
37
}
38
39
+/* Generate a call to a gvec-style helper with five vector operands
40
+ and an extra pointer operand. */
41
+void tcg_gen_gvec_5_ptr(uint32_t dofs, uint32_t aofs, uint32_t bofs,
42
+ uint32_t cofs, uint32_t eofs, TCGv_ptr ptr,
43
+ uint32_t oprsz, uint32_t maxsz, int32_t data,
44
+ gen_helper_gvec_5_ptr *fn)
45
+{
46
+ TCGv_ptr a0, a1, a2, a3, a4;
47
+ TCGv_i32 desc = tcg_const_i32(simd_desc(oprsz, maxsz, data));
48
+
49
+ a0 = tcg_temp_new_ptr();
50
+ a1 = tcg_temp_new_ptr();
51
+ a2 = tcg_temp_new_ptr();
52
+ a3 = tcg_temp_new_ptr();
53
+ a4 = tcg_temp_new_ptr();
54
+
55
+ tcg_gen_addi_ptr(a0, cpu_env, dofs);
56
+ tcg_gen_addi_ptr(a1, cpu_env, aofs);
57
+ tcg_gen_addi_ptr(a2, cpu_env, bofs);
58
+ tcg_gen_addi_ptr(a3, cpu_env, cofs);
59
+ tcg_gen_addi_ptr(a4, cpu_env, eofs);
60
+
61
+ fn(a0, a1, a2, a3, a4, ptr, desc);
62
+
63
+ tcg_temp_free_ptr(a0);
64
+ tcg_temp_free_ptr(a1);
65
+ tcg_temp_free_ptr(a2);
66
+ tcg_temp_free_ptr(a3);
67
+ tcg_temp_free_ptr(a4);
68
+ tcg_temp_free_i32(desc);
69
+}
70
+
71
/* Return true if we want to implement something of OPRSZ bytes
72
in units of LNSZ. This limits the expansion of inline code. */
73
static inline bool check_size_impl(uint32_t oprsz, uint32_t lnsz)
74
--
75
2.20.1
76
77
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