[PULL 0/3] tcg patch queue
[PULL 00/24] tcg patch queue
1
The following changes since commit e18e5501d8ac692d32657a3e1ef545b14e72b730:
1
The following changes since commit 45240eed4f064576d589ea60ebadf3c11d7ab891:
2
2
3
Merge remote-tracking branch 'remotes/dgilbert-gitlab/tags/pull-virtiofs-20200210' into staging (2020-02-10 18:09:14 +0000)
3
Merge remote-tracking branch 'remotes/armbru/tags/pull-yank-2021-01-13' into staging (2021-01-13 14:19:24 +0000)
4
4
5
are available in the Git repository at:
5
are available in the Git repository at:
6
6
7
https://github.com/rth7680/qemu.git tags/pull-tcg-20200212
7
https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20210113
8
8
9
for you to fetch changes up to 2445971604c1cfd3ec484457159f4ac300fb04d2:
9
for you to fetch changes up to 4cacecaaa2bbf8af0967bd3eee43297fada475a9:
10
10
11
tcg: Add tcg_gen_gvec_5_ptr (2020-02-12 14:58:36 -0800)
11
decodetree: Open files with encoding='utf-8' (2021-01-13 08:39:08 -1000)
12
12
13
----------------------------------------------------------------
13
----------------------------------------------------------------
14
Fix breakpoint invalidation.
14
Improvements to tcg constant handling.
15
Add support for tcg helpers with 7 arguments.
15
Force utf8 for decodetree.
16
Add support for gvec helpers with 5 arguments.
17
16
18
----------------------------------------------------------------
17
----------------------------------------------------------------
19
Max Filippov (1):
18
Philippe Mathieu-Daudé (1):
20
exec: flush CPU TB cache in breakpoint_invalidate
19
decodetree: Open files with encoding='utf-8'
21
20
22
Richard Henderson (1):
21
Richard Henderson (23):
23
tcg: Add tcg_gen_gvec_5_ptr
22
tcg: Use tcg_out_dupi_vec from temp_load
23
tcg: Increase tcg_out_dupi_vec immediate to int64_t
24
tcg: Consolidate 3 bits into enum TCGTempKind
25
tcg: Add temp_readonly
26
tcg: Expand TCGTemp.val to 64-bits
27
tcg: Rename struct tcg_temp_info to TempOptInfo
28
tcg: Expand TempOptInfo to 64-bits
29
tcg: Introduce TYPE_CONST temporaries
30
tcg/optimize: Improve find_better_copy
31
tcg/optimize: Adjust TempOptInfo allocation
32
tcg/optimize: Use tcg_constant_internal with constant folding
33
tcg: Convert tcg_gen_dupi_vec to TCG_CONST
34
tcg: Use tcg_constant_i32 with icount expander
35
tcg: Use tcg_constant_{i32,i64} with tcg int expanders
36
tcg: Use tcg_constant_{i32,i64} with tcg plugins
37
tcg: Use tcg_constant_{i32,i64,vec} with gvec expanders
38
tcg/tci: Add special tci_movi_{i32,i64} opcodes
39
tcg: Remove movi and dupi opcodes
40
tcg: Add tcg_reg_alloc_dup2
41
tcg/i386: Use tcg_constant_vec with tcg vec expanders
42
tcg: Remove tcg_gen_dup{8,16,32,64}i_vec
43
tcg/ppc: Use tcg_constant_vec with tcg vec expanders
44
tcg/aarch64: Use tcg_constant_vec with tcg vec expanders
24
45
25
Taylor Simpson (1):
46
include/exec/gen-icount.h | 25 +--
26
tcg: Add support for a helper with 7 arguments
47
include/tcg/tcg-op.h | 17 +-
48
include/tcg/tcg-opc.h | 11 +-
49
include/tcg/tcg.h | 50 ++++-
50
accel/tcg/plugin-gen.c | 49 ++---
51
tcg/optimize.c | 249 +++++++++++-----------
52
tcg/tcg-op-gvec.c | 129 +++++-------
53
tcg/tcg-op-vec.c | 52 +----
54
tcg/tcg-op.c | 227 ++++++++++----------
55
tcg/tcg.c | 488 +++++++++++++++++++++++++++++++++----------
56
tcg/tci.c | 4 +-
57
tcg/aarch64/tcg-target.c.inc | 32 +--
58
tcg/arm/tcg-target.c.inc | 1 -
59
tcg/i386/tcg-target.c.inc | 112 ++++++----
60
tcg/mips/tcg-target.c.inc | 2 -
61
tcg/ppc/tcg-target.c.inc | 90 ++++----
62
tcg/riscv/tcg-target.c.inc | 2 -
63
tcg/s390/tcg-target.c.inc | 2 -
64
tcg/sparc/tcg-target.c.inc | 2 -
65
tcg/tci/tcg-target.c.inc | 6 +-
66
scripts/decodetree.py | 9 +-
67
21 files changed, 890 insertions(+), 669 deletions(-)
27
68
28
include/exec/helper-gen.h | 13 +++++++++++++
29
include/exec/helper-head.h | 2 ++
30
include/exec/helper-proto.h | 6 ++++++
31
include/exec/helper-tcg.h | 7 +++++++
32
include/tcg/tcg-op-gvec.h | 7 +++++++
33
exec.c | 15 +++++++--------
34
tcg/tcg-op-gvec.c | 32 ++++++++++++++++++++++++++++++++
35
7 files changed, 74 insertions(+), 8 deletions(-)
36
diff view generated by jsdifflib
New patch
[PULL 01/24] tcg: Use tcg_out_dupi_vec from temp_load
1
Having dupi pass though movi is confusing and arguably wrong.
1
2
3
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
4
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5
---
6
tcg/tcg.c | 6 +++-
7
tcg/aarch64/tcg-target.c.inc | 7 ----
8
tcg/i386/tcg-target.c.inc | 63 ++++++++++++++++++++++++------------
9
tcg/ppc/tcg-target.c.inc | 6 ----
10
4 files changed, 47 insertions(+), 35 deletions(-)
11
12
diff --git a/tcg/tcg.c b/tcg/tcg.c
13
index XXXXXXX..XXXXXXX 100644
14
--- a/tcg/tcg.c
15
+++ b/tcg/tcg.c
16
@@ -XXX,XX +XXX,XX @@ static void temp_load(TCGContext *s, TCGTemp *ts, TCGRegSet desired_regs,
17
case TEMP_VAL_CONST:
18
reg = tcg_reg_alloc(s, desired_regs, allocated_regs,
19
preferred_regs, ts->indirect_base);
20
- tcg_out_movi(s, ts->type, reg, ts->val);
21
+ if (ts->type <= TCG_TYPE_I64) {
22
+ tcg_out_movi(s, ts->type, reg, ts->val);
23
+ } else {
24
+ tcg_out_dupi_vec(s, ts->type, reg, ts->val);
25
+ }
26
ts->mem_coherent = 0;
27
break;
28
case TEMP_VAL_MEM:
29
diff --git a/tcg/aarch64/tcg-target.c.inc b/tcg/aarch64/tcg-target.c.inc
30
index XXXXXXX..XXXXXXX 100644
31
--- a/tcg/aarch64/tcg-target.c.inc
32
+++ b/tcg/aarch64/tcg-target.c.inc
33
@@ -XXX,XX +XXX,XX @@ static void tcg_out_movi(TCGContext *s, TCGType type, TCGReg rd,
34
case TCG_TYPE_I64:
35
tcg_debug_assert(rd < 32);
36
break;
37
-
38
- case TCG_TYPE_V64:
39
- case TCG_TYPE_V128:
40
- tcg_debug_assert(rd >= 32);
41
- tcg_out_dupi_vec(s, type, rd, value);
42
- return;
43
-
44
default:
45
g_assert_not_reached();
46
}
47
diff --git a/tcg/i386/tcg-target.c.inc b/tcg/i386/tcg-target.c.inc
48
index XXXXXXX..XXXXXXX 100644
49
--- a/tcg/i386/tcg-target.c.inc
50
+++ b/tcg/i386/tcg-target.c.inc
51
@@ -XXX,XX +XXX,XX @@ static void tcg_out_dupi_vec(TCGContext *s, TCGType type,
52
}
53
}
54
55
-static void tcg_out_movi(TCGContext *s, TCGType type,
56
- TCGReg ret, tcg_target_long arg)
57
+static void tcg_out_movi_vec(TCGContext *s, TCGType type,
58
+ TCGReg ret, tcg_target_long arg)
59
+{
60
+ if (arg == 0) {
61
+ tcg_out_vex_modrm(s, OPC_PXOR, ret, ret, ret);
62
+ return;
63
+ }
64
+ if (arg == -1) {
65
+ tcg_out_vex_modrm(s, OPC_PCMPEQB, ret, ret, ret);
66
+ return;
67
+ }
68
+
69
+ int rexw = (type == TCG_TYPE_I32 ? 0 : P_REXW);
70
+ tcg_out_vex_modrm_pool(s, OPC_MOVD_VyEy + rexw, ret);
71
+ if (TCG_TARGET_REG_BITS == 64) {
72
+ new_pool_label(s, arg, R_386_PC32, s->code_ptr - 4, -4);
73
+ } else {
74
+ new_pool_label(s, arg, R_386_32, s->code_ptr - 4, 0);
75
+ }
76
+}
77
+
78
+static void tcg_out_movi_int(TCGContext *s, TCGType type,
79
+ TCGReg ret, tcg_target_long arg)
80
{
81
tcg_target_long diff;
82
83
- switch (type) {
84
- case TCG_TYPE_I32:
85
-#if TCG_TARGET_REG_BITS == 64
86
- case TCG_TYPE_I64:
87
-#endif
88
- if (ret < 16) {
89
- break;
90
- }
91
- /* fallthru */
92
- case TCG_TYPE_V64:
93
- case TCG_TYPE_V128:
94
- case TCG_TYPE_V256:
95
- tcg_debug_assert(ret >= 16);
96
- tcg_out_dupi_vec(s, type, ret, arg);
97
- return;
98
- default:
99
- g_assert_not_reached();
100
- }
101
-
102
if (arg == 0) {
103
tgen_arithr(s, ARITH_XOR, ret, ret);
104
return;
105
@@ -XXX,XX +XXX,XX @@ static void tcg_out_movi(TCGContext *s, TCGType type,
106
tcg_out64(s, arg);
107
}
108
109
+static void tcg_out_movi(TCGContext *s, TCGType type,
110
+ TCGReg ret, tcg_target_long arg)
111
+{
112
+ switch (type) {
113
+ case TCG_TYPE_I32:
114
+#if TCG_TARGET_REG_BITS == 64
115
+ case TCG_TYPE_I64:
116
+#endif
117
+ if (ret < 16) {
118
+ tcg_out_movi_int(s, type, ret, arg);
119
+ } else {
120
+ tcg_out_movi_vec(s, type, ret, arg);
121
+ }
122
+ break;
123
+ default:
124
+ g_assert_not_reached();
125
+ }
126
+}
127
+
128
static inline void tcg_out_pushi(TCGContext *s, tcg_target_long val)
129
{
130
if (val == (int8_t)val) {
131
diff --git a/tcg/ppc/tcg-target.c.inc b/tcg/ppc/tcg-target.c.inc
132
index XXXXXXX..XXXXXXX 100644
133
--- a/tcg/ppc/tcg-target.c.inc
134
+++ b/tcg/ppc/tcg-target.c.inc
135
@@ -XXX,XX +XXX,XX @@ static void tcg_out_movi(TCGContext *s, TCGType type, TCGReg ret,
136
tcg_out_movi_int(s, type, ret, arg, false);
137
break;
138
139
- case TCG_TYPE_V64:
140
- case TCG_TYPE_V128:
141
- tcg_debug_assert(ret >= TCG_REG_V0);
142
- tcg_out_dupi_vec(s, type, ret, arg);
143
- break;
144
-
145
default:
146
g_assert_not_reached();
147
}
148
--
149
2.25.1
150
151
diff view generated by jsdifflib
New patch
[PULL 02/24] tcg: Increase tcg_out_dupi_vec immediate to int64_t
1
1
While we don't store more than tcg_target_long in TCGTemp,
2
we shouldn't be limited to that for code generation. We will
3
be able to use this for INDEX_op_dup2_vec with 2 constants.
4
5
Also pass along the minimal vece that may be said to apply
6
to the constant. This allows some simplification in the
7
various backends.
8
9
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
10
---
11
tcg/tcg.c | 31 +++++++++++++++++++++++++-----
12
tcg/aarch64/tcg-target.c.inc | 12 ++++++------
13
tcg/i386/tcg-target.c.inc | 22 ++++++++++++---------
14
tcg/ppc/tcg-target.c.inc | 37 +++++++++++++++++++++++-------------
15
4 files changed, 69 insertions(+), 33 deletions(-)
16
17
diff --git a/tcg/tcg.c b/tcg/tcg.c
18
index XXXXXXX..XXXXXXX 100644
19
--- a/tcg/tcg.c
20
+++ b/tcg/tcg.c
21
@@ -XXX,XX +XXX,XX @@ static bool tcg_out_dup_vec(TCGContext *s, TCGType type, unsigned vece,
22
TCGReg dst, TCGReg src);
23
static bool tcg_out_dupm_vec(TCGContext *s, TCGType type, unsigned vece,
24
TCGReg dst, TCGReg base, intptr_t offset);
25
-static void tcg_out_dupi_vec(TCGContext *s, TCGType type,
26
- TCGReg dst, tcg_target_long arg);
27
+static void tcg_out_dupi_vec(TCGContext *s, TCGType type, unsigned vece,
28
+ TCGReg dst, int64_t arg);
29
static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc, unsigned vecl,
30
unsigned vece, const TCGArg *args,
31
const int *const_args);
32
@@ -XXX,XX +XXX,XX @@ static inline bool tcg_out_dupm_vec(TCGContext *s, TCGType type, unsigned vece,
33
{
34
g_assert_not_reached();
35
}
36
-static inline void tcg_out_dupi_vec(TCGContext *s, TCGType type,
37
- TCGReg dst, tcg_target_long arg)
38
+static inline void tcg_out_dupi_vec(TCGContext *s, TCGType type, unsigned vece,
39
+ TCGReg dst, int64_t arg)
40
{
41
g_assert_not_reached();
42
}
43
@@ -XXX,XX +XXX,XX @@ static void temp_load(TCGContext *s, TCGTemp *ts, TCGRegSet desired_regs,
44
if (ts->type <= TCG_TYPE_I64) {
45
tcg_out_movi(s, ts->type, reg, ts->val);
46
} else {
47
- tcg_out_dupi_vec(s, ts->type, reg, ts->val);
48
+ uint64_t val = ts->val;
49
+ MemOp vece = MO_64;
50
+
51
+ /*
52
+ * Find the minimal vector element that matches the constant.
53
+ * The targets will, in general, have to do this search anyway,
54
+ * do this generically.
55
+ */
56
+ if (TCG_TARGET_REG_BITS == 32) {
57
+ val = dup_const(MO_32, val);
58
+ vece = MO_32;
59
+ }
60
+ if (val == dup_const(MO_8, val)) {
61
+ vece = MO_8;
62
+ } else if (val == dup_const(MO_16, val)) {
63
+ vece = MO_16;
64
+ } else if (TCG_TARGET_REG_BITS == 64 &&
65
+ val == dup_const(MO_32, val)) {
66
+ vece = MO_32;
67
+ }
68
+
69
+ tcg_out_dupi_vec(s, ts->type, vece, reg, ts->val);
70
}
71
ts->mem_coherent = 0;
72
break;
73
diff --git a/tcg/aarch64/tcg-target.c.inc b/tcg/aarch64/tcg-target.c.inc
74
index XXXXXXX..XXXXXXX 100644
75
--- a/tcg/aarch64/tcg-target.c.inc
76
+++ b/tcg/aarch64/tcg-target.c.inc
77
@@ -XXX,XX +XXX,XX @@ static void tcg_out_logicali(TCGContext *s, AArch64Insn insn, TCGType ext,
78
tcg_out_insn_3404(s, insn, ext, rd, rn, ext, r, c);
79
}
80
81
-static void tcg_out_dupi_vec(TCGContext *s, TCGType type,
82
- TCGReg rd, tcg_target_long v64)
83
+static void tcg_out_dupi_vec(TCGContext *s, TCGType type, unsigned vece,
84
+ TCGReg rd, int64_t v64)
85
{
86
bool q = type == TCG_TYPE_V128;
87
int cmode, imm8, i;
88
89
/* Test all bytes equal first. */
90
- if (v64 == dup_const(MO_8, v64)) {
91
+ if (vece == MO_8) {
92
imm8 = (uint8_t)v64;
93
tcg_out_insn(s, 3606, MOVI, q, rd, 0, 0xe, imm8);
94
return;
95
@@ -XXX,XX +XXX,XX @@ static void tcg_out_dupi_vec(TCGContext *s, TCGType type,
96
* cannot find an expansion there's no point checking a larger
97
* width because we already know by replication it cannot match.
98
*/
99
- if (v64 == dup_const(MO_16, v64)) {
100
+ if (vece == MO_16) {
101
uint16_t v16 = v64;
102
103
if (is_shimm16(v16, &cmode, &imm8)) {
104
@@ -XXX,XX +XXX,XX @@ static void tcg_out_dupi_vec(TCGContext *s, TCGType type,
105
tcg_out_insn(s, 3606, MOVI, q, rd, 0, 0x8, v16 & 0xff);
106
tcg_out_insn(s, 3606, ORR, q, rd, 0, 0xa, v16 >> 8);
107
return;
108
- } else if (v64 == dup_const(MO_32, v64)) {
109
+ } else if (vece == MO_32) {
110
uint32_t v32 = v64;
111
uint32_t n32 = ~v32;
112
113
@@ -XXX,XX +XXX,XX @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc,
114
tcg_out_insn_3617(s, insn, is_q, vece, a0, a1);
115
break;
116
}
117
- tcg_out_dupi_vec(s, type, TCG_VEC_TMP, 0);
118
+ tcg_out_dupi_vec(s, type, MO_8, TCG_VEC_TMP, 0);
119
a2 = TCG_VEC_TMP;
120
}
121
insn = cmp_insn[cond];
122
diff --git a/tcg/i386/tcg-target.c.inc b/tcg/i386/tcg-target.c.inc
123
index XXXXXXX..XXXXXXX 100644
124
--- a/tcg/i386/tcg-target.c.inc
125
+++ b/tcg/i386/tcg-target.c.inc
126
@@ -XXX,XX +XXX,XX @@ static bool tcg_out_dupm_vec(TCGContext *s, TCGType type, unsigned vece,
127
return true;
128
}
129
130
-static void tcg_out_dupi_vec(TCGContext *s, TCGType type,
131
- TCGReg ret, tcg_target_long arg)
132
+static void tcg_out_dupi_vec(TCGContext *s, TCGType type, unsigned vece,
133
+ TCGReg ret, int64_t arg)
134
{
135
int vex_l = (type == TCG_TYPE_V256 ? P_VEXL : 0);
136
137
@@ -XXX,XX +XXX,XX @@ static void tcg_out_dupi_vec(TCGContext *s, TCGType type,
138
return;
139
}
140
141
- if (TCG_TARGET_REG_BITS == 64) {
142
+ if (TCG_TARGET_REG_BITS == 32 && vece < MO_64) {
143
+ if (have_avx2) {
144
+ tcg_out_vex_modrm_pool(s, OPC_VPBROADCASTD + vex_l, ret);
145
+ } else {
146
+ tcg_out_vex_modrm_pool(s, OPC_VBROADCASTSS, ret);
147
+ }
148
+ new_pool_label(s, arg, R_386_32, s->code_ptr - 4, 0);
149
+ } else {
150
if (type == TCG_TYPE_V64) {
151
tcg_out_vex_modrm_pool(s, OPC_MOVQ_VqWq, ret);
152
} else if (have_avx2) {
153
@@ -XXX,XX +XXX,XX @@ static void tcg_out_dupi_vec(TCGContext *s, TCGType type,
154
} else {
155
tcg_out_vex_modrm_pool(s, OPC_MOVDDUP, ret);
156
}
157
- new_pool_label(s, arg, R_386_PC32, s->code_ptr - 4, -4);
158
- } else {
159
- if (have_avx2) {
160
- tcg_out_vex_modrm_pool(s, OPC_VPBROADCASTD + vex_l, ret);
161
+ if (TCG_TARGET_REG_BITS == 64) {
162
+ new_pool_label(s, arg, R_386_PC32, s->code_ptr - 4, -4);
163
} else {
164
- tcg_out_vex_modrm_pool(s, OPC_VBROADCASTSS, ret);
165
+ new_pool_l2(s, R_386_32, s->code_ptr - 4, 0, arg, arg >> 32);
166
}
167
- new_pool_label(s, arg, R_386_32, s->code_ptr - 4, 0);
168
}
169
}
170
171
diff --git a/tcg/ppc/tcg-target.c.inc b/tcg/ppc/tcg-target.c.inc
172
index XXXXXXX..XXXXXXX 100644
173
--- a/tcg/ppc/tcg-target.c.inc
174
+++ b/tcg/ppc/tcg-target.c.inc
175
@@ -XXX,XX +XXX,XX @@ static void tcg_out_movi_int(TCGContext *s, TCGType type, TCGReg ret,
176
}
177
}
178
179
-static void tcg_out_dupi_vec(TCGContext *s, TCGType type, TCGReg ret,
180
- tcg_target_long val)
181
+static void tcg_out_dupi_vec(TCGContext *s, TCGType type, unsigned vece,
182
+ TCGReg ret, int64_t val)
183
{
184
uint32_t load_insn;
185
int rel, low;
186
intptr_t add;
187
188
- low = (int8_t)val;
189
- if (low >= -16 && low < 16) {
190
- if (val == (tcg_target_long)dup_const(MO_8, low)) {
191
+ switch (vece) {
192
+ case MO_8:
193
+ low = (int8_t)val;
194
+ if (low >= -16 && low < 16) {
195
tcg_out32(s, VSPLTISB | VRT(ret) | ((val & 31) << 16));
196
return;
197
}
198
- if (val == (tcg_target_long)dup_const(MO_16, low)) {
199
+ if (have_isa_3_00) {
200
+ tcg_out32(s, XXSPLTIB | VRT(ret) | ((val & 0xff) << 11));
201
+ return;
202
+ }
203
+ break;
204
+
205
+ case MO_16:
206
+ low = (int16_t)val;
207
+ if (low >= -16 && low < 16) {
208
tcg_out32(s, VSPLTISH | VRT(ret) | ((val & 31) << 16));
209
return;
210
}
211
- if (val == (tcg_target_long)dup_const(MO_32, low)) {
212
+ break;
213
+
214
+ case MO_32:
215
+ low = (int32_t)val;
216
+ if (low >= -16 && low < 16) {
217
tcg_out32(s, VSPLTISW | VRT(ret) | ((val & 31) << 16));
218
return;
219
}
220
- }
221
- if (have_isa_3_00 && val == (tcg_target_long)dup_const(MO_8, val)) {
222
- tcg_out32(s, XXSPLTIB | VRT(ret) | ((val & 0xff) << 11));
223
- return;
224
+ break;
225
}
226
227
/*
228
@@ -XXX,XX +XXX,XX @@ static void tcg_out_dupi_vec(TCGContext *s, TCGType type, TCGReg ret,
229
if (TCG_TARGET_REG_BITS == 64) {
230
new_pool_label(s, val, rel, s->code_ptr, add);
231
} else {
232
- new_pool_l2(s, rel, s->code_ptr, add, val, val);
233
+ new_pool_l2(s, rel, s->code_ptr, add, val >> 32, val);
234
}
235
} else {
236
load_insn = LVX | VRT(ret) | RB(TCG_REG_TMP1);
237
if (TCG_TARGET_REG_BITS == 64) {
238
new_pool_l2(s, rel, s->code_ptr, add, val, val);
239
} else {
240
- new_pool_l4(s, rel, s->code_ptr, add, val, val, val, val);
241
+ new_pool_l4(s, rel, s->code_ptr, add,
242
+ val >> 32, val, val >> 32, val);
243
}
244
}
245
246
--
247
2.25.1
248
249
diff view generated by jsdifflib
New patch
[PULL 03/24] tcg: Consolidate 3 bits into enum TCGTempKind
1
The temp_fixed, temp_global, temp_local bits are all related.
2
Combine them into a single enumeration.
1
3
4
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
5
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
6
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
7
---
8
include/tcg/tcg.h | 20 +++++---
9
tcg/optimize.c | 8 +--
10
tcg/tcg.c | 126 ++++++++++++++++++++++++++++------------------
11
3 files changed, 92 insertions(+), 62 deletions(-)
12
13
diff --git a/include/tcg/tcg.h b/include/tcg/tcg.h
14
index XXXXXXX..XXXXXXX 100644
15
--- a/include/tcg/tcg.h
16
+++ b/include/tcg/tcg.h
17
@@ -XXX,XX +XXX,XX @@ typedef enum TCGTempVal {
18
TEMP_VAL_CONST,
19
} TCGTempVal;
20
21
+typedef enum TCGTempKind {
22
+ /* Temp is dead at the end of all basic blocks. */
23
+ TEMP_NORMAL,
24
+ /* Temp is saved across basic blocks but dead at the end of TBs. */
25
+ TEMP_LOCAL,
26
+ /* Temp is saved across both basic blocks and translation blocks. */
27
+ TEMP_GLOBAL,
28
+ /* Temp is in a fixed register. */
29
+ TEMP_FIXED,
30
+} TCGTempKind;
31
+
32
typedef struct TCGTemp {
33
TCGReg reg:8;
34
TCGTempVal val_type:8;
35
TCGType base_type:8;
36
TCGType type:8;
37
- unsigned int fixed_reg:1;
38
+ TCGTempKind kind:3;
39
unsigned int indirect_reg:1;
40
unsigned int indirect_base:1;
41
unsigned int mem_coherent:1;
42
unsigned int mem_allocated:1;
43
- /* If true, the temp is saved across both basic blocks and
44
- translation blocks. */
45
- unsigned int temp_global:1;
46
- /* If true, the temp is saved across basic blocks but dead
47
- at the end of translation blocks. If false, the temp is
48
- dead at the end of basic blocks. */
49
- unsigned int temp_local:1;
50
unsigned int temp_allocated:1;
51
52
tcg_target_long val;
53
diff --git a/tcg/optimize.c b/tcg/optimize.c
54
index XXXXXXX..XXXXXXX 100644
55
--- a/tcg/optimize.c
56
+++ b/tcg/optimize.c
57
@@ -XXX,XX +XXX,XX @@ static TCGTemp *find_better_copy(TCGContext *s, TCGTemp *ts)
58
TCGTemp *i;
59
60
/* If this is already a global, we can't do better. */
61
- if (ts->temp_global) {
62
+ if (ts->kind >= TEMP_GLOBAL) {
63
return ts;
64
}
65
66
/* Search for a global first. */
67
for (i = ts_info(ts)->next_copy; i != ts; i = ts_info(i)->next_copy) {
68
- if (i->temp_global) {
69
+ if (i->kind >= TEMP_GLOBAL) {
70
return i;
71
}
72
}
73
74
/* If it is a temp, search for a temp local. */
75
- if (!ts->temp_local) {
76
+ if (ts->kind == TEMP_NORMAL) {
77
for (i = ts_info(ts)->next_copy; i != ts; i = ts_info(i)->next_copy) {
78
- if (ts->temp_local) {
79
+ if (i->kind >= TEMP_LOCAL) {
80
return i;
81
}
82
}
83
diff --git a/tcg/tcg.c b/tcg/tcg.c
84
index XXXXXXX..XXXXXXX 100644
85
--- a/tcg/tcg.c
86
+++ b/tcg/tcg.c
87
@@ -XXX,XX +XXX,XX @@ static inline TCGTemp *tcg_global_alloc(TCGContext *s)
88
tcg_debug_assert(s->nb_globals == s->nb_temps);
89
s->nb_globals++;
90
ts = tcg_temp_alloc(s);
91
- ts->temp_global = 1;
92
+ ts->kind = TEMP_GLOBAL;
93
94
return ts;
95
}
96
@@ -XXX,XX +XXX,XX @@ static TCGTemp *tcg_global_reg_new_internal(TCGContext *s, TCGType type,
97
ts = tcg_global_alloc(s);
98
ts->base_type = type;
99
ts->type = type;
100
- ts->fixed_reg = 1;
101
+ ts->kind = TEMP_FIXED;
102
ts->reg = reg;
103
ts->name = name;
104
tcg_regset_set_reg(s->reserved_regs, reg);
105
@@ -XXX,XX +XXX,XX @@ TCGTemp *tcg_global_mem_new_internal(TCGType type, TCGv_ptr base,
106
bigendian = 1;
107
#endif
108
109
- if (!base_ts->fixed_reg) {
110
+ if (base_ts->kind != TEMP_FIXED) {
111
/* We do not support double-indirect registers. */
112
tcg_debug_assert(!base_ts->indirect_reg);
113
base_ts->indirect_base = 1;
114
@@ -XXX,XX +XXX,XX @@ TCGTemp *tcg_global_mem_new_internal(TCGType type, TCGv_ptr base,
115
TCGTemp *tcg_temp_new_internal(TCGType type, bool temp_local)
116
{
117
TCGContext *s = tcg_ctx;
118
+ TCGTempKind kind = temp_local ? TEMP_LOCAL : TEMP_NORMAL;
119
TCGTemp *ts;
120
int idx, k;
121
122
@@ -XXX,XX +XXX,XX @@ TCGTemp *tcg_temp_new_internal(TCGType type, bool temp_local)
123
ts = &s->temps[idx];
124
ts->temp_allocated = 1;
125
tcg_debug_assert(ts->base_type == type);
126
- tcg_debug_assert(ts->temp_local == temp_local);
127
+ tcg_debug_assert(ts->kind == kind);
128
} else {
129
ts = tcg_temp_alloc(s);
130
if (TCG_TARGET_REG_BITS == 32 && type == TCG_TYPE_I64) {
131
@@ -XXX,XX +XXX,XX @@ TCGTemp *tcg_temp_new_internal(TCGType type, bool temp_local)
132
ts->base_type = type;
133
ts->type = TCG_TYPE_I32;
134
ts->temp_allocated = 1;
135
- ts->temp_local = temp_local;
136
+ ts->kind = kind;
137
138
tcg_debug_assert(ts2 == ts + 1);
139
ts2->base_type = TCG_TYPE_I64;
140
ts2->type = TCG_TYPE_I32;
141
ts2->temp_allocated = 1;
142
- ts2->temp_local = temp_local;
143
+ ts2->kind = kind;
144
} else {
145
ts->base_type = type;
146
ts->type = type;
147
ts->temp_allocated = 1;
148
- ts->temp_local = temp_local;
149
+ ts->kind = kind;
150
}
151
}
152
153
@@ -XXX,XX +XXX,XX @@ void tcg_temp_free_internal(TCGTemp *ts)
154
}
155
#endif
156
157
- tcg_debug_assert(ts->temp_global == 0);
158
+ tcg_debug_assert(ts->kind < TEMP_GLOBAL);
159
tcg_debug_assert(ts->temp_allocated != 0);
160
ts->temp_allocated = 0;
161
162
idx = temp_idx(ts);
163
- k = ts->base_type + (ts->temp_local ? TCG_TYPE_COUNT : 0);
164
+ k = ts->base_type + (ts->kind == TEMP_NORMAL ? 0 : TCG_TYPE_COUNT);
165
set_bit(idx, s->free_temps[k].l);
166
}
167
168
@@ -XXX,XX +XXX,XX @@ void tcg_gen_callN(void *func, TCGTemp *ret, int nargs, TCGTemp **args)
169
static void tcg_reg_alloc_start(TCGContext *s)
170
{
171
int i, n;
172
- TCGTemp *ts;
173
174
- for (i = 0, n = s->nb_globals; i < n; i++) {
175
- ts = &s->temps[i];
176
- ts->val_type = (ts->fixed_reg ? TEMP_VAL_REG : TEMP_VAL_MEM);
177
- }
178
- for (n = s->nb_temps; i < n; i++) {
179
- ts = &s->temps[i];
180
- ts->val_type = (ts->temp_local ? TEMP_VAL_MEM : TEMP_VAL_DEAD);
181
- ts->mem_allocated = 0;
182
- ts->fixed_reg = 0;
183
+ for (i = 0, n = s->nb_temps; i < n; i++) {
184
+ TCGTemp *ts = &s->temps[i];
185
+ TCGTempVal val = TEMP_VAL_MEM;
186
+
187
+ switch (ts->kind) {
188
+ case TEMP_FIXED:
189
+ val = TEMP_VAL_REG;
190
+ break;
191
+ case TEMP_GLOBAL:
192
+ break;
193
+ case TEMP_NORMAL:
194
+ val = TEMP_VAL_DEAD;
195
+ /* fall through */
196
+ case TEMP_LOCAL:
197
+ ts->mem_allocated = 0;
198
+ break;
199
+ default:
200
+ g_assert_not_reached();
201
+ }
202
+ ts->val_type = val;
203
}
204
205
memset(s->reg_to_temp, 0, sizeof(s->reg_to_temp));
206
@@ -XXX,XX +XXX,XX @@ static char *tcg_get_arg_str_ptr(TCGContext *s, char *buf, int buf_size,
207
{
208
int idx = temp_idx(ts);
209
210
- if (ts->temp_global) {
211
+ switch (ts->kind) {
212
+ case TEMP_FIXED:
213
+ case TEMP_GLOBAL:
214
pstrcpy(buf, buf_size, ts->name);
215
- } else if (ts->temp_local) {
216
+ break;
217
+ case TEMP_LOCAL:
218
snprintf(buf, buf_size, "loc%d", idx - s->nb_globals);
219
- } else {
220
+ break;
221
+ case TEMP_NORMAL:
222
snprintf(buf, buf_size, "tmp%d", idx - s->nb_globals);
223
+ break;
224
}
225
return buf;
226
}
227
@@ -XXX,XX +XXX,XX @@ static void la_bb_end(TCGContext *s, int ng, int nt)
228
{
229
int i;
230
231
- for (i = 0; i < ng; ++i) {
232
- s->temps[i].state = TS_DEAD | TS_MEM;
233
- la_reset_pref(&s->temps[i]);
234
- }
235
- for (i = ng; i < nt; ++i) {
236
- s->temps[i].state = (s->temps[i].temp_local
237
- ? TS_DEAD | TS_MEM
238
- : TS_DEAD);
239
- la_reset_pref(&s->temps[i]);
240
+ for (i = 0; i < nt; ++i) {
241
+ TCGTemp *ts = &s->temps[i];
242
+ int state;
243
+
244
+ switch (ts->kind) {
245
+ case TEMP_FIXED:
246
+ case TEMP_GLOBAL:
247
+ case TEMP_LOCAL:
248
+ state = TS_DEAD | TS_MEM;
249
+ break;
250
+ case TEMP_NORMAL:
251
+ state = TS_DEAD;
252
+ break;
253
+ default:
254
+ g_assert_not_reached();
255
+ }
256
+ ts->state = state;
257
+ la_reset_pref(ts);
258
}
259
}
260
261
@@ -XXX,XX +XXX,XX @@ static void la_bb_sync(TCGContext *s, int ng, int nt)
262
la_global_sync(s, ng);
263
264
for (int i = ng; i < nt; ++i) {
265
- if (s->temps[i].temp_local) {
266
+ if (s->temps[i].kind == TEMP_LOCAL) {
267
int state = s->temps[i].state;
268
s->temps[i].state = state | TS_MEM;
269
if (state != TS_DEAD) {
270
@@ -XXX,XX +XXX,XX @@ static void check_regs(TCGContext *s)
271
}
272
for (k = 0; k < s->nb_temps; k++) {
273
ts = &s->temps[k];
274
- if (ts->val_type == TEMP_VAL_REG && !ts->fixed_reg
275
+ if (ts->val_type == TEMP_VAL_REG
276
+ && ts->kind != TEMP_FIXED
277
&& s->reg_to_temp[ts->reg] != ts) {
278
printf("Inconsistency for temp %s:\n",
279
tcg_get_arg_str_ptr(s, buf, sizeof(buf), ts));
280
@@ -XXX,XX +XXX,XX @@ static void temp_load(TCGContext *, TCGTemp *, TCGRegSet, TCGRegSet, TCGRegSet);
281
mark it free; otherwise mark it dead. */
282
static void temp_free_or_dead(TCGContext *s, TCGTemp *ts, int free_or_dead)
283
{
284
- if (ts->fixed_reg) {
285
+ if (ts->kind == TEMP_FIXED) {
286
return;
287
}
288
if (ts->val_type == TEMP_VAL_REG) {
289
s->reg_to_temp[ts->reg] = NULL;
290
}
291
ts->val_type = (free_or_dead < 0
292
- || ts->temp_local
293
- || ts->temp_global
294
+ || ts->kind != TEMP_NORMAL
295
? TEMP_VAL_MEM : TEMP_VAL_DEAD);
296
}
297
298
@@ -XXX,XX +XXX,XX @@ static inline void temp_dead(TCGContext *s, TCGTemp *ts)
299
static void temp_sync(TCGContext *s, TCGTemp *ts, TCGRegSet allocated_regs,
300
TCGRegSet preferred_regs, int free_or_dead)
301
{
302
- if (ts->fixed_reg) {
303
+ if (ts->kind == TEMP_FIXED) {
304
return;
305
}
306
if (!ts->mem_coherent) {
307
@@ -XXX,XX +XXX,XX @@ static void temp_save(TCGContext *s, TCGTemp *ts, TCGRegSet allocated_regs)
308
{
309
/* The liveness analysis already ensures that globals are back
310
in memory. Keep an tcg_debug_assert for safety. */
311
- tcg_debug_assert(ts->val_type == TEMP_VAL_MEM || ts->fixed_reg);
312
+ tcg_debug_assert(ts->val_type == TEMP_VAL_MEM
313
+ || ts->kind == TEMP_FIXED);
314
}
315
316
/* save globals to their canonical location and assume they can be
317
@@ -XXX,XX +XXX,XX @@ static void sync_globals(TCGContext *s, TCGRegSet allocated_regs)
318
for (i = 0, n = s->nb_globals; i < n; i++) {
319
TCGTemp *ts = &s->temps[i];
320
tcg_debug_assert(ts->val_type != TEMP_VAL_REG
321
- || ts->fixed_reg
322
+ || ts->kind == TEMP_FIXED
323
|| ts->mem_coherent);
324
}
325
}
326
@@ -XXX,XX +XXX,XX @@ static void tcg_reg_alloc_bb_end(TCGContext *s, TCGRegSet allocated_regs)
327
328
for (i = s->nb_globals; i < s->nb_temps; i++) {
329
TCGTemp *ts = &s->temps[i];
330
- if (ts->temp_local) {
331
+ if (ts->kind == TEMP_LOCAL) {
332
temp_save(s, ts, allocated_regs);
333
} else {
334
/* The liveness analysis already ensures that temps are dead.
335
@@ -XXX,XX +XXX,XX @@ static void tcg_reg_alloc_cbranch(TCGContext *s, TCGRegSet allocated_regs)
336
* The liveness analysis already ensures that temps are dead.
337
* Keep tcg_debug_asserts for safety.
338
*/
339
- if (ts->temp_local) {
340
+ if (ts->kind == TEMP_LOCAL) {
341
tcg_debug_assert(ts->val_type != TEMP_VAL_REG || ts->mem_coherent);
342
} else {
343
tcg_debug_assert(ts->val_type == TEMP_VAL_DEAD);
344
@@ -XXX,XX +XXX,XX @@ static void tcg_reg_alloc_do_movi(TCGContext *s, TCGTemp *ots,
345
TCGRegSet preferred_regs)
346
{
347
/* ENV should not be modified. */
348
- tcg_debug_assert(!ots->fixed_reg);
349
+ tcg_debug_assert(ots->kind != TEMP_FIXED);
350
351
/* The movi is not explicitly generated here. */
352
if (ots->val_type == TEMP_VAL_REG) {
353
@@ -XXX,XX +XXX,XX @@ static void tcg_reg_alloc_mov(TCGContext *s, const TCGOp *op)
354
ts = arg_temp(op->args[1]);
355
356
/* ENV should not be modified. */
357
- tcg_debug_assert(!ots->fixed_reg);
358
+ tcg_debug_assert(ots->kind != TEMP_FIXED);
359
360
/* Note that otype != itype for no-op truncation. */
361
otype = ots->type;
362
@@ -XXX,XX +XXX,XX @@ static void tcg_reg_alloc_mov(TCGContext *s, const TCGOp *op)
363
}
364
temp_dead(s, ots);
365
} else {
366
- if (IS_DEAD_ARG(1) && !ts->fixed_reg) {
367
+ if (IS_DEAD_ARG(1) && ts->kind != TEMP_FIXED) {
368
/* the mov can be suppressed */
369
if (ots->val_type == TEMP_VAL_REG) {
370
s->reg_to_temp[ots->reg] = NULL;
371
@@ -XXX,XX +XXX,XX @@ static void tcg_reg_alloc_mov(TCGContext *s, const TCGOp *op)
372
* Store the source register into the destination slot
373
* and leave the destination temp as TEMP_VAL_MEM.
374
*/
375
- assert(!ots->fixed_reg);
376
+ assert(ots->kind != TEMP_FIXED);
377
if (!ts->mem_allocated) {
378
temp_allocate_frame(s, ots);
379
}
380
@@ -XXX,XX +XXX,XX @@ static void tcg_reg_alloc_dup(TCGContext *s, const TCGOp *op)
381
its = arg_temp(op->args[1]);
382
383
/* ENV should not be modified. */
384
- tcg_debug_assert(!ots->fixed_reg);
385
+ tcg_debug_assert(ots->kind != TEMP_FIXED);
386
387
itype = its->type;
388
vece = TCGOP_VECE(op);
389
@@ -XXX,XX +XXX,XX @@ static void tcg_reg_alloc_op(TCGContext *s, const TCGOp *op)
390
i_preferred_regs = o_preferred_regs = 0;
391
if (arg_ct->ialias) {
392
o_preferred_regs = op->output_pref[arg_ct->alias_index];
393
- if (ts->fixed_reg) {
394
+ if (ts->kind == TEMP_FIXED) {
395
/* if fixed register, we must allocate a new register
396
if the alias is not the same register */
397
if (arg != op->args[arg_ct->alias_index]) {
398
@@ -XXX,XX +XXX,XX @@ static void tcg_reg_alloc_op(TCGContext *s, const TCGOp *op)
399
ts = arg_temp(arg);
400
401
/* ENV should not be modified. */
402
- tcg_debug_assert(!ts->fixed_reg);
403
+ tcg_debug_assert(ts->kind != TEMP_FIXED);
404
405
if (arg_ct->oalias && !const_args[arg_ct->alias_index]) {
406
reg = new_args[arg_ct->alias_index];
407
@@ -XXX,XX +XXX,XX @@ static void tcg_reg_alloc_op(TCGContext *s, const TCGOp *op)
408
ts = arg_temp(op->args[i]);
409
410
/* ENV should not be modified. */
411
- tcg_debug_assert(!ts->fixed_reg);
412
+ tcg_debug_assert(ts->kind != TEMP_FIXED);
413
414
if (NEED_SYNC_ARG(i)) {
415
temp_sync(s, ts, o_allocated_regs, 0, IS_DEAD_ARG(i));
416
@@ -XXX,XX +XXX,XX @@ static void tcg_reg_alloc_call(TCGContext *s, TCGOp *op)
417
ts = arg_temp(arg);
418
419
/* ENV should not be modified. */
420
- tcg_debug_assert(!ts->fixed_reg);
421
+ tcg_debug_assert(ts->kind != TEMP_FIXED);
422
423
reg = tcg_target_call_oarg_regs[i];
424
tcg_debug_assert(s->reg_to_temp[reg] == NULL);
425
--
426
2.25.1
427
428
diff view generated by jsdifflib
New patch
[PULL 04/24] tcg: Add temp_readonly
1
In most, but not all, places that we check for TEMP_FIXED,
2
we are really testing that we do not modify the temporary.
1
3
4
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
5
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
6
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
7
---
8
include/tcg/tcg.h | 5 +++++
9
tcg/tcg.c | 21 ++++++++++-----------
10
2 files changed, 15 insertions(+), 11 deletions(-)
11
12
diff --git a/include/tcg/tcg.h b/include/tcg/tcg.h
13
index XXXXXXX..XXXXXXX 100644
14
--- a/include/tcg/tcg.h
15
+++ b/include/tcg/tcg.h
16
@@ -XXX,XX +XXX,XX @@ struct TCGContext {
17
target_ulong gen_insn_data[TCG_MAX_INSNS][TARGET_INSN_START_WORDS];
18
};
19
20
+static inline bool temp_readonly(TCGTemp *ts)
21
+{
22
+ return ts->kind == TEMP_FIXED;
23
+}
24
+
25
extern TCGContext tcg_init_ctx;
26
extern __thread TCGContext *tcg_ctx;
27
extern const void *tcg_code_gen_epilogue;
28
diff --git a/tcg/tcg.c b/tcg/tcg.c
29
index XXXXXXX..XXXXXXX 100644
30
--- a/tcg/tcg.c
31
+++ b/tcg/tcg.c
32
@@ -XXX,XX +XXX,XX @@ static void temp_load(TCGContext *, TCGTemp *, TCGRegSet, TCGRegSet, TCGRegSet);
33
mark it free; otherwise mark it dead. */
34
static void temp_free_or_dead(TCGContext *s, TCGTemp *ts, int free_or_dead)
35
{
36
- if (ts->kind == TEMP_FIXED) {
37
+ if (temp_readonly(ts)) {
38
return;
39
}
40
if (ts->val_type == TEMP_VAL_REG) {
41
@@ -XXX,XX +XXX,XX @@ static inline void temp_dead(TCGContext *s, TCGTemp *ts)
42
static void temp_sync(TCGContext *s, TCGTemp *ts, TCGRegSet allocated_regs,
43
TCGRegSet preferred_regs, int free_or_dead)
44
{
45
- if (ts->kind == TEMP_FIXED) {
46
+ if (temp_readonly(ts)) {
47
return;
48
}
49
if (!ts->mem_coherent) {
50
@@ -XXX,XX +XXX,XX @@ static void temp_save(TCGContext *s, TCGTemp *ts, TCGRegSet allocated_regs)
51
{
52
/* The liveness analysis already ensures that globals are back
53
in memory. Keep an tcg_debug_assert for safety. */
54
- tcg_debug_assert(ts->val_type == TEMP_VAL_MEM
55
- || ts->kind == TEMP_FIXED);
56
+ tcg_debug_assert(ts->val_type == TEMP_VAL_MEM || temp_readonly(ts));
57
}
58
59
/* save globals to their canonical location and assume they can be
60
@@ -XXX,XX +XXX,XX @@ static void tcg_reg_alloc_do_movi(TCGContext *s, TCGTemp *ots,
61
TCGRegSet preferred_regs)
62
{
63
/* ENV should not be modified. */
64
- tcg_debug_assert(ots->kind != TEMP_FIXED);
65
+ tcg_debug_assert(!temp_readonly(ots));
66
67
/* The movi is not explicitly generated here. */
68
if (ots->val_type == TEMP_VAL_REG) {
69
@@ -XXX,XX +XXX,XX @@ static void tcg_reg_alloc_mov(TCGContext *s, const TCGOp *op)
70
ts = arg_temp(op->args[1]);
71
72
/* ENV should not be modified. */
73
- tcg_debug_assert(ots->kind != TEMP_FIXED);
74
+ tcg_debug_assert(!temp_readonly(ots));
75
76
/* Note that otype != itype for no-op truncation. */
77
otype = ots->type;
78
@@ -XXX,XX +XXX,XX @@ static void tcg_reg_alloc_mov(TCGContext *s, const TCGOp *op)
79
* Store the source register into the destination slot
80
* and leave the destination temp as TEMP_VAL_MEM.
81
*/
82
- assert(ots->kind != TEMP_FIXED);
83
+ assert(!temp_readonly(ots));
84
if (!ts->mem_allocated) {
85
temp_allocate_frame(s, ots);
86
}
87
@@ -XXX,XX +XXX,XX @@ static void tcg_reg_alloc_dup(TCGContext *s, const TCGOp *op)
88
its = arg_temp(op->args[1]);
89
90
/* ENV should not be modified. */
91
- tcg_debug_assert(ots->kind != TEMP_FIXED);
92
+ tcg_debug_assert(!temp_readonly(ots));
93
94
itype = its->type;
95
vece = TCGOP_VECE(op);
96
@@ -XXX,XX +XXX,XX @@ static void tcg_reg_alloc_op(TCGContext *s, const TCGOp *op)
97
ts = arg_temp(arg);
98
99
/* ENV should not be modified. */
100
- tcg_debug_assert(ts->kind != TEMP_FIXED);
101
+ tcg_debug_assert(!temp_readonly(ts));
102
103
if (arg_ct->oalias && !const_args[arg_ct->alias_index]) {
104
reg = new_args[arg_ct->alias_index];
105
@@ -XXX,XX +XXX,XX @@ static void tcg_reg_alloc_op(TCGContext *s, const TCGOp *op)
106
ts = arg_temp(op->args[i]);
107
108
/* ENV should not be modified. */
109
- tcg_debug_assert(ts->kind != TEMP_FIXED);
110
+ tcg_debug_assert(!temp_readonly(ts));
111
112
if (NEED_SYNC_ARG(i)) {
113
temp_sync(s, ts, o_allocated_regs, 0, IS_DEAD_ARG(i));
114
@@ -XXX,XX +XXX,XX @@ static void tcg_reg_alloc_call(TCGContext *s, TCGOp *op)
115
ts = arg_temp(arg);
116
117
/* ENV should not be modified. */
118
- tcg_debug_assert(ts->kind != TEMP_FIXED);
119
+ tcg_debug_assert(!temp_readonly(ts));
120
121
reg = tcg_target_call_oarg_regs[i];
122
tcg_debug_assert(s->reg_to_temp[reg] == NULL);
123
--
124
2.25.1
125
126
diff view generated by jsdifflib
New patch
[PULL 05/24] tcg: Expand TCGTemp.val to 64-bits
1
This will reduce the differences between 32-bit and 64-bit hosts,
2
allowing full 64-bit constants to be created with the same interface.
1
3
4
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5
---
6
include/tcg/tcg.h | 2 +-
7
tcg/tcg.c | 2 +-
8
2 files changed, 2 insertions(+), 2 deletions(-)
9
10
diff --git a/include/tcg/tcg.h b/include/tcg/tcg.h
11
index XXXXXXX..XXXXXXX 100644
12
--- a/include/tcg/tcg.h
13
+++ b/include/tcg/tcg.h
14
@@ -XXX,XX +XXX,XX @@ typedef struct TCGTemp {
15
unsigned int mem_allocated:1;
16
unsigned int temp_allocated:1;
17
18
- tcg_target_long val;
19
+ int64_t val;
20
struct TCGTemp *mem_base;
21
intptr_t mem_offset;
22
const char *name;
23
diff --git a/tcg/tcg.c b/tcg/tcg.c
24
index XXXXXXX..XXXXXXX 100644
25
--- a/tcg/tcg.c
26
+++ b/tcg/tcg.c
27
@@ -XXX,XX +XXX,XX @@ static void dump_regs(TCGContext *s)
28
tcg_target_reg_names[ts->mem_base->reg]);
29
break;
30
case TEMP_VAL_CONST:
31
- printf("$0x%" TCG_PRIlx, ts->val);
32
+ printf("$0x%" PRIx64, ts->val);
33
break;
34
case TEMP_VAL_DEAD:
35
printf("D");
36
--
37
2.25.1
38
39
diff view generated by jsdifflib
New patch
[PULL 06/24] tcg: Rename struct tcg_temp_info to TempOptInfo
1
Fix this name vs our coding style.
1
2
3
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
4
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
5
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6
---
7
tcg/optimize.c | 32 ++++++++++++++++----------------
8
1 file changed, 16 insertions(+), 16 deletions(-)
9
10
diff --git a/tcg/optimize.c b/tcg/optimize.c
11
index XXXXXXX..XXXXXXX 100644
12
--- a/tcg/optimize.c
13
+++ b/tcg/optimize.c
14
@@ -XXX,XX +XXX,XX @@
15
glue(glue(case INDEX_op_, x), _i64): \
16
glue(glue(case INDEX_op_, x), _vec)
17
18
-struct tcg_temp_info {
19
+typedef struct TempOptInfo {
20
bool is_const;
21
TCGTemp *prev_copy;
22
TCGTemp *next_copy;
23
tcg_target_ulong val;
24
tcg_target_ulong mask;
25
-};
26
+} TempOptInfo;
27
28
-static inline struct tcg_temp_info *ts_info(TCGTemp *ts)
29
+static inline TempOptInfo *ts_info(TCGTemp *ts)
30
{
31
return ts->state_ptr;
32
}
33
34
-static inline struct tcg_temp_info *arg_info(TCGArg arg)
35
+static inline TempOptInfo *arg_info(TCGArg arg)
36
{
37
return ts_info(arg_temp(arg));
38
}
39
@@ -XXX,XX +XXX,XX @@ static inline bool ts_is_copy(TCGTemp *ts)
40
/* Reset TEMP's state, possibly removing the temp for the list of copies. */
41
static void reset_ts(TCGTemp *ts)
42
{
43
- struct tcg_temp_info *ti = ts_info(ts);
44
- struct tcg_temp_info *pi = ts_info(ti->prev_copy);
45
- struct tcg_temp_info *ni = ts_info(ti->next_copy);
46
+ TempOptInfo *ti = ts_info(ts);
47
+ TempOptInfo *pi = ts_info(ti->prev_copy);
48
+ TempOptInfo *ni = ts_info(ti->next_copy);
49
50
ni->prev_copy = ti->prev_copy;
51
pi->next_copy = ti->next_copy;
52
@@ -XXX,XX +XXX,XX @@ static void reset_temp(TCGArg arg)
53
}
54
55
/* Initialize and activate a temporary. */
56
-static void init_ts_info(struct tcg_temp_info *infos,
57
+static void init_ts_info(TempOptInfo *infos,
58
TCGTempSet *temps_used, TCGTemp *ts)
59
{
60
size_t idx = temp_idx(ts);
61
if (!test_bit(idx, temps_used->l)) {
62
- struct tcg_temp_info *ti = &infos[idx];
63
+ TempOptInfo *ti = &infos[idx];
64
65
ts->state_ptr = ti;
66
ti->next_copy = ts;
67
@@ -XXX,XX +XXX,XX @@ static void init_ts_info(struct tcg_temp_info *infos,
68
}
69
}
70
71
-static void init_arg_info(struct tcg_temp_info *infos,
72
+static void init_arg_info(TempOptInfo *infos,
73
TCGTempSet *temps_used, TCGArg arg)
74
{
75
init_ts_info(infos, temps_used, arg_temp(arg));
76
@@ -XXX,XX +XXX,XX @@ static void tcg_opt_gen_movi(TCGContext *s, TCGOp *op, TCGArg dst, TCGArg val)
77
const TCGOpDef *def;
78
TCGOpcode new_op;
79
tcg_target_ulong mask;
80
- struct tcg_temp_info *di = arg_info(dst);
81
+ TempOptInfo *di = arg_info(dst);
82
83
def = &tcg_op_defs[op->opc];
84
if (def->flags & TCG_OPF_VECTOR) {
85
@@ -XXX,XX +XXX,XX @@ static void tcg_opt_gen_mov(TCGContext *s, TCGOp *op, TCGArg dst, TCGArg src)
86
TCGTemp *dst_ts = arg_temp(dst);
87
TCGTemp *src_ts = arg_temp(src);
88
const TCGOpDef *def;
89
- struct tcg_temp_info *di;
90
- struct tcg_temp_info *si;
91
+ TempOptInfo *di;
92
+ TempOptInfo *si;
93
tcg_target_ulong mask;
94
TCGOpcode new_op;
95
96
@@ -XXX,XX +XXX,XX @@ static void tcg_opt_gen_mov(TCGContext *s, TCGOp *op, TCGArg dst, TCGArg src)
97
di->mask = mask;
98
99
if (src_ts->type == dst_ts->type) {
100
- struct tcg_temp_info *ni = ts_info(si->next_copy);
101
+ TempOptInfo *ni = ts_info(si->next_copy);
102
103
di->next_copy = si->next_copy;
104
di->prev_copy = src_ts;
105
@@ -XXX,XX +XXX,XX @@ void tcg_optimize(TCGContext *s)
106
{
107
int nb_temps, nb_globals;
108
TCGOp *op, *op_next, *prev_mb = NULL;
109
- struct tcg_temp_info *infos;
110
+ TempOptInfo *infos;
111
TCGTempSet temps_used;
112
113
/* Array VALS has an element for each temp.
114
@@ -XXX,XX +XXX,XX @@ void tcg_optimize(TCGContext *s)
115
nb_temps = s->nb_temps;
116
nb_globals = s->nb_globals;
117
bitmap_zero(temps_used.l, nb_temps);
118
- infos = tcg_malloc(sizeof(struct tcg_temp_info) * nb_temps);
119
+ infos = tcg_malloc(sizeof(TempOptInfo) * nb_temps);
120
121
QTAILQ_FOREACH_SAFE(op, &s->ops, link, op_next) {
122
tcg_target_ulong mask, partmask, affected;
123
--
124
2.25.1
125
126
diff view generated by jsdifflib
New patch
[PULL 07/24] tcg: Expand TempOptInfo to 64-bits
1
This propagates the extended value of TCGTemp.val that we did before.
2
In addition, it will be required for vector constants.
1
3
4
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5
---
6
tcg/optimize.c | 40 +++++++++++++++++++++-------------------
7
1 file changed, 21 insertions(+), 19 deletions(-)
8
9
diff --git a/tcg/optimize.c b/tcg/optimize.c
10
index XXXXXXX..XXXXXXX 100644
11
--- a/tcg/optimize.c
12
+++ b/tcg/optimize.c
13
@@ -XXX,XX +XXX,XX @@ typedef struct TempOptInfo {
14
bool is_const;
15
TCGTemp *prev_copy;
16
TCGTemp *next_copy;
17
- tcg_target_ulong val;
18
- tcg_target_ulong mask;
19
+ uint64_t val;
20
+ uint64_t mask;
21
} TempOptInfo;
22
23
static inline TempOptInfo *ts_info(TCGTemp *ts)
24
@@ -XXX,XX +XXX,XX @@ static bool args_are_copies(TCGArg arg1, TCGArg arg2)
25
return ts_are_copies(arg_temp(arg1), arg_temp(arg2));
26
}
27
28
-static void tcg_opt_gen_movi(TCGContext *s, TCGOp *op, TCGArg dst, TCGArg val)
29
+static void tcg_opt_gen_movi(TCGContext *s, TCGOp *op, TCGArg dst, uint64_t val)
30
{
31
const TCGOpDef *def;
32
TCGOpcode new_op;
33
- tcg_target_ulong mask;
34
+ uint64_t mask;
35
TempOptInfo *di = arg_info(dst);
36
37
def = &tcg_op_defs[op->opc];
38
@@ -XXX,XX +XXX,XX @@ static void tcg_opt_gen_mov(TCGContext *s, TCGOp *op, TCGArg dst, TCGArg src)
39
const TCGOpDef *def;
40
TempOptInfo *di;
41
TempOptInfo *si;
42
- tcg_target_ulong mask;
43
+ uint64_t mask;
44
TCGOpcode new_op;
45
46
if (ts_are_copies(dst_ts, src_ts)) {
47
@@ -XXX,XX +XXX,XX @@ static void tcg_opt_gen_mov(TCGContext *s, TCGOp *op, TCGArg dst, TCGArg src)
48
}
49
}
50
51
-static TCGArg do_constant_folding_2(TCGOpcode op, TCGArg x, TCGArg y)
52
+static uint64_t do_constant_folding_2(TCGOpcode op, uint64_t x, uint64_t y)
53
{
54
uint64_t l64, h64;
55
56
@@ -XXX,XX +XXX,XX @@ static TCGArg do_constant_folding_2(TCGOpcode op, TCGArg x, TCGArg y)
57
}
58
}
59
60
-static TCGArg do_constant_folding(TCGOpcode op, TCGArg x, TCGArg y)
61
+static uint64_t do_constant_folding(TCGOpcode op, uint64_t x, uint64_t y)
62
{
63
const TCGOpDef *def = &tcg_op_defs[op];
64
- TCGArg res = do_constant_folding_2(op, x, y);
65
+ uint64_t res = do_constant_folding_2(op, x, y);
66
if (!(def->flags & TCG_OPF_64BIT)) {
67
res = (int32_t)res;
68
}
69
@@ -XXX,XX +XXX,XX @@ static bool do_constant_folding_cond_eq(TCGCond c)
70
static TCGArg do_constant_folding_cond(TCGOpcode op, TCGArg x,
71
TCGArg y, TCGCond c)
72
{
73
- tcg_target_ulong xv = arg_info(x)->val;
74
- tcg_target_ulong yv = arg_info(y)->val;
75
+ uint64_t xv = arg_info(x)->val;
76
+ uint64_t yv = arg_info(y)->val;
77
+
78
if (arg_is_const(x) && arg_is_const(y)) {
79
const TCGOpDef *def = &tcg_op_defs[op];
80
tcg_debug_assert(!(def->flags & TCG_OPF_VECTOR));
81
@@ -XXX,XX +XXX,XX @@ void tcg_optimize(TCGContext *s)
82
infos = tcg_malloc(sizeof(TempOptInfo) * nb_temps);
83
84
QTAILQ_FOREACH_SAFE(op, &s->ops, link, op_next) {
85
- tcg_target_ulong mask, partmask, affected;
86
+ uint64_t mask, partmask, affected, tmp;
87
int nb_oargs, nb_iargs, i;
88
- TCGArg tmp;
89
TCGOpcode opc = op->opc;
90
const TCGOpDef *def = &tcg_op_defs[opc];
91
92
@@ -XXX,XX +XXX,XX @@ void tcg_optimize(TCGContext *s)
93
94
CASE_OP_32_64(extract2):
95
if (arg_is_const(op->args[1]) && arg_is_const(op->args[2])) {
96
- TCGArg v1 = arg_info(op->args[1])->val;
97
- TCGArg v2 = arg_info(op->args[2])->val;
98
+ uint64_t v1 = arg_info(op->args[1])->val;
99
+ uint64_t v2 = arg_info(op->args[2])->val;
100
+ int shr = op->args[3];
101
102
if (opc == INDEX_op_extract2_i64) {
103
- tmp = (v1 >> op->args[3]) | (v2 << (64 - op->args[3]));
104
+ tmp = (v1 >> shr) | (v2 << (64 - shr));
105
} else {
106
- tmp = (int32_t)(((uint32_t)v1 >> op->args[3]) |
107
- ((uint32_t)v2 << (32 - op->args[3])));
108
+ tmp = (int32_t)(((uint32_t)v1 >> shr) |
109
+ ((uint32_t)v2 << (32 - shr)));
110
}
111
tcg_opt_gen_movi(s, op, op->args[0], tmp);
112
break;
113
@@ -XXX,XX +XXX,XX @@ void tcg_optimize(TCGContext *s)
114
break;
115
}
116
if (arg_is_const(op->args[3]) && arg_is_const(op->args[4])) {
117
- tcg_target_ulong tv = arg_info(op->args[3])->val;
118
- tcg_target_ulong fv = arg_info(op->args[4])->val;
119
+ uint64_t tv = arg_info(op->args[3])->val;
120
+ uint64_t fv = arg_info(op->args[4])->val;
121
TCGCond cond = op->args[5];
122
+
123
if (fv == 1 && tv == 0) {
124
cond = tcg_invert_cond(cond);
125
} else if (!(tv == 1 && fv == 0)) {
126
--
127
2.25.1
128
129
diff view generated by jsdifflib
New patch
[PULL 08/24] tcg: Introduce TYPE_CONST temporaries
1
These will hold a single constant for the duration of the TB.
2
They are hashed, so that each value has one temp across the TB.
1
3
4
Not used yet, this is all infrastructure.
5
6
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
7
---
8
include/tcg/tcg.h | 24 ++++-
9
tcg/optimize.c | 13 ++-
10
tcg/tcg.c | 224 ++++++++++++++++++++++++++++++++++++----------
11
3 files changed, 211 insertions(+), 50 deletions(-)
12
13
diff --git a/include/tcg/tcg.h b/include/tcg/tcg.h
14
index XXXXXXX..XXXXXXX 100644
15
--- a/include/tcg/tcg.h
16
+++ b/include/tcg/tcg.h
17
@@ -XXX,XX +XXX,XX @@ typedef enum TCGTempKind {
18
TEMP_GLOBAL,
19
/* Temp is in a fixed register. */
20
TEMP_FIXED,
21
+ /* Temp is a fixed constant. */
22
+ TEMP_CONST,
23
} TCGTempKind;
24
25
typedef struct TCGTemp {
26
@@ -XXX,XX +XXX,XX @@ struct TCGContext {
27
QSIMPLEQ_HEAD(, TCGOp) plugin_ops;
28
#endif
29
30
+ GHashTable *const_table[TCG_TYPE_COUNT];
31
TCGTempSet free_temps[TCG_TYPE_COUNT * 2];
32
TCGTemp temps[TCG_MAX_TEMPS]; /* globals first, temps after */
33
34
@@ -XXX,XX +XXX,XX @@ struct TCGContext {
35
36
static inline bool temp_readonly(TCGTemp *ts)
37
{
38
- return ts->kind == TEMP_FIXED;
39
+ return ts->kind >= TEMP_FIXED;
40
}
41
42
extern TCGContext tcg_init_ctx;
43
@@ -XXX,XX +XXX,XX @@ TCGOp *tcg_op_insert_after(TCGContext *s, TCGOp *op, TCGOpcode opc);
44
45
void tcg_optimize(TCGContext *s);
46
47
+/* Allocate a new temporary and initialize it with a constant. */
48
TCGv_i32 tcg_const_i32(int32_t val);
49
TCGv_i64 tcg_const_i64(int64_t val);
50
TCGv_i32 tcg_const_local_i32(int32_t val);
51
@@ -XXX,XX +XXX,XX @@ TCGv_vec tcg_const_ones_vec(TCGType);
52
TCGv_vec tcg_const_zeros_vec_matching(TCGv_vec);
53
TCGv_vec tcg_const_ones_vec_matching(TCGv_vec);
54
55
+/*
56
+ * Locate or create a read-only temporary that is a constant.
57
+ * This kind of temporary need not and should not be freed.
58
+ */
59
+TCGTemp *tcg_constant_internal(TCGType type, int64_t val);
60
+
61
+static inline TCGv_i32 tcg_constant_i32(int32_t val)
62
+{
63
+ return temp_tcgv_i32(tcg_constant_internal(TCG_TYPE_I32, val));
64
+}
65
+
66
+static inline TCGv_i64 tcg_constant_i64(int64_t val)
67
+{
68
+ return temp_tcgv_i64(tcg_constant_internal(TCG_TYPE_I64, val));
69
+}
70
+
71
+TCGv_vec tcg_constant_vec(TCGType type, unsigned vece, int64_t val);
72
+
73
#if UINTPTR_MAX == UINT32_MAX
74
# define tcg_const_ptr(x) ((TCGv_ptr)tcg_const_i32((intptr_t)(x)))
75
# define tcg_const_local_ptr(x) ((TCGv_ptr)tcg_const_local_i32((intptr_t)(x)))
76
diff --git a/tcg/optimize.c b/tcg/optimize.c
77
index XXXXXXX..XXXXXXX 100644
78
--- a/tcg/optimize.c
79
+++ b/tcg/optimize.c
80
@@ -XXX,XX +XXX,XX @@ static void init_ts_info(TempOptInfo *infos,
81
ts->state_ptr = ti;
82
ti->next_copy = ts;
83
ti->prev_copy = ts;
84
- ti->is_const = false;
85
- ti->mask = -1;
86
+ if (ts->kind == TEMP_CONST) {
87
+ ti->is_const = true;
88
+ ti->val = ti->mask = ts->val;
89
+ if (TCG_TARGET_REG_BITS > 32 && ts->type == TCG_TYPE_I32) {
90
+ /* High bits of a 32-bit quantity are garbage. */
91
+ ti->mask |= ~0xffffffffull;
92
+ }
93
+ } else {
94
+ ti->is_const = false;
95
+ ti->mask = -1;
96
+ }
97
set_bit(idx, temps_used->l);
98
}
99
}
100
diff --git a/tcg/tcg.c b/tcg/tcg.c
101
index XXXXXXX..XXXXXXX 100644
102
--- a/tcg/tcg.c
103
+++ b/tcg/tcg.c
104
@@ -XXX,XX +XXX,XX @@ void tcg_func_start(TCGContext *s)
105
/* No temps have been previously allocated for size or locality. */
106
memset(s->free_temps, 0, sizeof(s->free_temps));
107
108
+ /* No constant temps have been previously allocated. */
109
+ for (int i = 0; i < TCG_TYPE_COUNT; ++i) {
110
+ if (s->const_table[i]) {
111
+ g_hash_table_remove_all(s->const_table[i]);
112
+ }
113
+ }
114
+
115
s->nb_ops = 0;
116
s->nb_labels = 0;
117
s->current_frame_offset = s->frame_start;
118
@@ -XXX,XX +XXX,XX @@ TCGTemp *tcg_global_mem_new_internal(TCGType type, TCGv_ptr base,
119
bigendian = 1;
120
#endif
121
122
- if (base_ts->kind != TEMP_FIXED) {
123
+ switch (base_ts->kind) {
124
+ case TEMP_FIXED:
125
+ break;
126
+ case TEMP_GLOBAL:
127
/* We do not support double-indirect registers. */
128
tcg_debug_assert(!base_ts->indirect_reg);
129
base_ts->indirect_base = 1;
130
s->nb_indirects += (TCG_TARGET_REG_BITS == 32 && type == TCG_TYPE_I64
131
? 2 : 1);
132
indirect_reg = 1;
133
+ break;
134
+ default:
135
+ g_assert_not_reached();
136
}
137
138
if (TCG_TARGET_REG_BITS == 32 && type == TCG_TYPE_I64) {
139
@@ -XXX,XX +XXX,XX @@ void tcg_temp_free_internal(TCGTemp *ts)
140
TCGContext *s = tcg_ctx;
141
int k, idx;
142
143
+ /* In order to simplify users of tcg_constant_*, silently ignore free. */
144
+ if (ts->kind == TEMP_CONST) {
145
+ return;
146
+ }
147
+
148
#if defined(CONFIG_DEBUG_TCG)
149
s->temps_in_use--;
150
if (s->temps_in_use < 0) {
151
@@ -XXX,XX +XXX,XX @@ void tcg_temp_free_internal(TCGTemp *ts)
152
set_bit(idx, s->free_temps[k].l);
153
}
154
155
+TCGTemp *tcg_constant_internal(TCGType type, int64_t val)
156
+{
157
+ TCGContext *s = tcg_ctx;
158
+ GHashTable *h = s->const_table[type];
159
+ TCGTemp *ts;
160
+
161
+ if (h == NULL) {
162
+ h = g_hash_table_new(g_int64_hash, g_int64_equal);
163
+ s->const_table[type] = h;
164
+ }
165
+
166
+ ts = g_hash_table_lookup(h, &val);
167
+ if (ts == NULL) {
168
+ ts = tcg_temp_alloc(s);
169
+
170
+ if (TCG_TARGET_REG_BITS == 32 && type == TCG_TYPE_I64) {
171
+ TCGTemp *ts2 = tcg_temp_alloc(s);
172
+
173
+ ts->base_type = TCG_TYPE_I64;
174
+ ts->type = TCG_TYPE_I32;
175
+ ts->kind = TEMP_CONST;
176
+ ts->temp_allocated = 1;
177
+ /*
178
+ * Retain the full value of the 64-bit constant in the low
179
+ * part, so that the hash table works. Actual uses will
180
+ * truncate the value to the low part.
181
+ */
182
+ ts->val = val;
183
+
184
+ tcg_debug_assert(ts2 == ts + 1);
185
+ ts2->base_type = TCG_TYPE_I64;
186
+ ts2->type = TCG_TYPE_I32;
187
+ ts2->kind = TEMP_CONST;
188
+ ts2->temp_allocated = 1;
189
+ ts2->val = val >> 32;
190
+ } else {
191
+ ts->base_type = type;
192
+ ts->type = type;
193
+ ts->kind = TEMP_CONST;
194
+ ts->temp_allocated = 1;
195
+ ts->val = val;
196
+ }
197
+ g_hash_table_insert(h, &ts->val, ts);
198
+ }
199
+
200
+ return ts;
201
+}
202
+
203
+TCGv_vec tcg_constant_vec(TCGType type, unsigned vece, int64_t val)
204
+{
205
+ val = dup_const(vece, val);
206
+ return temp_tcgv_vec(tcg_constant_internal(type, val));
207
+}
208
+
209
TCGv_i32 tcg_const_i32(int32_t val)
210
{
211
TCGv_i32 t0;
212
@@ -XXX,XX +XXX,XX @@ static void tcg_reg_alloc_start(TCGContext *s)
213
TCGTempVal val = TEMP_VAL_MEM;
214
215
switch (ts->kind) {
216
+ case TEMP_CONST:
217
+ val = TEMP_VAL_CONST;
218
+ break;
219
case TEMP_FIXED:
220
val = TEMP_VAL_REG;
221
break;
222
@@ -XXX,XX +XXX,XX @@ static char *tcg_get_arg_str_ptr(TCGContext *s, char *buf, int buf_size,
223
case TEMP_NORMAL:
224
snprintf(buf, buf_size, "tmp%d", idx - s->nb_globals);
225
break;
226
+ case TEMP_CONST:
227
+ switch (ts->type) {
228
+ case TCG_TYPE_I32:
229
+ snprintf(buf, buf_size, "$0x%x", (int32_t)ts->val);
230
+ break;
231
+#if TCG_TARGET_REG_BITS > 32
232
+ case TCG_TYPE_I64:
233
+ snprintf(buf, buf_size, "$0x%" PRIx64, ts->val);
234
+ break;
235
+#endif
236
+ case TCG_TYPE_V64:
237
+ case TCG_TYPE_V128:
238
+ case TCG_TYPE_V256:
239
+ snprintf(buf, buf_size, "v%d$0x%" PRIx64,
240
+ 64 << (ts->type - TCG_TYPE_V64), ts->val);
241
+ break;
242
+ default:
243
+ g_assert_not_reached();
244
+ }
245
+ break;
246
}
247
return buf;
248
}
249
@@ -XXX,XX +XXX,XX @@ static void la_bb_end(TCGContext *s, int ng, int nt)
250
state = TS_DEAD | TS_MEM;
251
break;
252
case TEMP_NORMAL:
253
+ case TEMP_CONST:
254
state = TS_DEAD;
255
break;
256
default:
257
@@ -XXX,XX +XXX,XX @@ static void la_bb_sync(TCGContext *s, int ng, int nt)
258
la_global_sync(s, ng);
259
260
for (int i = ng; i < nt; ++i) {
261
- if (s->temps[i].kind == TEMP_LOCAL) {
262
- int state = s->temps[i].state;
263
- s->temps[i].state = state | TS_MEM;
264
+ TCGTemp *ts = &s->temps[i];
265
+ int state;
266
+
267
+ switch (ts->kind) {
268
+ case TEMP_LOCAL:
269
+ state = ts->state;
270
+ ts->state = state | TS_MEM;
271
if (state != TS_DEAD) {
272
continue;
273
}
274
- } else {
275
+ break;
276
+ case TEMP_NORMAL:
277
s->temps[i].state = TS_DEAD;
278
+ break;
279
+ case TEMP_CONST:
280
+ continue;
281
+ default:
282
+ g_assert_not_reached();
283
}
284
la_reset_pref(&s->temps[i]);
285
}
286
@@ -XXX,XX +XXX,XX @@ static void temp_load(TCGContext *, TCGTemp *, TCGRegSet, TCGRegSet, TCGRegSet);
287
mark it free; otherwise mark it dead. */
288
static void temp_free_or_dead(TCGContext *s, TCGTemp *ts, int free_or_dead)
289
{
290
- if (temp_readonly(ts)) {
291
+ TCGTempVal new_type;
292
+
293
+ switch (ts->kind) {
294
+ case TEMP_FIXED:
295
return;
296
+ case TEMP_GLOBAL:
297
+ case TEMP_LOCAL:
298
+ new_type = TEMP_VAL_MEM;
299
+ break;
300
+ case TEMP_NORMAL:
301
+ new_type = free_or_dead < 0 ? TEMP_VAL_MEM : TEMP_VAL_DEAD;
302
+ break;
303
+ case TEMP_CONST:
304
+ new_type = TEMP_VAL_CONST;
305
+ break;
306
+ default:
307
+ g_assert_not_reached();
308
}
309
if (ts->val_type == TEMP_VAL_REG) {
310
s->reg_to_temp[ts->reg] = NULL;
311
}
312
- ts->val_type = (free_or_dead < 0
313
- || ts->kind != TEMP_NORMAL
314
- ? TEMP_VAL_MEM : TEMP_VAL_DEAD);
315
+ ts->val_type = new_type;
316
}
317
318
/* Mark a temporary as dead. */
319
@@ -XXX,XX +XXX,XX @@ static inline void temp_dead(TCGContext *s, TCGTemp *ts)
320
static void temp_sync(TCGContext *s, TCGTemp *ts, TCGRegSet allocated_regs,
321
TCGRegSet preferred_regs, int free_or_dead)
322
{
323
- if (temp_readonly(ts)) {
324
- return;
325
- }
326
- if (!ts->mem_coherent) {
327
+ if (!temp_readonly(ts) && !ts->mem_coherent) {
328
if (!ts->mem_allocated) {
329
temp_allocate_frame(s, ts);
330
}
331
@@ -XXX,XX +XXX,XX @@ static void tcg_reg_alloc_bb_end(TCGContext *s, TCGRegSet allocated_regs)
332
333
for (i = s->nb_globals; i < s->nb_temps; i++) {
334
TCGTemp *ts = &s->temps[i];
335
- if (ts->kind == TEMP_LOCAL) {
336
+
337
+ switch (ts->kind) {
338
+ case TEMP_LOCAL:
339
temp_save(s, ts, allocated_regs);
340
- } else {
341
+ break;
342
+ case TEMP_NORMAL:
343
/* The liveness analysis already ensures that temps are dead.
344
Keep an tcg_debug_assert for safety. */
345
tcg_debug_assert(ts->val_type == TEMP_VAL_DEAD);
346
+ break;
347
+ case TEMP_CONST:
348
+ /* Similarly, we should have freed any allocated register. */
349
+ tcg_debug_assert(ts->val_type == TEMP_VAL_CONST);
350
+ break;
351
+ default:
352
+ g_assert_not_reached();
353
}
354
}
355
356
@@ -XXX,XX +XXX,XX @@ static void tcg_reg_alloc_cbranch(TCGContext *s, TCGRegSet allocated_regs)
357
* The liveness analysis already ensures that temps are dead.
358
* Keep tcg_debug_asserts for safety.
359
*/
360
- if (ts->kind == TEMP_LOCAL) {
361
+ switch (ts->kind) {
362
+ case TEMP_LOCAL:
363
tcg_debug_assert(ts->val_type != TEMP_VAL_REG || ts->mem_coherent);
364
- } else {
365
+ break;
366
+ case TEMP_NORMAL:
367
tcg_debug_assert(ts->val_type == TEMP_VAL_DEAD);
368
+ break;
369
+ case TEMP_CONST:
370
+ break;
371
+ default:
372
+ g_assert_not_reached();
373
}
374
}
375
}
376
@@ -XXX,XX +XXX,XX @@ static void tcg_reg_alloc_op(TCGContext *s, const TCGOp *op)
377
i_preferred_regs = o_preferred_regs = 0;
378
if (arg_ct->ialias) {
379
o_preferred_regs = op->output_pref[arg_ct->alias_index];
380
- if (ts->kind == TEMP_FIXED) {
381
- /* if fixed register, we must allocate a new register
382
- if the alias is not the same register */
383
- if (arg != op->args[arg_ct->alias_index]) {
384
- goto allocate_in_reg;
385
- }
386
- } else {
387
- /* if the input is aliased to an output and if it is
388
- not dead after the instruction, we must allocate
389
- a new register and move it */
390
- if (!IS_DEAD_ARG(i)) {
391
- goto allocate_in_reg;
392
- }
393
394
- /* check if the current register has already been allocated
395
- for another input aliased to an output */
396
- if (ts->val_type == TEMP_VAL_REG) {
397
- int k2, i2;
398
- reg = ts->reg;
399
- for (k2 = 0 ; k2 < k ; k2++) {
400
- i2 = def->args_ct[nb_oargs + k2].sort_index;
401
- if (def->args_ct[i2].ialias && reg == new_args[i2]) {
402
- goto allocate_in_reg;
403
- }
404
+ /*
405
+ * If the input is readonly, then it cannot also be an
406
+ * output and aliased to itself. If the input is not
407
+ * dead after the instruction, we must allocate a new
408
+ * register and move it.
409
+ */
410
+ if (temp_readonly(ts) || !IS_DEAD_ARG(i)) {
411
+ goto allocate_in_reg;
412
+ }
413
+
414
+ /*
415
+ * Check if the current register has already been allocated
416
+ * for another input aliased to an output.
417
+ */
418
+ if (ts->val_type == TEMP_VAL_REG) {
419
+ reg = ts->reg;
420
+ for (int k2 = 0; k2 < k; k2++) {
421
+ int i2 = def->args_ct[nb_oargs + k2].sort_index;
422
+ if (def->args_ct[i2].ialias && reg == new_args[i2]) {
423
+ goto allocate_in_reg;
424
}
425
}
426
- i_preferred_regs = o_preferred_regs;
427
}
428
+ i_preferred_regs = o_preferred_regs;
429
}
430
431
temp_load(s, ts, arg_ct->regs, i_allocated_regs, i_preferred_regs);
432
reg = ts->reg;
433
434
- if (tcg_regset_test_reg(arg_ct->regs, reg)) {
435
- /* nothing to do : the constraint is satisfied */
436
- } else {
437
- allocate_in_reg:
438
- /* allocate a new register matching the constraint
439
- and move the temporary register into it */
440
+ if (!tcg_regset_test_reg(arg_ct->regs, reg)) {
441
+ allocate_in_reg:
442
+ /*
443
+ * Allocate a new register matching the constraint
444
+ * and move the temporary register into it.
445
+ */
446
temp_load(s, ts, tcg_target_available_regs[ts->type],
447
i_allocated_regs, 0);
448
reg = tcg_reg_alloc(s, arg_ct->regs, i_allocated_regs,
449
--
450
2.25.1
451
452
diff view generated by jsdifflib
New patch
[PULL 09/24] tcg/optimize: Improve find_better_copy
1
Prefer TEMP_CONST over anything else.
1
2
3
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
4
---
5
tcg/optimize.c | 27 ++++++++++++---------------
6
1 file changed, 12 insertions(+), 15 deletions(-)
7
8
diff --git a/tcg/optimize.c b/tcg/optimize.c
9
index XXXXXXX..XXXXXXX 100644
10
--- a/tcg/optimize.c
11
+++ b/tcg/optimize.c
12
@@ -XXX,XX +XXX,XX @@ static void init_arg_info(TempOptInfo *infos,
13
14
static TCGTemp *find_better_copy(TCGContext *s, TCGTemp *ts)
15
{
16
- TCGTemp *i;
17
+ TCGTemp *i, *g, *l;
18
19
- /* If this is already a global, we can't do better. */
20
- if (ts->kind >= TEMP_GLOBAL) {
21
+ /* If this is already readonly, we can't do better. */
22
+ if (temp_readonly(ts)) {
23
return ts;
24
}
25
26
- /* Search for a global first. */
27
+ g = l = NULL;
28
for (i = ts_info(ts)->next_copy; i != ts; i = ts_info(i)->next_copy) {
29
- if (i->kind >= TEMP_GLOBAL) {
30
+ if (temp_readonly(i)) {
31
return i;
32
- }
33
- }
34
-
35
- /* If it is a temp, search for a temp local. */
36
- if (ts->kind == TEMP_NORMAL) {
37
- for (i = ts_info(ts)->next_copy; i != ts; i = ts_info(i)->next_copy) {
38
- if (i->kind >= TEMP_LOCAL) {
39
- return i;
40
+ } else if (i->kind > ts->kind) {
41
+ if (i->kind == TEMP_GLOBAL) {
42
+ g = i;
43
+ } else if (i->kind == TEMP_LOCAL) {
44
+ l = i;
45
}
46
}
47
}
48
49
- /* Failure to find a better representation, return the same temp. */
50
- return ts;
51
+ /* If we didn't find a better representation, return the same temp. */
52
+ return g ? g : l ? l : ts;
53
}
54
55
static bool ts_are_copies(TCGTemp *ts1, TCGTemp *ts2)
56
--
57
2.25.1
58
59
diff view generated by jsdifflib
New patch
[PULL 10/24] tcg/optimize: Adjust TempOptInfo allocation
1
Do not allocate a large block for indexing. Instead, allocate
2
for each temporary as they are seen.
1
3
4
In general, this will use less memory, if we consider that most
5
TBs do not touch every target register. This also allows us to
6
allocate TempOptInfo for new temps created during optimization.
7
8
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
9
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
10
---
11
tcg/optimize.c | 60 ++++++++++++++++++++++++++++----------------------
12
1 file changed, 34 insertions(+), 26 deletions(-)
13
14
diff --git a/tcg/optimize.c b/tcg/optimize.c
15
index XXXXXXX..XXXXXXX 100644
16
--- a/tcg/optimize.c
17
+++ b/tcg/optimize.c
18
@@ -XXX,XX +XXX,XX @@ static void reset_temp(TCGArg arg)
19
}
20
21
/* Initialize and activate a temporary. */
22
-static void init_ts_info(TempOptInfo *infos,
23
- TCGTempSet *temps_used, TCGTemp *ts)
24
+static void init_ts_info(TCGTempSet *temps_used, TCGTemp *ts)
25
{
26
size_t idx = temp_idx(ts);
27
- if (!test_bit(idx, temps_used->l)) {
28
- TempOptInfo *ti = &infos[idx];
29
+ TempOptInfo *ti;
30
31
+ if (test_bit(idx, temps_used->l)) {
32
+ return;
33
+ }
34
+ set_bit(idx, temps_used->l);
35
+
36
+ ti = ts->state_ptr;
37
+ if (ti == NULL) {
38
+ ti = tcg_malloc(sizeof(TempOptInfo));
39
ts->state_ptr = ti;
40
- ti->next_copy = ts;
41
- ti->prev_copy = ts;
42
- if (ts->kind == TEMP_CONST) {
43
- ti->is_const = true;
44
- ti->val = ti->mask = ts->val;
45
- if (TCG_TARGET_REG_BITS > 32 && ts->type == TCG_TYPE_I32) {
46
- /* High bits of a 32-bit quantity are garbage. */
47
- ti->mask |= ~0xffffffffull;
48
- }
49
- } else {
50
- ti->is_const = false;
51
- ti->mask = -1;
52
+ }
53
+
54
+ ti->next_copy = ts;
55
+ ti->prev_copy = ts;
56
+ if (ts->kind == TEMP_CONST) {
57
+ ti->is_const = true;
58
+ ti->val = ts->val;
59
+ ti->mask = ts->val;
60
+ if (TCG_TARGET_REG_BITS > 32 && ts->type == TCG_TYPE_I32) {
61
+ /* High bits of a 32-bit quantity are garbage. */
62
+ ti->mask |= ~0xffffffffull;
63
}
64
- set_bit(idx, temps_used->l);
65
+ } else {
66
+ ti->is_const = false;
67
+ ti->mask = -1;
68
}
69
}
70
71
-static void init_arg_info(TempOptInfo *infos,
72
- TCGTempSet *temps_used, TCGArg arg)
73
+static void init_arg_info(TCGTempSet *temps_used, TCGArg arg)
74
{
75
- init_ts_info(infos, temps_used, arg_temp(arg));
76
+ init_ts_info(temps_used, arg_temp(arg));
77
}
78
79
static TCGTemp *find_better_copy(TCGContext *s, TCGTemp *ts)
80
@@ -XXX,XX +XXX,XX @@ static bool swap_commutative2(TCGArg *p1, TCGArg *p2)
81
/* Propagate constants and copies, fold constant expressions. */
82
void tcg_optimize(TCGContext *s)
83
{
84
- int nb_temps, nb_globals;
85
+ int nb_temps, nb_globals, i;
86
TCGOp *op, *op_next, *prev_mb = NULL;
87
- TempOptInfo *infos;
88
TCGTempSet temps_used;
89
90
/* Array VALS has an element for each temp.
91
@@ -XXX,XX +XXX,XX @@ void tcg_optimize(TCGContext *s)
92
93
nb_temps = s->nb_temps;
94
nb_globals = s->nb_globals;
95
+
96
bitmap_zero(temps_used.l, nb_temps);
97
- infos = tcg_malloc(sizeof(TempOptInfo) * nb_temps);
98
+ for (i = 0; i < nb_temps; ++i) {
99
+ s->temps[i].state_ptr = NULL;
100
+ }
101
102
QTAILQ_FOREACH_SAFE(op, &s->ops, link, op_next) {
103
uint64_t mask, partmask, affected, tmp;
104
- int nb_oargs, nb_iargs, i;
105
+ int nb_oargs, nb_iargs;
106
TCGOpcode opc = op->opc;
107
const TCGOpDef *def = &tcg_op_defs[opc];
108
109
@@ -XXX,XX +XXX,XX @@ void tcg_optimize(TCGContext *s)
110
for (i = 0; i < nb_oargs + nb_iargs; i++) {
111
TCGTemp *ts = arg_temp(op->args[i]);
112
if (ts) {
113
- init_ts_info(infos, &temps_used, ts);
114
+ init_ts_info(&temps_used, ts);
115
}
116
}
117
} else {
118
nb_oargs = def->nb_oargs;
119
nb_iargs = def->nb_iargs;
120
for (i = 0; i < nb_oargs + nb_iargs; i++) {
121
- init_arg_info(infos, &temps_used, op->args[i]);
122
+ init_arg_info(&temps_used, op->args[i]);
123
}
124
}
125
126
--
127
2.25.1
128
129
diff view generated by jsdifflib
New patch
[PULL 11/24] tcg/optimize: Use tcg_constant_internal with constant folding
1
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2
---
3
tcg/optimize.c | 108 ++++++++++++++++++++++---------------------------
4
1 file changed, 49 insertions(+), 59 deletions(-)
1
5
6
diff --git a/tcg/optimize.c b/tcg/optimize.c
7
index XXXXXXX..XXXXXXX 100644
8
--- a/tcg/optimize.c
9
+++ b/tcg/optimize.c
10
@@ -XXX,XX +XXX,XX @@ static bool args_are_copies(TCGArg arg1, TCGArg arg2)
11
return ts_are_copies(arg_temp(arg1), arg_temp(arg2));
12
}
13
14
-static void tcg_opt_gen_movi(TCGContext *s, TCGOp *op, TCGArg dst, uint64_t val)
15
-{
16
- const TCGOpDef *def;
17
- TCGOpcode new_op;
18
- uint64_t mask;
19
- TempOptInfo *di = arg_info(dst);
20
-
21
- def = &tcg_op_defs[op->opc];
22
- if (def->flags & TCG_OPF_VECTOR) {
23
- new_op = INDEX_op_dupi_vec;
24
- } else if (def->flags & TCG_OPF_64BIT) {
25
- new_op = INDEX_op_movi_i64;
26
- } else {
27
- new_op = INDEX_op_movi_i32;
28
- }
29
- op->opc = new_op;
30
- /* TCGOP_VECL and TCGOP_VECE remain unchanged. */
31
- op->args[0] = dst;
32
- op->args[1] = val;
33
-
34
- reset_temp(dst);
35
- di->is_const = true;
36
- di->val = val;
37
- mask = val;
38
- if (TCG_TARGET_REG_BITS > 32 && new_op == INDEX_op_movi_i32) {
39
- /* High bits of the destination are now garbage. */
40
- mask |= ~0xffffffffull;
41
- }
42
- di->mask = mask;
43
-}
44
-
45
static void tcg_opt_gen_mov(TCGContext *s, TCGOp *op, TCGArg dst, TCGArg src)
46
{
47
TCGTemp *dst_ts = arg_temp(dst);
48
@@ -XXX,XX +XXX,XX @@ static void tcg_opt_gen_mov(TCGContext *s, TCGOp *op, TCGArg dst, TCGArg src)
49
}
50
}
51
52
+static void tcg_opt_gen_movi(TCGContext *s, TCGTempSet *temps_used,
53
+ TCGOp *op, TCGArg dst, uint64_t val)
54
+{
55
+ const TCGOpDef *def = &tcg_op_defs[op->opc];
56
+ TCGType type;
57
+ TCGTemp *tv;
58
+
59
+ if (def->flags & TCG_OPF_VECTOR) {
60
+ type = TCGOP_VECL(op) + TCG_TYPE_V64;
61
+ } else if (def->flags & TCG_OPF_64BIT) {
62
+ type = TCG_TYPE_I64;
63
+ } else {
64
+ type = TCG_TYPE_I32;
65
+ }
66
+
67
+ /* Convert movi to mov with constant temp. */
68
+ tv = tcg_constant_internal(type, val);
69
+ init_ts_info(temps_used, tv);
70
+ tcg_opt_gen_mov(s, op, dst, temp_arg(tv));
71
+}
72
+
73
static uint64_t do_constant_folding_2(TCGOpcode op, uint64_t x, uint64_t y)
74
{
75
uint64_t l64, h64;
76
@@ -XXX,XX +XXX,XX @@ void tcg_optimize(TCGContext *s)
77
nb_temps = s->nb_temps;
78
nb_globals = s->nb_globals;
79
80
- bitmap_zero(temps_used.l, nb_temps);
81
+ memset(&temps_used, 0, sizeof(temps_used));
82
for (i = 0; i < nb_temps; ++i) {
83
s->temps[i].state_ptr = NULL;
84
}
85
@@ -XXX,XX +XXX,XX @@ void tcg_optimize(TCGContext *s)
86
CASE_OP_32_64(rotr):
87
if (arg_is_const(op->args[1])
88
&& arg_info(op->args[1])->val == 0) {
89
- tcg_opt_gen_movi(s, op, op->args[0], 0);
90
+ tcg_opt_gen_movi(s, &temps_used, op, op->args[0], 0);
91
continue;
92
}
93
break;
94
@@ -XXX,XX +XXX,XX @@ void tcg_optimize(TCGContext *s)
95
96
if (partmask == 0) {
97
tcg_debug_assert(nb_oargs == 1);
98
- tcg_opt_gen_movi(s, op, op->args[0], 0);
99
+ tcg_opt_gen_movi(s, &temps_used, op, op->args[0], 0);
100
continue;
101
}
102
if (affected == 0) {
103
@@ -XXX,XX +XXX,XX @@ void tcg_optimize(TCGContext *s)
104
CASE_OP_32_64(mulsh):
105
if (arg_is_const(op->args[2])
106
&& arg_info(op->args[2])->val == 0) {
107
- tcg_opt_gen_movi(s, op, op->args[0], 0);
108
+ tcg_opt_gen_movi(s, &temps_used, op, op->args[0], 0);
109
continue;
110
}
111
break;
112
@@ -XXX,XX +XXX,XX @@ void tcg_optimize(TCGContext *s)
113
CASE_OP_32_64_VEC(sub):
114
CASE_OP_32_64_VEC(xor):
115
if (args_are_copies(op->args[1], op->args[2])) {
116
- tcg_opt_gen_movi(s, op, op->args[0], 0);
117
+ tcg_opt_gen_movi(s, &temps_used, op, op->args[0], 0);
118
continue;
119
}
120
break;
121
@@ -XXX,XX +XXX,XX @@ void tcg_optimize(TCGContext *s)
122
break;
123
CASE_OP_32_64(movi):
124
case INDEX_op_dupi_vec:
125
- tcg_opt_gen_movi(s, op, op->args[0], op->args[1]);
126
+ tcg_opt_gen_movi(s, &temps_used, op, op->args[0], op->args[1]);
127
break;
128
129
case INDEX_op_dup_vec:
130
if (arg_is_const(op->args[1])) {
131
tmp = arg_info(op->args[1])->val;
132
tmp = dup_const(TCGOP_VECE(op), tmp);
133
- tcg_opt_gen_movi(s, op, op->args[0], tmp);
134
+ tcg_opt_gen_movi(s, &temps_used, op, op->args[0], tmp);
135
break;
136
}
137
goto do_default;
138
@@ -XXX,XX +XXX,XX @@ void tcg_optimize(TCGContext *s)
139
if (arg_is_const(op->args[1]) && arg_is_const(op->args[2])) {
140
tmp = arg_info(op->args[1])->val;
141
if (tmp == arg_info(op->args[2])->val) {
142
- tcg_opt_gen_movi(s, op, op->args[0], tmp);
143
+ tcg_opt_gen_movi(s, &temps_used, op, op->args[0], tmp);
144
break;
145
}
146
} else if (args_are_copies(op->args[1], op->args[2])) {
147
@@ -XXX,XX +XXX,XX @@ void tcg_optimize(TCGContext *s)
148
case INDEX_op_extrh_i64_i32:
149
if (arg_is_const(op->args[1])) {
150
tmp = do_constant_folding(opc, arg_info(op->args[1])->val, 0);
151
- tcg_opt_gen_movi(s, op, op->args[0], tmp);
152
+ tcg_opt_gen_movi(s, &temps_used, op, op->args[0], tmp);
153
break;
154
}
155
goto do_default;
156
@@ -XXX,XX +XXX,XX @@ void tcg_optimize(TCGContext *s)
157
if (arg_is_const(op->args[1]) && arg_is_const(op->args[2])) {
158
tmp = do_constant_folding(opc, arg_info(op->args[1])->val,
159
arg_info(op->args[2])->val);
160
- tcg_opt_gen_movi(s, op, op->args[0], tmp);
161
+ tcg_opt_gen_movi(s, &temps_used, op, op->args[0], tmp);
162
break;
163
}
164
goto do_default;
165
@@ -XXX,XX +XXX,XX @@ void tcg_optimize(TCGContext *s)
166
TCGArg v = arg_info(op->args[1])->val;
167
if (v != 0) {
168
tmp = do_constant_folding(opc, v, 0);
169
- tcg_opt_gen_movi(s, op, op->args[0], tmp);
170
+ tcg_opt_gen_movi(s, &temps_used, op, op->args[0], tmp);
171
} else {
172
tcg_opt_gen_mov(s, op, op->args[0], op->args[2]);
173
}
174
@@ -XXX,XX +XXX,XX @@ void tcg_optimize(TCGContext *s)
175
tmp = deposit64(arg_info(op->args[1])->val,
176
op->args[3], op->args[4],
177
arg_info(op->args[2])->val);
178
- tcg_opt_gen_movi(s, op, op->args[0], tmp);
179
+ tcg_opt_gen_movi(s, &temps_used, op, op->args[0], tmp);
180
break;
181
}
182
goto do_default;
183
@@ -XXX,XX +XXX,XX @@ void tcg_optimize(TCGContext *s)
184
if (arg_is_const(op->args[1])) {
185
tmp = extract64(arg_info(op->args[1])->val,
186
op->args[2], op->args[3]);
187
- tcg_opt_gen_movi(s, op, op->args[0], tmp);
188
+ tcg_opt_gen_movi(s, &temps_used, op, op->args[0], tmp);
189
break;
190
}
191
goto do_default;
192
@@ -XXX,XX +XXX,XX @@ void tcg_optimize(TCGContext *s)
193
if (arg_is_const(op->args[1])) {
194
tmp = sextract64(arg_info(op->args[1])->val,
195
op->args[2], op->args[3]);
196
- tcg_opt_gen_movi(s, op, op->args[0], tmp);
197
+ tcg_opt_gen_movi(s, &temps_used, op, op->args[0], tmp);
198
break;
199
}
200
goto do_default;
201
@@ -XXX,XX +XXX,XX @@ void tcg_optimize(TCGContext *s)
202
tmp = (int32_t)(((uint32_t)v1 >> shr) |
203
((uint32_t)v2 << (32 - shr)));
204
}
205
- tcg_opt_gen_movi(s, op, op->args[0], tmp);
206
+ tcg_opt_gen_movi(s, &temps_used, op, op->args[0], tmp);
207
break;
208
}
209
goto do_default;
210
@@ -XXX,XX +XXX,XX @@ void tcg_optimize(TCGContext *s)
211
tmp = do_constant_folding_cond(opc, op->args[1],
212
op->args[2], op->args[3]);
213
if (tmp != 2) {
214
- tcg_opt_gen_movi(s, op, op->args[0], tmp);
215
+ tcg_opt_gen_movi(s, &temps_used, op, op->args[0], tmp);
216
break;
217
}
218
goto do_default;
219
@@ -XXX,XX +XXX,XX @@ void tcg_optimize(TCGContext *s)
220
op->args[1], op->args[2]);
221
if (tmp != 2) {
222
if (tmp) {
223
- bitmap_zero(temps_used.l, nb_temps);
224
+ memset(&temps_used, 0, sizeof(temps_used));
225
op->opc = INDEX_op_br;
226
op->args[0] = op->args[3];
227
} else {
228
@@ -XXX,XX +XXX,XX @@ void tcg_optimize(TCGContext *s)
229
uint64_t a = ((uint64_t)ah << 32) | al;
230
uint64_t b = ((uint64_t)bh << 32) | bl;
231
TCGArg rl, rh;
232
- TCGOp *op2 = tcg_op_insert_before(s, op, INDEX_op_movi_i32);
233
+ TCGOp *op2 = tcg_op_insert_before(s, op, INDEX_op_mov_i32);
234
235
if (opc == INDEX_op_add2_i32) {
236
a += b;
237
@@ -XXX,XX +XXX,XX @@ void tcg_optimize(TCGContext *s)
238
239
rl = op->args[0];
240
rh = op->args[1];
241
- tcg_opt_gen_movi(s, op, rl, (int32_t)a);
242
- tcg_opt_gen_movi(s, op2, rh, (int32_t)(a >> 32));
243
+ tcg_opt_gen_movi(s, &temps_used, op, rl, (int32_t)a);
244
+ tcg_opt_gen_movi(s, &temps_used, op2, rh, (int32_t)(a >> 32));
245
break;
246
}
247
goto do_default;
248
@@ -XXX,XX +XXX,XX @@ void tcg_optimize(TCGContext *s)
249
uint32_t b = arg_info(op->args[3])->val;
250
uint64_t r = (uint64_t)a * b;
251
TCGArg rl, rh;
252
- TCGOp *op2 = tcg_op_insert_before(s, op, INDEX_op_movi_i32);
253
+ TCGOp *op2 = tcg_op_insert_before(s, op, INDEX_op_mov_i32);
254
255
rl = op->args[0];
256
rh = op->args[1];
257
- tcg_opt_gen_movi(s, op, rl, (int32_t)r);
258
- tcg_opt_gen_movi(s, op2, rh, (int32_t)(r >> 32));
259
+ tcg_opt_gen_movi(s, &temps_used, op, rl, (int32_t)r);
260
+ tcg_opt_gen_movi(s, &temps_used, op2, rh, (int32_t)(r >> 32));
261
break;
262
}
263
goto do_default;
264
@@ -XXX,XX +XXX,XX @@ void tcg_optimize(TCGContext *s)
265
if (tmp != 2) {
266
if (tmp) {
267
do_brcond_true:
268
- bitmap_zero(temps_used.l, nb_temps);
269
+ memset(&temps_used, 0, sizeof(temps_used));
270
op->opc = INDEX_op_br;
271
op->args[0] = op->args[5];
272
} else {
273
@@ -XXX,XX +XXX,XX @@ void tcg_optimize(TCGContext *s)
274
/* Simplify LT/GE comparisons vs zero to a single compare
275
vs the high word of the input. */
276
do_brcond_high:
277
- bitmap_zero(temps_used.l, nb_temps);
278
+ memset(&temps_used, 0, sizeof(temps_used));
279
op->opc = INDEX_op_brcond_i32;
280
op->args[0] = op->args[1];
281
op->args[1] = op->args[3];
282
@@ -XXX,XX +XXX,XX @@ void tcg_optimize(TCGContext *s)
283
goto do_default;
284
}
285
do_brcond_low:
286
- bitmap_zero(temps_used.l, nb_temps);
287
+ memset(&temps_used, 0, sizeof(temps_used));
288
op->opc = INDEX_op_brcond_i32;
289
op->args[1] = op->args[2];
290
op->args[2] = op->args[4];
291
@@ -XXX,XX +XXX,XX @@ void tcg_optimize(TCGContext *s)
292
op->args[5]);
293
if (tmp != 2) {
294
do_setcond_const:
295
- tcg_opt_gen_movi(s, op, op->args[0], tmp);
296
+ tcg_opt_gen_movi(s, &temps_used, op, op->args[0], tmp);
297
} else if ((op->args[5] == TCG_COND_LT
298
|| op->args[5] == TCG_COND_GE)
299
&& arg_is_const(op->args[3])
300
@@ -XXX,XX +XXX,XX @@ void tcg_optimize(TCGContext *s)
301
block, otherwise we only trash the output args. "mask" is
302
the non-zero bits mask for the first output arg. */
303
if (def->flags & TCG_OPF_BB_END) {
304
- bitmap_zero(temps_used.l, nb_temps);
305
+ memset(&temps_used, 0, sizeof(temps_used));
306
} else {
307
do_reset_output:
308
for (i = 0; i < nb_oargs; i++) {
309
--
310
2.25.1
311
312
diff view generated by jsdifflib
New patch
[PULL 12/24] tcg: Convert tcg_gen_dupi_vec to TCG_CONST
1
Because we now store uint64_t in TCGTemp, we can now always
2
store the full 64-bit duplicate immediate. So remove the
3
difference between 32- and 64-bit hosts.
1
4
5
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6
---
7
tcg/optimize.c | 9 ++++-----
8
tcg/tcg-op-vec.c | 39 ++++++++++-----------------------------
9
tcg/tcg.c | 7 +------
10
3 files changed, 15 insertions(+), 40 deletions(-)
11
12
diff --git a/tcg/optimize.c b/tcg/optimize.c
13
index XXXXXXX..XXXXXXX 100644
14
--- a/tcg/optimize.c
15
+++ b/tcg/optimize.c
16
@@ -XXX,XX +XXX,XX @@ void tcg_optimize(TCGContext *s)
17
case INDEX_op_dup2_vec:
18
assert(TCG_TARGET_REG_BITS == 32);
19
if (arg_is_const(op->args[1]) && arg_is_const(op->args[2])) {
20
- tmp = arg_info(op->args[1])->val;
21
- if (tmp == arg_info(op->args[2])->val) {
22
- tcg_opt_gen_movi(s, &temps_used, op, op->args[0], tmp);
23
- break;
24
- }
25
+ tcg_opt_gen_movi(s, &temps_used, op, op->args[0],
26
+ deposit64(arg_info(op->args[1])->val, 32, 32,
27
+ arg_info(op->args[2])->val));
28
+ break;
29
} else if (args_are_copies(op->args[1], op->args[2])) {
30
op->opc = INDEX_op_dup_vec;
31
TCGOP_VECE(op) = MO_32;
32
diff --git a/tcg/tcg-op-vec.c b/tcg/tcg-op-vec.c
33
index XXXXXXX..XXXXXXX 100644
34
--- a/tcg/tcg-op-vec.c
35
+++ b/tcg/tcg-op-vec.c
36
@@ -XXX,XX +XXX,XX @@ void tcg_gen_mov_vec(TCGv_vec r, TCGv_vec a)
37
}
38
}
39
40
-#define MO_REG (TCG_TARGET_REG_BITS == 64 ? MO_64 : MO_32)
41
-
42
-static void do_dupi_vec(TCGv_vec r, unsigned vece, TCGArg a)
43
-{
44
- TCGTemp *rt = tcgv_vec_temp(r);
45
- vec_gen_2(INDEX_op_dupi_vec, rt->base_type, vece, temp_arg(rt), a);
46
-}
47
-
48
TCGv_vec tcg_const_zeros_vec(TCGType type)
49
{
50
TCGv_vec ret = tcg_temp_new_vec(type);
51
- do_dupi_vec(ret, MO_REG, 0);
52
+ tcg_gen_dupi_vec(MO_64, ret, 0);
53
return ret;
54
}
55
56
TCGv_vec tcg_const_ones_vec(TCGType type)
57
{
58
TCGv_vec ret = tcg_temp_new_vec(type);
59
- do_dupi_vec(ret, MO_REG, -1);
60
+ tcg_gen_dupi_vec(MO_64, ret, -1);
61
return ret;
62
}
63
64
@@ -XXX,XX +XXX,XX @@ TCGv_vec tcg_const_ones_vec_matching(TCGv_vec m)
65
66
void tcg_gen_dup64i_vec(TCGv_vec r, uint64_t a)
67
{
68
- if (TCG_TARGET_REG_BITS == 64) {
69
- do_dupi_vec(r, MO_64, a);
70
- } else if (a == dup_const(MO_32, a)) {
71
- do_dupi_vec(r, MO_32, a);
72
- } else {
73
- TCGv_i64 c = tcg_const_i64(a);
74
- tcg_gen_dup_i64_vec(MO_64, r, c);
75
- tcg_temp_free_i64(c);
76
- }
77
+ tcg_gen_dupi_vec(MO_64, r, a);
78
}
79
80
void tcg_gen_dup32i_vec(TCGv_vec r, uint32_t a)
81
{
82
- do_dupi_vec(r, MO_REG, dup_const(MO_32, a));
83
+ tcg_gen_dupi_vec(MO_32, r, a);
84
}
85
86
void tcg_gen_dup16i_vec(TCGv_vec r, uint32_t a)
87
{
88
- do_dupi_vec(r, MO_REG, dup_const(MO_16, a));
89
+ tcg_gen_dupi_vec(MO_16, r, a);
90
}
91
92
void tcg_gen_dup8i_vec(TCGv_vec r, uint32_t a)
93
{
94
- do_dupi_vec(r, MO_REG, dup_const(MO_8, a));
95
+ tcg_gen_dupi_vec(MO_8, r, a);
96
}
97
98
void tcg_gen_dupi_vec(unsigned vece, TCGv_vec r, uint64_t a)
99
{
100
- if (vece == MO_64) {
101
- tcg_gen_dup64i_vec(r, a);
102
- } else {
103
- do_dupi_vec(r, MO_REG, dup_const(vece, a));
104
- }
105
+ TCGTemp *rt = tcgv_vec_temp(r);
106
+ tcg_gen_mov_vec(r, tcg_constant_vec(rt->base_type, vece, a));
107
}
108
109
void tcg_gen_dup_i64_vec(unsigned vece, TCGv_vec r, TCGv_i64 a)
110
@@ -XXX,XX +XXX,XX @@ void tcg_gen_abs_vec(unsigned vece, TCGv_vec r, TCGv_vec a)
111
if (tcg_can_emit_vec_op(INDEX_op_sari_vec, type, vece) > 0) {
112
tcg_gen_sari_vec(vece, t, a, (8 << vece) - 1);
113
} else {
114
- do_dupi_vec(t, MO_REG, 0);
115
- tcg_gen_cmp_vec(TCG_COND_LT, vece, t, a, t);
116
+ tcg_gen_cmp_vec(TCG_COND_LT, vece, t, a,
117
+ tcg_constant_vec(type, vece, 0));
118
}
119
tcg_gen_xor_vec(vece, r, a, t);
120
tcg_gen_sub_vec(vece, r, r, t);
121
diff --git a/tcg/tcg.c b/tcg/tcg.c
122
index XXXXXXX..XXXXXXX 100644
123
--- a/tcg/tcg.c
124
+++ b/tcg/tcg.c
125
@@ -XXX,XX +XXX,XX @@ static void temp_load(TCGContext *s, TCGTemp *ts, TCGRegSet desired_regs,
126
* The targets will, in general, have to do this search anyway,
127
* do this generically.
128
*/
129
- if (TCG_TARGET_REG_BITS == 32) {
130
- val = dup_const(MO_32, val);
131
- vece = MO_32;
132
- }
133
if (val == dup_const(MO_8, val)) {
134
vece = MO_8;
135
} else if (val == dup_const(MO_16, val)) {
136
vece = MO_16;
137
- } else if (TCG_TARGET_REG_BITS == 64 &&
138
- val == dup_const(MO_32, val)) {
139
+ } else if (val == dup_const(MO_32, val)) {
140
vece = MO_32;
141
}
142
143
--
144
2.25.1
145
146
diff view generated by jsdifflib
New patch
[PULL 13/24] tcg: Use tcg_constant_i32 with icount expander
1
We must do this before we adjust tcg_out_movi_i32, lest the
2
under-the-hood poking that we do for icount be broken.
1
3
4
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
5
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6
---
7
include/exec/gen-icount.h | 25 +++++++++++++------------
8
1 file changed, 13 insertions(+), 12 deletions(-)
9
10
diff --git a/include/exec/gen-icount.h b/include/exec/gen-icount.h
11
index XXXXXXX..XXXXXXX 100644
12
--- a/include/exec/gen-icount.h
13
+++ b/include/exec/gen-icount.h
14
@@ -XXX,XX +XXX,XX @@ static inline void gen_io_end(void)
15
16
static inline void gen_tb_start(const TranslationBlock *tb)
17
{
18
- TCGv_i32 count, imm;
19
+ TCGv_i32 count;
20
21
tcg_ctx->exitreq_label = gen_new_label();
22
if (tb_cflags(tb) & CF_USE_ICOUNT) {
23
@@ -XXX,XX +XXX,XX @@ static inline void gen_tb_start(const TranslationBlock *tb)
24
offsetof(ArchCPU, env));
25
26
if (tb_cflags(tb) & CF_USE_ICOUNT) {
27
- imm = tcg_temp_new_i32();
28
- /* We emit a movi with a dummy immediate argument. Keep the insn index
29
- * of the movi so that we later (when we know the actual insn count)
30
- * can update the immediate argument with the actual insn count. */
31
- tcg_gen_movi_i32(imm, 0xdeadbeef);
32
+ /*
33
+ * We emit a sub with a dummy immediate argument. Keep the insn index
34
+ * of the sub so that we later (when we know the actual insn count)
35
+ * can update the argument with the actual insn count.
36
+ */
37
+ tcg_gen_sub_i32(count, count, tcg_constant_i32(0));
38
icount_start_insn = tcg_last_op();
39
-
40
- tcg_gen_sub_i32(count, count, imm);
41
- tcg_temp_free_i32(imm);
42
}
43
44
tcg_gen_brcondi_i32(TCG_COND_LT, count, 0, tcg_ctx->exitreq_label);
45
@@ -XXX,XX +XXX,XX @@ static inline void gen_tb_start(const TranslationBlock *tb)
46
static inline void gen_tb_end(const TranslationBlock *tb, int num_insns)
47
{
48
if (tb_cflags(tb) & CF_USE_ICOUNT) {
49
- /* Update the num_insn immediate parameter now that we know
50
- * the actual insn count. */
51
- tcg_set_insn_param(icount_start_insn, 1, num_insns);
52
+ /*
53
+ * Update the num_insn immediate parameter now that we know
54
+ * the actual insn count.
55
+ */
56
+ tcg_set_insn_param(icount_start_insn, 2,
57
+ tcgv_i32_arg(tcg_constant_i32(num_insns)));
58
}
59
60
gen_set_label(tcg_ctx->exitreq_label);
61
--
62
2.25.1
63
64
diff view generated by jsdifflib
New patch
[PULL 14/24] tcg: Use tcg_constant_{i32,i64} with tcg int expanders
1
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2
---
3
include/tcg/tcg-op.h | 13 +--
4
tcg/tcg-op.c | 227 ++++++++++++++++++++-----------------------
5
2 files changed, 109 insertions(+), 131 deletions(-)
1
6
7
diff --git a/include/tcg/tcg-op.h b/include/tcg/tcg-op.h
8
index XXXXXXX..XXXXXXX 100644
9
--- a/include/tcg/tcg-op.h
10
+++ b/include/tcg/tcg-op.h
11
@@ -XXX,XX +XXX,XX @@ void tcg_gen_mb(TCGBar);
12
13
/* 32 bit ops */
14
15
+void tcg_gen_movi_i32(TCGv_i32 ret, int32_t arg);
16
void tcg_gen_addi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
17
void tcg_gen_subfi_i32(TCGv_i32 ret, int32_t arg1, TCGv_i32 arg2);
18
void tcg_gen_subi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
19
@@ -XXX,XX +XXX,XX @@ static inline void tcg_gen_mov_i32(TCGv_i32 ret, TCGv_i32 arg)
20
}
21
}
22
23
-static inline void tcg_gen_movi_i32(TCGv_i32 ret, int32_t arg)
24
-{
25
- tcg_gen_op2i_i32(INDEX_op_movi_i32, ret, arg);
26
-}
27
-
28
static inline void tcg_gen_ld8u_i32(TCGv_i32 ret, TCGv_ptr arg2,
29
tcg_target_long offset)
30
{
31
@@ -XXX,XX +XXX,XX @@ static inline void tcg_gen_not_i32(TCGv_i32 ret, TCGv_i32 arg)
32
33
/* 64 bit ops */
34
35
+void tcg_gen_movi_i64(TCGv_i64 ret, int64_t arg);
36
void tcg_gen_addi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
37
void tcg_gen_subfi_i64(TCGv_i64 ret, int64_t arg1, TCGv_i64 arg2);
38
void tcg_gen_subi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
39
@@ -XXX,XX +XXX,XX @@ static inline void tcg_gen_mov_i64(TCGv_i64 ret, TCGv_i64 arg)
40
}
41
}
42
43
-static inline void tcg_gen_movi_i64(TCGv_i64 ret, int64_t arg)
44
-{
45
- tcg_gen_op2i_i64(INDEX_op_movi_i64, ret, arg);
46
-}
47
-
48
static inline void tcg_gen_ld8u_i64(TCGv_i64 ret, TCGv_ptr arg2,
49
tcg_target_long offset)
50
{
51
@@ -XXX,XX +XXX,XX @@ static inline void tcg_gen_sub_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
52
53
void tcg_gen_discard_i64(TCGv_i64 arg);
54
void tcg_gen_mov_i64(TCGv_i64 ret, TCGv_i64 arg);
55
-void tcg_gen_movi_i64(TCGv_i64 ret, int64_t arg);
56
void tcg_gen_ld8u_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
57
void tcg_gen_ld8s_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
58
void tcg_gen_ld16u_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
59
diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c
60
index XXXXXXX..XXXXXXX 100644
61
--- a/tcg/tcg-op.c
62
+++ b/tcg/tcg-op.c
63
@@ -XXX,XX +XXX,XX @@ void tcg_gen_mb(TCGBar mb_type)
64
65
/* 32 bit ops */
66
67
+void tcg_gen_movi_i32(TCGv_i32 ret, int32_t arg)
68
+{
69
+ tcg_gen_mov_i32(ret, tcg_constant_i32(arg));
70
+}
71
+
72
void tcg_gen_addi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
73
{
74
/* some cases can be optimized here */
75
if (arg2 == 0) {
76
tcg_gen_mov_i32(ret, arg1);
77
} else {
78
- TCGv_i32 t0 = tcg_const_i32(arg2);
79
- tcg_gen_add_i32(ret, arg1, t0);
80
- tcg_temp_free_i32(t0);
81
+ tcg_gen_add_i32(ret, arg1, tcg_constant_i32(arg2));
82
}
83
}
84
85
@@ -XXX,XX +XXX,XX @@ void tcg_gen_subfi_i32(TCGv_i32 ret, int32_t arg1, TCGv_i32 arg2)
86
/* Don't recurse with tcg_gen_neg_i32. */
87
tcg_gen_op2_i32(INDEX_op_neg_i32, ret, arg2);
88
} else {
89
- TCGv_i32 t0 = tcg_const_i32(arg1);
90
- tcg_gen_sub_i32(ret, t0, arg2);
91
- tcg_temp_free_i32(t0);
92
+ tcg_gen_sub_i32(ret, tcg_constant_i32(arg1), arg2);
93
}
94
}
95
96
@@ -XXX,XX +XXX,XX @@ void tcg_gen_subi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
97
if (arg2 == 0) {
98
tcg_gen_mov_i32(ret, arg1);
99
} else {
100
- TCGv_i32 t0 = tcg_const_i32(arg2);
101
- tcg_gen_sub_i32(ret, arg1, t0);
102
- tcg_temp_free_i32(t0);
103
+ tcg_gen_sub_i32(ret, arg1, tcg_constant_i32(arg2));
104
}
105
}
106
107
void tcg_gen_andi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
108
{
109
- TCGv_i32 t0;
110
/* Some cases can be optimized here. */
111
switch (arg2) {
112
case 0:
113
@@ -XXX,XX +XXX,XX @@ void tcg_gen_andi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
114
}
115
break;
116
}
117
- t0 = tcg_const_i32(arg2);
118
- tcg_gen_and_i32(ret, arg1, t0);
119
- tcg_temp_free_i32(t0);
120
+
121
+ tcg_gen_and_i32(ret, arg1, tcg_constant_i32(arg2));
122
}
123
124
void tcg_gen_ori_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
125
@@ -XXX,XX +XXX,XX @@ void tcg_gen_ori_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
126
} else if (arg2 == 0) {
127
tcg_gen_mov_i32(ret, arg1);
128
} else {
129
- TCGv_i32 t0 = tcg_const_i32(arg2);
130
- tcg_gen_or_i32(ret, arg1, t0);
131
- tcg_temp_free_i32(t0);
132
+ tcg_gen_or_i32(ret, arg1, tcg_constant_i32(arg2));
133
}
134
}
135
136
@@ -XXX,XX +XXX,XX @@ void tcg_gen_xori_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
137
/* Don't recurse with tcg_gen_not_i32. */
138
tcg_gen_op2_i32(INDEX_op_not_i32, ret, arg1);
139
} else {
140
- TCGv_i32 t0 = tcg_const_i32(arg2);
141
- tcg_gen_xor_i32(ret, arg1, t0);
142
- tcg_temp_free_i32(t0);
143
+ tcg_gen_xor_i32(ret, arg1, tcg_constant_i32(arg2));
144
}
145
}
146
147
@@ -XXX,XX +XXX,XX @@ void tcg_gen_shli_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
148
if (arg2 == 0) {
149
tcg_gen_mov_i32(ret, arg1);
150
} else {
151
- TCGv_i32 t0 = tcg_const_i32(arg2);
152
- tcg_gen_shl_i32(ret, arg1, t0);
153
- tcg_temp_free_i32(t0);
154
+ tcg_gen_shl_i32(ret, arg1, tcg_constant_i32(arg2));
155
}
156
}
157
158
@@ -XXX,XX +XXX,XX @@ void tcg_gen_shri_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
159
if (arg2 == 0) {
160
tcg_gen_mov_i32(ret, arg1);
161
} else {
162
- TCGv_i32 t0 = tcg_const_i32(arg2);
163
- tcg_gen_shr_i32(ret, arg1, t0);
164
- tcg_temp_free_i32(t0);
165
+ tcg_gen_shr_i32(ret, arg1, tcg_constant_i32(arg2));
166
}
167
}
168
169
@@ -XXX,XX +XXX,XX @@ void tcg_gen_sari_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
170
if (arg2 == 0) {
171
tcg_gen_mov_i32(ret, arg1);
172
} else {
173
- TCGv_i32 t0 = tcg_const_i32(arg2);
174
- tcg_gen_sar_i32(ret, arg1, t0);
175
- tcg_temp_free_i32(t0);
176
+ tcg_gen_sar_i32(ret, arg1, tcg_constant_i32(arg2));
177
}
178
}
179
180
@@ -XXX,XX +XXX,XX @@ void tcg_gen_brcondi_i32(TCGCond cond, TCGv_i32 arg1, int32_t arg2, TCGLabel *l)
181
if (cond == TCG_COND_ALWAYS) {
182
tcg_gen_br(l);
183
} else if (cond != TCG_COND_NEVER) {
184
- TCGv_i32 t0 = tcg_const_i32(arg2);
185
- tcg_gen_brcond_i32(cond, arg1, t0, l);
186
- tcg_temp_free_i32(t0);
187
+ tcg_gen_brcond_i32(cond, arg1, tcg_constant_i32(arg2), l);
188
}
189
}
190
191
@@ -XXX,XX +XXX,XX @@ void tcg_gen_setcond_i32(TCGCond cond, TCGv_i32 ret,
192
void tcg_gen_setcondi_i32(TCGCond cond, TCGv_i32 ret,
193
TCGv_i32 arg1, int32_t arg2)
194
{
195
- TCGv_i32 t0 = tcg_const_i32(arg2);
196
- tcg_gen_setcond_i32(cond, ret, arg1, t0);
197
- tcg_temp_free_i32(t0);
198
+ tcg_gen_setcond_i32(cond, ret, arg1, tcg_constant_i32(arg2));
199
}
200
201
void tcg_gen_muli_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
202
@@ -XXX,XX +XXX,XX @@ void tcg_gen_muli_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
203
} else if (is_power_of_2(arg2)) {
204
tcg_gen_shli_i32(ret, arg1, ctz32(arg2));
205
} else {
206
- TCGv_i32 t0 = tcg_const_i32(arg2);
207
- tcg_gen_mul_i32(ret, arg1, t0);
208
- tcg_temp_free_i32(t0);
209
+ tcg_gen_mul_i32(ret, arg1, tcg_constant_i32(arg2));
210
}
211
}
212
213
@@ -XXX,XX +XXX,XX @@ void tcg_gen_clz_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
214
215
void tcg_gen_clzi_i32(TCGv_i32 ret, TCGv_i32 arg1, uint32_t arg2)
216
{
217
- TCGv_i32 t = tcg_const_i32(arg2);
218
- tcg_gen_clz_i32(ret, arg1, t);
219
- tcg_temp_free_i32(t);
220
+ tcg_gen_clz_i32(ret, arg1, tcg_constant_i32(arg2));
221
}
222
223
void tcg_gen_ctz_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
224
@@ -XXX,XX +XXX,XX @@ void tcg_gen_ctz_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
225
tcg_gen_clzi_i32(t, t, 32);
226
tcg_gen_xori_i32(t, t, 31);
227
}
228
- z = tcg_const_i32(0);
229
+ z = tcg_constant_i32(0);
230
tcg_gen_movcond_i32(TCG_COND_EQ, ret, arg1, z, arg2, t);
231
tcg_temp_free_i32(t);
232
- tcg_temp_free_i32(z);
233
} else {
234
gen_helper_ctz_i32(ret, arg1, arg2);
235
}
236
@@ -XXX,XX +XXX,XX @@ void tcg_gen_ctzi_i32(TCGv_i32 ret, TCGv_i32 arg1, uint32_t arg2)
237
tcg_gen_ctpop_i32(ret, t);
238
tcg_temp_free_i32(t);
239
} else {
240
- TCGv_i32 t = tcg_const_i32(arg2);
241
- tcg_gen_ctz_i32(ret, arg1, t);
242
- tcg_temp_free_i32(t);
243
+ tcg_gen_ctz_i32(ret, arg1, tcg_constant_i32(arg2));
244
}
245
}
246
247
@@ -XXX,XX +XXX,XX @@ void tcg_gen_rotli_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
248
if (arg2 == 0) {
249
tcg_gen_mov_i32(ret, arg1);
250
} else if (TCG_TARGET_HAS_rot_i32) {
251
- TCGv_i32 t0 = tcg_const_i32(arg2);
252
- tcg_gen_rotl_i32(ret, arg1, t0);
253
- tcg_temp_free_i32(t0);
254
+ tcg_gen_rotl_i32(ret, arg1, tcg_constant_i32(arg2));
255
} else {
256
TCGv_i32 t0, t1;
257
t0 = tcg_temp_new_i32();
258
@@ -XXX,XX +XXX,XX @@ void tcg_gen_deposit_z_i32(TCGv_i32 ret, TCGv_i32 arg,
259
tcg_gen_andi_i32(ret, arg, (1u << len) - 1);
260
} else if (TCG_TARGET_HAS_deposit_i32
261
&& TCG_TARGET_deposit_i32_valid(ofs, len)) {
262
- TCGv_i32 zero = tcg_const_i32(0);
263
+ TCGv_i32 zero = tcg_constant_i32(0);
264
tcg_gen_op5ii_i32(INDEX_op_deposit_i32, ret, zero, arg, ofs, len);
265
- tcg_temp_free_i32(zero);
266
} else {
267
/* To help two-operand hosts we prefer to zero-extend first,
268
which allows ARG to stay live. */
269
@@ -XXX,XX +XXX,XX @@ void tcg_gen_bswap32_i32(TCGv_i32 ret, TCGv_i32 arg)
270
} else {
271
TCGv_i32 t0 = tcg_temp_new_i32();
272
TCGv_i32 t1 = tcg_temp_new_i32();
273
- TCGv_i32 t2 = tcg_const_i32(0x00ff00ff);
274
+ TCGv_i32 t2 = tcg_constant_i32(0x00ff00ff);
275
276
/* arg = abcd */
277
tcg_gen_shri_i32(t0, arg, 8); /* t0 = .abc */
278
@@ -XXX,XX +XXX,XX @@ void tcg_gen_bswap32_i32(TCGv_i32 ret, TCGv_i32 arg)
279
280
tcg_temp_free_i32(t0);
281
tcg_temp_free_i32(t1);
282
- tcg_temp_free_i32(t2);
283
}
284
}
285
286
@@ -XXX,XX +XXX,XX @@ void tcg_gen_discard_i64(TCGv_i64 arg)
287
288
void tcg_gen_mov_i64(TCGv_i64 ret, TCGv_i64 arg)
289
{
290
- tcg_gen_mov_i32(TCGV_LOW(ret), TCGV_LOW(arg));
291
- tcg_gen_mov_i32(TCGV_HIGH(ret), TCGV_HIGH(arg));
292
+ TCGTemp *ts = tcgv_i64_temp(arg);
293
+
294
+ /* Canonicalize TCGv_i64 TEMP_CONST into TCGv_i32 TEMP_CONST. */
295
+ if (ts->kind == TEMP_CONST) {
296
+ tcg_gen_movi_i64(ret, ts->val);
297
+ } else {
298
+ tcg_gen_mov_i32(TCGV_LOW(ret), TCGV_LOW(arg));
299
+ tcg_gen_mov_i32(TCGV_HIGH(ret), TCGV_HIGH(arg));
300
+ }
301
}
302
303
void tcg_gen_movi_i64(TCGv_i64 ret, int64_t arg)
304
@@ -XXX,XX +XXX,XX @@ void tcg_gen_mul_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
305
tcg_temp_free_i64(t0);
306
tcg_temp_free_i32(t1);
307
}
308
+
309
+#else
310
+
311
+void tcg_gen_movi_i64(TCGv_i64 ret, int64_t arg)
312
+{
313
+ tcg_gen_mov_i64(ret, tcg_constant_i64(arg));
314
+}
315
+
316
#endif /* TCG_TARGET_REG_SIZE == 32 */
317
318
void tcg_gen_addi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
319
@@ -XXX,XX +XXX,XX @@ void tcg_gen_addi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
320
/* some cases can be optimized here */
321
if (arg2 == 0) {
322
tcg_gen_mov_i64(ret, arg1);
323
+ } else if (TCG_TARGET_REG_BITS == 64) {
324
+ tcg_gen_add_i64(ret, arg1, tcg_constant_i64(arg2));
325
} else {
326
- TCGv_i64 t0 = tcg_const_i64(arg2);
327
- tcg_gen_add_i64(ret, arg1, t0);
328
- tcg_temp_free_i64(t0);
329
+ tcg_gen_add2_i32(TCGV_LOW(ret), TCGV_HIGH(ret),
330
+ TCGV_LOW(arg1), TCGV_HIGH(arg1),
331
+ tcg_constant_i32(arg2), tcg_constant_i32(arg2 >> 32));
332
}
333
}
334
335
@@ -XXX,XX +XXX,XX @@ void tcg_gen_subfi_i64(TCGv_i64 ret, int64_t arg1, TCGv_i64 arg2)
336
if (arg1 == 0 && TCG_TARGET_HAS_neg_i64) {
337
/* Don't recurse with tcg_gen_neg_i64. */
338
tcg_gen_op2_i64(INDEX_op_neg_i64, ret, arg2);
339
+ } else if (TCG_TARGET_REG_BITS == 64) {
340
+ tcg_gen_sub_i64(ret, tcg_constant_i64(arg1), arg2);
341
} else {
342
- TCGv_i64 t0 = tcg_const_i64(arg1);
343
- tcg_gen_sub_i64(ret, t0, arg2);
344
- tcg_temp_free_i64(t0);
345
+ tcg_gen_sub2_i32(TCGV_LOW(ret), TCGV_HIGH(ret),
346
+ tcg_constant_i32(arg1), tcg_constant_i32(arg1 >> 32),
347
+ TCGV_LOW(arg2), TCGV_HIGH(arg2));
348
}
349
}
350
351
@@ -XXX,XX +XXX,XX @@ void tcg_gen_subi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
352
/* some cases can be optimized here */
353
if (arg2 == 0) {
354
tcg_gen_mov_i64(ret, arg1);
355
+ } else if (TCG_TARGET_REG_BITS == 64) {
356
+ tcg_gen_sub_i64(ret, arg1, tcg_constant_i64(arg2));
357
} else {
358
- TCGv_i64 t0 = tcg_const_i64(arg2);
359
- tcg_gen_sub_i64(ret, arg1, t0);
360
- tcg_temp_free_i64(t0);
361
+ tcg_gen_sub2_i32(TCGV_LOW(ret), TCGV_HIGH(ret),
362
+ TCGV_LOW(arg1), TCGV_HIGH(arg1),
363
+ tcg_constant_i32(arg2), tcg_constant_i32(arg2 >> 32));
364
}
365
}
366
367
void tcg_gen_andi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
368
{
369
- TCGv_i64 t0;
370
-
371
if (TCG_TARGET_REG_BITS == 32) {
372
tcg_gen_andi_i32(TCGV_LOW(ret), TCGV_LOW(arg1), arg2);
373
tcg_gen_andi_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), arg2 >> 32);
374
@@ -XXX,XX +XXX,XX @@ void tcg_gen_andi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
375
}
376
break;
377
}
378
- t0 = tcg_const_i64(arg2);
379
- tcg_gen_and_i64(ret, arg1, t0);
380
- tcg_temp_free_i64(t0);
381
+
382
+ tcg_gen_and_i64(ret, arg1, tcg_constant_i64(arg2));
383
}
384
385
void tcg_gen_ori_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
386
@@ -XXX,XX +XXX,XX @@ void tcg_gen_ori_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
387
} else if (arg2 == 0) {
388
tcg_gen_mov_i64(ret, arg1);
389
} else {
390
- TCGv_i64 t0 = tcg_const_i64(arg2);
391
- tcg_gen_or_i64(ret, arg1, t0);
392
- tcg_temp_free_i64(t0);
393
+ tcg_gen_or_i64(ret, arg1, tcg_constant_i64(arg2));
394
}
395
}
396
397
@@ -XXX,XX +XXX,XX @@ void tcg_gen_xori_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
398
/* Don't recurse with tcg_gen_not_i64. */
399
tcg_gen_op2_i64(INDEX_op_not_i64, ret, arg1);
400
} else {
401
- TCGv_i64 t0 = tcg_const_i64(arg2);
402
- tcg_gen_xor_i64(ret, arg1, t0);
403
- tcg_temp_free_i64(t0);
404
+ tcg_gen_xor_i64(ret, arg1, tcg_constant_i64(arg2));
405
}
406
}
407
408
@@ -XXX,XX +XXX,XX @@ void tcg_gen_shli_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
409
} else if (arg2 == 0) {
410
tcg_gen_mov_i64(ret, arg1);
411
} else {
412
- TCGv_i64 t0 = tcg_const_i64(arg2);
413
- tcg_gen_shl_i64(ret, arg1, t0);
414
- tcg_temp_free_i64(t0);
415
+ tcg_gen_shl_i64(ret, arg1, tcg_constant_i64(arg2));
416
}
417
}
418
419
@@ -XXX,XX +XXX,XX @@ void tcg_gen_shri_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
420
} else if (arg2 == 0) {
421
tcg_gen_mov_i64(ret, arg1);
422
} else {
423
- TCGv_i64 t0 = tcg_const_i64(arg2);
424
- tcg_gen_shr_i64(ret, arg1, t0);
425
- tcg_temp_free_i64(t0);
426
+ tcg_gen_shr_i64(ret, arg1, tcg_constant_i64(arg2));
427
}
428
}
429
430
@@ -XXX,XX +XXX,XX @@ void tcg_gen_sari_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
431
} else if (arg2 == 0) {
432
tcg_gen_mov_i64(ret, arg1);
433
} else {
434
- TCGv_i64 t0 = tcg_const_i64(arg2);
435
- tcg_gen_sar_i64(ret, arg1, t0);
436
- tcg_temp_free_i64(t0);
437
+ tcg_gen_sar_i64(ret, arg1, tcg_constant_i64(arg2));
438
}
439
}
440
441
@@ -XXX,XX +XXX,XX @@ void tcg_gen_brcond_i64(TCGCond cond, TCGv_i64 arg1, TCGv_i64 arg2, TCGLabel *l)
442
443
void tcg_gen_brcondi_i64(TCGCond cond, TCGv_i64 arg1, int64_t arg2, TCGLabel *l)
444
{
445
- if (cond == TCG_COND_ALWAYS) {
446
+ if (TCG_TARGET_REG_BITS == 64) {
447
+ tcg_gen_brcond_i64(cond, arg1, tcg_constant_i64(arg2), l);
448
+ } else if (cond == TCG_COND_ALWAYS) {
449
tcg_gen_br(l);
450
} else if (cond != TCG_COND_NEVER) {
451
- TCGv_i64 t0 = tcg_const_i64(arg2);
452
- tcg_gen_brcond_i64(cond, arg1, t0, l);
453
- tcg_temp_free_i64(t0);
454
+ l->refs++;
455
+ tcg_gen_op6ii_i32(INDEX_op_brcond2_i32,
456
+ TCGV_LOW(arg1), TCGV_HIGH(arg1),
457
+ tcg_constant_i32(arg2),
458
+ tcg_constant_i32(arg2 >> 32),
459
+ cond, label_arg(l));
460
}
461
}
462
463
@@ -XXX,XX +XXX,XX @@ void tcg_gen_setcond_i64(TCGCond cond, TCGv_i64 ret,
464
void tcg_gen_setcondi_i64(TCGCond cond, TCGv_i64 ret,
465
TCGv_i64 arg1, int64_t arg2)
466
{
467
- TCGv_i64 t0 = tcg_const_i64(arg2);
468
- tcg_gen_setcond_i64(cond, ret, arg1, t0);
469
- tcg_temp_free_i64(t0);
470
+ if (TCG_TARGET_REG_BITS == 64) {
471
+ tcg_gen_setcond_i64(cond, ret, arg1, tcg_constant_i64(arg2));
472
+ } else if (cond == TCG_COND_ALWAYS) {
473
+ tcg_gen_movi_i64(ret, 1);
474
+ } else if (cond == TCG_COND_NEVER) {
475
+ tcg_gen_movi_i64(ret, 0);
476
+ } else {
477
+ tcg_gen_op6i_i32(INDEX_op_setcond2_i32, TCGV_LOW(ret),
478
+ TCGV_LOW(arg1), TCGV_HIGH(arg1),
479
+ tcg_constant_i32(arg2),
480
+ tcg_constant_i32(arg2 >> 32), cond);
481
+ tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
482
+ }
483
}
484
485
void tcg_gen_muli_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
486
@@ -XXX,XX +XXX,XX @@ void tcg_gen_bswap32_i64(TCGv_i64 ret, TCGv_i64 arg)
487
} else {
488
TCGv_i64 t0 = tcg_temp_new_i64();
489
TCGv_i64 t1 = tcg_temp_new_i64();
490
- TCGv_i64 t2 = tcg_const_i64(0x00ff00ff);
491
+ TCGv_i64 t2 = tcg_constant_i64(0x00ff00ff);
492
493
/* arg = ....abcd */
494
tcg_gen_shri_i64(t0, arg, 8); /* t0 = .....abc */
495
@@ -XXX,XX +XXX,XX @@ void tcg_gen_bswap32_i64(TCGv_i64 ret, TCGv_i64 arg)
496
497
tcg_temp_free_i64(t0);
498
tcg_temp_free_i64(t1);
499
- tcg_temp_free_i64(t2);
500
}
501
}
502
503
@@ -XXX,XX +XXX,XX @@ void tcg_gen_clzi_i64(TCGv_i64 ret, TCGv_i64 arg1, uint64_t arg2)
504
if (TCG_TARGET_REG_BITS == 32
505
&& TCG_TARGET_HAS_clz_i32
506
&& arg2 <= 0xffffffffu) {
507
- TCGv_i32 t = tcg_const_i32((uint32_t)arg2 - 32);
508
- tcg_gen_clz_i32(t, TCGV_LOW(arg1), t);
509
+ TCGv_i32 t = tcg_temp_new_i32();
510
+ tcg_gen_clzi_i32(t, TCGV_LOW(arg1), arg2 - 32);
511
tcg_gen_addi_i32(t, t, 32);
512
tcg_gen_clz_i32(TCGV_LOW(ret), TCGV_HIGH(arg1), t);
513
tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
514
tcg_temp_free_i32(t);
515
} else {
516
- TCGv_i64 t = tcg_const_i64(arg2);
517
- tcg_gen_clz_i64(ret, arg1, t);
518
- tcg_temp_free_i64(t);
519
+ TCGv_i64 t0 = tcg_const_i64(arg2);
520
+ tcg_gen_clz_i64(ret, arg1, t0);
521
+ tcg_temp_free_i64(t0);
522
}
523
}
524
525
@@ -XXX,XX +XXX,XX @@ void tcg_gen_ctz_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
526
tcg_gen_clzi_i64(t, t, 64);
527
tcg_gen_xori_i64(t, t, 63);
528
}
529
- z = tcg_const_i64(0);
530
+ z = tcg_constant_i64(0);
531
tcg_gen_movcond_i64(TCG_COND_EQ, ret, arg1, z, arg2, t);
532
tcg_temp_free_i64(t);
533
tcg_temp_free_i64(z);
534
@@ -XXX,XX +XXX,XX @@ void tcg_gen_ctzi_i64(TCGv_i64 ret, TCGv_i64 arg1, uint64_t arg2)
535
if (TCG_TARGET_REG_BITS == 32
536
&& TCG_TARGET_HAS_ctz_i32
537
&& arg2 <= 0xffffffffu) {
538
- TCGv_i32 t32 = tcg_const_i32((uint32_t)arg2 - 32);
539
- tcg_gen_ctz_i32(t32, TCGV_HIGH(arg1), t32);
540
+ TCGv_i32 t32 = tcg_temp_new_i32();
541
+ tcg_gen_ctzi_i32(t32, TCGV_HIGH(arg1), arg2 - 32);
542
tcg_gen_addi_i32(t32, t32, 32);
543
tcg_gen_ctz_i32(TCGV_LOW(ret), TCGV_LOW(arg1), t32);
544
tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
545
@@ -XXX,XX +XXX,XX @@ void tcg_gen_ctzi_i64(TCGv_i64 ret, TCGv_i64 arg1, uint64_t arg2)
546
tcg_gen_ctpop_i64(ret, t);
547
tcg_temp_free_i64(t);
548
} else {
549
- TCGv_i64 t64 = tcg_const_i64(arg2);
550
- tcg_gen_ctz_i64(ret, arg1, t64);
551
- tcg_temp_free_i64(t64);
552
+ TCGv_i64 t0 = tcg_const_i64(arg2);
553
+ tcg_gen_ctz_i64(ret, arg1, t0);
554
+ tcg_temp_free_i64(t0);
555
}
556
}
557
558
@@ -XXX,XX +XXX,XX @@ void tcg_gen_rotli_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
559
if (arg2 == 0) {
560
tcg_gen_mov_i64(ret, arg1);
561
} else if (TCG_TARGET_HAS_rot_i64) {
562
- TCGv_i64 t0 = tcg_const_i64(arg2);
563
- tcg_gen_rotl_i64(ret, arg1, t0);
564
- tcg_temp_free_i64(t0);
565
+ tcg_gen_rotl_i64(ret, arg1, tcg_constant_i64(arg2));
566
} else {
567
TCGv_i64 t0, t1;
568
t0 = tcg_temp_new_i64();
569
@@ -XXX,XX +XXX,XX @@ void tcg_gen_deposit_z_i64(TCGv_i64 ret, TCGv_i64 arg,
570
tcg_gen_andi_i64(ret, arg, (1ull << len) - 1);
571
} else if (TCG_TARGET_HAS_deposit_i64
572
&& TCG_TARGET_deposit_i64_valid(ofs, len)) {
573
- TCGv_i64 zero = tcg_const_i64(0);
574
+ TCGv_i64 zero = tcg_constant_i64(0);
575
tcg_gen_op5ii_i64(INDEX_op_deposit_i64, ret, zero, arg, ofs, len);
576
- tcg_temp_free_i64(zero);
577
} else {
578
if (TCG_TARGET_REG_BITS == 32) {
579
if (ofs >= 32) {
580
@@ -XXX,XX +XXX,XX @@ void tcg_gen_atomic_cmpxchg_i32(TCGv_i32 retv, TCGv addr, TCGv_i32 cmpv,
581
582
#ifdef CONFIG_SOFTMMU
583
{
584
- TCGv_i32 oi = tcg_const_i32(make_memop_idx(memop & ~MO_SIGN, idx));
585
- gen(retv, cpu_env, addr, cmpv, newv, oi);
586
- tcg_temp_free_i32(oi);
587
+ TCGMemOpIdx oi = make_memop_idx(memop & ~MO_SIGN, idx);
588
+ gen(retv, cpu_env, addr, cmpv, newv, tcg_constant_i32(oi));
589
}
590
#else
591
gen(retv, cpu_env, addr, cmpv, newv);
592
@@ -XXX,XX +XXX,XX @@ void tcg_gen_atomic_cmpxchg_i64(TCGv_i64 retv, TCGv addr, TCGv_i64 cmpv,
593
594
#ifdef CONFIG_SOFTMMU
595
{
596
- TCGv_i32 oi = tcg_const_i32(make_memop_idx(memop, idx));
597
- gen(retv, cpu_env, addr, cmpv, newv, oi);
598
- tcg_temp_free_i32(oi);
599
+ TCGMemOpIdx oi = make_memop_idx(memop, idx);
600
+ gen(retv, cpu_env, addr, cmpv, newv, tcg_constant_i32(oi));
601
}
602
#else
603
gen(retv, cpu_env, addr, cmpv, newv);
604
@@ -XXX,XX +XXX,XX @@ static void do_atomic_op_i32(TCGv_i32 ret, TCGv addr, TCGv_i32 val,
605
606
#ifdef CONFIG_SOFTMMU
607
{
608
- TCGv_i32 oi = tcg_const_i32(make_memop_idx(memop & ~MO_SIGN, idx));
609
- gen(ret, cpu_env, addr, val, oi);
610
- tcg_temp_free_i32(oi);
611
+ TCGMemOpIdx oi = make_memop_idx(memop & ~MO_SIGN, idx);
612
+ gen(ret, cpu_env, addr, val, tcg_constant_i32(oi));
613
}
614
#else
615
gen(ret, cpu_env, addr, val);
616
@@ -XXX,XX +XXX,XX @@ static void do_atomic_op_i64(TCGv_i64 ret, TCGv addr, TCGv_i64 val,
617
618
#ifdef CONFIG_SOFTMMU
619
{
620
- TCGv_i32 oi = tcg_const_i32(make_memop_idx(memop & ~MO_SIGN, idx));
621
- gen(ret, cpu_env, addr, val, oi);
622
- tcg_temp_free_i32(oi);
623
+ TCGMemOpIdx oi = make_memop_idx(memop & ~MO_SIGN, idx);
624
+ gen(ret, cpu_env, addr, val, tcg_constant_i32(oi));
625
}
626
#else
627
gen(ret, cpu_env, addr, val);
628
--
629
2.25.1
630
631
diff view generated by jsdifflib
New patch
[PULL 15/24] tcg: Use tcg_constant_{i32,i64} with tcg plugins
1
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
2
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3
---
4
accel/tcg/plugin-gen.c | 49 +++++++++++++++++++-----------------------
5
1 file changed, 22 insertions(+), 27 deletions(-)
1
6
7
diff --git a/accel/tcg/plugin-gen.c b/accel/tcg/plugin-gen.c
8
index XXXXXXX..XXXXXXX 100644
9
--- a/accel/tcg/plugin-gen.c
10
+++ b/accel/tcg/plugin-gen.c
11
@@ -XXX,XX +XXX,XX @@ static TCGOp *copy_extu_i32_i64(TCGOp **begin_op, TCGOp *op)
12
if (TCG_TARGET_REG_BITS == 32) {
13
/* mov_i32 */
14
op = copy_op(begin_op, op, INDEX_op_mov_i32);
15
- /* movi_i32 */
16
- op = copy_op(begin_op, op, INDEX_op_movi_i32);
17
+ /* mov_i32 w/ $0 */
18
+ op = copy_op(begin_op, op, INDEX_op_mov_i32);
19
} else {
20
/* extu_i32_i64 */
21
op = copy_op(begin_op, op, INDEX_op_extu_i32_i64);
22
@@ -XXX,XX +XXX,XX @@ static TCGOp *copy_mov_i64(TCGOp **begin_op, TCGOp *op)
23
return op;
24
}
25
26
-static TCGOp *copy_movi_i64(TCGOp **begin_op, TCGOp *op, uint64_t v)
27
-{
28
- if (TCG_TARGET_REG_BITS == 32) {
29
- /* 2x movi_i32 */
30
- op = copy_op(begin_op, op, INDEX_op_movi_i32);
31
- op->args[1] = v;
32
-
33
- op = copy_op(begin_op, op, INDEX_op_movi_i32);
34
- op->args[1] = v >> 32;
35
- } else {
36
- /* movi_i64 */
37
- op = copy_op(begin_op, op, INDEX_op_movi_i64);
38
- op->args[1] = v;
39
- }
40
- return op;
41
-}
42
-
43
static TCGOp *copy_const_ptr(TCGOp **begin_op, TCGOp *op, void *ptr)
44
{
45
if (UINTPTR_MAX == UINT32_MAX) {
46
- /* movi_i32 */
47
- op = copy_op(begin_op, op, INDEX_op_movi_i32);
48
- op->args[1] = (uintptr_t)ptr;
49
+ /* mov_i32 */
50
+ op = copy_op(begin_op, op, INDEX_op_mov_i32);
51
+ op->args[1] = tcgv_i32_arg(tcg_constant_i32((uintptr_t)ptr));
52
} else {
53
- /* movi_i64 */
54
- op = copy_movi_i64(begin_op, op, (uint64_t)(uintptr_t)ptr);
55
+ /* mov_i64 */
56
+ op = copy_op(begin_op, op, INDEX_op_mov_i64);
57
+ op->args[1] = tcgv_i64_arg(tcg_constant_i64((uintptr_t)ptr));
58
}
59
return op;
60
}
61
62
static TCGOp *copy_const_i64(TCGOp **begin_op, TCGOp *op, uint64_t v)
63
{
64
- return copy_movi_i64(begin_op, op, v);
65
+ if (TCG_TARGET_REG_BITS == 32) {
66
+ /* 2x mov_i32 */
67
+ op = copy_op(begin_op, op, INDEX_op_mov_i32);
68
+ op->args[1] = tcgv_i32_arg(tcg_constant_i32(v));
69
+ op = copy_op(begin_op, op, INDEX_op_mov_i32);
70
+ op->args[1] = tcgv_i32_arg(tcg_constant_i32(v >> 32));
71
+ } else {
72
+ /* mov_i64 */
73
+ op = copy_op(begin_op, op, INDEX_op_mov_i64);
74
+ op->args[1] = tcgv_i64_arg(tcg_constant_i64(v));
75
+ }
76
+ return op;
77
}
78
79
static TCGOp *copy_extu_tl_i64(TCGOp **begin_op, TCGOp *op)
80
@@ -XXX,XX +XXX,XX @@ static TCGOp *append_mem_cb(const struct qemu_plugin_dyn_cb *cb,
81
82
tcg_debug_assert(type == PLUGIN_GEN_CB_MEM);
83
84
- /* const_i32 == movi_i32 ("info", so it remains as is) */
85
- op = copy_op(&begin_op, op, INDEX_op_movi_i32);
86
+ /* const_i32 == mov_i32 ("info", so it remains as is) */
87
+ op = copy_op(&begin_op, op, INDEX_op_mov_i32);
88
89
/* const_ptr */
90
op = copy_const_ptr(&begin_op, op, cb->userp);
91
--
92
2.25.1
93
94
diff view generated by jsdifflib
[PULL 3/3] tcg: Add tcg_gen_gvec_5_ptr
[PULL 16/24] tcg: Use tcg_constant_{i32,i64,vec} with gvec expanders
1
Extend the vector generator infrastructure to handle
2
5 vector arguments.
3
4
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
5
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
6
Reviewed-by: Taylor Simpson <tsimpson@quicinc.com>
7
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
1
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
8
---
2
---
9
include/tcg/tcg-op-gvec.h | 7 +++++++
3
include/tcg/tcg.h | 1 +
10
tcg/tcg-op-gvec.c | 32 ++++++++++++++++++++++++++++++++
4
tcg/tcg-op-gvec.c | 129 ++++++++++++++++++----------------------------
11
2 files changed, 39 insertions(+)
5
tcg/tcg.c | 8 +++
6
3 files changed, 60 insertions(+), 78 deletions(-)
12
7
13
diff --git a/include/tcg/tcg-op-gvec.h b/include/tcg/tcg-op-gvec.h
8
diff --git a/include/tcg/tcg.h b/include/tcg/tcg.h
14
index XXXXXXX..XXXXXXX 100644
9
index XXXXXXX..XXXXXXX 100644
15
--- a/include/tcg/tcg-op-gvec.h
10
--- a/include/tcg/tcg.h
16
+++ b/include/tcg/tcg-op-gvec.h
11
+++ b/include/tcg/tcg.h
17
@@ -XXX,XX +XXX,XX @@ void tcg_gen_gvec_4_ptr(uint32_t dofs, uint32_t aofs, uint32_t bofs,
12
@@ -XXX,XX +XXX,XX @@ static inline TCGv_i64 tcg_constant_i64(int64_t val)
18
uint32_t maxsz, int32_t data,
13
}
19
gen_helper_gvec_4_ptr *fn);
14
20
15
TCGv_vec tcg_constant_vec(TCGType type, unsigned vece, int64_t val);
21
+typedef void gen_helper_gvec_5_ptr(TCGv_ptr, TCGv_ptr, TCGv_ptr, TCGv_ptr,
16
+TCGv_vec tcg_constant_vec_matching(TCGv_vec match, unsigned vece, int64_t val);
22
+ TCGv_ptr, TCGv_ptr, TCGv_i32);
17
23
+void tcg_gen_gvec_5_ptr(uint32_t dofs, uint32_t aofs, uint32_t bofs,
18
#if UINTPTR_MAX == UINT32_MAX
24
+ uint32_t cofs, uint32_t eofs, TCGv_ptr ptr,
19
# define tcg_const_ptr(x) ((TCGv_ptr)tcg_const_i32((intptr_t)(x)))
25
+ uint32_t oprsz, uint32_t maxsz, int32_t data,
26
+ gen_helper_gvec_5_ptr *fn);
27
+
28
/* Expand a gvec operation. Either inline or out-of-line depending on
29
the actual vector size and the operations supported by the host. */
30
typedef struct {
31
diff --git a/tcg/tcg-op-gvec.c b/tcg/tcg-op-gvec.c
20
diff --git a/tcg/tcg-op-gvec.c b/tcg/tcg-op-gvec.c
32
index XXXXXXX..XXXXXXX 100644
21
index XXXXXXX..XXXXXXX 100644
33
--- a/tcg/tcg-op-gvec.c
22
--- a/tcg/tcg-op-gvec.c
34
+++ b/tcg/tcg-op-gvec.c
23
+++ b/tcg/tcg-op-gvec.c
24
@@ -XXX,XX +XXX,XX @@ void tcg_gen_gvec_2_ool(uint32_t dofs, uint32_t aofs,
25
gen_helper_gvec_2 *fn)
26
{
27
TCGv_ptr a0, a1;
28
- TCGv_i32 desc = tcg_const_i32(simd_desc(oprsz, maxsz, data));
29
+ TCGv_i32 desc = tcg_constant_i32(simd_desc(oprsz, maxsz, data));
30
31
a0 = tcg_temp_new_ptr();
32
a1 = tcg_temp_new_ptr();
33
@@ -XXX,XX +XXX,XX @@ void tcg_gen_gvec_2_ool(uint32_t dofs, uint32_t aofs,
34
35
tcg_temp_free_ptr(a0);
36
tcg_temp_free_ptr(a1);
37
- tcg_temp_free_i32(desc);
38
}
39
40
/* Generate a call to a gvec-style helper with two vector operands
41
@@ -XXX,XX +XXX,XX @@ void tcg_gen_gvec_2i_ool(uint32_t dofs, uint32_t aofs, TCGv_i64 c,
42
gen_helper_gvec_2i *fn)
43
{
44
TCGv_ptr a0, a1;
45
- TCGv_i32 desc = tcg_const_i32(simd_desc(oprsz, maxsz, data));
46
+ TCGv_i32 desc = tcg_constant_i32(simd_desc(oprsz, maxsz, data));
47
48
a0 = tcg_temp_new_ptr();
49
a1 = tcg_temp_new_ptr();
50
@@ -XXX,XX +XXX,XX @@ void tcg_gen_gvec_2i_ool(uint32_t dofs, uint32_t aofs, TCGv_i64 c,
51
52
tcg_temp_free_ptr(a0);
53
tcg_temp_free_ptr(a1);
54
- tcg_temp_free_i32(desc);
55
}
56
57
/* Generate a call to a gvec-style helper with three vector operands. */
58
@@ -XXX,XX +XXX,XX @@ void tcg_gen_gvec_3_ool(uint32_t dofs, uint32_t aofs, uint32_t bofs,
59
gen_helper_gvec_3 *fn)
60
{
61
TCGv_ptr a0, a1, a2;
62
- TCGv_i32 desc = tcg_const_i32(simd_desc(oprsz, maxsz, data));
63
+ TCGv_i32 desc = tcg_constant_i32(simd_desc(oprsz, maxsz, data));
64
65
a0 = tcg_temp_new_ptr();
66
a1 = tcg_temp_new_ptr();
67
@@ -XXX,XX +XXX,XX @@ void tcg_gen_gvec_3_ool(uint32_t dofs, uint32_t aofs, uint32_t bofs,
68
tcg_temp_free_ptr(a0);
69
tcg_temp_free_ptr(a1);
70
tcg_temp_free_ptr(a2);
71
- tcg_temp_free_i32(desc);
72
}
73
74
/* Generate a call to a gvec-style helper with four vector operands. */
75
@@ -XXX,XX +XXX,XX @@ void tcg_gen_gvec_4_ool(uint32_t dofs, uint32_t aofs, uint32_t bofs,
76
int32_t data, gen_helper_gvec_4 *fn)
77
{
78
TCGv_ptr a0, a1, a2, a3;
79
- TCGv_i32 desc = tcg_const_i32(simd_desc(oprsz, maxsz, data));
80
+ TCGv_i32 desc = tcg_constant_i32(simd_desc(oprsz, maxsz, data));
81
82
a0 = tcg_temp_new_ptr();
83
a1 = tcg_temp_new_ptr();
84
@@ -XXX,XX +XXX,XX @@ void tcg_gen_gvec_4_ool(uint32_t dofs, uint32_t aofs, uint32_t bofs,
85
tcg_temp_free_ptr(a1);
86
tcg_temp_free_ptr(a2);
87
tcg_temp_free_ptr(a3);
88
- tcg_temp_free_i32(desc);
89
}
90
91
/* Generate a call to a gvec-style helper with five vector operands. */
92
@@ -XXX,XX +XXX,XX @@ void tcg_gen_gvec_5_ool(uint32_t dofs, uint32_t aofs, uint32_t bofs,
93
uint32_t maxsz, int32_t data, gen_helper_gvec_5 *fn)
94
{
95
TCGv_ptr a0, a1, a2, a3, a4;
96
- TCGv_i32 desc = tcg_const_i32(simd_desc(oprsz, maxsz, data));
97
+ TCGv_i32 desc = tcg_constant_i32(simd_desc(oprsz, maxsz, data));
98
99
a0 = tcg_temp_new_ptr();
100
a1 = tcg_temp_new_ptr();
101
@@ -XXX,XX +XXX,XX @@ void tcg_gen_gvec_5_ool(uint32_t dofs, uint32_t aofs, uint32_t bofs,
102
tcg_temp_free_ptr(a2);
103
tcg_temp_free_ptr(a3);
104
tcg_temp_free_ptr(a4);
105
- tcg_temp_free_i32(desc);
106
}
107
108
/* Generate a call to a gvec-style helper with three vector operands
109
@@ -XXX,XX +XXX,XX @@ void tcg_gen_gvec_2_ptr(uint32_t dofs, uint32_t aofs,
110
int32_t data, gen_helper_gvec_2_ptr *fn)
111
{
112
TCGv_ptr a0, a1;
113
- TCGv_i32 desc = tcg_const_i32(simd_desc(oprsz, maxsz, data));
114
+ TCGv_i32 desc = tcg_constant_i32(simd_desc(oprsz, maxsz, data));
115
116
a0 = tcg_temp_new_ptr();
117
a1 = tcg_temp_new_ptr();
118
@@ -XXX,XX +XXX,XX @@ void tcg_gen_gvec_2_ptr(uint32_t dofs, uint32_t aofs,
119
120
tcg_temp_free_ptr(a0);
121
tcg_temp_free_ptr(a1);
122
- tcg_temp_free_i32(desc);
123
}
124
125
/* Generate a call to a gvec-style helper with three vector operands
126
@@ -XXX,XX +XXX,XX @@ void tcg_gen_gvec_3_ptr(uint32_t dofs, uint32_t aofs, uint32_t bofs,
127
int32_t data, gen_helper_gvec_3_ptr *fn)
128
{
129
TCGv_ptr a0, a1, a2;
130
- TCGv_i32 desc = tcg_const_i32(simd_desc(oprsz, maxsz, data));
131
+ TCGv_i32 desc = tcg_constant_i32(simd_desc(oprsz, maxsz, data));
132
133
a0 = tcg_temp_new_ptr();
134
a1 = tcg_temp_new_ptr();
135
@@ -XXX,XX +XXX,XX @@ void tcg_gen_gvec_3_ptr(uint32_t dofs, uint32_t aofs, uint32_t bofs,
136
tcg_temp_free_ptr(a0);
137
tcg_temp_free_ptr(a1);
138
tcg_temp_free_ptr(a2);
139
- tcg_temp_free_i32(desc);
140
}
141
142
/* Generate a call to a gvec-style helper with four vector operands
35
@@ -XXX,XX +XXX,XX @@ void tcg_gen_gvec_4_ptr(uint32_t dofs, uint32_t aofs, uint32_t bofs,
143
@@ -XXX,XX +XXX,XX @@ void tcg_gen_gvec_4_ptr(uint32_t dofs, uint32_t aofs, uint32_t bofs,
36
tcg_temp_free_i32(desc);
144
gen_helper_gvec_4_ptr *fn)
37
}
145
{
38
146
TCGv_ptr a0, a1, a2, a3;
39
+/* Generate a call to a gvec-style helper with five vector operands
147
- TCGv_i32 desc = tcg_const_i32(simd_desc(oprsz, maxsz, data));
40
+ and an extra pointer operand. */
148
+ TCGv_i32 desc = tcg_constant_i32(simd_desc(oprsz, maxsz, data));
41
+void tcg_gen_gvec_5_ptr(uint32_t dofs, uint32_t aofs, uint32_t bofs,
149
42
+ uint32_t cofs, uint32_t eofs, TCGv_ptr ptr,
150
a0 = tcg_temp_new_ptr();
43
+ uint32_t oprsz, uint32_t maxsz, int32_t data,
151
a1 = tcg_temp_new_ptr();
44
+ gen_helper_gvec_5_ptr *fn)
152
@@ -XXX,XX +XXX,XX @@ void tcg_gen_gvec_4_ptr(uint32_t dofs, uint32_t aofs, uint32_t bofs,
153
tcg_temp_free_ptr(a1);
154
tcg_temp_free_ptr(a2);
155
tcg_temp_free_ptr(a3);
156
- tcg_temp_free_i32(desc);
157
}
158
159
/* Generate a call to a gvec-style helper with five vector operands
160
@@ -XXX,XX +XXX,XX @@ void tcg_gen_gvec_5_ptr(uint32_t dofs, uint32_t aofs, uint32_t bofs,
161
gen_helper_gvec_5_ptr *fn)
162
{
163
TCGv_ptr a0, a1, a2, a3, a4;
164
- TCGv_i32 desc = tcg_const_i32(simd_desc(oprsz, maxsz, data));
165
+ TCGv_i32 desc = tcg_constant_i32(simd_desc(oprsz, maxsz, data));
166
167
a0 = tcg_temp_new_ptr();
168
a1 = tcg_temp_new_ptr();
169
@@ -XXX,XX +XXX,XX @@ void tcg_gen_gvec_5_ptr(uint32_t dofs, uint32_t aofs, uint32_t bofs,
170
tcg_temp_free_ptr(a2);
171
tcg_temp_free_ptr(a3);
172
tcg_temp_free_ptr(a4);
173
- tcg_temp_free_i32(desc);
174
}
175
176
/* Return true if we want to implement something of OPRSZ bytes
177
@@ -XXX,XX +XXX,XX @@ static void do_dup(unsigned vece, uint32_t dofs, uint32_t oprsz,
178
|| (TCG_TARGET_REG_BITS == 64
179
&& (in_c == 0 || in_c == -1
180
|| !check_size_impl(oprsz, 4)))) {
181
- t_64 = tcg_const_i64(in_c);
182
+ t_64 = tcg_constant_i64(in_c);
183
} else {
184
- t_32 = tcg_const_i32(in_c);
185
+ t_32 = tcg_constant_i32(in_c);
186
}
187
}
188
189
@@ -XXX,XX +XXX,XX @@ static void do_dup(unsigned vece, uint32_t dofs, uint32_t oprsz,
190
t_val = tcg_temp_new_i32();
191
tcg_gen_extrl_i64_i32(t_val, in_64);
192
} else {
193
- t_val = tcg_const_i32(in_c);
194
+ t_val = tcg_constant_i32(in_c);
195
}
196
gen_helper_memset(t_ptr, t_ptr, t_val, t_size);
197
198
- if (!in_32) {
199
+ if (in_64) {
200
tcg_temp_free_i32(t_val);
201
}
202
tcg_temp_free_ptr(t_size);
203
@@ -XXX,XX +XXX,XX @@ static void do_dup(unsigned vece, uint32_t dofs, uint32_t oprsz,
204
return;
205
}
206
207
- t_desc = tcg_const_i32(simd_desc(oprsz, maxsz, 0));
208
+ t_desc = tcg_constant_i32(simd_desc(oprsz, maxsz, 0));
209
210
if (vece == MO_64) {
211
if (in_64) {
212
gen_helper_gvec_dup64(t_ptr, t_desc, in_64);
213
} else {
214
- t_64 = tcg_const_i64(in_c);
215
+ t_64 = tcg_constant_i64(in_c);
216
gen_helper_gvec_dup64(t_ptr, t_desc, t_64);
217
- tcg_temp_free_i64(t_64);
218
}
219
} else {
220
typedef void dup_fn(TCGv_ptr, TCGv_i32, TCGv_i32);
221
@@ -XXX,XX +XXX,XX @@ static void do_dup(unsigned vece, uint32_t dofs, uint32_t oprsz,
222
223
if (in_32) {
224
fns[vece](t_ptr, t_desc, in_32);
225
- } else {
226
+ } else if (in_64) {
227
t_32 = tcg_temp_new_i32();
228
- if (in_64) {
229
- tcg_gen_extrl_i64_i32(t_32, in_64);
230
- } else if (vece == MO_8) {
231
- tcg_gen_movi_i32(t_32, in_c & 0xff);
232
- } else if (vece == MO_16) {
233
- tcg_gen_movi_i32(t_32, in_c & 0xffff);
234
- } else {
235
- tcg_gen_movi_i32(t_32, in_c);
236
- }
237
+ tcg_gen_extrl_i64_i32(t_32, in_64);
238
fns[vece](t_ptr, t_desc, t_32);
239
tcg_temp_free_i32(t_32);
240
+ } else {
241
+ if (vece == MO_8) {
242
+ in_c &= 0xff;
243
+ } else if (vece == MO_16) {
244
+ in_c &= 0xffff;
245
+ }
246
+ t_32 = tcg_constant_i32(in_c);
247
+ fns[vece](t_ptr, t_desc, t_32);
248
}
249
}
250
251
tcg_temp_free_ptr(t_ptr);
252
- tcg_temp_free_i32(t_desc);
253
return;
254
255
done:
256
@@ -XXX,XX +XXX,XX @@ void tcg_gen_gvec_2i(uint32_t dofs, uint32_t aofs, uint32_t oprsz,
257
if (g->fno) {
258
tcg_gen_gvec_2_ool(dofs, aofs, oprsz, maxsz, c, g->fno);
259
} else {
260
- TCGv_i64 tcg_c = tcg_const_i64(c);
261
+ TCGv_i64 tcg_c = tcg_constant_i64(c);
262
tcg_gen_gvec_2i_ool(dofs, aofs, tcg_c, oprsz,
263
maxsz, c, g->fnoi);
264
- tcg_temp_free_i64(tcg_c);
265
}
266
oprsz = maxsz;
267
}
268
@@ -XXX,XX +XXX,XX @@ static void gen_addv_mask(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b, TCGv_i64 m)
269
270
void tcg_gen_vec_add8_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b)
271
{
272
- TCGv_i64 m = tcg_const_i64(dup_const(MO_8, 0x80));
273
+ TCGv_i64 m = tcg_constant_i64(dup_const(MO_8, 0x80));
274
gen_addv_mask(d, a, b, m);
275
- tcg_temp_free_i64(m);
276
}
277
278
void tcg_gen_vec_add16_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b)
279
{
280
- TCGv_i64 m = tcg_const_i64(dup_const(MO_16, 0x8000));
281
+ TCGv_i64 m = tcg_constant_i64(dup_const(MO_16, 0x8000));
282
gen_addv_mask(d, a, b, m);
283
- tcg_temp_free_i64(m);
284
}
285
286
void tcg_gen_vec_add32_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b)
287
@@ -XXX,XX +XXX,XX @@ void tcg_gen_gvec_adds(unsigned vece, uint32_t dofs, uint32_t aofs,
288
void tcg_gen_gvec_addi(unsigned vece, uint32_t dofs, uint32_t aofs,
289
int64_t c, uint32_t oprsz, uint32_t maxsz)
290
{
291
- TCGv_i64 tmp = tcg_const_i64(c);
292
+ TCGv_i64 tmp = tcg_constant_i64(c);
293
tcg_gen_gvec_adds(vece, dofs, aofs, tmp, oprsz, maxsz);
294
- tcg_temp_free_i64(tmp);
295
}
296
297
static const TCGOpcode vecop_list_sub[] = { INDEX_op_sub_vec, 0 };
298
@@ -XXX,XX +XXX,XX @@ static void gen_subv_mask(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b, TCGv_i64 m)
299
300
void tcg_gen_vec_sub8_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b)
301
{
302
- TCGv_i64 m = tcg_const_i64(dup_const(MO_8, 0x80));
303
+ TCGv_i64 m = tcg_constant_i64(dup_const(MO_8, 0x80));
304
gen_subv_mask(d, a, b, m);
305
- tcg_temp_free_i64(m);
306
}
307
308
void tcg_gen_vec_sub16_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b)
309
{
310
- TCGv_i64 m = tcg_const_i64(dup_const(MO_16, 0x8000));
311
+ TCGv_i64 m = tcg_constant_i64(dup_const(MO_16, 0x8000));
312
gen_subv_mask(d, a, b, m);
313
- tcg_temp_free_i64(m);
314
}
315
316
void tcg_gen_vec_sub32_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b)
317
@@ -XXX,XX +XXX,XX @@ void tcg_gen_gvec_muls(unsigned vece, uint32_t dofs, uint32_t aofs,
318
void tcg_gen_gvec_muli(unsigned vece, uint32_t dofs, uint32_t aofs,
319
int64_t c, uint32_t oprsz, uint32_t maxsz)
320
{
321
- TCGv_i64 tmp = tcg_const_i64(c);
322
+ TCGv_i64 tmp = tcg_constant_i64(c);
323
tcg_gen_gvec_muls(vece, dofs, aofs, tmp, oprsz, maxsz);
324
- tcg_temp_free_i64(tmp);
325
}
326
327
void tcg_gen_gvec_ssadd(unsigned vece, uint32_t dofs, uint32_t aofs,
328
@@ -XXX,XX +XXX,XX @@ void tcg_gen_gvec_sssub(unsigned vece, uint32_t dofs, uint32_t aofs,
329
330
static void tcg_gen_usadd_i32(TCGv_i32 d, TCGv_i32 a, TCGv_i32 b)
331
{
332
- TCGv_i32 max = tcg_const_i32(-1);
333
+ TCGv_i32 max = tcg_constant_i32(-1);
334
tcg_gen_add_i32(d, a, b);
335
tcg_gen_movcond_i32(TCG_COND_LTU, d, d, a, max, d);
336
- tcg_temp_free_i32(max);
337
}
338
339
static void tcg_gen_usadd_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b)
340
{
341
- TCGv_i64 max = tcg_const_i64(-1);
342
+ TCGv_i64 max = tcg_constant_i64(-1);
343
tcg_gen_add_i64(d, a, b);
344
tcg_gen_movcond_i64(TCG_COND_LTU, d, d, a, max, d);
345
- tcg_temp_free_i64(max);
346
}
347
348
void tcg_gen_gvec_usadd(unsigned vece, uint32_t dofs, uint32_t aofs,
349
@@ -XXX,XX +XXX,XX @@ void tcg_gen_gvec_usadd(unsigned vece, uint32_t dofs, uint32_t aofs,
350
351
static void tcg_gen_ussub_i32(TCGv_i32 d, TCGv_i32 a, TCGv_i32 b)
352
{
353
- TCGv_i32 min = tcg_const_i32(0);
354
+ TCGv_i32 min = tcg_constant_i32(0);
355
tcg_gen_sub_i32(d, a, b);
356
tcg_gen_movcond_i32(TCG_COND_LTU, d, a, b, min, d);
357
- tcg_temp_free_i32(min);
358
}
359
360
static void tcg_gen_ussub_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b)
361
{
362
- TCGv_i64 min = tcg_const_i64(0);
363
+ TCGv_i64 min = tcg_constant_i64(0);
364
tcg_gen_sub_i64(d, a, b);
365
tcg_gen_movcond_i64(TCG_COND_LTU, d, a, b, min, d);
366
- tcg_temp_free_i64(min);
367
}
368
369
void tcg_gen_gvec_ussub(unsigned vece, uint32_t dofs, uint32_t aofs,
370
@@ -XXX,XX +XXX,XX @@ static void gen_negv_mask(TCGv_i64 d, TCGv_i64 b, TCGv_i64 m)
371
372
void tcg_gen_vec_neg8_i64(TCGv_i64 d, TCGv_i64 b)
373
{
374
- TCGv_i64 m = tcg_const_i64(dup_const(MO_8, 0x80));
375
+ TCGv_i64 m = tcg_constant_i64(dup_const(MO_8, 0x80));
376
gen_negv_mask(d, b, m);
377
- tcg_temp_free_i64(m);
378
}
379
380
void tcg_gen_vec_neg16_i64(TCGv_i64 d, TCGv_i64 b)
381
{
382
- TCGv_i64 m = tcg_const_i64(dup_const(MO_16, 0x8000));
383
+ TCGv_i64 m = tcg_constant_i64(dup_const(MO_16, 0x8000));
384
gen_negv_mask(d, b, m);
385
- tcg_temp_free_i64(m);
386
}
387
388
void tcg_gen_vec_neg32_i64(TCGv_i64 d, TCGv_i64 b)
389
@@ -XXX,XX +XXX,XX @@ void tcg_gen_gvec_ands(unsigned vece, uint32_t dofs, uint32_t aofs,
390
void tcg_gen_gvec_andi(unsigned vece, uint32_t dofs, uint32_t aofs,
391
int64_t c, uint32_t oprsz, uint32_t maxsz)
392
{
393
- TCGv_i64 tmp = tcg_const_i64(dup_const(vece, c));
394
+ TCGv_i64 tmp = tcg_constant_i64(dup_const(vece, c));
395
tcg_gen_gvec_2s(dofs, aofs, oprsz, maxsz, tmp, &gop_ands);
396
- tcg_temp_free_i64(tmp);
397
}
398
399
static const GVecGen2s gop_xors = {
400
@@ -XXX,XX +XXX,XX @@ void tcg_gen_gvec_xors(unsigned vece, uint32_t dofs, uint32_t aofs,
401
void tcg_gen_gvec_xori(unsigned vece, uint32_t dofs, uint32_t aofs,
402
int64_t c, uint32_t oprsz, uint32_t maxsz)
403
{
404
- TCGv_i64 tmp = tcg_const_i64(dup_const(vece, c));
405
+ TCGv_i64 tmp = tcg_constant_i64(dup_const(vece, c));
406
tcg_gen_gvec_2s(dofs, aofs, oprsz, maxsz, tmp, &gop_xors);
407
- tcg_temp_free_i64(tmp);
408
}
409
410
static const GVecGen2s gop_ors = {
411
@@ -XXX,XX +XXX,XX @@ void tcg_gen_gvec_ors(unsigned vece, uint32_t dofs, uint32_t aofs,
412
void tcg_gen_gvec_ori(unsigned vece, uint32_t dofs, uint32_t aofs,
413
int64_t c, uint32_t oprsz, uint32_t maxsz)
414
{
415
- TCGv_i64 tmp = tcg_const_i64(dup_const(vece, c));
416
+ TCGv_i64 tmp = tcg_constant_i64(dup_const(vece, c));
417
tcg_gen_gvec_2s(dofs, aofs, oprsz, maxsz, tmp, &gop_ors);
418
- tcg_temp_free_i64(tmp);
419
}
420
421
void tcg_gen_vec_shl8i_i64(TCGv_i64 d, TCGv_i64 a, int64_t c)
422
@@ -XXX,XX +XXX,XX @@ static void tcg_gen_shlv_mod_vec(unsigned vece, TCGv_vec d,
423
TCGv_vec a, TCGv_vec b)
424
{
425
TCGv_vec t = tcg_temp_new_vec_matching(d);
426
+ TCGv_vec m = tcg_constant_vec_matching(d, vece, (8 << vece) - 1);
427
428
- tcg_gen_dupi_vec(vece, t, (8 << vece) - 1);
429
- tcg_gen_and_vec(vece, t, t, b);
430
+ tcg_gen_and_vec(vece, t, b, m);
431
tcg_gen_shlv_vec(vece, d, a, t);
432
tcg_temp_free_vec(t);
433
}
434
@@ -XXX,XX +XXX,XX @@ static void tcg_gen_shrv_mod_vec(unsigned vece, TCGv_vec d,
435
TCGv_vec a, TCGv_vec b)
436
{
437
TCGv_vec t = tcg_temp_new_vec_matching(d);
438
+ TCGv_vec m = tcg_constant_vec_matching(d, vece, (8 << vece) - 1);
439
440
- tcg_gen_dupi_vec(vece, t, (8 << vece) - 1);
441
- tcg_gen_and_vec(vece, t, t, b);
442
+ tcg_gen_and_vec(vece, t, b, m);
443
tcg_gen_shrv_vec(vece, d, a, t);
444
tcg_temp_free_vec(t);
445
}
446
@@ -XXX,XX +XXX,XX @@ static void tcg_gen_sarv_mod_vec(unsigned vece, TCGv_vec d,
447
TCGv_vec a, TCGv_vec b)
448
{
449
TCGv_vec t = tcg_temp_new_vec_matching(d);
450
+ TCGv_vec m = tcg_constant_vec_matching(d, vece, (8 << vece) - 1);
451
452
- tcg_gen_dupi_vec(vece, t, (8 << vece) - 1);
453
- tcg_gen_and_vec(vece, t, t, b);
454
+ tcg_gen_and_vec(vece, t, b, m);
455
tcg_gen_sarv_vec(vece, d, a, t);
456
tcg_temp_free_vec(t);
457
}
458
@@ -XXX,XX +XXX,XX @@ static void tcg_gen_rotlv_mod_vec(unsigned vece, TCGv_vec d,
459
TCGv_vec a, TCGv_vec b)
460
{
461
TCGv_vec t = tcg_temp_new_vec_matching(d);
462
+ TCGv_vec m = tcg_constant_vec_matching(d, vece, (8 << vece) - 1);
463
464
- tcg_gen_dupi_vec(vece, t, (8 << vece) - 1);
465
- tcg_gen_and_vec(vece, t, t, b);
466
+ tcg_gen_and_vec(vece, t, b, m);
467
tcg_gen_rotlv_vec(vece, d, a, t);
468
tcg_temp_free_vec(t);
469
}
470
@@ -XXX,XX +XXX,XX @@ static void tcg_gen_rotrv_mod_vec(unsigned vece, TCGv_vec d,
471
TCGv_vec a, TCGv_vec b)
472
{
473
TCGv_vec t = tcg_temp_new_vec_matching(d);
474
+ TCGv_vec m = tcg_constant_vec_matching(d, vece, (8 << vece) - 1);
475
476
- tcg_gen_dupi_vec(vece, t, (8 << vece) - 1);
477
- tcg_gen_and_vec(vece, t, t, b);
478
+ tcg_gen_and_vec(vece, t, b, m);
479
tcg_gen_rotrv_vec(vece, d, a, t);
480
tcg_temp_free_vec(t);
481
}
482
diff --git a/tcg/tcg.c b/tcg/tcg.c
483
index XXXXXXX..XXXXXXX 100644
484
--- a/tcg/tcg.c
485
+++ b/tcg/tcg.c
486
@@ -XXX,XX +XXX,XX @@ TCGv_vec tcg_constant_vec(TCGType type, unsigned vece, int64_t val)
487
return temp_tcgv_vec(tcg_constant_internal(type, val));
488
}
489
490
+TCGv_vec tcg_constant_vec_matching(TCGv_vec match, unsigned vece, int64_t val)
45
+{
491
+{
46
+ TCGv_ptr a0, a1, a2, a3, a4;
492
+ TCGTemp *t = tcgv_vec_temp(match);
47
+ TCGv_i32 desc = tcg_const_i32(simd_desc(oprsz, maxsz, data));
48
+
493
+
49
+ a0 = tcg_temp_new_ptr();
494
+ tcg_debug_assert(t->temp_allocated != 0);
50
+ a1 = tcg_temp_new_ptr();
495
+ return tcg_constant_vec(t->base_type, vece, val);
51
+ a2 = tcg_temp_new_ptr();
52
+ a3 = tcg_temp_new_ptr();
53
+ a4 = tcg_temp_new_ptr();
54
+
55
+ tcg_gen_addi_ptr(a0, cpu_env, dofs);
56
+ tcg_gen_addi_ptr(a1, cpu_env, aofs);
57
+ tcg_gen_addi_ptr(a2, cpu_env, bofs);
58
+ tcg_gen_addi_ptr(a3, cpu_env, cofs);
59
+ tcg_gen_addi_ptr(a4, cpu_env, eofs);
60
+
61
+ fn(a0, a1, a2, a3, a4, ptr, desc);
62
+
63
+ tcg_temp_free_ptr(a0);
64
+ tcg_temp_free_ptr(a1);
65
+ tcg_temp_free_ptr(a2);
66
+ tcg_temp_free_ptr(a3);
67
+ tcg_temp_free_ptr(a4);
68
+ tcg_temp_free_i32(desc);
69
+}
496
+}
70
+
497
+
71
/* Return true if we want to implement something of OPRSZ bytes
498
TCGv_i32 tcg_const_i32(int32_t val)
72
in units of LNSZ. This limits the expansion of inline code. */
499
{
73
static inline bool check_size_impl(uint32_t oprsz, uint32_t lnsz)
500
TCGv_i32 t0;
74
--
501
--
75
2.20.1
502
2.25.1
76
503
77
504
diff view generated by jsdifflib
[PULL 1/3] exec: flush CPU TB cache in breakpoint_invalidate
[PULL 17/24] tcg/tci: Add special tci_movi_{i32,i64} opcodes
1
From: Max Filippov <jcmvbkbc@gmail.com>
1
The normal movi opcodes are going away. We need something
2
for TCI to use internally.
2
3
3
When a breakpoint is inserted at location for which there's currently no
4
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
4
virtual to physical translation no action is taken on CPU TB cache. If a
5
TB for that virtual address already exists but is not visible ATM the
6
breakpoint won't be hit next time an instruction at that address will be
7
executed.
8
9
Flush entire CPU TB cache in breakpoint_invalidate to force
10
re-translation of all TBs for the breakpoint address.
11
12
This change fixes the following scenario:
13
- linux user application is running
14
- a breakpoint is inserted from QEMU gdbstub for a user address that is
15
not currently present in the target CPU TLB
16
- an instruction at that address is executed, but the external debugger
17
doesn't get control.
18
19
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
20
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
21
Message-Id: <20191127220602.10827-2-jcmvbkbc@gmail.com>
22
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
23
---
6
---
24
exec.c | 15 +++++++--------
7
include/tcg/tcg-opc.h | 8 ++++++++
25
1 file changed, 7 insertions(+), 8 deletions(-)
8
tcg/tci.c | 4 ++--
9
tcg/tci/tcg-target.c.inc | 4 ++--
10
3 files changed, 12 insertions(+), 4 deletions(-)
26
11
27
diff --git a/exec.c b/exec.c
12
diff --git a/include/tcg/tcg-opc.h b/include/tcg/tcg-opc.h
28
index XXXXXXX..XXXXXXX 100644
13
index XXXXXXX..XXXXXXX 100644
29
--- a/exec.c
14
--- a/include/tcg/tcg-opc.h
30
+++ b/exec.c
15
+++ b/include/tcg/tcg-opc.h
31
@@ -XXX,XX +XXX,XX @@ void tb_invalidate_phys_addr(AddressSpace *as, hwaddr addr, MemTxAttrs attrs)
16
@@ -XXX,XX +XXX,XX @@ DEF(last_generic, 0, 0, 0, TCG_OPF_NOT_PRESENT)
32
17
#include "tcg-target.opc.h"
33
static void breakpoint_invalidate(CPUState *cpu, target_ulong pc)
34
{
35
- MemTxAttrs attrs;
36
- hwaddr phys = cpu_get_phys_page_attrs_debug(cpu, pc, &attrs);
37
- int asidx = cpu_asidx_from_attrs(cpu, attrs);
38
- if (phys != -1) {
39
- /* Locks grabbed by tb_invalidate_phys_addr */
40
- tb_invalidate_phys_addr(cpu->cpu_ases[asidx].as,
41
- phys | (pc & ~TARGET_PAGE_MASK), attrs);
42
- }
43
+ /*
44
+ * There may not be a virtual to physical translation for the pc
45
+ * right now, but there may exist cached TB for this pc.
46
+ * Flush the whole TB cache to force re-translation of such TBs.
47
+ * This is heavyweight, but we're debugging anyway.
48
+ */
49
+ tb_flush(cpu);
50
}
51
#endif
18
#endif
52
19
20
+#ifdef TCG_TARGET_INTERPRETER
21
+/* These opcodes are only for use between the tci generator and interpreter. */
22
+DEF(tci_movi_i32, 1, 0, 1, TCG_OPF_NOT_PRESENT)
23
+#if TCG_TARGET_REG_BITS == 64
24
+DEF(tci_movi_i64, 1, 0, 1, TCG_OPF_64BIT | TCG_OPF_NOT_PRESENT)
25
+#endif
26
+#endif
27
+
28
#undef TLADDR_ARGS
29
#undef DATA64_ARGS
30
#undef IMPL
31
diff --git a/tcg/tci.c b/tcg/tci.c
32
index XXXXXXX..XXXXXXX 100644
33
--- a/tcg/tci.c
34
+++ b/tcg/tci.c
35
@@ -XXX,XX +XXX,XX @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
36
t1 = tci_read_r32(regs, &tb_ptr);
37
tci_write_reg32(regs, t0, t1);
38
break;
39
- case INDEX_op_movi_i32:
40
+ case INDEX_op_tci_movi_i32:
41
t0 = *tb_ptr++;
42
t1 = tci_read_i32(&tb_ptr);
43
tci_write_reg32(regs, t0, t1);
44
@@ -XXX,XX +XXX,XX @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
45
t1 = tci_read_r64(regs, &tb_ptr);
46
tci_write_reg64(regs, t0, t1);
47
break;
48
- case INDEX_op_movi_i64:
49
+ case INDEX_op_tci_movi_i64:
50
t0 = *tb_ptr++;
51
t1 = tci_read_i64(&tb_ptr);
52
tci_write_reg64(regs, t0, t1);
53
diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc
54
index XXXXXXX..XXXXXXX 100644
55
--- a/tcg/tci/tcg-target.c.inc
56
+++ b/tcg/tci/tcg-target.c.inc
57
@@ -XXX,XX +XXX,XX @@ static void tcg_out_movi(TCGContext *s, TCGType type,
58
uint8_t *old_code_ptr = s->code_ptr;
59
uint32_t arg32 = arg;
60
if (type == TCG_TYPE_I32 || arg == arg32) {
61
- tcg_out_op_t(s, INDEX_op_movi_i32);
62
+ tcg_out_op_t(s, INDEX_op_tci_movi_i32);
63
tcg_out_r(s, t0);
64
tcg_out32(s, arg32);
65
} else {
66
tcg_debug_assert(type == TCG_TYPE_I64);
67
#if TCG_TARGET_REG_BITS == 64
68
- tcg_out_op_t(s, INDEX_op_movi_i64);
69
+ tcg_out_op_t(s, INDEX_op_tci_movi_i64);
70
tcg_out_r(s, t0);
71
tcg_out64(s, arg);
72
#else
53
--
73
--
54
2.20.1
74
2.25.1
55
75
56
76
diff view generated by jsdifflib
New patch
[PULL 18/24] tcg: Remove movi and dupi opcodes
1
1
These are now completely covered by mov from a
2
TYPE_CONST temporary.
3
4
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
5
Reviewed-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
6
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
7
---
8
include/tcg/tcg-opc.h | 3 ---
9
tcg/optimize.c | 4 ----
10
tcg/tcg-op-vec.c | 1 -
11
tcg/tcg.c | 18 +-----------------
12
tcg/aarch64/tcg-target.c.inc | 3 ---
13
tcg/arm/tcg-target.c.inc | 1 -
14
tcg/i386/tcg-target.c.inc | 3 ---
15
tcg/mips/tcg-target.c.inc | 2 --
16
tcg/ppc/tcg-target.c.inc | 3 ---
17
tcg/riscv/tcg-target.c.inc | 2 --
18
tcg/s390/tcg-target.c.inc | 2 --
19
tcg/sparc/tcg-target.c.inc | 2 --
20
tcg/tci/tcg-target.c.inc | 2 --
21
13 files changed, 1 insertion(+), 45 deletions(-)
22
23
diff --git a/include/tcg/tcg-opc.h b/include/tcg/tcg-opc.h
24
index XXXXXXX..XXXXXXX 100644
25
--- a/include/tcg/tcg-opc.h
26
+++ b/include/tcg/tcg-opc.h
27
@@ -XXX,XX +XXX,XX @@ DEF(br, 0, 0, 1, TCG_OPF_BB_END)
28
DEF(mb, 0, 0, 1, 0)
29
30
DEF(mov_i32, 1, 1, 0, TCG_OPF_NOT_PRESENT)
31
-DEF(movi_i32, 1, 0, 1, TCG_OPF_NOT_PRESENT)
32
DEF(setcond_i32, 1, 2, 1, 0)
33
DEF(movcond_i32, 1, 4, 1, IMPL(TCG_TARGET_HAS_movcond_i32))
34
/* load/store */
35
@@ -XXX,XX +XXX,XX @@ DEF(ctz_i32, 1, 2, 0, IMPL(TCG_TARGET_HAS_ctz_i32))
36
DEF(ctpop_i32, 1, 1, 0, IMPL(TCG_TARGET_HAS_ctpop_i32))
37
38
DEF(mov_i64, 1, 1, 0, TCG_OPF_64BIT | TCG_OPF_NOT_PRESENT)
39
-DEF(movi_i64, 1, 0, 1, TCG_OPF_64BIT | TCG_OPF_NOT_PRESENT)
40
DEF(setcond_i64, 1, 2, 1, IMPL64)
41
DEF(movcond_i64, 1, 4, 1, IMPL64 | IMPL(TCG_TARGET_HAS_movcond_i64))
42
/* load/store */
43
@@ -XXX,XX +XXX,XX @@ DEF(qemu_st8_i32, 0, TLADDR_ARGS + 1, 1,
44
#define IMPLVEC TCG_OPF_VECTOR | IMPL(TCG_TARGET_MAYBE_vec)
45
46
DEF(mov_vec, 1, 1, 0, TCG_OPF_VECTOR | TCG_OPF_NOT_PRESENT)
47
-DEF(dupi_vec, 1, 0, 1, TCG_OPF_VECTOR | TCG_OPF_NOT_PRESENT)
48
49
DEF(dup_vec, 1, 1, 0, IMPLVEC)
50
DEF(dup2_vec, 1, 2, 0, IMPLVEC | IMPL(TCG_TARGET_REG_BITS == 32))
51
diff --git a/tcg/optimize.c b/tcg/optimize.c
52
index XXXXXXX..XXXXXXX 100644
53
--- a/tcg/optimize.c
54
+++ b/tcg/optimize.c
55
@@ -XXX,XX +XXX,XX @@ void tcg_optimize(TCGContext *s)
56
CASE_OP_32_64_VEC(mov):
57
tcg_opt_gen_mov(s, op, op->args[0], op->args[1]);
58
break;
59
- CASE_OP_32_64(movi):
60
- case INDEX_op_dupi_vec:
61
- tcg_opt_gen_movi(s, &temps_used, op, op->args[0], op->args[1]);
62
- break;
63
64
case INDEX_op_dup_vec:
65
if (arg_is_const(op->args[1])) {
66
diff --git a/tcg/tcg-op-vec.c b/tcg/tcg-op-vec.c
67
index XXXXXXX..XXXXXXX 100644
68
--- a/tcg/tcg-op-vec.c
69
+++ b/tcg/tcg-op-vec.c
70
@@ -XXX,XX +XXX,XX @@ bool tcg_can_emit_vecop_list(const TCGOpcode *list,
71
case INDEX_op_xor_vec:
72
case INDEX_op_mov_vec:
73
case INDEX_op_dup_vec:
74
- case INDEX_op_dupi_vec:
75
case INDEX_op_dup2_vec:
76
case INDEX_op_ld_vec:
77
case INDEX_op_st_vec:
78
diff --git a/tcg/tcg.c b/tcg/tcg.c
79
index XXXXXXX..XXXXXXX 100644
80
--- a/tcg/tcg.c
81
+++ b/tcg/tcg.c
82
@@ -XXX,XX +XXX,XX @@ bool tcg_op_supported(TCGOpcode op)
83
return TCG_TARGET_HAS_goto_ptr;
84
85
case INDEX_op_mov_i32:
86
- case INDEX_op_movi_i32:
87
case INDEX_op_setcond_i32:
88
case INDEX_op_brcond_i32:
89
case INDEX_op_ld8u_i32:
90
@@ -XXX,XX +XXX,XX @@ bool tcg_op_supported(TCGOpcode op)
91
return TCG_TARGET_REG_BITS == 32;
92
93
case INDEX_op_mov_i64:
94
- case INDEX_op_movi_i64:
95
case INDEX_op_setcond_i64:
96
case INDEX_op_brcond_i64:
97
case INDEX_op_ld8u_i64:
98
@@ -XXX,XX +XXX,XX @@ bool tcg_op_supported(TCGOpcode op)
99
100
case INDEX_op_mov_vec:
101
case INDEX_op_dup_vec:
102
- case INDEX_op_dupi_vec:
103
case INDEX_op_dupm_vec:
104
case INDEX_op_ld_vec:
105
case INDEX_op_st_vec:
106
@@ -XXX,XX +XXX,XX @@ static void tcg_reg_alloc_cbranch(TCGContext *s, TCGRegSet allocated_regs)
107
}
108
109
/*
110
- * Specialized code generation for INDEX_op_movi_*.
111
+ * Specialized code generation for INDEX_op_mov_* with a constant.
112
*/
113
static void tcg_reg_alloc_do_movi(TCGContext *s, TCGTemp *ots,
114
tcg_target_ulong val, TCGLifeData arg_life,
115
@@ -XXX,XX +XXX,XX @@ static void tcg_reg_alloc_do_movi(TCGContext *s, TCGTemp *ots,
116
}
117
}
118
119
-static void tcg_reg_alloc_movi(TCGContext *s, const TCGOp *op)
120
-{
121
- TCGTemp *ots = arg_temp(op->args[0]);
122
- tcg_target_ulong val = op->args[1];
123
-
124
- tcg_reg_alloc_do_movi(s, ots, val, op->life, op->output_pref[0]);
125
-}
126
-
127
/*
128
* Specialized code generation for INDEX_op_mov_*.
129
*/
130
@@ -XXX,XX +XXX,XX @@ int tcg_gen_code(TCGContext *s, TranslationBlock *tb)
131
case INDEX_op_mov_vec:
132
tcg_reg_alloc_mov(s, op);
133
break;
134
- case INDEX_op_movi_i32:
135
- case INDEX_op_movi_i64:
136
- case INDEX_op_dupi_vec:
137
- tcg_reg_alloc_movi(s, op);
138
- break;
139
case INDEX_op_dup_vec:
140
tcg_reg_alloc_dup(s, op);
141
break;
142
diff --git a/tcg/aarch64/tcg-target.c.inc b/tcg/aarch64/tcg-target.c.inc
143
index XXXXXXX..XXXXXXX 100644
144
--- a/tcg/aarch64/tcg-target.c.inc
145
+++ b/tcg/aarch64/tcg-target.c.inc
146
@@ -XXX,XX +XXX,XX @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
147
148
case INDEX_op_mov_i32: /* Always emitted via tcg_out_mov. */
149
case INDEX_op_mov_i64:
150
- case INDEX_op_movi_i32: /* Always emitted via tcg_out_movi. */
151
- case INDEX_op_movi_i64:
152
case INDEX_op_call: /* Always emitted via tcg_out_call. */
153
default:
154
g_assert_not_reached();
155
@@ -XXX,XX +XXX,XX @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc,
156
break;
157
158
case INDEX_op_mov_vec: /* Always emitted via tcg_out_mov. */
159
- case INDEX_op_dupi_vec: /* Always emitted via tcg_out_movi. */
160
case INDEX_op_dup_vec: /* Always emitted via tcg_out_dup_vec. */
161
default:
162
g_assert_not_reached();
163
diff --git a/tcg/arm/tcg-target.c.inc b/tcg/arm/tcg-target.c.inc
164
index XXXXXXX..XXXXXXX 100644
165
--- a/tcg/arm/tcg-target.c.inc
166
+++ b/tcg/arm/tcg-target.c.inc
167
@@ -XXX,XX +XXX,XX @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc,
168
break;
169
170
case INDEX_op_mov_i32: /* Always emitted via tcg_out_mov. */
171
- case INDEX_op_movi_i32: /* Always emitted via tcg_out_movi. */
172
case INDEX_op_call: /* Always emitted via tcg_out_call. */
173
default:
174
tcg_abort();
175
diff --git a/tcg/i386/tcg-target.c.inc b/tcg/i386/tcg-target.c.inc
176
index XXXXXXX..XXXXXXX 100644
177
--- a/tcg/i386/tcg-target.c.inc
178
+++ b/tcg/i386/tcg-target.c.inc
179
@@ -XXX,XX +XXX,XX @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc,
180
break;
181
case INDEX_op_mov_i32: /* Always emitted via tcg_out_mov. */
182
case INDEX_op_mov_i64:
183
- case INDEX_op_movi_i32: /* Always emitted via tcg_out_movi. */
184
- case INDEX_op_movi_i64:
185
case INDEX_op_call: /* Always emitted via tcg_out_call. */
186
default:
187
tcg_abort();
188
@@ -XXX,XX +XXX,XX @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc,
189
break;
190
191
case INDEX_op_mov_vec: /* Always emitted via tcg_out_mov. */
192
- case INDEX_op_dupi_vec: /* Always emitted via tcg_out_movi. */
193
case INDEX_op_dup_vec: /* Always emitted via tcg_out_dup_vec. */
194
default:
195
g_assert_not_reached();
196
diff --git a/tcg/mips/tcg-target.c.inc b/tcg/mips/tcg-target.c.inc
197
index XXXXXXX..XXXXXXX 100644
198
--- a/tcg/mips/tcg-target.c.inc
199
+++ b/tcg/mips/tcg-target.c.inc
200
@@ -XXX,XX +XXX,XX @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc,
201
break;
202
case INDEX_op_mov_i32: /* Always emitted via tcg_out_mov. */
203
case INDEX_op_mov_i64:
204
- case INDEX_op_movi_i32: /* Always emitted via tcg_out_movi. */
205
- case INDEX_op_movi_i64:
206
case INDEX_op_call: /* Always emitted via tcg_out_call. */
207
default:
208
tcg_abort();
209
diff --git a/tcg/ppc/tcg-target.c.inc b/tcg/ppc/tcg-target.c.inc
210
index XXXXXXX..XXXXXXX 100644
211
--- a/tcg/ppc/tcg-target.c.inc
212
+++ b/tcg/ppc/tcg-target.c.inc
213
@@ -XXX,XX +XXX,XX @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
214
215
case INDEX_op_mov_i32: /* Always emitted via tcg_out_mov. */
216
case INDEX_op_mov_i64:
217
- case INDEX_op_movi_i32: /* Always emitted via tcg_out_movi. */
218
- case INDEX_op_movi_i64:
219
case INDEX_op_call: /* Always emitted via tcg_out_call. */
220
default:
221
tcg_abort();
222
@@ -XXX,XX +XXX,XX @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc,
223
return;
224
225
case INDEX_op_mov_vec: /* Always emitted via tcg_out_mov. */
226
- case INDEX_op_dupi_vec: /* Always emitted via tcg_out_movi. */
227
case INDEX_op_dup_vec: /* Always emitted via tcg_out_dup_vec. */
228
default:
229
g_assert_not_reached();
230
diff --git a/tcg/riscv/tcg-target.c.inc b/tcg/riscv/tcg-target.c.inc
231
index XXXXXXX..XXXXXXX 100644
232
--- a/tcg/riscv/tcg-target.c.inc
233
+++ b/tcg/riscv/tcg-target.c.inc
234
@@ -XXX,XX +XXX,XX @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
235
236
case INDEX_op_mov_i32: /* Always emitted via tcg_out_mov. */
237
case INDEX_op_mov_i64:
238
- case INDEX_op_movi_i32: /* Always emitted via tcg_out_movi. */
239
- case INDEX_op_movi_i64:
240
case INDEX_op_call: /* Always emitted via tcg_out_call. */
241
default:
242
g_assert_not_reached();
243
diff --git a/tcg/s390/tcg-target.c.inc b/tcg/s390/tcg-target.c.inc
244
index XXXXXXX..XXXXXXX 100644
245
--- a/tcg/s390/tcg-target.c.inc
246
+++ b/tcg/s390/tcg-target.c.inc
247
@@ -XXX,XX +XXX,XX @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc,
248
249
case INDEX_op_mov_i32: /* Always emitted via tcg_out_mov. */
250
case INDEX_op_mov_i64:
251
- case INDEX_op_movi_i32: /* Always emitted via tcg_out_movi. */
252
- case INDEX_op_movi_i64:
253
case INDEX_op_call: /* Always emitted via tcg_out_call. */
254
default:
255
tcg_abort();
256
diff --git a/tcg/sparc/tcg-target.c.inc b/tcg/sparc/tcg-target.c.inc
257
index XXXXXXX..XXXXXXX 100644
258
--- a/tcg/sparc/tcg-target.c.inc
259
+++ b/tcg/sparc/tcg-target.c.inc
260
@@ -XXX,XX +XXX,XX @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
261
262
case INDEX_op_mov_i32: /* Always emitted via tcg_out_mov. */
263
case INDEX_op_mov_i64:
264
- case INDEX_op_movi_i32: /* Always emitted via tcg_out_movi. */
265
- case INDEX_op_movi_i64:
266
case INDEX_op_call: /* Always emitted via tcg_out_call. */
267
default:
268
tcg_abort();
269
diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc
270
index XXXXXXX..XXXXXXX 100644
271
--- a/tcg/tci/tcg-target.c.inc
272
+++ b/tcg/tci/tcg-target.c.inc
273
@@ -XXX,XX +XXX,XX @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
274
break;
275
case INDEX_op_mov_i32: /* Always emitted via tcg_out_mov. */
276
case INDEX_op_mov_i64:
277
- case INDEX_op_movi_i32: /* Always emitted via tcg_out_movi. */
278
- case INDEX_op_movi_i64:
279
case INDEX_op_call: /* Always emitted via tcg_out_call. */
280
default:
281
tcg_abort();
282
--
283
2.25.1
284
285
diff view generated by jsdifflib
[PULL 2/3] tcg: Add support for a helper with 7 arguments
[PULL 19/24] tcg: Add tcg_reg_alloc_dup2
1
From: Taylor Simpson <tsimpson@quicinc.com>
1
There are several ways we can expand a vector dup of a 64-bit
2
element on a 32-bit host.
2
3
3
Currently, helpers can only take up to 6 arguments. This patch adds the
4
capability for up to 7 arguments. I have tested it with the Hexagon port
5
that I am preparing for submission.
6
7
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
8
Message-Id: <1580942510-2820-1-git-send-email-tsimpson@quicinc.com>
9
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
4
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
10
---
5
---
11
include/exec/helper-gen.h | 13 +++++++++++++
6
tcg/tcg.c | 97 +++++++++++++++++++++++++++++++++++++++++++++++++++++++
12
include/exec/helper-head.h | 2 ++
7
1 file changed, 97 insertions(+)
13
include/exec/helper-proto.h | 6 ++++++
14
include/exec/helper-tcg.h | 7 +++++++
15
4 files changed, 28 insertions(+)
16
8
17
diff --git a/include/exec/helper-gen.h b/include/exec/helper-gen.h
9
diff --git a/tcg/tcg.c b/tcg/tcg.c
18
index XXXXXXX..XXXXXXX 100644
10
index XXXXXXX..XXXXXXX 100644
19
--- a/include/exec/helper-gen.h
11
--- a/tcg/tcg.c
20
+++ b/include/exec/helper-gen.h
12
+++ b/tcg/tcg.c
21
@@ -XXX,XX +XXX,XX @@ static inline void glue(gen_helper_, name)(dh_retvar_decl(ret) \
13
@@ -XXX,XX +XXX,XX @@ static void tcg_reg_alloc_op(TCGContext *s, const TCGOp *op)
22
tcg_gen_callN(HELPER(name), dh_retvar(ret), 6, args); \
14
}
23
}
15
}
24
16
25
+#define DEF_HELPER_FLAGS_7(name, flags, ret, t1, t2, t3, t4, t5, t6, t7)\
17
+static bool tcg_reg_alloc_dup2(TCGContext *s, const TCGOp *op)
26
+static inline void glue(gen_helper_, name)(dh_retvar_decl(ret) \
18
+{
27
+ dh_arg_decl(t1, 1), dh_arg_decl(t2, 2), dh_arg_decl(t3, 3), \
19
+ const TCGLifeData arg_life = op->life;
28
+ dh_arg_decl(t4, 4), dh_arg_decl(t5, 5), dh_arg_decl(t6, 6), \
20
+ TCGTemp *ots, *itsl, *itsh;
29
+ dh_arg_decl(t7, 7)) \
21
+ TCGType vtype = TCGOP_VECL(op) + TCG_TYPE_V64;
30
+{ \
22
+
31
+ TCGTemp *args[7] = { dh_arg(t1, 1), dh_arg(t2, 2), dh_arg(t3, 3), \
23
+ /* This opcode is only valid for 32-bit hosts, for 64-bit elements. */
32
+ dh_arg(t4, 4), dh_arg(t5, 5), dh_arg(t6, 6), \
24
+ tcg_debug_assert(TCG_TARGET_REG_BITS == 32);
33
+ dh_arg(t7, 7) }; \
25
+ tcg_debug_assert(TCGOP_VECE(op) == MO_64);
34
+ tcg_gen_callN(HELPER(name), dh_retvar(ret), 7, args); \
26
+
27
+ ots = arg_temp(op->args[0]);
28
+ itsl = arg_temp(op->args[1]);
29
+ itsh = arg_temp(op->args[2]);
30
+
31
+ /* ENV should not be modified. */
32
+ tcg_debug_assert(!temp_readonly(ots));
33
+
34
+ /* Allocate the output register now. */
35
+ if (ots->val_type != TEMP_VAL_REG) {
36
+ TCGRegSet allocated_regs = s->reserved_regs;
37
+ TCGRegSet dup_out_regs =
38
+ tcg_op_defs[INDEX_op_dup_vec].args_ct[0].regs;
39
+
40
+ /* Make sure to not spill the input registers. */
41
+ if (!IS_DEAD_ARG(1) && itsl->val_type == TEMP_VAL_REG) {
42
+ tcg_regset_set_reg(allocated_regs, itsl->reg);
43
+ }
44
+ if (!IS_DEAD_ARG(2) && itsh->val_type == TEMP_VAL_REG) {
45
+ tcg_regset_set_reg(allocated_regs, itsh->reg);
46
+ }
47
+
48
+ ots->reg = tcg_reg_alloc(s, dup_out_regs, allocated_regs,
49
+ op->output_pref[0], ots->indirect_base);
50
+ ots->val_type = TEMP_VAL_REG;
51
+ ots->mem_coherent = 0;
52
+ s->reg_to_temp[ots->reg] = ots;
53
+ }
54
+
55
+ /* Promote dup2 of immediates to dupi_vec. */
56
+ if (itsl->val_type == TEMP_VAL_CONST && itsh->val_type == TEMP_VAL_CONST) {
57
+ uint64_t val = deposit64(itsl->val, 32, 32, itsh->val);
58
+ MemOp vece = MO_64;
59
+
60
+ if (val == dup_const(MO_8, val)) {
61
+ vece = MO_8;
62
+ } else if (val == dup_const(MO_16, val)) {
63
+ vece = MO_16;
64
+ } else if (val == dup_const(MO_32, val)) {
65
+ vece = MO_32;
66
+ }
67
+
68
+ tcg_out_dupi_vec(s, vtype, vece, ots->reg, val);
69
+ goto done;
70
+ }
71
+
72
+ /* If the two inputs form one 64-bit value, try dupm_vec. */
73
+ if (itsl + 1 == itsh && itsl->base_type == TCG_TYPE_I64) {
74
+ if (!itsl->mem_coherent) {
75
+ temp_sync(s, itsl, s->reserved_regs, 0, 0);
76
+ }
77
+ if (!itsh->mem_coherent) {
78
+ temp_sync(s, itsh, s->reserved_regs, 0, 0);
79
+ }
80
+#ifdef HOST_WORDS_BIGENDIAN
81
+ TCGTemp *its = itsh;
82
+#else
83
+ TCGTemp *its = itsl;
84
+#endif
85
+ if (tcg_out_dupm_vec(s, vtype, MO_64, ots->reg,
86
+ its->mem_base->reg, its->mem_offset)) {
87
+ goto done;
88
+ }
89
+ }
90
+
91
+ /* Fall back to generic expansion. */
92
+ return false;
93
+
94
+ done:
95
+ if (IS_DEAD_ARG(1)) {
96
+ temp_dead(s, itsl);
97
+ }
98
+ if (IS_DEAD_ARG(2)) {
99
+ temp_dead(s, itsh);
100
+ }
101
+ if (NEED_SYNC_ARG(0)) {
102
+ temp_sync(s, ots, s->reserved_regs, 0, IS_DEAD_ARG(0));
103
+ } else if (IS_DEAD_ARG(0)) {
104
+ temp_dead(s, ots);
105
+ }
106
+ return true;
35
+}
107
+}
36
+
108
+
37
#include "helper.h"
109
#ifdef TCG_TARGET_STACK_GROWSUP
38
#include "trace/generated-helpers.h"
110
#define STACK_DIR(x) (-(x))
39
#include "trace/generated-helpers-wrappers.h"
111
#else
40
@@ -XXX,XX +XXX,XX @@ static inline void glue(gen_helper_, name)(dh_retvar_decl(ret) \
112
@@ -XXX,XX +XXX,XX @@ int tcg_gen_code(TCGContext *s, TranslationBlock *tb)
41
#undef DEF_HELPER_FLAGS_4
113
case INDEX_op_call:
42
#undef DEF_HELPER_FLAGS_5
114
tcg_reg_alloc_call(s, op);
43
#undef DEF_HELPER_FLAGS_6
115
break;
44
+#undef DEF_HELPER_FLAGS_7
116
+ case INDEX_op_dup2_vec:
45
#undef GEN_HELPER
117
+ if (tcg_reg_alloc_dup2(s, op)) {
46
118
+ break;
47
#endif /* HELPER_GEN_H */
119
+ }
48
diff --git a/include/exec/helper-head.h b/include/exec/helper-head.h
120
+ /* fall through */
49
index XXXXXXX..XXXXXXX 100644
121
default:
50
--- a/include/exec/helper-head.h
122
/* Sanity check that we've not introduced any unhandled opcodes. */
51
+++ b/include/exec/helper-head.h
123
tcg_debug_assert(tcg_op_supported(opc));
52
@@ -XXX,XX +XXX,XX @@
53
DEF_HELPER_FLAGS_5(name, 0, ret, t1, t2, t3, t4, t5)
54
#define DEF_HELPER_6(name, ret, t1, t2, t3, t4, t5, t6) \
55
DEF_HELPER_FLAGS_6(name, 0, ret, t1, t2, t3, t4, t5, t6)
56
+#define DEF_HELPER_7(name, ret, t1, t2, t3, t4, t5, t6, t7) \
57
+ DEF_HELPER_FLAGS_7(name, 0, ret, t1, t2, t3, t4, t5, t6, t7)
58
59
/* MAX_OPC_PARAM_IARGS must be set to n if last entry is DEF_HELPER_FLAGS_n. */
60
61
diff --git a/include/exec/helper-proto.h b/include/exec/helper-proto.h
62
index XXXXXXX..XXXXXXX 100644
63
--- a/include/exec/helper-proto.h
64
+++ b/include/exec/helper-proto.h
65
@@ -XXX,XX +XXX,XX @@ dh_ctype(ret) HELPER(name) (dh_ctype(t1), dh_ctype(t2), dh_ctype(t3), \
66
dh_ctype(ret) HELPER(name) (dh_ctype(t1), dh_ctype(t2), dh_ctype(t3), \
67
dh_ctype(t4), dh_ctype(t5), dh_ctype(t6));
68
69
+#define DEF_HELPER_FLAGS_7(name, flags, ret, t1, t2, t3, t4, t5, t6, t7) \
70
+dh_ctype(ret) HELPER(name) (dh_ctype(t1), dh_ctype(t2), dh_ctype(t3), \
71
+ dh_ctype(t4), dh_ctype(t5), dh_ctype(t6), \
72
+ dh_ctype(t7));
73
+
74
#include "helper.h"
75
#include "trace/generated-helpers.h"
76
#include "tcg-runtime.h"
77
@@ -XXX,XX +XXX,XX @@ dh_ctype(ret) HELPER(name) (dh_ctype(t1), dh_ctype(t2), dh_ctype(t3), \
78
#undef DEF_HELPER_FLAGS_4
79
#undef DEF_HELPER_FLAGS_5
80
#undef DEF_HELPER_FLAGS_6
81
+#undef DEF_HELPER_FLAGS_7
82
83
#endif /* HELPER_PROTO_H */
84
diff --git a/include/exec/helper-tcg.h b/include/exec/helper-tcg.h
85
index XXXXXXX..XXXXXXX 100644
86
--- a/include/exec/helper-tcg.h
87
+++ b/include/exec/helper-tcg.h
88
@@ -XXX,XX +XXX,XX @@
89
| dh_sizemask(t2, 2) | dh_sizemask(t3, 3) | dh_sizemask(t4, 4) \
90
| dh_sizemask(t5, 5) | dh_sizemask(t6, 6) },
91
92
+#define DEF_HELPER_FLAGS_7(NAME, FLAGS, ret, t1, t2, t3, t4, t5, t6, t7) \
93
+ { .func = HELPER(NAME), .name = str(NAME), .flags = FLAGS, \
94
+ .sizemask = dh_sizemask(ret, 0) | dh_sizemask(t1, 1) \
95
+ | dh_sizemask(t2, 2) | dh_sizemask(t3, 3) | dh_sizemask(t4, 4) \
96
+ | dh_sizemask(t5, 5) | dh_sizemask(t6, 6) | dh_sizemask(t7, 7) },
97
+
98
#include "helper.h"
99
#include "trace/generated-helpers.h"
100
#include "tcg-runtime.h"
101
@@ -XXX,XX +XXX,XX @@
102
#undef DEF_HELPER_FLAGS_4
103
#undef DEF_HELPER_FLAGS_5
104
#undef DEF_HELPER_FLAGS_6
105
+#undef DEF_HELPER_FLAGS_7
106
107
#endif /* HELPER_TCG_H */
108
--
124
--
109
2.20.1
125
2.25.1
110
126
111
127
diff view generated by jsdifflib
New patch
[PULL 20/24] tcg/i386: Use tcg_constant_vec with tcg vec expanders
1
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
2
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3
---
4
tcg/i386/tcg-target.c.inc | 26 +++++++++++++-------------
5
1 file changed, 13 insertions(+), 13 deletions(-)
1
6
7
diff --git a/tcg/i386/tcg-target.c.inc b/tcg/i386/tcg-target.c.inc
8
index XXXXXXX..XXXXXXX 100644
9
--- a/tcg/i386/tcg-target.c.inc
10
+++ b/tcg/i386/tcg-target.c.inc
11
@@ -XXX,XX +XXX,XX @@ static void expand_vec_rotv(TCGType type, unsigned vece, TCGv_vec v0,
12
static void expand_vec_mul(TCGType type, unsigned vece,
13
TCGv_vec v0, TCGv_vec v1, TCGv_vec v2)
14
{
15
- TCGv_vec t1, t2, t3, t4;
16
+ TCGv_vec t1, t2, t3, t4, zero;
17
18
tcg_debug_assert(vece == MO_8);
19
20
@@ -XXX,XX +XXX,XX @@ static void expand_vec_mul(TCGType type, unsigned vece,
21
case TCG_TYPE_V64:
22
t1 = tcg_temp_new_vec(TCG_TYPE_V128);
23
t2 = tcg_temp_new_vec(TCG_TYPE_V128);
24
- tcg_gen_dup16i_vec(t2, 0);
25
+ zero = tcg_constant_vec(TCG_TYPE_V128, MO_8, 0);
26
vec_gen_3(INDEX_op_x86_punpckl_vec, TCG_TYPE_V128, MO_8,
27
- tcgv_vec_arg(t1), tcgv_vec_arg(v1), tcgv_vec_arg(t2));
28
+ tcgv_vec_arg(t1), tcgv_vec_arg(v1), tcgv_vec_arg(zero));
29
vec_gen_3(INDEX_op_x86_punpckl_vec, TCG_TYPE_V128, MO_8,
30
- tcgv_vec_arg(t2), tcgv_vec_arg(t2), tcgv_vec_arg(v2));
31
+ tcgv_vec_arg(t2), tcgv_vec_arg(zero), tcgv_vec_arg(v2));
32
tcg_gen_mul_vec(MO_16, t1, t1, t2);
33
tcg_gen_shri_vec(MO_16, t1, t1, 8);
34
vec_gen_3(INDEX_op_x86_packus_vec, TCG_TYPE_V128, MO_8,
35
@@ -XXX,XX +XXX,XX @@ static void expand_vec_mul(TCGType type, unsigned vece,
36
t2 = tcg_temp_new_vec(type);
37
t3 = tcg_temp_new_vec(type);
38
t4 = tcg_temp_new_vec(type);
39
- tcg_gen_dup16i_vec(t4, 0);
40
+ zero = tcg_constant_vec(TCG_TYPE_V128, MO_8, 0);
41
vec_gen_3(INDEX_op_x86_punpckl_vec, type, MO_8,
42
- tcgv_vec_arg(t1), tcgv_vec_arg(v1), tcgv_vec_arg(t4));
43
+ tcgv_vec_arg(t1), tcgv_vec_arg(v1), tcgv_vec_arg(zero));
44
vec_gen_3(INDEX_op_x86_punpckl_vec, type, MO_8,
45
- tcgv_vec_arg(t2), tcgv_vec_arg(t4), tcgv_vec_arg(v2));
46
+ tcgv_vec_arg(t2), tcgv_vec_arg(zero), tcgv_vec_arg(v2));
47
vec_gen_3(INDEX_op_x86_punpckh_vec, type, MO_8,
48
- tcgv_vec_arg(t3), tcgv_vec_arg(v1), tcgv_vec_arg(t4));
49
+ tcgv_vec_arg(t3), tcgv_vec_arg(v1), tcgv_vec_arg(zero));
50
vec_gen_3(INDEX_op_x86_punpckh_vec, type, MO_8,
51
- tcgv_vec_arg(t4), tcgv_vec_arg(t4), tcgv_vec_arg(v2));
52
+ tcgv_vec_arg(t4), tcgv_vec_arg(zero), tcgv_vec_arg(v2));
53
tcg_gen_mul_vec(MO_16, t1, t1, t2);
54
tcg_gen_mul_vec(MO_16, t3, t3, t4);
55
tcg_gen_shri_vec(MO_16, t1, t1, 8);
56
@@ -XXX,XX +XXX,XX @@ static bool expand_vec_cmp_noinv(TCGType type, unsigned vece, TCGv_vec v0,
57
NEED_UMIN = 8,
58
NEED_UMAX = 16,
59
};
60
- TCGv_vec t1, t2;
61
+ TCGv_vec t1, t2, t3;
62
uint8_t fixup;
63
64
switch (cond) {
65
@@ -XXX,XX +XXX,XX @@ static bool expand_vec_cmp_noinv(TCGType type, unsigned vece, TCGv_vec v0,
66
} else if (fixup & NEED_BIAS) {
67
t1 = tcg_temp_new_vec(type);
68
t2 = tcg_temp_new_vec(type);
69
- tcg_gen_dupi_vec(vece, t2, 1ull << ((8 << vece) - 1));
70
- tcg_gen_sub_vec(vece, t1, v1, t2);
71
- tcg_gen_sub_vec(vece, t2, v2, t2);
72
+ t3 = tcg_constant_vec(type, vece, 1ull << ((8 << vece) - 1));
73
+ tcg_gen_sub_vec(vece, t1, v1, t3);
74
+ tcg_gen_sub_vec(vece, t2, v2, t3);
75
v1 = t1;
76
v2 = t2;
77
cond = tcg_signed_cond(cond);
78
--
79
2.25.1
80
81
diff view generated by jsdifflib
New patch
[PULL 21/24] tcg: Remove tcg_gen_dup{8,16,32,64}i_vec
1
These interfaces have been replaced by tcg_gen_dupi_vec
2
and tcg_constant_vec.
1
3
4
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
5
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6
---
7
include/tcg/tcg-op.h | 4 ----
8
tcg/tcg-op-vec.c | 20 --------------------
9
2 files changed, 24 deletions(-)
10
11
diff --git a/include/tcg/tcg-op.h b/include/tcg/tcg-op.h
12
index XXXXXXX..XXXXXXX 100644
13
--- a/include/tcg/tcg-op.h
14
+++ b/include/tcg/tcg-op.h
15
@@ -XXX,XX +XXX,XX @@ void tcg_gen_mov_vec(TCGv_vec, TCGv_vec);
16
void tcg_gen_dup_i32_vec(unsigned vece, TCGv_vec, TCGv_i32);
17
void tcg_gen_dup_i64_vec(unsigned vece, TCGv_vec, TCGv_i64);
18
void tcg_gen_dup_mem_vec(unsigned vece, TCGv_vec, TCGv_ptr, tcg_target_long);
19
-void tcg_gen_dup8i_vec(TCGv_vec, uint32_t);
20
-void tcg_gen_dup16i_vec(TCGv_vec, uint32_t);
21
-void tcg_gen_dup32i_vec(TCGv_vec, uint32_t);
22
-void tcg_gen_dup64i_vec(TCGv_vec, uint64_t);
23
void tcg_gen_dupi_vec(unsigned vece, TCGv_vec, uint64_t);
24
void tcg_gen_add_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
25
void tcg_gen_sub_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
26
diff --git a/tcg/tcg-op-vec.c b/tcg/tcg-op-vec.c
27
index XXXXXXX..XXXXXXX 100644
28
--- a/tcg/tcg-op-vec.c
29
+++ b/tcg/tcg-op-vec.c
30
@@ -XXX,XX +XXX,XX @@ TCGv_vec tcg_const_ones_vec_matching(TCGv_vec m)
31
return tcg_const_ones_vec(t->base_type);
32
}
33
34
-void tcg_gen_dup64i_vec(TCGv_vec r, uint64_t a)
35
-{
36
- tcg_gen_dupi_vec(MO_64, r, a);
37
-}
38
-
39
-void tcg_gen_dup32i_vec(TCGv_vec r, uint32_t a)
40
-{
41
- tcg_gen_dupi_vec(MO_32, r, a);
42
-}
43
-
44
-void tcg_gen_dup16i_vec(TCGv_vec r, uint32_t a)
45
-{
46
- tcg_gen_dupi_vec(MO_16, r, a);
47
-}
48
-
49
-void tcg_gen_dup8i_vec(TCGv_vec r, uint32_t a)
50
-{
51
- tcg_gen_dupi_vec(MO_8, r, a);
52
-}
53
-
54
void tcg_gen_dupi_vec(unsigned vece, TCGv_vec r, uint64_t a)
55
{
56
TCGTemp *rt = tcgv_vec_temp(r);
57
--
58
2.25.1
59
60
diff view generated by jsdifflib
New patch
[PULL 22/24] tcg/ppc: Use tcg_constant_vec with tcg vec expanders
1
Improve expand_vec_shi to use sign-extraction for MO_32.
2
This allows a single VSPLTISB instruction to load all of
3
the valid shift constants.
1
4
5
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6
---
7
tcg/ppc/tcg-target.c.inc | 44 ++++++++++++++++++++++++----------------
8
1 file changed, 27 insertions(+), 17 deletions(-)
9
10
diff --git a/tcg/ppc/tcg-target.c.inc b/tcg/ppc/tcg-target.c.inc
11
index XXXXXXX..XXXXXXX 100644
12
--- a/tcg/ppc/tcg-target.c.inc
13
+++ b/tcg/ppc/tcg-target.c.inc
14
@@ -XXX,XX +XXX,XX @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc,
15
static void expand_vec_shi(TCGType type, unsigned vece, TCGv_vec v0,
16
TCGv_vec v1, TCGArg imm, TCGOpcode opci)
17
{
18
- TCGv_vec t1 = tcg_temp_new_vec(type);
19
+ TCGv_vec t1;
20
21
- /* Splat w/bytes for xxspltib. */
22
- tcg_gen_dupi_vec(MO_8, t1, imm & ((8 << vece) - 1));
23
+ if (vece == MO_32) {
24
+ /*
25
+ * Only 5 bits are significant, and VSPLTISB can represent -16..15.
26
+ * So using negative numbers gets us the 4th bit easily.
27
+ */
28
+ imm = sextract32(imm, 0, 5);
29
+ } else {
30
+ imm &= (8 << vece) - 1;
31
+ }
32
+
33
+ /* Splat w/bytes for xxspltib when 2.07 allows MO_64. */
34
+ t1 = tcg_constant_vec(type, MO_8, imm);
35
vec_gen_3(opci, type, vece, tcgv_vec_arg(v0),
36
tcgv_vec_arg(v1), tcgv_vec_arg(t1));
37
- tcg_temp_free_vec(t1);
38
}
39
40
static void expand_vec_cmp(TCGType type, unsigned vece, TCGv_vec v0,
41
@@ -XXX,XX +XXX,XX @@ static void expand_vec_mul(TCGType type, unsigned vece, TCGv_vec v0,
42
{
43
TCGv_vec t1 = tcg_temp_new_vec(type);
44
TCGv_vec t2 = tcg_temp_new_vec(type);
45
- TCGv_vec t3, t4;
46
+ TCGv_vec c0, c16;
47
48
switch (vece) {
49
case MO_8:
50
@@ -XXX,XX +XXX,XX @@ static void expand_vec_mul(TCGType type, unsigned vece, TCGv_vec v0,
51
52
case MO_32:
53
tcg_debug_assert(!have_isa_2_07);
54
- t3 = tcg_temp_new_vec(type);
55
- t4 = tcg_temp_new_vec(type);
56
- tcg_gen_dupi_vec(MO_8, t4, -16);
57
+ /*
58
+ * Only 5 bits are significant, and VSPLTISB can represent -16..15.
59
+ * So using -16 is a quick way to represent 16.
60
+ */
61
+ c16 = tcg_constant_vec(type, MO_8, -16);
62
+ c0 = tcg_constant_vec(type, MO_8, 0);
63
+
64
vec_gen_3(INDEX_op_rotlv_vec, type, MO_32, tcgv_vec_arg(t1),
65
- tcgv_vec_arg(v2), tcgv_vec_arg(t4));
66
+ tcgv_vec_arg(v2), tcgv_vec_arg(c16));
67
vec_gen_3(INDEX_op_ppc_mulou_vec, type, MO_16, tcgv_vec_arg(t2),
68
tcgv_vec_arg(v1), tcgv_vec_arg(v2));
69
- tcg_gen_dupi_vec(MO_8, t3, 0);
70
- vec_gen_4(INDEX_op_ppc_msum_vec, type, MO_16, tcgv_vec_arg(t3),
71
- tcgv_vec_arg(v1), tcgv_vec_arg(t1), tcgv_vec_arg(t3));
72
- vec_gen_3(INDEX_op_shlv_vec, type, MO_32, tcgv_vec_arg(t3),
73
- tcgv_vec_arg(t3), tcgv_vec_arg(t4));
74
- tcg_gen_add_vec(MO_32, v0, t2, t3);
75
- tcg_temp_free_vec(t3);
76
- tcg_temp_free_vec(t4);
77
+ vec_gen_4(INDEX_op_ppc_msum_vec, type, MO_16, tcgv_vec_arg(t1),
78
+ tcgv_vec_arg(v1), tcgv_vec_arg(t1), tcgv_vec_arg(c0));
79
+ vec_gen_3(INDEX_op_shlv_vec, type, MO_32, tcgv_vec_arg(t1),
80
+ tcgv_vec_arg(t1), tcgv_vec_arg(c16));
81
+ tcg_gen_add_vec(MO_32, v0, t1, t2);
82
break;
83
84
default:
85
--
86
2.25.1
87
88
diff view generated by jsdifflib
New patch
[PULL 23/24] tcg/aarch64: Use tcg_constant_vec with tcg vec expanders
1
Improve rotrv_vec to reduce "t1 = -v2, t2 = t1 + c" to
2
"t1 = -v2, t2 = c - v2". This avoids a serial dependency
3
between t1 and t2.
1
4
5
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6
---
7
tcg/aarch64/tcg-target.c.inc | 10 +++++-----
8
1 file changed, 5 insertions(+), 5 deletions(-)
9
10
diff --git a/tcg/aarch64/tcg-target.c.inc b/tcg/aarch64/tcg-target.c.inc
11
index XXXXXXX..XXXXXXX 100644
12
--- a/tcg/aarch64/tcg-target.c.inc
13
+++ b/tcg/aarch64/tcg-target.c.inc
14
@@ -XXX,XX +XXX,XX @@ void tcg_expand_vec_op(TCGOpcode opc, TCGType type, unsigned vece,
15
TCGArg a0, ...)
16
{
17
va_list va;
18
- TCGv_vec v0, v1, v2, t1, t2;
19
+ TCGv_vec v0, v1, v2, t1, t2, c1;
20
TCGArg a2;
21
22
va_start(va, a0);
23
@@ -XXX,XX +XXX,XX @@ void tcg_expand_vec_op(TCGOpcode opc, TCGType type, unsigned vece,
24
25
case INDEX_op_rotlv_vec:
26
t1 = tcg_temp_new_vec(type);
27
- tcg_gen_dupi_vec(vece, t1, 8 << vece);
28
- tcg_gen_sub_vec(vece, t1, v2, t1);
29
+ c1 = tcg_constant_vec(type, vece, 8 << vece);
30
+ tcg_gen_sub_vec(vece, t1, v2, c1);
31
/* Right shifts are negative left shifts for AArch64. */
32
vec_gen_3(INDEX_op_shlv_vec, type, vece, tcgv_vec_arg(t1),
33
tcgv_vec_arg(v1), tcgv_vec_arg(t1));
34
@@ -XXX,XX +XXX,XX @@ void tcg_expand_vec_op(TCGOpcode opc, TCGType type, unsigned vece,
35
case INDEX_op_rotrv_vec:
36
t1 = tcg_temp_new_vec(type);
37
t2 = tcg_temp_new_vec(type);
38
+ c1 = tcg_constant_vec(type, vece, 8 << vece);
39
tcg_gen_neg_vec(vece, t1, v2);
40
- tcg_gen_dupi_vec(vece, t2, 8 << vece);
41
- tcg_gen_add_vec(vece, t2, t1, t2);
42
+ tcg_gen_sub_vec(vece, t2, c1, v2);
43
/* Right shifts are negative left shifts for AArch64. */
44
vec_gen_3(INDEX_op_shlv_vec, type, vece, tcgv_vec_arg(t1),
45
tcgv_vec_arg(v1), tcgv_vec_arg(t1));
46
--
47
2.25.1
48
49
diff view generated by jsdifflib
New patch
[PULL 24/24] decodetree: Open files with encoding='utf-8'
1
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
1
2
3
When decodetree.py was added in commit 568ae7efae7, QEMU was
4
using Python 2 which happily reads UTF-8 files in text mode.
5
Python 3 requires either UTF-8 locale or an explicit encoding
6
passed to open(). Now that Python 3 is required, explicit
7
UTF-8 encoding for decodetree source files.
8
9
To avoid further problems with the user locale, also explicit
10
UTF-8 encoding for the generated C files.
11
12
Explicit both input/output are plain text by using the 't' mode.
13
14
This fixes:
15
16
$ /usr/bin/python3 scripts/decodetree.py test.decode
17
Traceback (most recent call last):
18
File "scripts/decodetree.py", line 1397, in <module>
19
main()
20
File "scripts/decodetree.py", line 1308, in main
21
parse_file(f, toppat)
22
File "scripts/decodetree.py", line 994, in parse_file
23
for line in f:
24
File "/usr/lib/python3.6/encodings/ascii.py", line 26, in decode
25
return codecs.ascii_decode(input, self.errors)[0]
26
UnicodeDecodeError: 'ascii' codec can't decode byte 0xc3 in position 80:
27
ordinal not in range(128)
28
29
Reported-by: Peter Maydell <peter.maydell@linaro.org>
30
Suggested-by: Yonggang Luo <luoyonggang@gmail.com>
31
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
32
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
33
Message-Id: <20210110000240.761122-1-f4bug@amsat.org>
34
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
35
---
36
scripts/decodetree.py | 9 ++++++---
37
1 file changed, 6 insertions(+), 3 deletions(-)
38
39
diff --git a/scripts/decodetree.py b/scripts/decodetree.py
40
index XXXXXXX..XXXXXXX 100644
41
--- a/scripts/decodetree.py
42
+++ b/scripts/decodetree.py
43
@@ -XXX,XX +XXX,XX @@
44
# See the syntax and semantics in docs/devel/decodetree.rst.
45
#
46
47
+import io
48
import os
49
import re
50
import sys
51
@@ -XXX,XX +XXX,XX @@ def main():
52
53
for filename in args:
54
input_file = filename
55
- f = open(filename, 'r')
56
+ f = open(filename, 'rt', encoding='utf-8')
57
parse_file(f, toppat)
58
f.close()
59
60
@@ -XXX,XX +XXX,XX @@ def main():
61
prop_size(stree)
62
63
if output_file:
64
- output_fd = open(output_file, 'w')
65
+ output_fd = open(output_file, 'wt', encoding='utf-8')
66
else:
67
- output_fd = sys.stdout
68
+ output_fd = io.TextIOWrapper(sys.stdout.buffer,
69
+ encoding=sys.stdout.encoding,
70
+ errors="ignore")
71
72
output_autogen()
73
for n in sorted(arguments.keys()):
74
--
75
2.25.1
76
77
diff view generated by jsdifflib

Patchew 2.1-devel-b67e4c2

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