[PULL 0/3] tcg patch queue
[PULL v2 00/34] tcg patch queue
1
The following changes since commit e18e5501d8ac692d32657a3e1ef545b14e72b730:
1
For version 2, drop the -static and -pie changes,
2
i.e. patches 1-7 from version 1.
2
3
3
Merge remote-tracking branch 'remotes/dgilbert-gitlab/tags/pull-virtiofs-20200210' into staging (2020-02-10 18:09:14 +0000)
4
I'll come back to those after the required linux-user changes are
5
upstream. In the meantime, it's still a large enough set of patches.
6
7
8
r~
9
10
11
12
The following changes since commit 3a63b24a1bbf166e6f455fe43a6bbd8dea413d92:
13
14
Merge remote-tracking branch 'remotes/kraxel/tags/ui-20200114-pull-request' into staging (2020-01-14 16:00:31 +0000)
4
15
5
are available in the Git repository at:
16
are available in the Git repository at:
6
17
7
https://github.com/rth7680/qemu.git tags/pull-tcg-20200212
18
https://github.com/rth7680/qemu.git tags/pull-tcg-20200115
8
19
9
for you to fetch changes up to 2445971604c1cfd3ec484457159f4ac300fb04d2:
20
for you to fetch changes up to 3e5a01ef0268ee4c9d342a26dbf6624d6b5b20d6:
10
21
11
tcg: Add tcg_gen_gvec_5_ptr (2020-02-12 14:58:36 -0800)
22
MAINTAINERS: Replace Claudio Fontana for tcg/aarch64 (2020-01-15 15:13:10 -1000)
12
23
13
----------------------------------------------------------------
24
----------------------------------------------------------------
14
Fix breakpoint invalidation.
25
Add cpu_{ld,st}*_mmuidx_ra
15
Add support for tcg helpers with 7 arguments.
26
Remove MMU_MODE*_SUFFIX
16
Add support for gvec helpers with 5 arguments.
27
Move tcg headers under include/
17
28
18
----------------------------------------------------------------
29
----------------------------------------------------------------
19
Max Filippov (1):
30
Philippe Mathieu-Daudé (4):
20
exec: flush CPU TB cache in breakpoint_invalidate
31
tcg: Search includes from the project root source directory
32
tcg: Search includes in the parent source directory
33
tcg: Move TCG headers to include/tcg/
34
configure: Remove tcg/ from the preprocessor include search list
21
35
22
Richard Henderson (1):
36
Richard Henderson (30):
23
tcg: Add tcg_gen_gvec_5_ptr
37
target/xtensa: Use probe_access for itlb_hit_test
38
cputlb: Use trace_mem_get_info instead of trace_mem_build_info
39
trace: Remove trace_mem_build_info_no_se_[bl]e
40
target/s390x: Include tcg.h in mem_helper.c
41
target/arm: Include tcg.h in sve_helper.c
42
accel/tcg: Include tcg.h in tcg-runtime.c
43
linux-user: Include tcg.h in syscall.c
44
linux-user: Include trace-root.h in syscall-trace.h
45
plugins: Include trace/mem.h in api.c
46
cputlb: Move body of cpu_ldst_template.h out of line
47
translator: Use cpu_ld*_code instead of open-coding
48
cputlb: Rename helper_ret_ld*_cmmu to cpu_ld*_code
49
cputlb: Provide cpu_(ld,st}*_mmuidx_ra for user-only
50
target/i386: Use cpu_*_mmuidx_ra instead of templates
51
cputlb: Expand cpu_ldst_useronly_template.h in user-exec.c
52
target/nios2: Remove MMU_MODE{0,1}_SUFFIX
53
target/alpha: Remove MMU_MODE{0,1}_SUFFIX
54
target/cris: Remove MMU_MODE{0,1}_SUFFIX
55
target/i386: Remove MMU_MODE{0,1,2}_SUFFIX
56
target/microblaze: Remove MMU_MODE{0,1,2}_SUFFIX
57
target/sh4: Remove MMU_MODE{0,1}_SUFFIX
58
target/unicore32: Remove MMU_MODE{0,1}_SUFFIX
59
target/xtensa: Remove MMU_MODE{0,1,2,3}_SUFFIX
60
target/m68k: Use cpu_*_mmuidx_ra instead of MMU_MODE{0,1}_SUFFIX
61
target/mips: Use cpu_*_mmuidx_ra instead of MMU_MODE*_SUFFIX
62
target/s390x: Use cpu_*_mmuidx_ra instead of MMU_MODE*_SUFFIX
63
target/ppc: Use cpu_*_mmuidx_ra instead of MMU_MODE*_SUFFIX
64
cputlb: Remove support for MMU_MODE*_SUFFIX
65
cputlb: Expand cpu_ldst_template.h in cputlb.c
66
MAINTAINERS: Replace Claudio Fontana for tcg/aarch64
24
67
25
Taylor Simpson (1):
68
accel/tcg/atomic_template.h | 67 ++---
26
tcg: Add support for a helper with 7 arguments
69
include/exec/cpu_ldst.h | 446 +++++++++---------------------
70
include/exec/cpu_ldst_template.h | 211 --------------
71
include/exec/cpu_ldst_useronly_template.h | 159 -----------
72
include/exec/translator.h | 48 +---
73
{tcg => include/tcg}/tcg-gvec-desc.h | 0
74
{tcg => include/tcg}/tcg-mo.h | 0
75
{tcg => include/tcg}/tcg-op-gvec.h | 0
76
{tcg => include/tcg}/tcg-op.h | 2 +-
77
{tcg => include/tcg}/tcg-opc.h | 0
78
{tcg => include/tcg}/tcg.h | 33 +--
79
include/user/syscall-trace.h | 2 +
80
target/alpha/cpu.h | 2 -
81
target/cris/cpu.h | 2 -
82
target/i386/cpu.h | 3 -
83
target/m68k/cpu.h | 2 -
84
target/microblaze/cpu.h | 3 -
85
target/mips/cpu.h | 4 -
86
target/nios2/cpu.h | 2 -
87
target/ppc/cpu.h | 2 -
88
target/s390x/cpu.h | 5 -
89
target/sh4/cpu.h | 2 -
90
target/unicore32/cpu.h | 2 -
91
target/xtensa/cpu.h | 4 -
92
tcg/i386/tcg-target.h | 2 +-
93
trace/mem-internal.h | 17 --
94
accel/tcg/cpu-exec.c | 2 +-
95
accel/tcg/cputlb.c | 315 ++++++++++++++++-----
96
accel/tcg/tcg-runtime-gvec.c | 2 +-
97
accel/tcg/tcg-runtime.c | 1 +
98
accel/tcg/translate-all.c | 2 +-
99
accel/tcg/user-exec.c | 238 +++++++++++++++-
100
bsd-user/main.c | 2 +-
101
cpus.c | 2 +-
102
exec.c | 2 +-
103
linux-user/main.c | 2 +-
104
linux-user/syscall.c | 1 +
105
plugins/api.c | 1 +
106
target/alpha/translate.c | 2 +-
107
target/arm/helper-a64.c | 2 +-
108
target/arm/sve_helper.c | 1 +
109
target/arm/translate-a64.c | 4 +-
110
target/arm/translate-sve.c | 6 +-
111
target/arm/translate.c | 4 +-
112
target/cris/translate.c | 2 +-
113
target/hppa/translate.c | 2 +-
114
target/i386/mem_helper.c | 2 +-
115
target/i386/seg_helper.c | 56 ++--
116
target/i386/translate.c | 2 +-
117
target/lm32/translate.c | 2 +-
118
target/m68k/op_helper.c | 77 ++++--
119
target/m68k/translate.c | 2 +-
120
target/microblaze/translate.c | 2 +-
121
target/mips/op_helper.c | 182 ++++--------
122
target/mips/translate.c | 2 +-
123
target/moxie/translate.c | 2 +-
124
target/nios2/translate.c | 2 +-
125
target/openrisc/translate.c | 2 +-
126
target/ppc/mem_helper.c | 13 +-
127
target/ppc/translate.c | 4 +-
128
target/riscv/cpu_helper.c | 2 +-
129
target/riscv/translate.c | 2 +-
130
target/s390x/mem_helper.c | 11 +-
131
target/s390x/translate.c | 4 +-
132
target/sh4/translate.c | 2 +-
133
target/sparc/ldst_helper.c | 2 +-
134
target/sparc/translate.c | 2 +-
135
target/tilegx/translate.c | 2 +-
136
target/tricore/translate.c | 2 +-
137
target/unicore32/translate.c | 2 +-
138
target/xtensa/mmu_helper.c | 5 +-
139
target/xtensa/translate.c | 2 +-
140
tcg/aarch64/tcg-target.inc.c | 4 +-
141
tcg/arm/tcg-target.inc.c | 4 +-
142
tcg/i386/tcg-target.inc.c | 4 +-
143
tcg/mips/tcg-target.inc.c | 2 +-
144
tcg/optimize.c | 2 +-
145
tcg/ppc/tcg-target.inc.c | 4 +-
146
tcg/riscv/tcg-target.inc.c | 4 +-
147
tcg/s390/tcg-target.inc.c | 4 +-
148
tcg/sparc/tcg-target.inc.c | 2 +-
149
tcg/tcg-common.c | 2 +-
150
tcg/tcg-op-gvec.c | 8 +-
151
tcg/tcg-op-vec.c | 6 +-
152
tcg/tcg-op.c | 6 +-
153
tcg/tcg.c | 2 +-
154
tcg/tci.c | 2 +-
155
MAINTAINERS | 4 +-
156
configure | 1 -
157
docs/devel/loads-stores.rst | 215 ++++++++++----
158
90 files changed, 1037 insertions(+), 1240 deletions(-)
159
delete mode 100644 include/exec/cpu_ldst_template.h
160
delete mode 100644 include/exec/cpu_ldst_useronly_template.h
161
rename {tcg => include/tcg}/tcg-gvec-desc.h (100%)
162
rename {tcg => include/tcg}/tcg-mo.h (100%)
163
rename {tcg => include/tcg}/tcg-op-gvec.h (100%)
164
rename {tcg => include/tcg}/tcg-op.h (99%)
165
rename {tcg => include/tcg}/tcg-opc.h (100%)
166
rename {tcg => include/tcg}/tcg.h (96%)
27
167
28
include/exec/helper-gen.h | 13 +++++++++++++
29
include/exec/helper-head.h | 2 ++
30
include/exec/helper-proto.h | 6 ++++++
31
include/exec/helper-tcg.h | 7 +++++++
32
include/tcg/tcg-op-gvec.h | 7 +++++++
33
exec.c | 15 +++++++--------
34
tcg/tcg-op-gvec.c | 32 ++++++++++++++++++++++++++++++++
35
7 files changed, 74 insertions(+), 8 deletions(-)
36
diff view generated by jsdifflib
[PULL 1/3] exec: flush CPU TB cache in breakpoint_invalidate
Deleted patch
1
From: Max Filippov <jcmvbkbc@gmail.com>
2
1
3
When a breakpoint is inserted at location for which there's currently no
4
virtual to physical translation no action is taken on CPU TB cache. If a
5
TB for that virtual address already exists but is not visible ATM the
6
breakpoint won't be hit next time an instruction at that address will be
7
executed.
8
9
Flush entire CPU TB cache in breakpoint_invalidate to force
10
re-translation of all TBs for the breakpoint address.
11
12
This change fixes the following scenario:
13
- linux user application is running
14
- a breakpoint is inserted from QEMU gdbstub for a user address that is
15
not currently present in the target CPU TLB
16
- an instruction at that address is executed, but the external debugger
17
doesn't get control.
18
19
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
20
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
21
Message-Id: <20191127220602.10827-2-jcmvbkbc@gmail.com>
22
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
23
---
24
exec.c | 15 +++++++--------
25
1 file changed, 7 insertions(+), 8 deletions(-)
26
27
diff --git a/exec.c b/exec.c
28
index XXXXXXX..XXXXXXX 100644
29
--- a/exec.c
30
+++ b/exec.c
31
@@ -XXX,XX +XXX,XX @@ void tb_invalidate_phys_addr(AddressSpace *as, hwaddr addr, MemTxAttrs attrs)
32
33
static void breakpoint_invalidate(CPUState *cpu, target_ulong pc)
34
{
35
- MemTxAttrs attrs;
36
- hwaddr phys = cpu_get_phys_page_attrs_debug(cpu, pc, &attrs);
37
- int asidx = cpu_asidx_from_attrs(cpu, attrs);
38
- if (phys != -1) {
39
- /* Locks grabbed by tb_invalidate_phys_addr */
40
- tb_invalidate_phys_addr(cpu->cpu_ases[asidx].as,
41
- phys | (pc & ~TARGET_PAGE_MASK), attrs);
42
- }
43
+ /*
44
+ * There may not be a virtual to physical translation for the pc
45
+ * right now, but there may exist cached TB for this pc.
46
+ * Flush the whole TB cache to force re-translation of such TBs.
47
+ * This is heavyweight, but we're debugging anyway.
48
+ */
49
+ tb_flush(cpu);
50
}
51
#endif
52
53
--
54
2.20.1
55
56
diff view generated by jsdifflib
[PULL 2/3] tcg: Add support for a helper with 7 arguments
Deleted patch
1
From: Taylor Simpson <tsimpson@quicinc.com>
2
1
3
Currently, helpers can only take up to 6 arguments. This patch adds the
4
capability for up to 7 arguments. I have tested it with the Hexagon port
5
that I am preparing for submission.
6
7
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
8
Message-Id: <1580942510-2820-1-git-send-email-tsimpson@quicinc.com>
9
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
10
---
11
include/exec/helper-gen.h | 13 +++++++++++++
12
include/exec/helper-head.h | 2 ++
13
include/exec/helper-proto.h | 6 ++++++
14
include/exec/helper-tcg.h | 7 +++++++
15
4 files changed, 28 insertions(+)
16
17
diff --git a/include/exec/helper-gen.h b/include/exec/helper-gen.h
18
index XXXXXXX..XXXXXXX 100644
19
--- a/include/exec/helper-gen.h
20
+++ b/include/exec/helper-gen.h
21
@@ -XXX,XX +XXX,XX @@ static inline void glue(gen_helper_, name)(dh_retvar_decl(ret) \
22
tcg_gen_callN(HELPER(name), dh_retvar(ret), 6, args); \
23
}
24
25
+#define DEF_HELPER_FLAGS_7(name, flags, ret, t1, t2, t3, t4, t5, t6, t7)\
26
+static inline void glue(gen_helper_, name)(dh_retvar_decl(ret) \
27
+ dh_arg_decl(t1, 1), dh_arg_decl(t2, 2), dh_arg_decl(t3, 3), \
28
+ dh_arg_decl(t4, 4), dh_arg_decl(t5, 5), dh_arg_decl(t6, 6), \
29
+ dh_arg_decl(t7, 7)) \
30
+{ \
31
+ TCGTemp *args[7] = { dh_arg(t1, 1), dh_arg(t2, 2), dh_arg(t3, 3), \
32
+ dh_arg(t4, 4), dh_arg(t5, 5), dh_arg(t6, 6), \
33
+ dh_arg(t7, 7) }; \
34
+ tcg_gen_callN(HELPER(name), dh_retvar(ret), 7, args); \
35
+}
36
+
37
#include "helper.h"
38
#include "trace/generated-helpers.h"
39
#include "trace/generated-helpers-wrappers.h"
40
@@ -XXX,XX +XXX,XX @@ static inline void glue(gen_helper_, name)(dh_retvar_decl(ret) \
41
#undef DEF_HELPER_FLAGS_4
42
#undef DEF_HELPER_FLAGS_5
43
#undef DEF_HELPER_FLAGS_6
44
+#undef DEF_HELPER_FLAGS_7
45
#undef GEN_HELPER
46
47
#endif /* HELPER_GEN_H */
48
diff --git a/include/exec/helper-head.h b/include/exec/helper-head.h
49
index XXXXXXX..XXXXXXX 100644
50
--- a/include/exec/helper-head.h
51
+++ b/include/exec/helper-head.h
52
@@ -XXX,XX +XXX,XX @@
53
DEF_HELPER_FLAGS_5(name, 0, ret, t1, t2, t3, t4, t5)
54
#define DEF_HELPER_6(name, ret, t1, t2, t3, t4, t5, t6) \
55
DEF_HELPER_FLAGS_6(name, 0, ret, t1, t2, t3, t4, t5, t6)
56
+#define DEF_HELPER_7(name, ret, t1, t2, t3, t4, t5, t6, t7) \
57
+ DEF_HELPER_FLAGS_7(name, 0, ret, t1, t2, t3, t4, t5, t6, t7)
58
59
/* MAX_OPC_PARAM_IARGS must be set to n if last entry is DEF_HELPER_FLAGS_n. */
60
61
diff --git a/include/exec/helper-proto.h b/include/exec/helper-proto.h
62
index XXXXXXX..XXXXXXX 100644
63
--- a/include/exec/helper-proto.h
64
+++ b/include/exec/helper-proto.h
65
@@ -XXX,XX +XXX,XX @@ dh_ctype(ret) HELPER(name) (dh_ctype(t1), dh_ctype(t2), dh_ctype(t3), \
66
dh_ctype(ret) HELPER(name) (dh_ctype(t1), dh_ctype(t2), dh_ctype(t3), \
67
dh_ctype(t4), dh_ctype(t5), dh_ctype(t6));
68
69
+#define DEF_HELPER_FLAGS_7(name, flags, ret, t1, t2, t3, t4, t5, t6, t7) \
70
+dh_ctype(ret) HELPER(name) (dh_ctype(t1), dh_ctype(t2), dh_ctype(t3), \
71
+ dh_ctype(t4), dh_ctype(t5), dh_ctype(t6), \
72
+ dh_ctype(t7));
73
+
74
#include "helper.h"
75
#include "trace/generated-helpers.h"
76
#include "tcg-runtime.h"
77
@@ -XXX,XX +XXX,XX @@ dh_ctype(ret) HELPER(name) (dh_ctype(t1), dh_ctype(t2), dh_ctype(t3), \
78
#undef DEF_HELPER_FLAGS_4
79
#undef DEF_HELPER_FLAGS_5
80
#undef DEF_HELPER_FLAGS_6
81
+#undef DEF_HELPER_FLAGS_7
82
83
#endif /* HELPER_PROTO_H */
84
diff --git a/include/exec/helper-tcg.h b/include/exec/helper-tcg.h
85
index XXXXXXX..XXXXXXX 100644
86
--- a/include/exec/helper-tcg.h
87
+++ b/include/exec/helper-tcg.h
88
@@ -XXX,XX +XXX,XX @@
89
| dh_sizemask(t2, 2) | dh_sizemask(t3, 3) | dh_sizemask(t4, 4) \
90
| dh_sizemask(t5, 5) | dh_sizemask(t6, 6) },
91
92
+#define DEF_HELPER_FLAGS_7(NAME, FLAGS, ret, t1, t2, t3, t4, t5, t6, t7) \
93
+ { .func = HELPER(NAME), .name = str(NAME), .flags = FLAGS, \
94
+ .sizemask = dh_sizemask(ret, 0) | dh_sizemask(t1, 1) \
95
+ | dh_sizemask(t2, 2) | dh_sizemask(t3, 3) | dh_sizemask(t4, 4) \
96
+ | dh_sizemask(t5, 5) | dh_sizemask(t6, 6) | dh_sizemask(t7, 7) },
97
+
98
#include "helper.h"
99
#include "trace/generated-helpers.h"
100
#include "tcg-runtime.h"
101
@@ -XXX,XX +XXX,XX @@
102
#undef DEF_HELPER_FLAGS_4
103
#undef DEF_HELPER_FLAGS_5
104
#undef DEF_HELPER_FLAGS_6
105
+#undef DEF_HELPER_FLAGS_7
106
107
#endif /* HELPER_TCG_H */
108
--
109
2.20.1
110
111
diff view generated by jsdifflib
[PULL 3/3] tcg: Add tcg_gen_gvec_5_ptr
Deleted patch
1
Extend the vector generator infrastructure to handle
2
5 vector arguments.
3
1
4
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
5
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
6
Reviewed-by: Taylor Simpson <tsimpson@quicinc.com>
7
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
8
---
9
include/tcg/tcg-op-gvec.h | 7 +++++++
10
tcg/tcg-op-gvec.c | 32 ++++++++++++++++++++++++++++++++
11
2 files changed, 39 insertions(+)
12
13
diff --git a/include/tcg/tcg-op-gvec.h b/include/tcg/tcg-op-gvec.h
14
index XXXXXXX..XXXXXXX 100644
15
--- a/include/tcg/tcg-op-gvec.h
16
+++ b/include/tcg/tcg-op-gvec.h
17
@@ -XXX,XX +XXX,XX @@ void tcg_gen_gvec_4_ptr(uint32_t dofs, uint32_t aofs, uint32_t bofs,
18
uint32_t maxsz, int32_t data,
19
gen_helper_gvec_4_ptr *fn);
20
21
+typedef void gen_helper_gvec_5_ptr(TCGv_ptr, TCGv_ptr, TCGv_ptr, TCGv_ptr,
22
+ TCGv_ptr, TCGv_ptr, TCGv_i32);
23
+void tcg_gen_gvec_5_ptr(uint32_t dofs, uint32_t aofs, uint32_t bofs,
24
+ uint32_t cofs, uint32_t eofs, TCGv_ptr ptr,
25
+ uint32_t oprsz, uint32_t maxsz, int32_t data,
26
+ gen_helper_gvec_5_ptr *fn);
27
+
28
/* Expand a gvec operation. Either inline or out-of-line depending on
29
the actual vector size and the operations supported by the host. */
30
typedef struct {
31
diff --git a/tcg/tcg-op-gvec.c b/tcg/tcg-op-gvec.c
32
index XXXXXXX..XXXXXXX 100644
33
--- a/tcg/tcg-op-gvec.c
34
+++ b/tcg/tcg-op-gvec.c
35
@@ -XXX,XX +XXX,XX @@ void tcg_gen_gvec_4_ptr(uint32_t dofs, uint32_t aofs, uint32_t bofs,
36
tcg_temp_free_i32(desc);
37
}
38
39
+/* Generate a call to a gvec-style helper with five vector operands
40
+ and an extra pointer operand. */
41
+void tcg_gen_gvec_5_ptr(uint32_t dofs, uint32_t aofs, uint32_t bofs,
42
+ uint32_t cofs, uint32_t eofs, TCGv_ptr ptr,
43
+ uint32_t oprsz, uint32_t maxsz, int32_t data,
44
+ gen_helper_gvec_5_ptr *fn)
45
+{
46
+ TCGv_ptr a0, a1, a2, a3, a4;
47
+ TCGv_i32 desc = tcg_const_i32(simd_desc(oprsz, maxsz, data));
48
+
49
+ a0 = tcg_temp_new_ptr();
50
+ a1 = tcg_temp_new_ptr();
51
+ a2 = tcg_temp_new_ptr();
52
+ a3 = tcg_temp_new_ptr();
53
+ a4 = tcg_temp_new_ptr();
54
+
55
+ tcg_gen_addi_ptr(a0, cpu_env, dofs);
56
+ tcg_gen_addi_ptr(a1, cpu_env, aofs);
57
+ tcg_gen_addi_ptr(a2, cpu_env, bofs);
58
+ tcg_gen_addi_ptr(a3, cpu_env, cofs);
59
+ tcg_gen_addi_ptr(a4, cpu_env, eofs);
60
+
61
+ fn(a0, a1, a2, a3, a4, ptr, desc);
62
+
63
+ tcg_temp_free_ptr(a0);
64
+ tcg_temp_free_ptr(a1);
65
+ tcg_temp_free_ptr(a2);
66
+ tcg_temp_free_ptr(a3);
67
+ tcg_temp_free_ptr(a4);
68
+ tcg_temp_free_i32(desc);
69
+}
70
+
71
/* Return true if we want to implement something of OPRSZ bytes
72
in units of LNSZ. This limits the expansion of inline code. */
73
static inline bool check_size_impl(uint32_t oprsz, uint32_t lnsz)
74
--
75
2.20.1
76
77
diff view generated by jsdifflib

Patchew 2.1-devel-b67e4c2

© 2016 - 2025 Red Hat, Inc.