Add which features are added or removed in this version. Remove the
changed model-id in versioned CPU models, to keep the model name
unchanged at /proc/cpuinfo inside the VM.
Signed-off-by: Tao Xu <tao3.xu@intel.com>
---
Changes in v2:
- correct the note of Cascadelake v3 (Xiaoyao)
---
target/i386/cpu.c | 54 ++++++++++++++++++++++-------------------------
1 file changed, 25 insertions(+), 29 deletions(-)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 81a039beb6..739ef4ce91 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -2278,10 +2278,9 @@ static X86CPUDefinition builtin_x86_defs[] = {
{
.version = 2,
.alias = "Nehalem-IBRS",
+ .note = "IBRS",
.props = (PropValue[]) {
{ "spec-ctrl", "on" },
- { "model-id",
- "Intel Core i7 9xx (Nehalem Core i7, IBRS update)" },
{ /* end of list */ }
}
},
@@ -2359,10 +2358,9 @@ static X86CPUDefinition builtin_x86_defs[] = {
{
.version = 2,
.alias = "Westmere-IBRS",
+ .note = "IBRS",
.props = (PropValue[]) {
{ "spec-ctrl", "on" },
- { "model-id",
- "Westmere E56xx/L56xx/X56xx (IBRS update)" },
{ /* end of list */ }
}
},
@@ -2445,10 +2443,9 @@ static X86CPUDefinition builtin_x86_defs[] = {
{
.version = 2,
.alias = "SandyBridge-IBRS",
+ .note = "IBRS",
.props = (PropValue[]) {
{ "spec-ctrl", "on" },
- { "model-id",
- "Intel Xeon E312xx (Sandy Bridge, IBRS update)" },
{ /* end of list */ }
}
},
@@ -2537,10 +2534,9 @@ static X86CPUDefinition builtin_x86_defs[] = {
{
.version = 2,
.alias = "IvyBridge-IBRS",
+ .note = "IBRS",
.props = (PropValue[]) {
{ "spec-ctrl", "on" },
- { "model-id",
- "Intel Xeon E3-12xx v2 (Ivy Bridge, IBRS)" },
{ /* end of list */ }
}
},
@@ -2634,17 +2630,18 @@ static X86CPUDefinition builtin_x86_defs[] = {
{
.version = 2,
.alias = "Haswell-noTSX",
+ .note = "no TSX",
.props = (PropValue[]) {
{ "hle", "off" },
{ "rtm", "off" },
{ "stepping", "1" },
- { "model-id", "Intel Core Processor (Haswell, no TSX)", },
{ /* end of list */ }
},
},
{
.version = 3,
.alias = "Haswell-IBRS",
+ .note = "IBRS",
.props = (PropValue[]) {
/* Restore TSX features removed by -v2 above */
{ "hle", "on" },
@@ -2655,21 +2652,18 @@ static X86CPUDefinition builtin_x86_defs[] = {
*/
{ "stepping", "4" },
{ "spec-ctrl", "on" },
- { "model-id",
- "Intel Core Processor (Haswell, IBRS)" },
{ /* end of list */ }
}
},
{
.version = 4,
.alias = "Haswell-noTSX-IBRS",
+ .note = "no TSX, IBRS",
.props = (PropValue[]) {
{ "hle", "off" },
{ "rtm", "off" },
/* spec-ctrl was already enabled by -v3 above */
{ "stepping", "1" },
- { "model-id",
- "Intel Core Processor (Haswell, no TSX, IBRS)" },
{ /* end of list */ }
}
},
@@ -2765,35 +2759,33 @@ static X86CPUDefinition builtin_x86_defs[] = {
{
.version = 2,
.alias = "Broadwell-noTSX",
+ .note = "no TSX",
.props = (PropValue[]) {
{ "hle", "off" },
{ "rtm", "off" },
- { "model-id", "Intel Core Processor (Broadwell, no TSX)", },
{ /* end of list */ }
},
},
{
.version = 3,
.alias = "Broadwell-IBRS",
+ .note = "IBRS",
.props = (PropValue[]) {
/* Restore TSX features removed by -v2 above */
{ "hle", "on" },
{ "rtm", "on" },
{ "spec-ctrl", "on" },
- { "model-id",
- "Intel Core Processor (Broadwell, IBRS)" },
{ /* end of list */ }
}
},
{
.version = 4,
.alias = "Broadwell-noTSX-IBRS",
+ .note = "no TSX, IBRS",
.props = (PropValue[]) {
{ "hle", "off" },
{ "rtm", "off" },
/* spec-ctrl was already enabled by -v3 above */
- { "model-id",
- "Intel Core Processor (Broadwell, no TSX, IBRS)" },
{ /* end of list */ }
}
},
@@ -2893,22 +2885,20 @@ static X86CPUDefinition builtin_x86_defs[] = {
{ .version = 1 },
{
.version = 2,
+ .note = "IBRS",
.alias = "Skylake-Client-IBRS",
.props = (PropValue[]) {
{ "spec-ctrl", "on" },
- { "model-id",
- "Intel Core Processor (Skylake, IBRS)" },
{ /* end of list */ }
}
},
{
.version = 3,
.alias = "Skylake-Client-noTSX-IBRS",
+ .note = "no TSX, IBRS",
.props = (PropValue[]) {
{ "hle", "off" },
{ "rtm", "off" },
- { "model-id",
- "Intel Core Processor (Skylake, IBRS, no TSX)" },
{ /* end of list */ }
}
},
@@ -3016,24 +3006,22 @@ static X86CPUDefinition builtin_x86_defs[] = {
{
.version = 2,
.alias = "Skylake-Server-IBRS",
+ .note = "IBRS",
.props = (PropValue[]) {
/* clflushopt was not added to Skylake-Server-IBRS */
/* TODO: add -v3 including clflushopt */
{ "clflushopt", "off" },
{ "spec-ctrl", "on" },
- { "model-id",
- "Intel Xeon Processor (Skylake, IBRS)" },
{ /* end of list */ }
}
},
{
.version = 3,
.alias = "Skylake-Server-noTSX-IBRS",
+ .note = "no TSX, IBRS",
.props = (PropValue[]) {
{ "hle", "off" },
{ "rtm", "off" },
- { "model-id",
- "Intel Xeon Processor (Skylake, IBRS, no TSX)" },
{ /* end of list */ }
}
},
@@ -3142,6 +3130,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
.versions = (X86CPUVersionDefinition[]) {
{ .version = 1 },
{ .version = 2,
+ .note = "ARCH_CAPABILITIES",
.props = (PropValue[]) {
{ "arch-capabilities", "on" },
{ "rdctl-no", "on" },
@@ -3153,6 +3142,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
},
{ .version = 3,
.alias = "Cascadelake-Server-noTSX",
+ .note = "ARCH_CAPABILITIES, no TSX",
.props = (PropValue[]) {
{ "hle", "off" },
{ "rtm", "off" },
@@ -3374,6 +3364,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
{ .version = 1 },
{
.version = 2,
+ .note = "no TSX",
.alias = "Icelake-Client-noTSX",
.props = (PropValue[]) {
{ "hle", "off" },
@@ -3491,6 +3482,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
{ .version = 1 },
{
.version = 2,
+ .note = "no TSX",
.alias = "Icelake-Server-noTSX",
.props = (PropValue[]) {
{ "hle", "off" },
@@ -3598,6 +3590,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
{ .version = 1 },
{
.version = 2,
+ .note = "no MPX, no MONITOR",
.props = (PropValue[]) {
{ "monitor", "off" },
{ "mpx", "off" },
@@ -3727,14 +3720,15 @@ static X86CPUDefinition builtin_x86_defs[] = {
{ .version = 1 },
{
.version = 2,
+ .note = "no MPX",
.props = (PropValue[]) {
{ "mpx", "off" },
- { "model-id", "Intel Atom Processor (Snowridge, no MPX)" },
{ /* end of list */ },
},
},
{
.version = 3,
+ .note = "no MPX, no MONITOR",
.props = (PropValue[]) {
/* mpx was already removed by -v2 above */
{ "monitor", "off" },
@@ -3856,6 +3850,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
{ .version = 1 },
{
.version = 2,
+ .note = "no MONITOR",
.props = (PropValue[]) {
{ "monitor", "off" },
{ /* end of list */ },
@@ -3980,15 +3975,15 @@ static X86CPUDefinition builtin_x86_defs[] = {
{
.version = 2,
.alias = "EPYC-IBPB",
+ .note = "IBPB",
.props = (PropValue[]) {
{ "ibpb", "on" },
- { "model-id",
- "AMD EPYC Processor (with IBPB)" },
{ /* end of list */ }
}
},
{
.version = 3,
+ .note = "IBPB, no MONITOR",
.props = (PropValue[]) {
/* ibpb was already enabled by -v2 above */
{ "monitor", "off" },
@@ -4051,6 +4046,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
{ .version = 1 },
{
.version = 2,
+ .note = "no MONITOR",
.props = (PropValue[]) {
{ "monitor", "off" },
{ /* end of list */ },
--
2.20.1
On Wed, Feb 12, 2020 at 04:13:28PM +0800, Tao Xu wrote:
> Add which features are added or removed in this version. Remove the
> changed model-id in versioned CPU models, to keep the model name
> unchanged at /proc/cpuinfo inside the VM.
>
> Signed-off-by: Tao Xu <tao3.xu@intel.com>
> ---
>
> Changes in v2:
> - correct the note of Cascadelake v3 (Xiaoyao)
> ---
> target/i386/cpu.c | 54 ++++++++++++++++++++++-------------------------
> 1 file changed, 25 insertions(+), 29 deletions(-)
>
> diff --git a/target/i386/cpu.c b/target/i386/cpu.c
> index 81a039beb6..739ef4ce91 100644
> --- a/target/i386/cpu.c
> +++ b/target/i386/cpu.c
> @@ -2278,10 +2278,9 @@ static X86CPUDefinition builtin_x86_defs[] = {
> {
> .version = 2,
> .alias = "Nehalem-IBRS",
> + .note = "IBRS",
> .props = (PropValue[]) {
> { "spec-ctrl", "on" },
> - { "model-id",
> - "Intel Core i7 9xx (Nehalem Core i7, IBRS update)" },
> { /* end of list */ }
Changing model-id is guest-visible, so we can't do this. The
same applies to the other models where model-id is being removed.
I suggest using the .note property only on the CPU model versions
that don't have custom model-id set yet, or when existing
information on model-id is incomplete.
For future CPU model versions, we can start using only .note and
stop changing model-id.
--
Eduardo
On 2/29/2020 5:52 AM, Eduardo Habkost wrote:
> On Wed, Feb 12, 2020 at 04:13:28PM +0800, Tao Xu wrote:
>> Add which features are added or removed in this version. Remove the
>> changed model-id in versioned CPU models, to keep the model name
>> unchanged at /proc/cpuinfo inside the VM.
>>
>> Signed-off-by: Tao Xu <tao3.xu@intel.com>
>> ---
>>
>> Changes in v2:
>> - correct the note of Cascadelake v3 (Xiaoyao)
>> ---
>> target/i386/cpu.c | 54 ++++++++++++++++++++++-------------------------
>> 1 file changed, 25 insertions(+), 29 deletions(-)
>>
>> diff --git a/target/i386/cpu.c b/target/i386/cpu.c
>> index 81a039beb6..739ef4ce91 100644
>> --- a/target/i386/cpu.c
>> +++ b/target/i386/cpu.c
>> @@ -2278,10 +2278,9 @@ static X86CPUDefinition builtin_x86_defs[] = {
>> {
>> .version = 2,
>> .alias = "Nehalem-IBRS",
>> + .note = "IBRS",
>> .props = (PropValue[]) {
>> { "spec-ctrl", "on" },
>> - { "model-id",
>> - "Intel Core i7 9xx (Nehalem Core i7, IBRS update)" },
>> { /* end of list */ }
>
> Changing model-id is guest-visible, so we can't do this. The
> same applies to the other models where model-id is being removed.
>
> I suggest using the .note property only on the CPU model versions
> that don't have custom model-id set yet, or when existing
> information on model-id is incomplete.
>
> For future CPU model versions, we can start using only .note and
> stop changing model-id.
>
Got it,thanks!
On Wed, 12 Feb 2020 16:13:28 +0800
Tao Xu <tao3.xu@intel.com> wrote:
> Add which features are added or removed in this version. Remove the
> changed model-id in versioned CPU models, to keep the model name
> unchanged at /proc/cpuinfo inside the VM.
>
> Signed-off-by: Tao Xu <tao3.xu@intel.com>
> ---
>
> Changes in v2:
> - correct the note of Cascadelake v3 (Xiaoyao)
> ---
> target/i386/cpu.c | 54 ++++++++++++++++++++++-------------------------
> 1 file changed, 25 insertions(+), 29 deletions(-)
>
> diff --git a/target/i386/cpu.c b/target/i386/cpu.c
> index 81a039beb6..739ef4ce91 100644
> --- a/target/i386/cpu.c
> +++ b/target/i386/cpu.c
> @@ -2278,10 +2278,9 @@ static X86CPUDefinition builtin_x86_defs[] = {
> {
> .version = 2,
> .alias = "Nehalem-IBRS",
> + .note = "IBRS",
> .props = (PropValue[]) {
> { "spec-ctrl", "on" },
> - { "model-id",
> - "Intel Core i7 9xx (Nehalem Core i7, IBRS update)" },
> { /* end of list */ }
> }
> },
> @@ -2359,10 +2358,9 @@ static X86CPUDefinition builtin_x86_defs[] = {
> {
> .version = 2,
> .alias = "Westmere-IBRS",
> + .note = "IBRS",
> .props = (PropValue[]) {
> { "spec-ctrl", "on" },
> - { "model-id",
> - "Westmere E56xx/L56xx/X56xx (IBRS update)" },
> { /* end of list */ }
> }
> },
> @@ -2445,10 +2443,9 @@ static X86CPUDefinition builtin_x86_defs[] = {
> {
> .version = 2,
> .alias = "SandyBridge-IBRS",
> + .note = "IBRS",
> .props = (PropValue[]) {
> { "spec-ctrl", "on" },
> - { "model-id",
> - "Intel Xeon E312xx (Sandy Bridge, IBRS update)" },
> { /* end of list */ }
> }
> },
> @@ -2537,10 +2534,9 @@ static X86CPUDefinition builtin_x86_defs[] = {
> {
> .version = 2,
> .alias = "IvyBridge-IBRS",
> + .note = "IBRS",
> .props = (PropValue[]) {
> { "spec-ctrl", "on" },
> - { "model-id",
> - "Intel Xeon E3-12xx v2 (Ivy Bridge, IBRS)" },
> { /* end of list */ }
> }
> },
> @@ -2634,17 +2630,18 @@ static X86CPUDefinition builtin_x86_defs[] = {
> {
> .version = 2,
> .alias = "Haswell-noTSX",
> + .note = "no TSX",
> .props = (PropValue[]) {
> { "hle", "off" },
> { "rtm", "off" },
> { "stepping", "1" },
> - { "model-id", "Intel Core Processor (Haswell, no TSX)", },
> { /* end of list */ }
> },
> },
> {
> .version = 3,
> .alias = "Haswell-IBRS",
> + .note = "IBRS",
> .props = (PropValue[]) {
> /* Restore TSX features removed by -v2 above */
> { "hle", "on" },
> @@ -2655,21 +2652,18 @@ static X86CPUDefinition builtin_x86_defs[] = {
> */
> { "stepping", "4" },
> { "spec-ctrl", "on" },
> - { "model-id",
> - "Intel Core Processor (Haswell, IBRS)" },
> { /* end of list */ }
> }
> },
> {
> .version = 4,
> .alias = "Haswell-noTSX-IBRS",
> + .note = "no TSX, IBRS",
> .props = (PropValue[]) {
> { "hle", "off" },
> { "rtm", "off" },
> /* spec-ctrl was already enabled by -v3 above */
> { "stepping", "1" },
> - { "model-id",
> - "Intel Core Processor (Haswell, no TSX, IBRS)" },
> { /* end of list */ }
> }
> },
> @@ -2765,35 +2759,33 @@ static X86CPUDefinition builtin_x86_defs[] = {
> {
> .version = 2,
> .alias = "Broadwell-noTSX",
> + .note = "no TSX",
> .props = (PropValue[]) {
> { "hle", "off" },
> { "rtm", "off" },
> - { "model-id", "Intel Core Processor (Broadwell, no TSX)", },
> { /* end of list */ }
> },
> },
> {
> .version = 3,
> .alias = "Broadwell-IBRS",
> + .note = "IBRS",
> .props = (PropValue[]) {
> /* Restore TSX features removed by -v2 above */
> { "hle", "on" },
> { "rtm", "on" },
> { "spec-ctrl", "on" },
> - { "model-id",
> - "Intel Core Processor (Broadwell, IBRS)" },
> { /* end of list */ }
> }
> },
> {
> .version = 4,
> .alias = "Broadwell-noTSX-IBRS",
> + .note = "no TSX, IBRS",
> .props = (PropValue[]) {
> { "hle", "off" },
> { "rtm", "off" },
> /* spec-ctrl was already enabled by -v3 above */
> - { "model-id",
> - "Intel Core Processor (Broadwell, no TSX, IBRS)" },
> { /* end of list */ }
> }
> },
> @@ -2893,22 +2885,20 @@ static X86CPUDefinition builtin_x86_defs[] = {
> { .version = 1 },
> {
> .version = 2,
> + .note = "IBRS",
> .alias = "Skylake-Client-IBRS",
> .props = (PropValue[]) {
> { "spec-ctrl", "on" },
> - { "model-id",
> - "Intel Core Processor (Skylake, IBRS)" },
> { /* end of list */ }
> }
> },
> {
> .version = 3,
> .alias = "Skylake-Client-noTSX-IBRS",
> + .note = "no TSX, IBRS",
> .props = (PropValue[]) {
> { "hle", "off" },
> { "rtm", "off" },
> - { "model-id",
> - "Intel Core Processor (Skylake, IBRS, no TSX)" },
> { /* end of list */ }
> }
> },
> @@ -3016,24 +3006,22 @@ static X86CPUDefinition builtin_x86_defs[] = {
> {
> .version = 2,
> .alias = "Skylake-Server-IBRS",
> + .note = "IBRS",
> .props = (PropValue[]) {
> /* clflushopt was not added to Skylake-Server-IBRS */
> /* TODO: add -v3 including clflushopt */
> { "clflushopt", "off" },
> { "spec-ctrl", "on" },
> - { "model-id",
> - "Intel Xeon Processor (Skylake, IBRS)" },
> { /* end of list */ }
> }
> },
> {
> .version = 3,
> .alias = "Skylake-Server-noTSX-IBRS",
> + .note = "no TSX, IBRS",
> .props = (PropValue[]) {
> { "hle", "off" },
> { "rtm", "off" },
> - { "model-id",
> - "Intel Xeon Processor (Skylake, IBRS, no TSX)" },
> { /* end of list */ }
> }
> },
> @@ -3142,6 +3130,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
> .versions = (X86CPUVersionDefinition[]) {
> { .version = 1 },
> { .version = 2,
> + .note = "ARCH_CAPABILITIES",
what's ARCH_CAPABILITIES?
> .props = (PropValue[]) {
> { "arch-capabilities", "on" },
> { "rdctl-no", "on" },
> @@ -3153,6 +3142,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
> },
> { .version = 3,
> .alias = "Cascadelake-Server-noTSX",
> + .note = "ARCH_CAPABILITIES, no TSX",
> .props = (PropValue[]) {
> { "hle", "off" },
> { "rtm", "off" },
> @@ -3374,6 +3364,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
> { .version = 1 },
> {
> .version = 2,
> + .note = "no TSX",
> .alias = "Icelake-Client-noTSX",
> .props = (PropValue[]) {
> { "hle", "off" },
> @@ -3491,6 +3482,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
> { .version = 1 },
> {
> .version = 2,
> + .note = "no TSX",
> .alias = "Icelake-Server-noTSX",
> .props = (PropValue[]) {
> { "hle", "off" },
> @@ -3598,6 +3590,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
> { .version = 1 },
> {
> .version = 2,
> + .note = "no MPX, no MONITOR",
> .props = (PropValue[]) {
> { "monitor", "off" },
> { "mpx", "off" },
> @@ -3727,14 +3720,15 @@ static X86CPUDefinition builtin_x86_defs[] = {
> { .version = 1 },
> {
> .version = 2,
> + .note = "no MPX",
> .props = (PropValue[]) {
> { "mpx", "off" },
> - { "model-id", "Intel Atom Processor (Snowridge, no MPX)" },
> { /* end of list */ },
> },
> },
> {
> .version = 3,
> + .note = "no MPX, no MONITOR",
> .props = (PropValue[]) {
> /* mpx was already removed by -v2 above */
> { "monitor", "off" },
> @@ -3856,6 +3850,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
> { .version = 1 },
> {
> .version = 2,
> + .note = "no MONITOR",
> .props = (PropValue[]) {
> { "monitor", "off" },
> { /* end of list */ },
> @@ -3980,15 +3975,15 @@ static X86CPUDefinition builtin_x86_defs[] = {
> {
> .version = 2,
> .alias = "EPYC-IBPB",
> + .note = "IBPB",
> .props = (PropValue[]) {
> { "ibpb", "on" },
> - { "model-id",
> - "AMD EPYC Processor (with IBPB)" },
> { /* end of list */ }
> }
> },
> {
> .version = 3,
> + .note = "IBPB, no MONITOR",
> .props = (PropValue[]) {
> /* ibpb was already enabled by -v2 above */
> { "monitor", "off" },
> @@ -4051,6 +4046,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
> { .version = 1 },
> {
> .version = 2,
> + .note = "no MONITOR",
> .props = (PropValue[]) {
> { "monitor", "off" },
> { /* end of list */ },
On 2/12/2020 5:00 PM, Igor Mammedov wrote:
> On Wed, 12 Feb 2020 16:13:28 +0800
> Tao Xu <tao3.xu@intel.com> wrote:
>
>> Add which features are added or removed in this version. Remove the
>> changed model-id in versioned CPU models, to keep the model name
>> unchanged at /proc/cpuinfo inside the VM.
>>
>> Signed-off-by: Tao Xu <tao3.xu@intel.com>
>> ---
>>
>> Changes in v2:
>> - correct the note of Cascadelake v3 (Xiaoyao)
>> ---
>> target/i386/cpu.c | 54 ++++++++++++++++++++++-------------------------
>> 1 file changed, 25 insertions(+), 29 deletions(-)
>>
>> diff --git a/target/i386/cpu.c b/target/i386/cpu.c
>> index 81a039beb6..739ef4ce91 100644
>> --- a/target/i386/cpu.c
>> +++ b/target/i386/cpu.c
[...]
>> @@ -3142,6 +3130,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
>> .versions = (X86CPUVersionDefinition[]) {
>> { .version = 1 },
>> { .version = 2,
>> + .note = "ARCH_CAPABILITIES",
>
> what's ARCH_CAPABILITIES?
>
These are some features exposed by MSR_IA32_ARCH_CAPABILITIES. For
Cascadelake, these are "rdctl-no" "ibrs-all" "skip-l1dfl-vmentry" "mds-no"
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