[PATCH v2 0/2] target/arm: kvm: Support for KVM DABT without valid ISS

Beata Michalska posted 2 patches 4 years, 2 months ago
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git fetch https://github.com/patchew-project/qemu tags/patchew/20200129202441.12745-1-beata.michalska@linaro.org
Maintainers: Peter Maydell <peter.maydell@linaro.org>
target/arm/cpu.h     |  2 ++
target/arm/kvm.c     | 96 ++++++++++++++++++++++++++++++++++++++++++++++++++++
target/arm/kvm32.c   | 23 +++++++------
target/arm/kvm64.c   | 23 +++++++------
target/arm/kvm_arm.h | 19 +++++++++++
5 files changed, 143 insertions(+), 20 deletions(-)
[PATCH v2 0/2] target/arm: kvm: Support for KVM DABT without valid ISS
Posted by Beata Michalska 4 years, 2 months ago
Some of the ARMv7 & ARMv8 load/store instructions might trigger a data abort
exception with no valid ISS info to be decoded. The lack of decode info
makes it at least tricky to emulate the instruction which is one of the
(many) reasons why KVM will not even try to do so.

So far, if a guest made an attempt to access memory outside the memory slot,
KVM reported vague ENOSYS. As a result QEMU exited with no useful information
being provided or even a clue on what has just happened.

ARM KVM introduced support for notifying guest of an attempt to execute
an instruction that resulted in dabt with no valid ISS decoding info.
This still leaves QEMU to handle the case, but at least now, it can enable
further debugging of the encountered issue by being more verbose
in a (hopefully) useful way.

v2:
- Improving/re-phrasing messaging
- Dropping messing around with forced sync (@see [PATCH v2 1/2])
  and PC alignment


Beata Michalska (2):
  target/arm: kvm: Inject events at the last stage of sync
  target/arm: kvm: Handle DABT with no valid ISS

 target/arm/cpu.h     |  2 ++
 target/arm/kvm.c     | 96 ++++++++++++++++++++++++++++++++++++++++++++++++++++
 target/arm/kvm32.c   | 23 +++++++------
 target/arm/kvm64.c   | 23 +++++++------
 target/arm/kvm_arm.h | 19 +++++++++++
 5 files changed, 143 insertions(+), 20 deletions(-)

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2.7.4