Allocate the LPI configuration and per re-distributor pending table.
Set redistributor's PROPBASER and PENDBASER. The LPIs are enabled
by default in the config table.
Also introduce a helper routine that allows to set the pending table
bit for a given LPI.
Signed-off-by: Eric Auger <eric.auger@redhat.com>
---
v2 -> v3:
- Move the helpers in lib/arm/gic-v3.c and prefix them with "gicv3_"
and add _lpi prefix too
v1 -> v2:
- remove memory attributes
---
lib/arm/asm/gic-v3.h | 16 +++++++++++
lib/arm/gic-v3.c | 64 ++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 80 insertions(+)
diff --git a/lib/arm/asm/gic-v3.h b/lib/arm/asm/gic-v3.h
index ffb2e26..ec2a6f0 100644
--- a/lib/arm/asm/gic-v3.h
+++ b/lib/arm/asm/gic-v3.h
@@ -48,6 +48,16 @@
#define MPIDR_TO_SGI_AFFINITY(cluster_id, level) \
(MPIDR_AFFINITY_LEVEL(cluster_id, level) << ICC_SGI1R_AFFINITY_## level ## _SHIFT)
+#define GICR_PROPBASER_IDBITS_MASK (0x1f)
+
+#define GICR_PENDBASER_PTZ BIT_ULL(62)
+
+#define LPI_PROP_GROUP1 (1 << 1)
+#define LPI_PROP_ENABLED (1 << 0)
+#define LPI_PROP_DEFAULT_PRIO 0xa0
+#define LPI_PROP_DEFAULT (LPI_PROP_DEFAULT_PRIO | LPI_PROP_GROUP1 | \
+ LPI_PROP_ENABLED)
+
#include <asm/arch_gicv3.h>
#ifndef __ASSEMBLY__
@@ -64,6 +74,8 @@ struct gicv3_data {
void *dist_base;
void *redist_bases[GICV3_NR_REDISTS];
void *redist_base[NR_CPUS];
+ void *lpi_prop;
+ void *lpi_pend[NR_CPUS];
unsigned int irq_nr;
};
extern struct gicv3_data gicv3_data;
@@ -80,6 +92,10 @@ extern void gicv3_write_eoir(u32 irqstat);
extern void gicv3_ipi_send_single(int irq, int cpu);
extern void gicv3_ipi_send_mask(int irq, const cpumask_t *dest);
extern void gicv3_set_redist_base(size_t stride);
+extern void gicv3_lpi_set_config(int n, u8 val);
+extern u8 gicv3_lpi_get_config(int n);
+extern void gicv3_lpi_set_pending_table_bit(int rdist, int n, bool set);
+extern void gicv3_lpi_alloc_tables(void);
static inline void gicv3_do_wait_for_rwp(void *base)
{
diff --git a/lib/arm/gic-v3.c b/lib/arm/gic-v3.c
index feecb5e..c33f883 100644
--- a/lib/arm/gic-v3.c
+++ b/lib/arm/gic-v3.c
@@ -5,6 +5,7 @@
*/
#include <asm/gic.h>
#include <asm/io.h>
+#include <alloc_page.h>
void gicv3_set_redist_base(size_t stride)
{
@@ -147,3 +148,66 @@ void gicv3_ipi_send_single(int irq, int cpu)
cpumask_set_cpu(cpu, &dest);
gicv3_ipi_send_mask(irq, &dest);
}
+
+#if defined(__aarch64__)
+/* alloc_lpi_tables: Allocate LPI config and pending tables */
+void gicv3_lpi_alloc_tables(void)
+{
+ unsigned long n = SZ_64K >> PAGE_SHIFT;
+ unsigned long order = fls(n);
+ u64 prop_val;
+ int cpu;
+
+ gicv3_data.lpi_prop = (void *)virt_to_phys(alloc_pages(order));
+
+ /* ID bits = 13, ie. up to 14b LPI INTID */
+ prop_val = (u64)gicv3_data.lpi_prop | 13;
+
+ /*
+ * Allocate pending tables for each redistributor
+ * and set PROPBASER and PENDBASER
+ */
+ for_each_present_cpu(cpu) {
+ u64 pend_val;
+ void *ptr;
+
+ ptr = gicv3_data.redist_base[cpu];
+
+ writeq(prop_val, ptr + GICR_PROPBASER);
+
+ gicv3_data.lpi_pend[cpu] = (void *)virt_to_phys(alloc_pages(order));
+
+ pend_val = (u64)gicv3_data.lpi_pend[cpu];
+
+ writeq(pend_val, ptr + GICR_PENDBASER);
+ }
+}
+
+void gicv3_lpi_set_config(int n, u8 value)
+{
+ u8 *entry = (u8 *)(gicv3_data.lpi_prop + (n - 8192));
+
+ *entry = value;
+}
+
+u8 gicv3_lpi_get_config(int n)
+{
+ u8 *entry = (u8 *)(gicv3_data.lpi_prop + (n - 8192));
+
+ return *entry;
+}
+
+void gicv3_lpi_set_pending_table_bit(int rdist, int n, bool set)
+{
+ u8 *ptr = phys_to_virt((phys_addr_t)gicv3_data.lpi_pend[rdist]);
+ u8 mask = 1 << (n % 8), byte;
+
+ ptr += (n / 8);
+ byte = *ptr;
+ if (set)
+ byte |= mask;
+ else
+ byte &= ~mask;
+ *ptr = byte;
+}
+#endif /* __aarch64__ */
--
2.20.1
Hi Eric,
On 2020/1/28 18:34, Eric Auger wrote:
> Allocate the LPI configuration and per re-distributor pending table.
> Set redistributor's PROPBASER and PENDBASER. The LPIs are enabled
> by default in the config table.
>
> Also introduce a helper routine that allows to set the pending table
> bit for a given LPI.
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
>
> ---
>
> v2 -> v3:
> - Move the helpers in lib/arm/gic-v3.c and prefix them with "gicv3_"
> and add _lpi prefix too
>
> v1 -> v2:
> - remove memory attributes
> ---
> lib/arm/asm/gic-v3.h | 16 +++++++++++
> lib/arm/gic-v3.c | 64 ++++++++++++++++++++++++++++++++++++++++++++
> 2 files changed, 80 insertions(+)
>
> diff --git a/lib/arm/asm/gic-v3.h b/lib/arm/asm/gic-v3.h
> index ffb2e26..ec2a6f0 100644
> --- a/lib/arm/asm/gic-v3.h
> +++ b/lib/arm/asm/gic-v3.h
> @@ -48,6 +48,16 @@
> #define MPIDR_TO_SGI_AFFINITY(cluster_id, level) \
> (MPIDR_AFFINITY_LEVEL(cluster_id, level) << ICC_SGI1R_AFFINITY_## level ## _SHIFT)
>
> +#define GICR_PROPBASER_IDBITS_MASK (0x1f)
This is not being used. You can use it when calculating prop_val
or just drop it.
> +
> +#define GICR_PENDBASER_PTZ BIT_ULL(62)
> +
> +#define LPI_PROP_GROUP1 (1 << 1)
> +#define LPI_PROP_ENABLED (1 << 0)
> +#define LPI_PROP_DEFAULT_PRIO 0xa0
> +#define LPI_PROP_DEFAULT (LPI_PROP_DEFAULT_PRIO | LPI_PROP_GROUP1 | \
> + LPI_PROP_ENABLED)
> +
> #include <asm/arch_gicv3.h>
>
> #ifndef __ASSEMBLY__
> @@ -64,6 +74,8 @@ struct gicv3_data {
> void *dist_base;
> void *redist_bases[GICV3_NR_REDISTS];
> void *redist_base[NR_CPUS];
> + void *lpi_prop;
> + void *lpi_pend[NR_CPUS];
> unsigned int irq_nr;
> };
> extern struct gicv3_data gicv3_data;
> @@ -80,6 +92,10 @@ extern void gicv3_write_eoir(u32 irqstat);
> extern void gicv3_ipi_send_single(int irq, int cpu);
> extern void gicv3_ipi_send_mask(int irq, const cpumask_t *dest);
> extern void gicv3_set_redist_base(size_t stride);
> +extern void gicv3_lpi_set_config(int n, u8 val);
> +extern u8 gicv3_lpi_get_config(int n);
> +extern void gicv3_lpi_set_pending_table_bit(int rdist, int n, bool set);
> +extern void gicv3_lpi_alloc_tables(void);
>
> static inline void gicv3_do_wait_for_rwp(void *base)
> {
> diff --git a/lib/arm/gic-v3.c b/lib/arm/gic-v3.c
> index feecb5e..c33f883 100644
> --- a/lib/arm/gic-v3.c
> +++ b/lib/arm/gic-v3.c
> @@ -5,6 +5,7 @@
> */
> #include <asm/gic.h>
> #include <asm/io.h>
> +#include <alloc_page.h>
>
> void gicv3_set_redist_base(size_t stride)
> {
> @@ -147,3 +148,66 @@ void gicv3_ipi_send_single(int irq, int cpu)
> cpumask_set_cpu(cpu, &dest);
> gicv3_ipi_send_mask(irq, &dest);
> }
> +
> +#if defined(__aarch64__)
> +/* alloc_lpi_tables: Allocate LPI config and pending tables */
> +void gicv3_lpi_alloc_tables(void)
> +{
> + unsigned long n = SZ_64K >> PAGE_SHIFT;
> + unsigned long order = fls(n);
> + u64 prop_val;
> + int cpu;
> +
> + gicv3_data.lpi_prop = (void *)virt_to_phys(alloc_pages(order));
> +
> + /* ID bits = 13, ie. up to 14b LPI INTID */
> + prop_val = (u64)gicv3_data.lpi_prop | 13;
> +
> + /*
> + * Allocate pending tables for each redistributor
> + * and set PROPBASER and PENDBASER
> + */
> + for_each_present_cpu(cpu) {
> + u64 pend_val;
> + void *ptr;
> +
> + ptr = gicv3_data.redist_base[cpu];
> +
> + writeq(prop_val, ptr + GICR_PROPBASER);
> +
> + gicv3_data.lpi_pend[cpu] = (void *)virt_to_phys(alloc_pages(order));
> +
> + pend_val = (u64)gicv3_data.lpi_pend[cpu];
> +
> + writeq(pend_val, ptr + GICR_PENDBASER);
> + }
> +}
> +
> +void gicv3_lpi_set_config(int n, u8 value)
> +{
> + u8 *entry = (u8 *)(gicv3_data.lpi_prop + (n - 8192));
But this is actually the *physical* address, shouldn't it be
converted by phys_to_virt() before reading/writing something?
Like what you've done for the 'lpi_pend[rdist]' before writing
pending bit. Or I'm missing some points here?
> +
> + *entry = value;
> +}
> +
> +u8 gicv3_lpi_get_config(int n)
> +{
> + u8 *entry = (u8 *)(gicv3_data.lpi_prop + (n - 8192));
The same as above.
Thanks,
Zenghui
> +
> + return *entry;
> +}
> +
> +void gicv3_lpi_set_pending_table_bit(int rdist, int n, bool set)
> +{
> + u8 *ptr = phys_to_virt((phys_addr_t)gicv3_data.lpi_pend[rdist]);
> + u8 mask = 1 << (n % 8), byte;
> +
> + ptr += (n / 8);
> + byte = *ptr;
> + if (set)
> + byte |= mask;
> + else
> + byte &= ~mask;
> + *ptr = byte;
> +}
> +#endif /* __aarch64__ */
>
Hi Zenghui,
On 2/7/20 3:12 AM, Zenghui Yu wrote:
> Hi Eric,
>
> On 2020/1/28 18:34, Eric Auger wrote:
>> Allocate the LPI configuration and per re-distributor pending table.
>> Set redistributor's PROPBASER and PENDBASER. The LPIs are enabled
>> by default in the config table.
>>
>> Also introduce a helper routine that allows to set the pending table
>> bit for a given LPI.
>>
>> Signed-off-by: Eric Auger <eric.auger@redhat.com>
>>
>> ---
>>
>> v2 -> v3:
>> - Move the helpers in lib/arm/gic-v3.c and prefix them with "gicv3_"
>> and add _lpi prefix too
>>
>> v1 -> v2:
>> - remove memory attributes
>> ---
>> lib/arm/asm/gic-v3.h | 16 +++++++++++
>> lib/arm/gic-v3.c | 64 ++++++++++++++++++++++++++++++++++++++++++++
>> 2 files changed, 80 insertions(+)
>>
>> diff --git a/lib/arm/asm/gic-v3.h b/lib/arm/asm/gic-v3.h
>> index ffb2e26..ec2a6f0 100644
>> --- a/lib/arm/asm/gic-v3.h
>> +++ b/lib/arm/asm/gic-v3.h
>> @@ -48,6 +48,16 @@
>> #define MPIDR_TO_SGI_AFFINITY(cluster_id, level) \
>> (MPIDR_AFFINITY_LEVEL(cluster_id, level) <<
>> ICC_SGI1R_AFFINITY_## level ## _SHIFT)
>> +#define GICR_PROPBASER_IDBITS_MASK (0x1f)
>
> This is not being used. You can use it when calculating prop_val
> or just drop it.
yep dropped it.
>
>> +
>> +#define GICR_PENDBASER_PTZ BIT_ULL(62)
>> +
>> +#define LPI_PROP_GROUP1 (1 << 1)
>> +#define LPI_PROP_ENABLED (1 << 0)
>> +#define LPI_PROP_DEFAULT_PRIO 0xa0
>> +#define LPI_PROP_DEFAULT (LPI_PROP_DEFAULT_PRIO | LPI_PROP_GROUP1 | \
>> + LPI_PROP_ENABLED)
>> +
>> #include <asm/arch_gicv3.h>
>> #ifndef __ASSEMBLY__
>> @@ -64,6 +74,8 @@ struct gicv3_data {
>> void *dist_base;
>> void *redist_bases[GICV3_NR_REDISTS];
>> void *redist_base[NR_CPUS];
>> + void *lpi_prop;
>> + void *lpi_pend[NR_CPUS];
>> unsigned int irq_nr;
>> };
>> extern struct gicv3_data gicv3_data;
>> @@ -80,6 +92,10 @@ extern void gicv3_write_eoir(u32 irqstat);
>> extern void gicv3_ipi_send_single(int irq, int cpu);
>> extern void gicv3_ipi_send_mask(int irq, const cpumask_t *dest);
>> extern void gicv3_set_redist_base(size_t stride);
>> +extern void gicv3_lpi_set_config(int n, u8 val);
>> +extern u8 gicv3_lpi_get_config(int n);
>> +extern void gicv3_lpi_set_pending_table_bit(int rdist, int n, bool set);
>> +extern void gicv3_lpi_alloc_tables(void);
>> static inline void gicv3_do_wait_for_rwp(void *base)
>> {
>> diff --git a/lib/arm/gic-v3.c b/lib/arm/gic-v3.c
>> index feecb5e..c33f883 100644
>> --- a/lib/arm/gic-v3.c
>> +++ b/lib/arm/gic-v3.c
>> @@ -5,6 +5,7 @@
>> */
>> #include <asm/gic.h>
>> #include <asm/io.h>
>> +#include <alloc_page.h>
>> void gicv3_set_redist_base(size_t stride)
>> {
>> @@ -147,3 +148,66 @@ void gicv3_ipi_send_single(int irq, int cpu)
>> cpumask_set_cpu(cpu, &dest);
>> gicv3_ipi_send_mask(irq, &dest);
>> }
>> +
>> +#if defined(__aarch64__)
>> +/* alloc_lpi_tables: Allocate LPI config and pending tables */
>> +void gicv3_lpi_alloc_tables(void)
>> +{
>> + unsigned long n = SZ_64K >> PAGE_SHIFT;
>> + unsigned long order = fls(n);
>> + u64 prop_val;
>> + int cpu;
>> +
>> + gicv3_data.lpi_prop = (void *)virt_to_phys(alloc_pages(order));
>> +
>> + /* ID bits = 13, ie. up to 14b LPI INTID */
>> + prop_val = (u64)gicv3_data.lpi_prop | 13;
>> +
>> + /*
>> + * Allocate pending tables for each redistributor
>> + * and set PROPBASER and PENDBASER
>> + */
>> + for_each_present_cpu(cpu) {
>> + u64 pend_val;
>> + void *ptr;
>> +
>> + ptr = gicv3_data.redist_base[cpu];
>> +
>> + writeq(prop_val, ptr + GICR_PROPBASER);
>> +
>> + gicv3_data.lpi_pend[cpu] = (void
>> *)virt_to_phys(alloc_pages(order));
>> +
>> + pend_val = (u64)gicv3_data.lpi_pend[cpu];
>> +
>> + writeq(pend_val, ptr + GICR_PENDBASER);
>> + }
>> +}
>> +
>> +void gicv3_lpi_set_config(int n, u8 value)
>> +{
>> + u8 *entry = (u8 *)(gicv3_data.lpi_prop + (n - 8192));
>
> But this is actually the *physical* address, shouldn't it be
> converted by phys_to_virt() before reading/writing something?
> Like what you've done for the 'lpi_pend[rdist]' before writing
> pending bit. Or I'm missing some points here?
Agreed! Thanks
Eric
>
>> +
>> + *entry = value;
>> +}
>> +
>> +u8 gicv3_lpi_get_config(int n)
>> +{
>> + u8 *entry = (u8 *)(gicv3_data.lpi_prop + (n - 8192));
>
> The same as above.
>
>
> Thanks,
> Zenghui
>
>> +
>> + return *entry;
>> +}
>> +
>> +void gicv3_lpi_set_pending_table_bit(int rdist, int n, bool set)
>> +{
>> + u8 *ptr = phys_to_virt((phys_addr_t)gicv3_data.lpi_pend[rdist]);
>> + u8 mask = 1 << (n % 8), byte;
>> +
>> + ptr += (n / 8);
>> + byte = *ptr;
>> + if (set)
>> + byte |= mask;
>> + else
>> + byte &= ~mask;
>> + *ptr = byte;
>> +}
>> +#endif /* __aarch64__ */
>>
>
On Tue, Jan 28, 2020 at 11:34:51AM +0100, Eric Auger wrote:
> Allocate the LPI configuration and per re-distributor pending table.
> Set redistributor's PROPBASER and PENDBASER. The LPIs are enabled
> by default in the config table.
>
> Also introduce a helper routine that allows to set the pending table
> bit for a given LPI.
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
>
> ---
>
> v2 -> v3:
> - Move the helpers in lib/arm/gic-v3.c and prefix them with "gicv3_"
> and add _lpi prefix too
>
> v1 -> v2:
> - remove memory attributes
> ---
> lib/arm/asm/gic-v3.h | 16 +++++++++++
> lib/arm/gic-v3.c | 64 ++++++++++++++++++++++++++++++++++++++++++++
> 2 files changed, 80 insertions(+)
>
> diff --git a/lib/arm/asm/gic-v3.h b/lib/arm/asm/gic-v3.h
> index ffb2e26..ec2a6f0 100644
> --- a/lib/arm/asm/gic-v3.h
> +++ b/lib/arm/asm/gic-v3.h
> @@ -48,6 +48,16 @@
> #define MPIDR_TO_SGI_AFFINITY(cluster_id, level) \
> (MPIDR_AFFINITY_LEVEL(cluster_id, level) << ICC_SGI1R_AFFINITY_## level ## _SHIFT)
>
> +#define GICR_PROPBASER_IDBITS_MASK (0x1f)
> +
> +#define GICR_PENDBASER_PTZ BIT_ULL(62)
Strange indent here, too far and not tabs
> +
> +#define LPI_PROP_GROUP1 (1 << 1)
> +#define LPI_PROP_ENABLED (1 << 0)
> +#define LPI_PROP_DEFAULT_PRIO 0xa0
> +#define LPI_PROP_DEFAULT (LPI_PROP_DEFAULT_PRIO | LPI_PROP_GROUP1 | \
> + LPI_PROP_ENABLED)
> +
> #include <asm/arch_gicv3.h>
>
> #ifndef __ASSEMBLY__
> @@ -64,6 +74,8 @@ struct gicv3_data {
> void *dist_base;
> void *redist_bases[GICV3_NR_REDISTS];
> void *redist_base[NR_CPUS];
> + void *lpi_prop;
> + void *lpi_pend[NR_CPUS];
> unsigned int irq_nr;
> };
> extern struct gicv3_data gicv3_data;
> @@ -80,6 +92,10 @@ extern void gicv3_write_eoir(u32 irqstat);
> extern void gicv3_ipi_send_single(int irq, int cpu);
> extern void gicv3_ipi_send_mask(int irq, const cpumask_t *dest);
> extern void gicv3_set_redist_base(size_t stride);
> +extern void gicv3_lpi_set_config(int n, u8 val);
> +extern u8 gicv3_lpi_get_config(int n);
> +extern void gicv3_lpi_set_pending_table_bit(int rdist, int n, bool set);
> +extern void gicv3_lpi_alloc_tables(void);
>
> static inline void gicv3_do_wait_for_rwp(void *base)
> {
> diff --git a/lib/arm/gic-v3.c b/lib/arm/gic-v3.c
> index feecb5e..c33f883 100644
> --- a/lib/arm/gic-v3.c
> +++ b/lib/arm/gic-v3.c
> @@ -5,6 +5,7 @@
> */
> #include <asm/gic.h>
> #include <asm/io.h>
> +#include <alloc_page.h>
>
> void gicv3_set_redist_base(size_t stride)
> {
> @@ -147,3 +148,66 @@ void gicv3_ipi_send_single(int irq, int cpu)
> cpumask_set_cpu(cpu, &dest);
> gicv3_ipi_send_mask(irq, &dest);
> }
> +
> +#if defined(__aarch64__)
> +/* alloc_lpi_tables: Allocate LPI config and pending tables */
> +void gicv3_lpi_alloc_tables(void)
> +{
> + unsigned long n = SZ_64K >> PAGE_SHIFT;
> + unsigned long order = fls(n);
> + u64 prop_val;
> + int cpu;
> +
> + gicv3_data.lpi_prop = (void *)virt_to_phys(alloc_pages(order));
> +
> + /* ID bits = 13, ie. up to 14b LPI INTID */
> + prop_val = (u64)gicv3_data.lpi_prop | 13;
> +
> + /*
> + * Allocate pending tables for each redistributor
> + * and set PROPBASER and PENDBASER
> + */
> + for_each_present_cpu(cpu) {
> + u64 pend_val;
> + void *ptr;
> +
> + ptr = gicv3_data.redist_base[cpu];
> +
> + writeq(prop_val, ptr + GICR_PROPBASER);
> +
> + gicv3_data.lpi_pend[cpu] = (void *)virt_to_phys(alloc_pages(order));
> +
> + pend_val = (u64)gicv3_data.lpi_pend[cpu];
> +
> + writeq(pend_val, ptr + GICR_PENDBASER);
nit: probably don't need all the blank lines
> + }
> +}
> +
> +void gicv3_lpi_set_config(int n, u8 value)
> +{
> + u8 *entry = (u8 *)(gicv3_data.lpi_prop + (n - 8192));
> +
> + *entry = value;
> +}
> +
> +u8 gicv3_lpi_get_config(int n)
> +{
> + u8 *entry = (u8 *)(gicv3_data.lpi_prop + (n - 8192));
> +
> + return *entry;
> +}
We probably need a define for the 8192. LPI_ID_BASE? And, like PPI and SPI
maybe we need an LPI(id)? '#define LPI(id) ((id) + LPI_ID_BASE)'?
Also, is lpi_prop an array of u8's? If so, then I'd think we could
declare it as a u8 * in gicv3_data. Then, instead of the above two
functions just do something like
#define gicv3_lpi_set_config(n, val) ({
gicv3_data.lpi_prop[n] = (val);
})
#define gicv3_lpi_get_config(n) (gicv3_data.lpi_prop[n])
> +
> +void gicv3_lpi_set_pending_table_bit(int rdist, int n, bool set)
These types of functions that can be used both as a setter and clearer
usually have a name like foo_set_clr_bar(). That would make this long
name a bit longer, but do we need the '_table_bit' part of the name?
> +{
> + u8 *ptr = phys_to_virt((phys_addr_t)gicv3_data.lpi_pend[rdist]);
If lpi_pend is a physical address then why not declare it like that
in gicv3_data, i.e. phys_addr_t lpi_pend[NR_CPUS] ?
> + u8 mask = 1 << (n % 8), byte;
> +
> + ptr += (n / 8);
> + byte = *ptr;
And Zenghui already pointed out that this doesn't look right for
a physical address.
> + if (set)
> + byte |= mask;
> + else
> + byte &= ~mask;
> + *ptr = byte;
> +}
> +#endif /* __aarch64__ */
> --
> 2.20.1
>
>
Thanks,
drew
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