riscv: Fix defination of TW bits in mstatus CSR

[PATCH] riscv: Fix defination of TW bits in mstatus CSR

Ian Jiang posted 1 patch 4 years, 3 months ago

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git fetch https://github.com/patchew-project/qemu tags/patchew/20200120085817.7000-1-ianjiang.ict@gmail.com

Maintainers: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>, Palmer Dabbelt <palmer@dabbelt.com>, Sagar Karandikar <sagark@eecs.berkeley.edu>, Alistair Francis <Alistair.Francis@wdc.com>

target/riscv/cpu_bits.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

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[PATCH] riscv: Fix defination of TW bits in mstatus CSR

Posted by Ian Jiang 4 years, 3 months ago

The origin defination of TW bits in mstatus is not correct.
This patch fixes the problem.

Signed-off-by: Ian Jiang <ianjiang.ict@gmail.com>
---
 target/riscv/cpu_bits.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/riscv/cpu_bits.h b/target/riscv/cpu_bits.h
index e99834856c..fb2e0b340e 100644
--- a/target/riscv/cpu_bits.h
+++ b/target/riscv/cpu_bits.h
@@ -349,7 +349,7 @@
 #define MSTATUS_MXR         0x00080000
 #define MSTATUS_VM          0x1F000000 /* until: priv-1.9.1 */
 #define MSTATUS_TVM         0x00100000 /* since: priv-1.10 */
-#define MSTATUS_TW          0x20000000 /* since: priv-1.10 */
+#define MSTATUS_TW          0x00200000 /* since: priv-1.10 */
 #define MSTATUS_TSR         0x40000000 /* since: priv-1.10 */
 #define MSTATUS_MTL         0x4000000000ULL
 #define MSTATUS_MPV         0x8000000000ULL
-- 
2.17.1

Re: [PATCH] riscv: Fix defination of TW bits in mstatus CSR

Posted by Alistair Francis 4 years, 3 months ago

On Mon, Jan 20, 2020 at 6:59 PM Ian Jiang <ianjiang.ict@gmail.com> wrote:
>
> The origin defination of TW bits in mstatus is not correct.
> This patch fixes the problem.
>
> Signed-off-by: Ian Jiang <ianjiang.ict@gmail.com>

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>  target/riscv/cpu_bits.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/target/riscv/cpu_bits.h b/target/riscv/cpu_bits.h
> index e99834856c..fb2e0b340e 100644
> --- a/target/riscv/cpu_bits.h
> +++ b/target/riscv/cpu_bits.h
> @@ -349,7 +349,7 @@
>  #define MSTATUS_MXR         0x00080000
>  #define MSTATUS_VM          0x1F000000 /* until: priv-1.9.1 */
>  #define MSTATUS_TVM         0x00100000 /* since: priv-1.10 */
> -#define MSTATUS_TW          0x20000000 /* since: priv-1.10 */
> +#define MSTATUS_TW          0x00200000 /* since: priv-1.10 */
>  #define MSTATUS_TSR         0x40000000 /* since: priv-1.10 */
>  #define MSTATUS_MTL         0x4000000000ULL
>  #define MSTATUS_MPV         0x8000000000ULL
> --
> 2.17.1
>
>