target/arm: Fix ISSIs16Bit

[PATCH v2 0/2] target/arm: Fix ISSIs16Bit

Richard Henderson posted 2 patches 4 years, 3 months ago

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git fetch https://github.com/patchew-project/qemu tags/patchew/20200117004618.2742-1-richard.henderson@linaro.org

Maintainers: Peter Maydell <peter.maydell@linaro.org>

target/arm/tlb_helper.c | 2 +-
target/arm/translate.c  | 3 +++
2 files changed, 4 insertions(+), 1 deletion(-)

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[PATCH v2 0/2] target/arm: Fix ISSIs16Bit

Posted by Richard Henderson 4 years, 3 months ago

Changes in v2:
  - Include the merge_syn_data_abort fix, as a self-contained patch.


r~


Jeff Kubascik (1):
  target/arm: Return correct IL bit in merge_syn_data_abort

Richard Henderson (1):
  target/arm: Set ISSIs16Bit in make_issinfo

 target/arm/tlb_helper.c | 2 +-
 target/arm/translate.c  | 3 +++
 2 files changed, 4 insertions(+), 1 deletion(-)

-- 
2.20.1

Re: [PATCH v2 0/2] target/arm: Fix ISSIs16Bit

Posted by Peter Maydell 4 years, 3 months ago

On Fri, 17 Jan 2020 at 00:46, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> Changes in v2:
>   - Include the merge_syn_data_abort fix, as a self-contained patch.
>
>
> r~
>

Applied to target-arm.next, thanks. (I didn't cc stable
since it turns out this has been a bug since forever rather
than a new regression introduced by the decodetree conversion.)

-- PMM