There are linux-user users of semihosting so we'd better check things
work for them as well.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
 tests/tcg/arm/semiconsole.c   | 47 +++++++++++++++++++++++++++++++++++
 tests/tcg/arm/Makefile.target |  7 ++++++
 2 files changed, 54 insertions(+)
 create mode 100644 tests/tcg/arm/semiconsole.c

diff --git a/tests/tcg/arm/semiconsole.c b/tests/tcg/arm/semiconsole.c
new file mode 100644
index 00000000000..cc9266b87df
--- /dev/null
+++ b/tests/tcg/arm/semiconsole.c
@@ -0,0 +1,47 @@
+/*
+ * linux-user semihosting console
+ *
+ * Copyright (c) 2019
+ * Written by Alex Bennée <alex.bennee@linaro.org>
+ *
+ * SPDX-License-Identifier: GPL-3.0-or-later
+ */
+
+#include <stdio.h>
+#include <stdint.h>
+
+#define SYS_READC  0x7
+
+uintptr_t __semi_call(uintptr_t type, uintptr_t arg0)
+{
+#if defined(__arm__)
+    register uintptr_t t asm("r0") = type;
+    register uintptr_t a0 asm("r1") = arg0;
+    asm("svc 0xab"
+        : "=r" (t)
+        : "r" (t), "r" (a0));
+#else
+    register uintptr_t t asm("x0") = type;
+    register uintptr_t a0 asm("x1") = arg0;
+    asm("hlt 0xf000"
+        : "=r" (t)
+        : "r" (t), "r" (a0));
+#endif
+
+    return t;
+}
+
+int main(void)
+{
+    char c;
+
+    printf("Semihosting Console Test\n");
+    printf("hit X to exit:");
+
+    do {
+        c = __semi_call(SYS_READC, 0);
+        printf("got '%c'\n", c);
+    } while (c != 'X');
+
+    return 0;
+}
diff --git a/tests/tcg/arm/Makefile.target b/tests/tcg/arm/Makefile.target
index 0765f37ff04..997e6e78ed9 100644
--- a/tests/tcg/arm/Makefile.target
+++ b/tests/tcg/arm/Makefile.target
@@ -40,6 +40,13 @@ run-plugin-semihosting-with-%:
 		 $(call strip-plugin,$<) 2> $<.err, \
 		"$< on $(TARGET_NAME) with $*")
 
+ARM_TESTS += semiconsole
+run-semiconsole: semiconsole
+	$(call skip-test, $<, "MANUAL ONLY")
+
+run-semiconsole-with-%:
+	$(call skip-test, $<, "MANUAL ONLY")
+
 TESTS += $(ARM_TESTS)
 
 # On ARM Linux only supports 4k pages
-- 
2.20.1

On 12/21/19 12:22 AM, Alex Bennée wrote:
> +#if defined(__arm__)
> +    register uintptr_t t asm("r0") = type;
> +    register uintptr_t a0 asm("r1") = arg0;
> +    asm("svc 0xab"
> +        : "=r" (t)
> +        : "r" (t), "r" (a0));

This is the #ifdef __thumb__ svc code.  Are you enforcing that with
command-line arguments?

Might as well fix this, then test both arm and thumb.


r~

Richard Henderson <richard.henderson@linaro.org> writes:

> On 12/21/19 12:22 AM, Alex Bennée wrote:
>> +#if defined(__arm__)
>> +    register uintptr_t t asm("r0") = type;
>> +    register uintptr_t a0 asm("r1") = arg0;
>> +    asm("svc 0xab"
>> +        : "=r" (t)
>> +        : "r" (t), "r" (a0));
>
> This is the #ifdef __thumb__ svc code.  Are you enforcing that with
> command-line arguments?

No it is dealing with aarch64 vs 32 bit and the __arm__ is a compiler
symbol. 

>
> Might as well fix this, then test both arm and thumb.

I've enabled for Aarch64 just like the semihosting test.

>
>
> r~


-- 
Alex Bennée

On 1/8/20 12:27 AM, Alex Bennée wrote:
> 
> Richard Henderson <richard.henderson@linaro.org> writes:
> 
>> On 12/21/19 12:22 AM, Alex Bennée wrote:
>>> +#if defined(__arm__)
>>> +    register uintptr_t t asm("r0") = type;
>>> +    register uintptr_t a0 asm("r1") = arg0;
>>> +    asm("svc 0xab"
>>> +        : "=r" (t)
>>> +        : "r" (t), "r" (a0));
>>
>> This is the #ifdef __thumb__ svc code.  Are you enforcing that with
>> command-line arguments?
> 
> No it is dealing with aarch64 vs 32 bit and the __arm__ is a compiler
> symbol. 

I know that.  But you're obviously assuming that the arm compiler is defaulting
to thumb mode, not arm mode, otherwise this doesn't work.

You need to test

#ifdef __arm__
# ifdef __thumb__
#  define SVC  "svc 0xab"
# else
#  define SVC  "svc 0x123456"
# endif
    register ...
    asm(SVC : ...);
#else
    // aarch64
#endif

And run the compiler with -mthumb and -marm to test both.


r~