target/i386: Export TAA_NO bit to guests

[PATCH] target/i386: Export TAA_NO bit to guests

Pawan Gupta posted 1 patch 6 years, 2 months ago

Download mbox

Test asan passed

Test checkpatch passed

Test FreeBSD passed

Test docker-mingw@fedora passed

Test docker-clang@ubuntu passed

Test docker-quick@centos7 passed

Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20191119072327.GA30825@guptapadev.amr

Maintainers: Paolo Bonzini <pbonzini@redhat.com>, Eduardo Habkost <ehabkost@redhat.com>, Richard Henderson <rth@twiddle.net>

target/i386/cpu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

Expand all Fold all

[PATCH] target/i386: Export TAA_NO bit to guests

Posted by Pawan Gupta 6 years, 2 months ago

TSX Async Abort (TAA) is a side channel attack on internal buffers in
some Intel processors similar to Microachitectural Data Sampling (MDS).

Some future Intel processors will use the ARCH_CAP_TAA_NO bit in the
IA32_ARCH_CAPABILITIES MSR to report that they are not vulnerable to
TAA. Make this bit available to guests.

Signed-off-by: Pawan Gupta <pawan.kumar.gupta@linux.intel.com>
---
 target/i386/cpu.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index a624163ac2cd..af84b04951cf 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -1205,7 +1205,7 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
         .feat_names = {
             "rdctl-no", "ibrs-all", "rsba", "skip-l1dfl-vmentry",
             "ssb-no", "mds-no", NULL, NULL,
-            NULL, NULL, NULL, NULL,
+            "taa-no", NULL, NULL, NULL,
             NULL, NULL, NULL, NULL,
             NULL, NULL, NULL, NULL,
             NULL, NULL, NULL, NULL,
-- 
2.21.0

Re: [PATCH] target/i386: Export TAA_NO bit to guests

Posted by Paolo Bonzini 6 years, 2 months ago

On 19/11/19 08:23, Pawan Gupta wrote:
> TSX Async Abort (TAA) is a side channel attack on internal buffers in
> some Intel processors similar to Microachitectural Data Sampling (MDS).
> 
> Some future Intel processors will use the ARCH_CAP_TAA_NO bit in the
> IA32_ARCH_CAPABILITIES MSR to report that they are not vulnerable to
> TAA. Make this bit available to guests.
> 
> Signed-off-by: Pawan Gupta <pawan.kumar.gupta@linux.intel.com>
> ---
>  target/i386/cpu.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/target/i386/cpu.c b/target/i386/cpu.c
> index a624163ac2cd..af84b04951cf 100644
> --- a/target/i386/cpu.c
> +++ b/target/i386/cpu.c
> @@ -1205,7 +1205,7 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
>          .feat_names = {
>              "rdctl-no", "ibrs-all", "rsba", "skip-l1dfl-vmentry",
>              "ssb-no", "mds-no", NULL, NULL,
> -            NULL, NULL, NULL, NULL,
> +            "taa-no", NULL, NULL, NULL,
>              NULL, NULL, NULL, NULL,
>              NULL, NULL, NULL, NULL,
>              NULL, NULL, NULL, NULL,
> 

Queued, thanks.

Paolo