On Fri, 15 Nov 2019 15:53:51 +0800
Tao Xu <tao3.xu@intel.com> wrote:
> Check configuring HMAT usecase
>
> Suggested-by: Igor Mammedov <imammedo@redhat.com>
> Signed-off-by: Tao Xu <tao3.xu@intel.com>
> ---
>
> New patch in v16.
> ---
> tests/numa-test.c | 51 +++++++++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 51 insertions(+)
I'd also add X-FAIL variants here, to test fail conditions.
Taking in account that QMP interface returns error without
affecting QEMU state, you can do it within one test case without
restarting it on every fail scenario.
(just add appropriate comments so reader would know that you are
testing this and that failure path)
So I'd first test x-fail variants and then finish test with
valid configuration.
>
> diff --git a/tests/numa-test.c b/tests/numa-test.c
> index 8de8581231..15889c26c0 100644
> --- a/tests/numa-test.c
> +++ b/tests/numa-test.c
> @@ -327,6 +327,56 @@ static void pc_dynamic_cpu_cfg(const void *data)
> qtest_quit(qs);
> }
>
> +static void pc_build_hmat_cfg(const void *data)
> +{
> + QTestState *qs;
> +
> + qs = qtest_initf("%s -nodefaults --preconfig -machine hmat=on "
> + "-smp 2,sockets=2 "
> + "-m 128M,slots=2,maxmem=1G "
> + "-object memory-backend-ram,size=64M,id=m0 "
> + "-object memory-backend-ram,size=64M,id=m1 "
> + "-numa node,nodeid=0,memdev=m0 "
> + "-numa node,nodeid=1,memdev=m1,initiator=0 "
> + "-numa cpu,node-id=0,socket-id=0 "
> + "-numa cpu,node-id=0,socket-id=1",
> + data ? (char *)data : "");
> +
> + /* Configuring HMAT bandwidth and latency details */
> + g_assert(!qmp_rsp_is_err(qtest_qmp(qs, "{ 'execute': 'set-numa-node',"
> + " 'arguments': { 'type': 'hmat-lb', 'initiator': 0, 'target': 0,"
> + " 'hierarchy': \"memory\", 'data-type': \"access-latency\","
> + " 'latency': 5 } }")));
> + g_assert(!qmp_rsp_is_err(qtest_qmp(qs, "{ 'execute': 'set-numa-node',"
> + " 'arguments': { 'type': 'hmat-lb', 'initiator': 0, 'target': 0,"
> + " 'hierarchy': \"memory\", 'data-type': \"access-bandwidth\","
> + " 'bandwidth': 524288000 } }")));
> + g_assert(!qmp_rsp_is_err(qtest_qmp(qs, "{ 'execute': 'set-numa-node',"
> + " 'arguments': { 'type': 'hmat-lb', 'initiator': 0, 'target': 1,"
> + " 'hierarchy': \"memory\", 'data-type': \"access-latency\","
> + " 'latency': 10 } }")));
> + g_assert(!qmp_rsp_is_err(qtest_qmp(qs, "{ 'execute': 'set-numa-node',"
> + " 'arguments': { 'type': 'hmat-lb', 'initiator': 0, 'target': 1,"
> + " 'hierarchy': \"memory\", 'data-type': \"access-bandwidth\","
> + " 'bandwidth': 104857600 } }")));
> +
> + /* Configuring HMAT memory side cache attributes */
> + g_assert(!qmp_rsp_is_err(qtest_qmp(qs, "{ 'execute': 'set-numa-node',"
> + " 'arguments': { 'type': 'hmat-cache', 'node-id': 0, 'size': 10240,"
> + " 'level': 1, 'assoc': \"direct\", 'policy': \"write-back\","
> + " 'line': 8 } }")));
> + g_assert(!qmp_rsp_is_err(qtest_qmp(qs, "{ 'execute': 'set-numa-node',"
> + " 'arguments': { 'type': 'hmat-cache', 'node-id': 1, 'size': 10240,"
> + " 'level': 1, 'assoc': \"direct\", 'policy': \"write-back\","
> + " 'line': 8 } }")));
> +
> + /* let machine initialization to complete and run */
> + g_assert(!qmp_rsp_is_err(qtest_qmp(qs, "{ 'execute': 'x-exit-preconfig' }")));
> + qtest_qmp_eventwait(qs, "RESUME");
> +
> + qtest_quit(qs);
> +}
> +
> int main(int argc, char **argv)
> {
> const char *args = NULL;
> @@ -346,6 +396,7 @@ int main(int argc, char **argv)
> if (!strcmp(arch, "i386") || !strcmp(arch, "x86_64")) {
> qtest_add_data_func("/numa/pc/cpu/explicit", args, pc_numa_cpu);
> qtest_add_data_func("/numa/pc/dynamic/cpu", args, pc_dynamic_cpu_cfg);
> + qtest_add_data_func("/numa/pc/build/hmat", args, pc_build_hmat_cfg);
> }
>
> if (!strcmp(arch, "ppc64")) {