| 1 | The following changes since commit 654efcb511d394c1d3f5292c28503d1d19e5b1d3: | 1 | My tcg patch queue, plus one mips patch on request of Aleksander. |
|---|---|---|---|
| 2 | 2 | ||
| 3 | Merge remote-tracking branch 'remotes/vivier/tags/q800-branch-pull-request' into staging (2019-11-11 09:23:46 +0000) | 3 | |
| 4 | r~ | ||
| 5 | |||
| 6 | |||
| 7 | The following changes since commit 5acad5bf480321f178866dc28e38eeda5a3f19bb: | ||
| 8 | |||
| 9 | Merge remote-tracking branch 'remotes/jnsnow/tags/ide-pull-request' into staging (2020-03-28 00:27:04 +0000) | ||
| 4 | 10 | ||
| 5 | are available in the Git repository at: | 11 | are available in the Git repository at: |
| 6 | 12 | ||
| 7 | https://github.com/rth7680/qemu.git tags/pull-tcg-20191111 | 13 | https://github.com/rth7680/qemu.git tags/pull-tcg-20200330 |
| 8 | 14 | ||
| 9 | for you to fetch changes up to cb974c95df0e1c9e73a37facd3e13894bd3eedc2: | 15 | for you to fetch changes up to b412378785c1bd95e3461c1373dd8938bc54fb4e: |
| 10 | 16 | ||
| 11 | tcg/LICENSE: Remove out of date claim about TCG subdirectory licensing (2019-11-11 15:11:21 +0100) | 17 | decodetree: Use Python3 floor division operator (2020-03-30 11:44:04 -0700) |
| 12 | 18 | ||
| 13 | ---------------------------------------------------------------- | 19 | ---------------------------------------------------------------- |
| 14 | Remove no-longer-true statement that TCG is BSD-licensed | 20 | Improve PIE and other linkage |
| 21 | Fix for decodetree vs Python3 floor division operator | ||
| 22 | Fix i386 INDEX_op_dup2_vec expansion | ||
| 23 | Fix loongson multimedia condition instructions | ||
| 15 | 24 | ||
| 16 | ---------------------------------------------------------------- | 25 | ---------------------------------------------------------------- |
| 17 | Peter Maydell (4): | 26 | Jiaxun Yang (1): |
| 18 | tcg/aarch64/tcg-target.opc.h: Add copyright/license | 27 | target/mips: Fix loongson multimedia condition instructions |
| 19 | tcg/i386/tcg-target.opc.h: Add copyright/license | ||
| 20 | tcg/ppc/tcg-target.opc.h: Add copyright/license | ||
| 21 | tcg/LICENSE: Remove out of date claim about TCG subdirectory licensing | ||
| 22 | 28 | ||
| 23 | tcg/aarch64/tcg-target.opc.h | 15 ++++++++++++--- | 29 | Philippe Mathieu-Daudé (1): |
| 24 | tcg/i386/tcg-target.opc.h | 28 +++++++++++++++++++++++++--- | 30 | decodetree: Use Python3 floor division operator |
| 25 | tcg/ppc/tcg-target.opc.h | 20 ++++++++++++++++++++ | ||
| 26 | LICENSE | 5 +++-- | ||
| 27 | tcg/LICENSE | 3 --- | ||
| 28 | 5 files changed, 60 insertions(+), 11 deletions(-) | ||
| 29 | delete mode 100644 tcg/LICENSE | ||
| 30 | 31 | ||
| 32 | Richard Henderson (8): | ||
| 33 | configure: Drop adjustment of textseg | ||
| 34 | tcg: Remove softmmu code_gen_buffer fixed address | ||
| 35 | configure: Do not force pie=no for non-x86 | ||
| 36 | configure: Always detect -no-pie toolchain support | ||
| 37 | configure: Unnest detection of -z,relro and -z,now | ||
| 38 | configure: Override the os default with --disable-pie | ||
| 39 | configure: Support -static-pie if requested | ||
| 40 | tcg/i386: Fix INDEX_op_dup2_vec | ||
| 41 | |||
| 42 | configure | 116 +++++++++++++--------------------------------- | ||
| 43 | Makefile | 2 +- | ||
| 44 | accel/tcg/translate-all.c | 37 ++------------- | ||
| 45 | target/mips/translate.c | 35 ++++++++++++-- | ||
| 46 | tcg/i386/tcg-target.inc.c | 10 ++-- | ||
| 47 | scripts/decodetree.py | 4 +- | ||
| 48 | 6 files changed, 78 insertions(+), 126 deletions(-) | ||
| 49 | diff view generated by jsdifflib |
New patch | |||
|---|---|---|---|
| 1 | This adjustment was random and unnecessary. The user mode | ||
| 2 | startup code in probe_guest_base() will choose a value for | ||
| 3 | guest_base that allows the host qemu binary to not conflict | ||
| 4 | with the guest binary. | ||
| 1 | 5 | ||
| 6 | With modern distributions, this isn't even used, as the default | ||
| 7 | is PIE, which does the same job in a more portable way. | ||
| 8 | |||
| 9 | Reviewed-by: Alex Bennée <alex.bennee@linaro.org> | ||
| 10 | Reviewed-by: Thomas Huth <thuth@redhat.com> | ||
| 11 | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> | ||
| 12 | --- | ||
| 13 | v2: Remove mention of config-host.ld from make distclean | ||
| 14 | --- | ||
| 15 | configure | 47 ----------------------------------------------- | ||
| 16 | Makefile | 2 +- | ||
| 17 | 2 files changed, 1 insertion(+), 48 deletions(-) | ||
| 18 | |||
| 19 | diff --git a/configure b/configure | ||
| 20 | index XXXXXXX..XXXXXXX 100755 | ||
| 21 | --- a/configure | ||
| 22 | +++ b/configure | ||
| 23 | @@ -XXX,XX +XXX,XX @@ if test "$cpu" = "s390x" ; then | ||
| 24 | fi | ||
| 25 | fi | ||
| 26 | |||
| 27 | -# Probe for the need for relocating the user-only binary. | ||
| 28 | -if ( [ "$linux_user" = yes ] || [ "$bsd_user" = yes ] ) && [ "$pie" = no ]; then | ||
| 29 | - textseg_addr= | ||
| 30 | - case "$cpu" in | ||
| 31 | - arm | i386 | ppc* | s390* | sparc* | x86_64 | x32) | ||
| 32 | - # ??? Rationale for choosing this address | ||
| 33 | - textseg_addr=0x60000000 | ||
| 34 | - ;; | ||
| 35 | - mips) | ||
| 36 | - # A 256M aligned address, high in the address space, with enough | ||
| 37 | - # room for the code_gen_buffer above it before the stack. | ||
| 38 | - textseg_addr=0x60000000 | ||
| 39 | - ;; | ||
| 40 | - esac | ||
| 41 | - if [ -n "$textseg_addr" ]; then | ||
| 42 | - cat > $TMPC <<EOF | ||
| 43 | - int main(void) { return 0; } | ||
| 44 | -EOF | ||
| 45 | - textseg_ldflags="-Wl,-Ttext-segment=$textseg_addr" | ||
| 46 | - if ! compile_prog "" "$textseg_ldflags"; then | ||
| 47 | - # In case ld does not support -Ttext-segment, edit the default linker | ||
| 48 | - # script via sed to set the .text start addr. This is needed on FreeBSD | ||
| 49 | - # at least. | ||
| 50 | - if ! $ld --verbose >/dev/null 2>&1; then | ||
| 51 | - error_exit \ | ||
| 52 | - "We need to link the QEMU user mode binaries at a" \ | ||
| 53 | - "specific text address. Unfortunately your linker" \ | ||
| 54 | - "doesn't support either the -Ttext-segment option or" \ | ||
| 55 | - "printing the default linker script with --verbose." \ | ||
| 56 | - "If you don't want the user mode binaries, pass the" \ | ||
| 57 | - "--disable-user option to configure." | ||
| 58 | - fi | ||
| 59 | - | ||
| 60 | - $ld --verbose | sed \ | ||
| 61 | - -e '1,/==================================================/d' \ | ||
| 62 | - -e '/==================================================/,$d' \ | ||
| 63 | - -e "s/[.] = [0-9a-fx]* [+] SIZEOF_HEADERS/. = $textseg_addr + SIZEOF_HEADERS/" \ | ||
| 64 | - -e "s/__executable_start = [0-9a-fx]*/__executable_start = $textseg_addr/" > config-host.ld | ||
| 65 | - textseg_ldflags="-Wl,-T../config-host.ld" | ||
| 66 | - fi | ||
| 67 | - fi | ||
| 68 | -fi | ||
| 69 | - | ||
| 70 | # Check that the C++ compiler exists and works with the C compiler. | ||
| 71 | # All the QEMU_CXXFLAGS are based on QEMU_CFLAGS. Keep this at the end to don't miss any other that could be added. | ||
| 72 | if has $cxx; then | ||
| 73 | @@ -XXX,XX +XXX,XX @@ if test "$gprof" = "yes" ; then | ||
| 74 | fi | ||
| 75 | fi | ||
| 76 | |||
| 77 | -if test "$target_linux_user" = "yes" || test "$target_bsd_user" = "yes" ; then | ||
| 78 | - ldflags="$ldflags $textseg_ldflags" | ||
| 79 | -fi | ||
| 80 | - | ||
| 81 | # Newer kernels on s390 check for an S390_PGSTE program header and | ||
| 82 | # enable the pgste page table extensions in that case. This makes | ||
| 83 | # the vm.allocate_pgste sysctl unnecessary. We enable this program | ||
| 84 | diff --git a/Makefile b/Makefile | ||
| 85 | index XXXXXXX..XXXXXXX 100644 | ||
| 86 | --- a/Makefile | ||
| 87 | +++ b/Makefile | ||
| 88 | @@ -XXX,XX +XXX,XX @@ rm -f $(MANUAL_BUILDDIR)/$1/objects.inv $(MANUAL_BUILDDIR)/$1/searchindex.js $(M | ||
| 89 | endef | ||
| 90 | |||
| 91 | distclean: clean | ||
| 92 | - rm -f config-host.mak config-host.h* config-host.ld $(DOCS) | ||
| 93 | + rm -f config-host.mak config-host.h* $(DOCS) | ||
| 94 | rm -f tests/tcg/config-*.mak | ||
| 95 | rm -f config-all-devices.mak config-all-disas.mak config.status | ||
| 96 | rm -f $(SUBDIR_DEVICES_MAK) | ||
| 97 | -- | ||
| 98 | 2.20.1 | ||
| 99 | |||
| 100 | diff view generated by jsdifflib |
New patch | |||
|---|---|---|---|
| 1 | The commentary talks about "in concert with the addresses | ||
| 2 | assigned in the relevant linker script", except there is no | ||
| 3 | linker script for softmmu, nor has there been for some time. | ||
| 1 | 4 | ||
| 5 | (Do not confuse the user-only linker script editing that was | ||
| 6 | removed in the previous patch, because user-only does not | ||
| 7 | use this code_gen_buffer allocation method.) | ||
| 8 | |||
| 9 | Reviewed-by: Alex Bennée <alex.bennee@linaro.org> | ||
| 10 | Reviewed-by: Thomas Huth <thuth@redhat.com> | ||
| 11 | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> | ||
| 12 | --- | ||
| 13 | accel/tcg/translate-all.c | 37 +++++-------------------------------- | ||
| 14 | 1 file changed, 5 insertions(+), 32 deletions(-) | ||
| 15 | |||
| 16 | diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c | ||
| 17 | index XXXXXXX..XXXXXXX 100644 | ||
| 18 | --- a/accel/tcg/translate-all.c | ||
| 19 | +++ b/accel/tcg/translate-all.c | ||
| 20 | @@ -XXX,XX +XXX,XX @@ static inline void *alloc_code_gen_buffer(void) | ||
| 21 | { | ||
| 22 | int prot = PROT_WRITE | PROT_READ | PROT_EXEC; | ||
| 23 | int flags = MAP_PRIVATE | MAP_ANONYMOUS; | ||
| 24 | - uintptr_t start = 0; | ||
| 25 | size_t size = tcg_ctx->code_gen_buffer_size; | ||
| 26 | void *buf; | ||
| 27 | |||
| 28 | - /* Constrain the position of the buffer based on the host cpu. | ||
| 29 | - Note that these addresses are chosen in concert with the | ||
| 30 | - addresses assigned in the relevant linker script file. */ | ||
| 31 | -# if defined(__PIE__) || defined(__PIC__) | ||
| 32 | - /* Don't bother setting a preferred location if we're building | ||
| 33 | - a position-independent executable. We're more likely to get | ||
| 34 | - an address near the main executable if we let the kernel | ||
| 35 | - choose the address. */ | ||
| 36 | -# elif defined(__x86_64__) && defined(MAP_32BIT) | ||
| 37 | - /* Force the memory down into low memory with the executable. | ||
| 38 | - Leave the choice of exact location with the kernel. */ | ||
| 39 | - flags |= MAP_32BIT; | ||
| 40 | - /* Cannot expect to map more than 800MB in low memory. */ | ||
| 41 | - if (size > 800u * 1024 * 1024) { | ||
| 42 | - tcg_ctx->code_gen_buffer_size = size = 800u * 1024 * 1024; | ||
| 43 | - } | ||
| 44 | -# elif defined(__sparc__) | ||
| 45 | - start = 0x40000000ul; | ||
| 46 | -# elif defined(__s390x__) | ||
| 47 | - start = 0x90000000ul; | ||
| 48 | -# elif defined(__mips__) | ||
| 49 | -# if _MIPS_SIM == _ABI64 | ||
| 50 | - start = 0x128000000ul; | ||
| 51 | -# else | ||
| 52 | - start = 0x08000000ul; | ||
| 53 | -# endif | ||
| 54 | -# endif | ||
| 55 | - | ||
| 56 | - buf = mmap((void *)start, size, prot, flags, -1, 0); | ||
| 57 | + buf = mmap(NULL, size, prot, flags, -1, 0); | ||
| 58 | if (buf == MAP_FAILED) { | ||
| 59 | return NULL; | ||
| 60 | } | ||
| 61 | |||
| 62 | #ifdef __mips__ | ||
| 63 | if (cross_256mb(buf, size)) { | ||
| 64 | - /* Try again, with the original still mapped, to avoid re-acquiring | ||
| 65 | - that 256mb crossing. This time don't specify an address. */ | ||
| 66 | + /* | ||
| 67 | + * Try again, with the original still mapped, to avoid re-acquiring | ||
| 68 | + * the same 256mb crossing. | ||
| 69 | + */ | ||
| 70 | size_t size2; | ||
| 71 | void *buf2 = mmap(NULL, size, prot, flags, -1, 0); | ||
| 72 | switch ((int)(buf2 != MAP_FAILED)) { | ||
| 73 | -- | ||
| 74 | 2.20.1 | ||
| 75 | |||
| 76 | diff view generated by jsdifflib |
New patch | |||
|---|---|---|---|
| 1 | PIE is supported on many other hosts besides x86. | ||
| 1 | 2 | ||
| 3 | The default for non-x86 is now the same as x86: pie is used | ||
| 4 | if supported, and may be forced via --enable/--disable-pie. | ||
| 5 | |||
| 6 | The original commit (40d6444e91c) said: | ||
| 7 | |||
| 8 | "Non-x86 are not changed, as they require TCG changes" | ||
| 9 | |||
| 10 | but I think that's wrong -- there's nothing about PIE that | ||
| 11 | affects TCG one way or another. | ||
| 12 | |||
| 13 | Tested on aarch64 (bionic) and ppc64le (centos 7) hosts. | ||
| 14 | |||
| 15 | Tested-by: Alex Bennée <alex.bennee@linaro.org> | ||
| 16 | Reviewed-by: Alex Bennée <alex.bennee@linaro.org> | ||
| 17 | Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> | ||
| 18 | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> | ||
| 19 | --- | ||
| 20 | configure | 10 ---------- | ||
| 21 | 1 file changed, 10 deletions(-) | ||
| 22 | |||
| 23 | diff --git a/configure b/configure | ||
| 24 | index XXXXXXX..XXXXXXX 100755 | ||
| 25 | --- a/configure | ||
| 26 | +++ b/configure | ||
| 27 | @@ -XXX,XX +XXX,XX @@ if ! compile_prog "-Werror" "" ; then | ||
| 28 | "Thread-Local Storage (TLS). Please upgrade to a version that does." | ||
| 29 | fi | ||
| 30 | |||
| 31 | -if test "$pie" = ""; then | ||
| 32 | - case "$cpu-$targetos" in | ||
| 33 | - i386-Linux|x86_64-Linux|x32-Linux|i386-OpenBSD|x86_64-OpenBSD) | ||
| 34 | - ;; | ||
| 35 | - *) | ||
| 36 | - pie="no" | ||
| 37 | - ;; | ||
| 38 | - esac | ||
| 39 | -fi | ||
| 40 | - | ||
| 41 | if test "$pie" != "no" ; then | ||
| 42 | cat > $TMPC << EOF | ||
| 43 | |||
| 44 | -- | ||
| 45 | 2.20.1 | ||
| 46 | |||
| 47 | diff view generated by jsdifflib |
New patch | |||
|---|---|---|---|
| 1 | The CFLAGS_NOPIE and LDFLAGS_NOPIE variables are used | ||
| 2 | in pc-bios/optionrom/Makefile, which has nothing to do | ||
| 3 | with the PIE setting of the main qemu executables. | ||
| 1 | 4 | ||
| 5 | This overrides any operating system default to build | ||
| 6 | all executables as PIE, which is important for ROMs. | ||
| 7 | |||
| 8 | Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> | ||
| 9 | Reviewed-by: Thomas Huth <thuth@redhat.com> | ||
| 10 | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> | ||
| 11 | --- | ||
| 12 | configure | 18 ++++++++---------- | ||
| 13 | 1 file changed, 8 insertions(+), 10 deletions(-) | ||
| 14 | |||
| 15 | diff --git a/configure b/configure | ||
| 16 | index XXXXXXX..XXXXXXX 100755 | ||
| 17 | --- a/configure | ||
| 18 | +++ b/configure | ||
| 19 | @@ -XXX,XX +XXX,XX @@ if ! compile_prog "-Werror" "" ; then | ||
| 20 | "Thread-Local Storage (TLS). Please upgrade to a version that does." | ||
| 21 | fi | ||
| 22 | |||
| 23 | -if test "$pie" != "no" ; then | ||
| 24 | - cat > $TMPC << EOF | ||
| 25 | +cat > $TMPC << EOF | ||
| 26 | |||
| 27 | #ifdef __linux__ | ||
| 28 | # define THREAD __thread | ||
| 29 | #else | ||
| 30 | # define THREAD | ||
| 31 | #endif | ||
| 32 | - | ||
| 33 | static THREAD int tls_var; | ||
| 34 | - | ||
| 35 | int main(void) { return tls_var; } | ||
| 36 | - | ||
| 37 | EOF | ||
| 38 | - # check we support --no-pie first... | ||
| 39 | - if compile_prog "-Werror -fno-pie" "-no-pie"; then | ||
| 40 | - CFLAGS_NOPIE="-fno-pie" | ||
| 41 | - LDFLAGS_NOPIE="-nopie" | ||
| 42 | - fi | ||
| 43 | |||
| 44 | +# Check we support --no-pie first; we will need this for building ROMs. | ||
| 45 | +if compile_prog "-Werror -fno-pie" "-no-pie"; then | ||
| 46 | + CFLAGS_NOPIE="-fno-pie" | ||
| 47 | + LDFLAGS_NOPIE="-no-pie" | ||
| 48 | +fi | ||
| 49 | + | ||
| 50 | +if test "$pie" != "no" ; then | ||
| 51 | if compile_prog "-fPIE -DPIE" "-pie"; then | ||
| 52 | QEMU_CFLAGS="-fPIE -DPIE $QEMU_CFLAGS" | ||
| 53 | QEMU_LDFLAGS="-pie $QEMU_LDFLAGS" | ||
| 54 | -- | ||
| 55 | 2.20.1 | ||
| 56 | |||
| 57 | diff view generated by jsdifflib |
New patch | |||
|---|---|---|---|
| 1 | There is nothing about these options that is related to PIE. | ||
| 2 | Use them unconditionally. | ||
| 1 | 3 | ||
| 4 | Reviewed-by: Alex Bennée <alex.bennee@linaro.org> | ||
| 5 | Reviewed-by: Fangrui Song <i@maskray.me> | ||
| 6 | Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> | ||
| 7 | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> | ||
| 8 | --- | ||
| 9 | v2: Do not split into two tests. | ||
| 10 | v3: Update to QEMU_LDFLAGS. | ||
| 11 | --- | ||
| 12 | configure | 9 ++++++--- | ||
| 13 | 1 file changed, 6 insertions(+), 3 deletions(-) | ||
| 14 | |||
| 15 | diff --git a/configure b/configure | ||
| 16 | index XXXXXXX..XXXXXXX 100755 | ||
| 17 | --- a/configure | ||
| 18 | +++ b/configure | ||
| 19 | @@ -XXX,XX +XXX,XX @@ if test "$pie" != "no" ; then | ||
| 20 | QEMU_CFLAGS="-fPIE -DPIE $QEMU_CFLAGS" | ||
| 21 | QEMU_LDFLAGS="-pie $QEMU_LDFLAGS" | ||
| 22 | pie="yes" | ||
| 23 | - if compile_prog "" "-Wl,-z,relro -Wl,-z,now" ; then | ||
| 24 | - QEMU_LDFLAGS="-Wl,-z,relro -Wl,-z,now $QEMU_LDFLAGS" | ||
| 25 | - fi | ||
| 26 | else | ||
| 27 | if test "$pie" = "yes"; then | ||
| 28 | error_exit "PIE not available due to missing toolchain support" | ||
| 29 | @@ -XXX,XX +XXX,XX @@ if test "$pie" != "no" ; then | ||
| 30 | fi | ||
| 31 | fi | ||
| 32 | |||
| 33 | +# Detect support for PT_GNU_RELRO + DT_BIND_NOW. | ||
| 34 | +# The combination is known as "full relro", because .got.plt is read-only too. | ||
| 35 | +if compile_prog "" "-Wl,-z,relro -Wl,-z,now" ; then | ||
| 36 | + QEMU_LDFLAGS="-Wl,-z,relro -Wl,-z,now $QEMU_LDFLAGS" | ||
| 37 | +fi | ||
| 38 | + | ||
| 39 | ########################################## | ||
| 40 | # __sync_fetch_and_and requires at least -march=i486. Many toolchains | ||
| 41 | # use i686 as default anyway, but for those that don't, an explicit | ||
| 42 | -- | ||
| 43 | 2.20.1 | ||
| 44 | |||
| 45 | diff view generated by jsdifflib |
New patch | |||
|---|---|---|---|
| 1 | Some distributions, e.g. Ubuntu 19.10, enable PIE by default. | ||
| 2 | If for some reason one wishes to build a non-pie binary, we | ||
| 3 | must provide additional options to override. | ||
| 1 | 4 | ||
| 5 | At the same time, reorg the code to an elif chain. | ||
| 6 | |||
| 7 | Reviewed-by: Alex Bennée <alex.bennee@linaro.org> | ||
| 8 | Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> | ||
| 9 | Reviewed-by: Thomas Huth <thuth@redhat.com> | ||
| 10 | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> | ||
| 11 | --- | ||
| 12 | v3: Update for QEMU_LDFLAGS. | ||
| 13 | --- | ||
| 14 | configure | 25 ++++++++++++------------- | ||
| 15 | 1 file changed, 12 insertions(+), 13 deletions(-) | ||
| 16 | |||
| 17 | diff --git a/configure b/configure | ||
| 18 | index XXXXXXX..XXXXXXX 100755 | ||
| 19 | --- a/configure | ||
| 20 | +++ b/configure | ||
| 21 | @@ -XXX,XX +XXX,XX @@ if compile_prog "-Werror -fno-pie" "-no-pie"; then | ||
| 22 | LDFLAGS_NOPIE="-no-pie" | ||
| 23 | fi | ||
| 24 | |||
| 25 | -if test "$pie" != "no" ; then | ||
| 26 | - if compile_prog "-fPIE -DPIE" "-pie"; then | ||
| 27 | - QEMU_CFLAGS="-fPIE -DPIE $QEMU_CFLAGS" | ||
| 28 | - QEMU_LDFLAGS="-pie $QEMU_LDFLAGS" | ||
| 29 | - pie="yes" | ||
| 30 | - else | ||
| 31 | - if test "$pie" = "yes"; then | ||
| 32 | - error_exit "PIE not available due to missing toolchain support" | ||
| 33 | - else | ||
| 34 | - echo "Disabling PIE due to missing toolchain support" | ||
| 35 | - pie="no" | ||
| 36 | - fi | ||
| 37 | - fi | ||
| 38 | +if test "$pie" = "no"; then | ||
| 39 | + QEMU_CFLAGS="$CFLAGS_NOPIE $QEMU_CFLAGS" | ||
| 40 | + QEMU_LDFLAGS="$LDFLAGS_NOPIE $QEMU_LDFLAGS" | ||
| 41 | +elif compile_prog "-fPIE -DPIE" "-pie"; then | ||
| 42 | + QEMU_CFLAGS="-fPIE -DPIE $QEMU_CFLAGS" | ||
| 43 | + QEMU_LDFLAGS="-pie $QEMU_LDFLAGS" | ||
| 44 | + pie="yes" | ||
| 45 | +elif test "$pie" = "yes"; then | ||
| 46 | + error_exit "PIE not available due to missing toolchain support" | ||
| 47 | +else | ||
| 48 | + echo "Disabling PIE due to missing toolchain support" | ||
| 49 | + pie="no" | ||
| 50 | fi | ||
| 51 | |||
| 52 | # Detect support for PT_GNU_RELRO + DT_BIND_NOW. | ||
| 53 | -- | ||
| 54 | 2.20.1 | ||
| 55 | |||
| 56 | diff view generated by jsdifflib |
| 1 | From: Peter Maydell <peter.maydell@linaro.org> | 1 | Recent toolchains support static and pie at the same time. |
|---|---|---|---|
| 2 | 2 | ||
| 3 | Add the copyright/license boilerplate for target/aarch64/tcg-target.opc.h. | 3 | As with normal dynamic builds, allow --static to default to PIE |
| 4 | This file has only had two commits: 14e4c1e2355473ccb29 | 4 | if supported by the toolchain. Allow --enable/--disable-pie to |
| 5 | and 79525dfd08262d8, both by the same Linaro engineer. | 5 | override the default. |
| 6 | The license is GPL-2-or-later, since that's what the | ||
| 7 | rest of tcg/aarch64 uses. | ||
| 8 | 6 | ||
| 9 | Reviewed-by: Alex Bennée <alex.bennee@linaro.org> | 7 | Reviewed-by: Alex Bennée <alex.bennee@linaro.org> |
| 10 | Reviewed-by: Richard Henderson <richard.henderson@linaro.org> | ||
| 11 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | ||
| 12 | Message-Id: <20191025155848.17362-2-peter.maydell@linaro.org> | ||
| 13 | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> | 8 | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
| 14 | --- | 9 | --- |
| 15 | tcg/aarch64/tcg-target.opc.h | 15 ++++++++++++--- | 10 | v2: Fix --disable-pie --static |
| 16 | 1 file changed, 12 insertions(+), 3 deletions(-) | 11 | v3: Update for QEMU_LDFLAGS. |
| 12 | --- | ||
| 13 | configure | 19 ++++++++++++------- | ||
| 14 | 1 file changed, 12 insertions(+), 7 deletions(-) | ||
| 17 | 15 | ||
| 18 | diff --git a/tcg/aarch64/tcg-target.opc.h b/tcg/aarch64/tcg-target.opc.h | 16 | diff --git a/configure b/configure |
| 19 | index XXXXXXX..XXXXXXX 100644 | 17 | index XXXXXXX..XXXXXXX 100755 |
| 20 | --- a/tcg/aarch64/tcg-target.opc.h | 18 | --- a/configure |
| 21 | +++ b/tcg/aarch64/tcg-target.opc.h | 19 | +++ b/configure |
| 22 | @@ -XXX,XX +XXX,XX @@ | 20 | @@ -XXX,XX +XXX,XX @@ for opt do |
| 23 | -/* Target-specific opcodes for host vector expansion. These will be | 21 | ;; |
| 24 | - emitted by tcg_expand_vec_op. For those familiar with GCC internals, | 22 | --static) |
| 25 | - consider these to be UNSPEC with names. */ | 23 | static="yes" |
| 26 | +/* | 24 | - QEMU_LDFLAGS="-static $QEMU_LDFLAGS" |
| 27 | + * Copyright (c) 2019 Linaro | 25 | QEMU_PKG_CONFIG_FLAGS="--static $QEMU_PKG_CONFIG_FLAGS" |
| 28 | + * | 26 | ;; |
| 29 | + * This work is licensed under the terms of the GNU GPL, version 2 or | 27 | --mandir=*) mandir="$optarg" |
| 30 | + * (at your option) any later version. | 28 | @@ -XXX,XX +XXX,XX @@ if test "$static" = "yes" ; then |
| 31 | + * | 29 | if test "$modules" = "yes" ; then |
| 32 | + * See the COPYING file in the top-level directory for details. | 30 | error_exit "static and modules are mutually incompatible" |
| 33 | + * | 31 | fi |
| 34 | + * Target-specific opcodes for host vector expansion. These will be | 32 | - if test "$pie" = "yes" ; then |
| 35 | + * emitted by tcg_expand_vec_op. For those familiar with GCC internals, | 33 | - error_exit "static and pie are mutually incompatible" |
| 36 | + * consider these to be UNSPEC with names. | 34 | - else |
| 37 | + */ | 35 | - pie="no" |
| 38 | 36 | - fi | |
| 39 | DEF(aa64_sshl_vec, 1, 2, 0, IMPLVEC) | 37 | fi |
| 38 | |||
| 39 | # Unconditional check for compiler __thread support | ||
| 40 | @@ -XXX,XX +XXX,XX @@ if compile_prog "-Werror -fno-pie" "-no-pie"; then | ||
| 41 | LDFLAGS_NOPIE="-no-pie" | ||
| 42 | fi | ||
| 43 | |||
| 44 | -if test "$pie" = "no"; then | ||
| 45 | +if test "$static" = "yes"; then | ||
| 46 | + if test "$pie" != "no" && compile_prog "-fPIE -DPIE" "-static-pie"; then | ||
| 47 | + QEMU_CFLAGS="-fPIE -DPIE $QEMU_CFLAGS" | ||
| 48 | + QEMU_LDFLAGS="-static-pie $QEMU_LDFLAGS" | ||
| 49 | + pie="yes" | ||
| 50 | + elif test "$pie" = "yes"; then | ||
| 51 | + error_exit "-static-pie not available due to missing toolchain support" | ||
| 52 | + else | ||
| 53 | + QEMU_LDFLAGS="-static $QEMU_LDFLAGS" | ||
| 54 | + pie="no" | ||
| 55 | + fi | ||
| 56 | +elif test "$pie" = "no"; then | ||
| 57 | QEMU_CFLAGS="$CFLAGS_NOPIE $QEMU_CFLAGS" | ||
| 58 | QEMU_LDFLAGS="$LDFLAGS_NOPIE $QEMU_LDFLAGS" | ||
| 59 | elif compile_prog "-fPIE -DPIE" "-pie"; then | ||
| 40 | -- | 60 | -- |
| 41 | 2.17.1 | 61 | 2.20.1 |
| 42 | 62 | ||
| 43 | 63 | diff view generated by jsdifflib |
| 1 | From: Peter Maydell <peter.maydell@linaro.org> | 1 | From: Jiaxun Yang <jiaxun.yang@flygoat.com> |
|---|---|---|---|
| 2 | 2 | ||
| 3 | Since 2008 the tcg/LICENSE file has not changed: it claims that | 3 | Loongson multimedia condition instructions were previously implemented as |
| 4 | everything under tcg/ is BSD-licensed. | 4 | write 0 to rd due to lack of documentation. So I just confirmed with Loongson |
| 5 | about their encoding and implemented them correctly. | ||
| 5 | 6 | ||
| 6 | This is not true and hasn't been true for years: in 2013 we | 7 | Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> |
| 7 | accepted the tcg/aarch64 target code under a GPLv2-or-later | 8 | Acked-by: Huacai Chen <chenhc@lemote.com> |
| 8 | license statement. We also have generic vector optimisation | ||
| 9 | code under the LGPL2.1-or-later, and the TCI backend is | ||
| 10 | GPLv2-or-later. Further, many of the files are not BSD | ||
| 11 | licensed but MIT licensed. | ||
| 12 | |||
| 13 | We don't really consider the tcg subdirectory to be a distinct part | ||
| 14 | of QEMU anyway. | ||
| 15 | |||
| 16 | Remove the LICENSE file, since claiming false information | ||
| 17 | about the license of the code is confusing. | ||
| 18 | |||
| 19 | Update the main project LICENSE file also to be clearer about | ||
| 20 | the licenses used by TCG. | ||
| 21 | |||
| 22 | Reviewed-by: Richard Henderson <richard.henderson@linaro.org> | 9 | Reviewed-by: Richard Henderson <richard.henderson@linaro.org> |
| 23 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | 10 | Reviewed-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> |
| 24 | Message-Id: <20191025155848.17362-5-peter.maydell@linaro.org> | 11 | Message-Id: <20200324122212.11156-1-jiaxun.yang@flygoat.com> |
| 25 | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> | 12 | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
| 26 | --- | 13 | --- |
| 27 | LICENSE | 5 +++-- | 14 | target/mips/translate.c | 35 +++++++++++++++++++++++++++++++---- |
| 28 | tcg/LICENSE | 3 --- | 15 | 1 file changed, 31 insertions(+), 4 deletions(-) |
| 29 | 2 files changed, 3 insertions(+), 5 deletions(-) | ||
| 30 | delete mode 100644 tcg/LICENSE | ||
| 31 | 16 | ||
| 32 | diff --git a/LICENSE b/LICENSE | 17 | diff --git a/target/mips/translate.c b/target/mips/translate.c |
| 33 | index XXXXXXX..XXXXXXX 100644 | 18 | index XXXXXXX..XXXXXXX 100644 |
| 34 | --- a/LICENSE | 19 | --- a/target/mips/translate.c |
| 35 | +++ b/LICENSE | 20 | +++ b/target/mips/translate.c |
| 36 | @@ -XXX,XX +XXX,XX @@ As of July 2013, contributions under version 2 of the GNU General Public | 21 | @@ -XXX,XX +XXX,XX @@ static void gen_loongson_multimedia(DisasContext *ctx, int rd, int rs, int rt) |
| 37 | License (and no later version) are only accepted for the following files | 22 | { |
| 38 | or directories: bsd-user/, linux-user/, hw/vfio/, hw/xen/xen_pt*. | 23 | uint32_t opc, shift_max; |
| 39 | 24 | TCGv_i64 t0, t1; | |
| 40 | -3) The Tiny Code Generator (TCG) is released under the BSD license | 25 | + TCGCond cond; |
| 41 | - (see license headers in files). | 26 | |
| 42 | +3) The Tiny Code Generator (TCG) is mostly under the BSD or MIT licenses; | 27 | opc = MASK_LMI(ctx->opcode); |
| 43 | + but some parts may be GPLv2 or other licenses. Again, see the | 28 | switch (opc) { |
| 44 | + specific licensing information in each source file. | 29 | @@ -XXX,XX +XXX,XX @@ static void gen_loongson_multimedia(DisasContext *ctx, int rd, int rs, int rt) |
| 45 | 30 | ||
| 46 | 4) QEMU is a trademark of Fabrice Bellard. | 31 | case OPC_SEQU_CP2: |
| 47 | 32 | case OPC_SEQ_CP2: | |
| 48 | diff --git a/tcg/LICENSE b/tcg/LICENSE | 33 | + cond = TCG_COND_EQ; |
| 49 | deleted file mode 100644 | 34 | + goto do_cc_cond; |
| 50 | index XXXXXXX..XXXXXXX | 35 | + break; |
| 51 | --- a/tcg/LICENSE | 36 | case OPC_SLTU_CP2: |
| 52 | +++ /dev/null | 37 | + cond = TCG_COND_LTU; |
| 53 | @@ -XXX,XX +XXX,XX @@ | 38 | + goto do_cc_cond; |
| 54 | -All the files in this directory and subdirectories are released under | 39 | + break; |
| 55 | -a BSD like license (see header in each file). No other license is | 40 | case OPC_SLT_CP2: |
| 56 | -accepted. | 41 | + cond = TCG_COND_LT; |
| 42 | + goto do_cc_cond; | ||
| 43 | + break; | ||
| 44 | case OPC_SLEU_CP2: | ||
| 45 | + cond = TCG_COND_LEU; | ||
| 46 | + goto do_cc_cond; | ||
| 47 | + break; | ||
| 48 | case OPC_SLE_CP2: | ||
| 49 | - /* | ||
| 50 | - * ??? Document is unclear: Set FCC[CC]. Does that mean the | ||
| 51 | - * FD field is the CC field? | ||
| 52 | - */ | ||
| 53 | + cond = TCG_COND_LE; | ||
| 54 | + do_cc_cond: | ||
| 55 | + { | ||
| 56 | + int cc = (ctx->opcode >> 8) & 0x7; | ||
| 57 | + TCGv_i64 t64 = tcg_temp_new_i64(); | ||
| 58 | + TCGv_i32 t32 = tcg_temp_new_i32(); | ||
| 59 | + | ||
| 60 | + tcg_gen_setcond_i64(cond, t64, t0, t1); | ||
| 61 | + tcg_gen_extrl_i64_i32(t32, t64); | ||
| 62 | + tcg_gen_deposit_i32(fpu_fcr31, fpu_fcr31, t32, | ||
| 63 | + get_fp_bit(cc), 1); | ||
| 64 | + | ||
| 65 | + tcg_temp_free_i32(t32); | ||
| 66 | + tcg_temp_free_i64(t64); | ||
| 67 | + } | ||
| 68 | + goto no_rd; | ||
| 69 | + break; | ||
| 70 | default: | ||
| 71 | MIPS_INVAL("loongson_cp2"); | ||
| 72 | generate_exception_end(ctx, EXCP_RI); | ||
| 73 | @@ -XXX,XX +XXX,XX @@ static void gen_loongson_multimedia(DisasContext *ctx, int rd, int rs, int rt) | ||
| 74 | |||
| 75 | gen_store_fpr64(ctx, t0, rd); | ||
| 76 | |||
| 77 | +no_rd: | ||
| 78 | tcg_temp_free_i64(t0); | ||
| 79 | tcg_temp_free_i64(t1); | ||
| 80 | } | ||
| 57 | -- | 81 | -- |
| 58 | 2.17.1 | 82 | 2.20.1 |
| 59 | 83 | ||
| 60 | 84 | diff view generated by jsdifflib |
| 1 | From: Peter Maydell <peter.maydell@linaro.org> | 1 | We were only constructing the 64-bit element, and not |
|---|---|---|---|
| 2 | replicating the 64-bit element across the rest of the vector. | ||
| 2 | 3 | ||
| 3 | Add the copyright/license boilerplate for tcg/i386/tcg-target.opc.h. | 4 | Cc: qemu-stable@nongnu.org |
| 4 | This file has had only two commits, 4b06c216826b7e4 and | ||
| 5 | d9897efa1fd3174ec, both by a Linaro engineer. | ||
| 6 | The license is MIT, since that's what the rest of tcg/ppc/ is. | ||
| 7 | |||
| 8 | Reviewed-by: Richard Henderson <richard.henderson@linaro.org> | ||
| 9 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | ||
| 10 | Message-Id: <20191025155848.17362-4-peter.maydell@linaro.org> | ||
| 11 | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> | 5 | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
| 12 | --- | 6 | --- |
| 13 | tcg/ppc/tcg-target.opc.h | 20 ++++++++++++++++++++ | 7 | tcg/i386/tcg-target.inc.c | 10 +++++++--- |
| 14 | 1 file changed, 20 insertions(+) | 8 | 1 file changed, 7 insertions(+), 3 deletions(-) |
| 15 | 9 | ||
| 16 | diff --git a/tcg/ppc/tcg-target.opc.h b/tcg/ppc/tcg-target.opc.h | 10 | diff --git a/tcg/i386/tcg-target.inc.c b/tcg/i386/tcg-target.inc.c |
| 17 | index XXXXXXX..XXXXXXX 100644 | 11 | index XXXXXXX..XXXXXXX 100644 |
| 18 | --- a/tcg/ppc/tcg-target.opc.h | 12 | --- a/tcg/i386/tcg-target.inc.c |
| 19 | +++ b/tcg/ppc/tcg-target.opc.h | 13 | +++ b/tcg/i386/tcg-target.inc.c |
| 20 | @@ -XXX,XX +XXX,XX @@ | 14 | @@ -XXX,XX +XXX,XX @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc, |
| 21 | /* | 15 | goto gen_simd; |
| 22 | + * Copyright (c) 2019 Linaro Limited | 16 | #if TCG_TARGET_REG_BITS == 32 |
| 23 | + * | 17 | case INDEX_op_dup2_vec: |
| 24 | + * Permission is hereby granted, free of charge, to any person obtaining a copy | 18 | - /* Constraints have already placed both 32-bit inputs in xmm regs. */ |
| 25 | + * of this software and associated documentation files (the "Software"), to deal | 19 | - insn = OPC_PUNPCKLDQ; |
| 26 | + * in the Software without restriction, including without limitation the rights | 20 | - goto gen_simd; |
| 27 | + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | 21 | + /* First merge the two 32-bit inputs to a single 64-bit element. */ |
| 28 | + * copies of the Software, and to permit persons to whom the Software is | 22 | + tcg_out_vex_modrm(s, OPC_PUNPCKLDQ, a0, a1, a2); |
| 29 | + * furnished to do so, subject to the following conditions: | 23 | + /* Then replicate the 64-bit elements across the rest of the vector. */ |
| 30 | + * | 24 | + if (type != TCG_TYPE_V64) { |
| 31 | + * The above copyright notice and this permission notice shall be included in | 25 | + tcg_out_dup_vec(s, type, MO_64, a0, a0); |
| 32 | + * all copies or substantial portions of the Software. | 26 | + } |
| 33 | + * | 27 | + break; |
| 34 | + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | 28 | #endif |
| 35 | + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | 29 | case INDEX_op_abs_vec: |
| 36 | + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | 30 | insn = abs_insn[vece]; |
| 37 | + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | ||
| 38 | + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | ||
| 39 | + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | ||
| 40 | + * THE SOFTWARE. | ||
| 41 | + * | ||
| 42 | * Target-specific opcodes for host vector expansion. These will be | ||
| 43 | * emitted by tcg_expand_vec_op. For those familiar with GCC internals, | ||
| 44 | * consider these to be UNSPEC with names. | ||
| 45 | -- | 31 | -- |
| 46 | 2.17.1 | 32 | 2.20.1 |
| 47 | 33 | ||
| 48 | 34 | diff view generated by jsdifflib |
| 1 | From: Peter Maydell <peter.maydell@linaro.org> | 1 | From: Philippe Mathieu-Daudé <f4bug@amsat.org> |
|---|---|---|---|
| 2 | 2 | ||
| 3 | Add the copyright/license boilerplate for tcg/i386/tcg-target.opc.h. | 3 | This script started using Python2, where the 'classic' division |
| 4 | This file has had only one commit, 770c2fc7bb70804a, by | 4 | operator returns the floor result. In commit 3d004a371 we started |
| 5 | a Linaro engineer. | 5 | to use Python3, where the division operator returns the float |
| 6 | The license is MIT, since that's what the rest of tcg/i386/ is. | 6 | result ('true division'). |
| 7 | To keep the same behavior, use the 'floor division' operator "//" | ||
| 8 | which returns the floor result. | ||
| 7 | 9 | ||
| 10 | Fixes: 3d004a371 | ||
| 11 | Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> | ||
| 12 | Message-Id: <20200330121345.14665-1-f4bug@amsat.org> | ||
| 8 | Reviewed-by: Richard Henderson <richard.henderson@linaro.org> | 13 | Reviewed-by: Richard Henderson <richard.henderson@linaro.org> |
| 9 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | ||
| 10 | Message-Id: <20191025155848.17362-3-peter.maydell@linaro.org> | ||
| 11 | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> | 14 | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
| 12 | --- | 15 | --- |
| 13 | tcg/i386/tcg-target.opc.h | 28 +++++++++++++++++++++++++--- | 16 | scripts/decodetree.py | 4 ++-- |
| 14 | 1 file changed, 25 insertions(+), 3 deletions(-) | 17 | 1 file changed, 2 insertions(+), 2 deletions(-) |
| 15 | 18 | ||
| 16 | diff --git a/tcg/i386/tcg-target.opc.h b/tcg/i386/tcg-target.opc.h | 19 | diff --git a/scripts/decodetree.py b/scripts/decodetree.py |
| 17 | index XXXXXXX..XXXXXXX 100644 | 20 | index XXXXXXX..XXXXXXX 100755 |
| 18 | --- a/tcg/i386/tcg-target.opc.h | 21 | --- a/scripts/decodetree.py |
| 19 | +++ b/tcg/i386/tcg-target.opc.h | 22 | +++ b/scripts/decodetree.py |
| 20 | @@ -XXX,XX +XXX,XX @@ | 23 | @@ -XXX,XX +XXX,XX @@ class SizeTree: |
| 21 | -/* Target-specific opcodes for host vector expansion. These will be | 24 | if extracted < self.width: |
| 22 | - emitted by tcg_expand_vec_op. For those familiar with GCC internals, | 25 | output(ind, 'insn = ', decode_function, |
| 23 | - consider these to be UNSPEC with names. */ | 26 | '_load_bytes(ctx, insn, {0}, {1});\n' |
| 24 | +/* | 27 | - .format(extracted / 8, self.width / 8)); |
| 25 | + * Copyright (c) 2019 Linaro | 28 | + .format(extracted // 8, self.width // 8)); |
| 26 | + * | 29 | extracted = self.width |
| 27 | + * Permission is hereby granted, free of charge, to any person obtaining a copy | 30 | |
| 28 | + * of this software and associated documentation files (the "Software"), to deal | 31 | # Attempt to aid the compiler in producing compact switch statements. |
| 29 | + * in the Software without restriction, including without limitation the rights | 32 | @@ -XXX,XX +XXX,XX @@ class SizeLeaf: |
| 30 | + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | 33 | if extracted < self.width: |
| 31 | + * copies of the Software, and to permit persons to whom the Software is | 34 | output(ind, 'insn = ', decode_function, |
| 32 | + * furnished to do so, subject to the following conditions: | 35 | '_load_bytes(ctx, insn, {0}, {1});\n' |
| 33 | + * | 36 | - .format(extracted / 8, self.width / 8)); |
| 34 | + * The above copyright notice and this permission notice shall be included in | 37 | + .format(extracted // 8, self.width // 8)); |
| 35 | + * all copies or substantial portions of the Software. | 38 | extracted = self.width |
| 36 | + * | 39 | output(ind, 'return insn;\n') |
| 37 | + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | 40 | # end SizeLeaf |
| 38 | + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
| 39 | + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | ||
| 40 | + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | ||
| 41 | + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | ||
| 42 | + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | ||
| 43 | + * THE SOFTWARE. | ||
| 44 | + * | ||
| 45 | + * Target-specific opcodes for host vector expansion. These will be | ||
| 46 | + * emitted by tcg_expand_vec_op. For those familiar with GCC internals, | ||
| 47 | + * consider these to be UNSPEC with names. | ||
| 48 | + */ | ||
| 49 | |||
| 50 | DEF(x86_shufps_vec, 1, 2, 1, IMPLVEC) | ||
| 51 | DEF(x86_vpblendvb_vec, 1, 3, 0, IMPLVEC) | ||
| 52 | -- | 41 | -- |
| 53 | 2.17.1 | 42 | 2.20.1 |
| 54 | 43 | ||
| 55 | 44 | diff view generated by jsdifflib |
New patch | |||
|---|---|---|---|
| 1 | We were only constructing the 64-bit element, and not | ||
| 2 | replicating the 64-bit element across the rest of the vector. | ||
| 1 | 3 | ||
| 4 | Cc: qemu-stable@nongnu.org | ||
| 5 | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> | ||
| 6 | --- | ||
| 7 | |||
| 8 | This bug is visible running RISU for aarch64 on x86_32. | ||
| 9 | |||
| 10 | |||
| 11 | r~ | ||
| 12 | |||
| 13 | --- | ||
| 14 | tcg/i386/tcg-target.inc.c | 10 +++++++--- | ||
| 15 | 1 file changed, 7 insertions(+), 3 deletions(-) | ||
| 16 | |||
| 17 | diff --git a/tcg/i386/tcg-target.inc.c b/tcg/i386/tcg-target.inc.c | ||
| 18 | index XXXXXXX..XXXXXXX 100644 | ||
| 19 | --- a/tcg/i386/tcg-target.inc.c | ||
| 20 | +++ b/tcg/i386/tcg-target.inc.c | ||
| 21 | @@ -XXX,XX +XXX,XX @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc, | ||
| 22 | goto gen_simd; | ||
| 23 | #if TCG_TARGET_REG_BITS == 32 | ||
| 24 | case INDEX_op_dup2_vec: | ||
| 25 | - /* Constraints have already placed both 32-bit inputs in xmm regs. */ | ||
| 26 | - insn = OPC_PUNPCKLDQ; | ||
| 27 | - goto gen_simd; | ||
| 28 | + /* First merge the two 32-bit inputs to a single 64-bit element. */ | ||
| 29 | + tcg_out_vex_modrm(s, OPC_PUNPCKLDQ, a0, a1, a2); | ||
| 30 | + /* Then replicate the 64-bit elements across the rest of the vector. */ | ||
| 31 | + if (type != TCG_TYPE_V64) { | ||
| 32 | + tcg_out_dup_vec(s, type, MO_64, a0, a0); | ||
| 33 | + } | ||
| 34 | + break; | ||
| 35 | #endif | ||
| 36 | case INDEX_op_abs_vec: | ||
| 37 | insn = abs_insn[vece]; | ||
| 38 | -- | ||
| 39 | 2.20.1 | ||
| 40 | |||
| 41 | diff view generated by jsdifflib |