1
The following changes since commit bad76ac319556dab2497429d473b49a237672e1c:
1
The following changes since commit 95d1fbabae0cd44156ac4b96d512d143ca7dfd5e:
2
2
3
Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-pull-request' into staging (2019-10-25 14:17:08 +0100)
3
Merge remote-tracking branch 'remotes/kraxel/tags/fixes-20200716-pull-request' into staging (2020-07-16 18:50:51 +0100)
4
4
5
are available in the Git repository at:
5
are available in the Git repository at:
6
6
7
https://github.com/rth7680/qemu.git tags/pull-tcg-20191025
7
https://github.com/rth7680/qemu.git tags/pull-tcg-20200717
8
8
9
for you to fetch changes up to 0ed1bfb046b740b70eed2cf3581e01768703b185:
9
for you to fetch changes up to ba3c35d9c4026361fd380b269dc6def9510b7166:
10
10
11
translate-all: Remove tb_alloc (2019-10-25 10:15:25 -0400)
11
tcg/cpu-exec: precise single-stepping after an interrupt (2020-07-17 11:09:34 -0700)
12
12
13
----------------------------------------------------------------
13
----------------------------------------------------------------
14
Improvements for TARGET_PAGE_BITS_VARY
14
Fix vector min/max fallback expansion
15
Fix for TCI ld16u_i64.
15
Fix singlestep from exception and interrupt
16
Fix for segv on icount execute from i/o memory.
17
Two misc cleanups.
18
16
19
----------------------------------------------------------------
17
----------------------------------------------------------------
20
Alex Bennée (1):
18
Luc Michel (1):
21
cputlb: ensure _cmmu helper functions follow the naming standard
19
tcg/cpu-exec: precise single-stepping after an exception
22
20
23
Clement Deschamps (1):
21
Richard Henderson (2):
24
translate-all: fix uninitialized tb->orig_tb
22
tcg: Save/restore vecop_list around minmax fallback
23
tcg/cpu-exec: precise single-stepping after an interrupt
25
24
26
Richard Henderson (8):
25
accel/tcg/cpu-exec.c | 19 ++++++++++++++++++-
27
exec: Split out variable page size support to exec-vary.c
26
tcg/tcg-op-vec.c | 2 ++
28
configure: Detect compiler support for __attribute__((alias))
27
2 files changed, 20 insertions(+), 1 deletion(-)
29
exec: Use const alias for TARGET_PAGE_BITS_VARY
30
exec: Restrict TARGET_PAGE_BITS_VARY assert to CONFIG_DEBUG_TCG
31
exec: Promote TARGET_PAGE_MASK to target_long
32
exec: Cache TARGET_PAGE_MASK for TARGET_PAGE_BITS_VARY
33
cputlb: Fix tlb_vaddr_to_host
34
translate-all: Remove tb_alloc
35
28
36
Stefan Weil (1):
37
tci: Add implementation for INDEX_op_ld16u_i64
38
39
Wei Yang (1):
40
cpu: use ROUND_UP() to define xxx_PAGE_ALIGN
41
42
Makefile.target | 2 +-
43
include/exec/cpu-all.h | 33 +++++++++----
44
include/exec/cpu_ldst_template.h | 4 +-
45
include/qemu-common.h | 6 +++
46
tcg/tcg.h | 20 +++++---
47
accel/tcg/cputlb.c | 26 ++++++++--
48
accel/tcg/translate-all.c | 21 ++------
49
exec-vary.c | 102 +++++++++++++++++++++++++++++++++++++++
50
exec.c | 34 -------------
51
target/cris/translate_v10.inc.c | 3 +-
52
tcg/tci.c | 15 ++++++
53
configure | 19 ++++++++
54
12 files changed, 208 insertions(+), 77 deletions(-)
55
create mode 100644 exec-vary.c
56
diff view generated by jsdifflib
1
Since 2ac01d6dafab, this function does only two things: assert a
1
Forgetting this asserts when tcg_gen_cmp_vec is called from
2
lock is held, and call tcg_tb_alloc. It is used exactly once,
2
within tcg_gen_cmpsel_vec.
3
and its user has already done the assert.
4
3
5
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
4
Fixes: 72b4c792c7a
6
Reviewed-by: Clement Deschamps <clement.deschamps@greensocs.com>
7
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
8
---
6
---
9
accel/tcg/translate-all.c | 20 ++------------------
7
tcg/tcg-op-vec.c | 2 ++
10
1 file changed, 2 insertions(+), 18 deletions(-)
8
1 file changed, 2 insertions(+)
11
9
12
diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c
10
diff --git a/tcg/tcg-op-vec.c b/tcg/tcg-op-vec.c
13
index XXXXXXX..XXXXXXX 100644
11
index XXXXXXX..XXXXXXX 100644
14
--- a/accel/tcg/translate-all.c
12
--- a/tcg/tcg-op-vec.c
15
+++ b/accel/tcg/translate-all.c
13
+++ b/tcg/tcg-op-vec.c
16
@@ -XXX,XX +XXX,XX @@ void tcg_exec_init(unsigned long tb_size)
14
@@ -XXX,XX +XXX,XX @@ static void do_minmax(unsigned vece, TCGv_vec r, TCGv_vec a,
17
#endif
15
TCGv_vec b, TCGOpcode opc, TCGCond cond)
16
{
17
if (!do_op3(vece, r, a, b, opc)) {
18
+ const TCGOpcode *hold_list = tcg_swap_vecop_list(NULL);
19
tcg_gen_cmpsel_vec(cond, vece, r, a, b, a, b);
20
+ tcg_swap_vecop_list(hold_list);
21
}
18
}
22
}
19
23
20
-/*
21
- * Allocate a new translation block. Flush the translation buffer if
22
- * too many translation blocks or too much generated code.
23
- */
24
-static TranslationBlock *tb_alloc(target_ulong pc)
25
-{
26
- TranslationBlock *tb;
27
-
28
- assert_memory_lock();
29
-
30
- tb = tcg_tb_alloc(tcg_ctx);
31
- if (unlikely(tb == NULL)) {
32
- return NULL;
33
- }
34
- return tb;
35
-}
36
-
37
/* call with @p->lock held */
38
static inline void invalidate_page_bitmap(PageDesc *p)
39
{
40
@@ -XXX,XX +XXX,XX @@ TranslationBlock *tb_gen_code(CPUState *cpu,
41
TCGProfile *prof = &tcg_ctx->prof;
42
int64_t ti;
43
#endif
44
+
45
assert_memory_lock();
46
47
phys_pc = get_page_addr_code(env, pc);
48
@@ -XXX,XX +XXX,XX @@ TranslationBlock *tb_gen_code(CPUState *cpu,
49
}
50
51
buffer_overflow:
52
- tb = tb_alloc(pc);
53
+ tb = tcg_tb_alloc(tcg_ctx);
54
if (unlikely(!tb)) {
55
/* flush must be done */
56
tb_flush(cpu);
57
--
24
--
58
2.17.1
25
2.25.1
59
26
60
27
diff view generated by jsdifflib
1
From: Stefan Weil <sw@weilnetz.de>
1
From: Luc Michel <luc.michel@greensocs.com>
2
2
3
This fixes "make check-tcg" on a Debian x86_64 host.
3
When single-stepping with a debugger attached to QEMU, and when an
4
exception is raised, the debugger misses the first instruction after the
5
exception:
4
6
5
Signed-off-by: Stefan Weil <sw@weilnetz.de>
7
$ qemu-system-aarch64 -M virt -display none -cpu cortex-a53 -s -S
6
Tested-by: Thomas Huth <thuth@redhat.com>
8
7
Message-Id: <20190410194838.10123-1-sw@weilnetz.de>
9
$ aarch64-linux-gnu-gdb
10
GNU gdb (GDB) 9.2
11
[...]
12
(gdb) tar rem :1234
13
Remote debugging using :1234
14
warning: No executable has been specified and target does not support
15
determining executable automatically. Try using the "file" command.
16
0x0000000000000000 in ?? ()
17
(gdb) # writing nop insns to 0x200 and 0x204
18
(gdb) set *0x200 = 0xd503201f
19
(gdb) set *0x204 = 0xd503201f
20
(gdb) # 0x0 address contains 0 which is an invalid opcode.
21
(gdb) # The CPU should raise an exception and jump to 0x200
22
(gdb) si
23
0x0000000000000204 in ?? ()
24
25
With this commit, the same run steps correctly on the first instruction
26
of the exception vector:
27
28
(gdb) si
29
0x0000000000000200 in ?? ()
30
31
Buglink: https://bugs.launchpad.net/qemu/+bug/757702
32
Signed-off-by: Luc Michel <luc.michel@greensocs.com>
33
Message-Id: <20200716193947.3058389-1-luc.michel@greensocs.com>
8
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
34
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9
---
35
---
10
tcg/tci.c | 15 +++++++++++++++
36
accel/tcg/cpu-exec.c | 11 +++++++++++
11
1 file changed, 15 insertions(+)
37
1 file changed, 11 insertions(+)
12
38
13
diff --git a/tcg/tci.c b/tcg/tci.c
39
diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c
14
index XXXXXXX..XXXXXXX 100644
40
index XXXXXXX..XXXXXXX 100644
15
--- a/tcg/tci.c
41
--- a/accel/tcg/cpu-exec.c
16
+++ b/tcg/tci.c
42
+++ b/accel/tcg/cpu-exec.c
17
@@ -XXX,XX +XXX,XX @@ static void tci_write_reg8(tcg_target_ulong *regs, TCGReg index, uint8_t value)
43
@@ -XXX,XX +XXX,XX @@ static inline bool cpu_handle_exception(CPUState *cpu, int *ret)
18
tci_write_reg(regs, index, value);
44
cc->do_interrupt(cpu);
19
}
45
qemu_mutex_unlock_iothread();
20
46
cpu->exception_index = -1;
21
+static void
22
+tci_write_reg16(tcg_target_ulong *regs, TCGReg index, uint16_t value)
23
+{
24
+ tci_write_reg(regs, index, value);
25
+}
26
+
47
+
27
static void
48
+ if (unlikely(cpu->singlestep_enabled)) {
28
tci_write_reg32(tcg_target_ulong *regs, TCGReg index, uint32_t value)
49
+ /*
29
{
50
+ * After processing the exception, ensure an EXCP_DEBUG is
30
@@ -XXX,XX +XXX,XX @@ uintptr_t tcg_qemu_tb_exec(CPUArchState *env, uint8_t *tb_ptr)
51
+ * raised when single-stepping so that GDB doesn't miss the
31
tci_write_reg8(regs, t0, *(uint8_t *)(t1 + t2));
52
+ * next instruction.
32
break;
53
+ */
33
case INDEX_op_ld8s_i32:
54
+ *ret = EXCP_DEBUG;
34
+ TODO();
55
+ cpu_handle_debug_exception(cpu);
35
+ break;
56
+ return true;
36
case INDEX_op_ld16u_i32:
57
+ }
37
TODO();
58
} else if (!replay_has_interrupt()) {
38
break;
59
/* give a chance to iothread in replay mode */
39
@@ -XXX,XX +XXX,XX @@ uintptr_t tcg_qemu_tb_exec(CPUArchState *env, uint8_t *tb_ptr)
60
*ret = EXCP_INTERRUPT;
40
tci_write_reg8(regs, t0, *(uint8_t *)(t1 + t2));
41
break;
42
case INDEX_op_ld8s_i64:
43
+ TODO();
44
+ break;
45
case INDEX_op_ld16u_i64:
46
+ t0 = *tb_ptr++;
47
+ t1 = tci_read_r(regs, &tb_ptr);
48
+ t2 = tci_read_s32(&tb_ptr);
49
+ tci_write_reg16(regs, t0, *(uint16_t *)(t1 + t2));
50
+ break;
51
case INDEX_op_ld16s_i64:
52
TODO();
53
break;
54
--
61
--
55
2.17.1
62
2.25.1
56
63
57
64
diff view generated by jsdifflib
Deleted patch
1
From: Alex Bennée <alex.bennee@linaro.org>
2
1
3
We document this in docs/devel/load-stores.rst so lets follow it. The
4
32 bit and 64 bit access functions have historically not included the
5
sign so we leave those as is. We also introduce some signed helpers
6
which are used for loading immediate values in the translator.
7
8
Fixes: 282dffc8
9
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
10
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
11
Message-Id: <20191021150910.23216-1-alex.bennee@linaro.org>
12
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
13
---
14
include/exec/cpu_ldst_template.h | 4 ++--
15
tcg/tcg.h | 20 ++++++++++++++------
16
accel/tcg/cputlb.c | 24 +++++++++++++++++++++---
17
target/cris/translate_v10.inc.c | 3 +--
18
4 files changed, 38 insertions(+), 13 deletions(-)
19
20
diff --git a/include/exec/cpu_ldst_template.h b/include/exec/cpu_ldst_template.h
21
index XXXXXXX..XXXXXXX 100644
22
--- a/include/exec/cpu_ldst_template.h
23
+++ b/include/exec/cpu_ldst_template.h
24
@@ -XXX,XX +XXX,XX @@
25
#ifdef SOFTMMU_CODE_ACCESS
26
#define ADDR_READ addr_code
27
#define MMUSUFFIX _cmmu
28
-#define URETSUFFIX SUFFIX
29
-#define SRETSUFFIX SUFFIX
30
+#define URETSUFFIX USUFFIX
31
+#define SRETSUFFIX glue(s, SUFFIX)
32
#else
33
#define ADDR_READ addr_read
34
#define MMUSUFFIX _mmu
35
diff --git a/tcg/tcg.h b/tcg/tcg.h
36
index XXXXXXX..XXXXXXX 100644
37
--- a/tcg/tcg.h
38
+++ b/tcg/tcg.h
39
@@ -XXX,XX +XXX,XX @@ void helper_be_stl_mmu(CPUArchState *env, target_ulong addr, uint32_t val,
40
void helper_be_stq_mmu(CPUArchState *env, target_ulong addr, uint64_t val,
41
TCGMemOpIdx oi, uintptr_t retaddr);
42
43
-uint8_t helper_ret_ldb_cmmu(CPUArchState *env, target_ulong addr,
44
+uint8_t helper_ret_ldub_cmmu(CPUArchState *env, target_ulong addr,
45
TCGMemOpIdx oi, uintptr_t retaddr);
46
-uint16_t helper_le_ldw_cmmu(CPUArchState *env, target_ulong addr,
47
+int8_t helper_ret_ldsb_cmmu(CPUArchState *env, target_ulong addr,
48
TCGMemOpIdx oi, uintptr_t retaddr);
49
+uint16_t helper_le_lduw_cmmu(CPUArchState *env, target_ulong addr,
50
+ TCGMemOpIdx oi, uintptr_t retaddr);
51
+int16_t helper_le_ldsw_cmmu(CPUArchState *env, target_ulong addr,
52
+ TCGMemOpIdx oi, uintptr_t retaddr);
53
uint32_t helper_le_ldl_cmmu(CPUArchState *env, target_ulong addr,
54
TCGMemOpIdx oi, uintptr_t retaddr);
55
uint64_t helper_le_ldq_cmmu(CPUArchState *env, target_ulong addr,
56
TCGMemOpIdx oi, uintptr_t retaddr);
57
-uint16_t helper_be_ldw_cmmu(CPUArchState *env, target_ulong addr,
58
- TCGMemOpIdx oi, uintptr_t retaddr);
59
+uint16_t helper_be_lduw_cmmu(CPUArchState *env, target_ulong addr,
60
+ TCGMemOpIdx oi, uintptr_t retaddr);
61
+int16_t helper_be_ldsw_cmmu(CPUArchState *env, target_ulong addr,
62
+ TCGMemOpIdx oi, uintptr_t retaddr);
63
uint32_t helper_be_ldl_cmmu(CPUArchState *env, target_ulong addr,
64
TCGMemOpIdx oi, uintptr_t retaddr);
65
uint64_t helper_be_ldq_cmmu(CPUArchState *env, target_ulong addr,
66
@@ -XXX,XX +XXX,XX @@ uint64_t helper_be_ldq_cmmu(CPUArchState *env, target_ulong addr,
67
# define helper_ret_stw_mmu helper_be_stw_mmu
68
# define helper_ret_stl_mmu helper_be_stl_mmu
69
# define helper_ret_stq_mmu helper_be_stq_mmu
70
-# define helper_ret_ldw_cmmu helper_be_ldw_cmmu
71
+# define helper_ret_lduw_cmmu helper_be_lduw_cmmu
72
+# define helper_ret_ldsw_cmmu helper_be_ldsw_cmmu
73
# define helper_ret_ldl_cmmu helper_be_ldl_cmmu
74
# define helper_ret_ldq_cmmu helper_be_ldq_cmmu
75
#else
76
@@ -XXX,XX +XXX,XX @@ uint64_t helper_be_ldq_cmmu(CPUArchState *env, target_ulong addr,
77
# define helper_ret_stw_mmu helper_le_stw_mmu
78
# define helper_ret_stl_mmu helper_le_stl_mmu
79
# define helper_ret_stq_mmu helper_le_stq_mmu
80
-# define helper_ret_ldw_cmmu helper_le_ldw_cmmu
81
+# define helper_ret_lduw_cmmu helper_le_lduw_cmmu
82
+# define helper_ret_ldsw_cmmu helper_le_ldsw_cmmu
83
# define helper_ret_ldl_cmmu helper_le_ldl_cmmu
84
# define helper_ret_ldq_cmmu helper_le_ldq_cmmu
85
#endif
86
diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
87
index XXXXXXX..XXXXXXX 100644
88
--- a/accel/tcg/cputlb.c
89
+++ b/accel/tcg/cputlb.c
90
@@ -XXX,XX +XXX,XX @@ static uint64_t full_ldub_cmmu(CPUArchState *env, target_ulong addr,
91
return load_helper(env, addr, oi, retaddr, MO_8, true, full_ldub_cmmu);
92
}
93
94
-uint8_t helper_ret_ldb_cmmu(CPUArchState *env, target_ulong addr,
95
+uint8_t helper_ret_ldub_cmmu(CPUArchState *env, target_ulong addr,
96
TCGMemOpIdx oi, uintptr_t retaddr)
97
{
98
return full_ldub_cmmu(env, addr, oi, retaddr);
99
}
100
101
+int8_t helper_ret_ldsb_cmmu(CPUArchState *env, target_ulong addr,
102
+ TCGMemOpIdx oi, uintptr_t retaddr)
103
+{
104
+ return (int8_t) full_ldub_cmmu(env, addr, oi, retaddr);
105
+}
106
+
107
static uint64_t full_le_lduw_cmmu(CPUArchState *env, target_ulong addr,
108
TCGMemOpIdx oi, uintptr_t retaddr)
109
{
110
@@ -XXX,XX +XXX,XX @@ static uint64_t full_le_lduw_cmmu(CPUArchState *env, target_ulong addr,
111
full_le_lduw_cmmu);
112
}
113
114
-uint16_t helper_le_ldw_cmmu(CPUArchState *env, target_ulong addr,
115
+uint16_t helper_le_lduw_cmmu(CPUArchState *env, target_ulong addr,
116
TCGMemOpIdx oi, uintptr_t retaddr)
117
{
118
return full_le_lduw_cmmu(env, addr, oi, retaddr);
119
}
120
121
+int16_t helper_le_ldsw_cmmu(CPUArchState *env, target_ulong addr,
122
+ TCGMemOpIdx oi, uintptr_t retaddr)
123
+{
124
+ return (int16_t) full_le_lduw_cmmu(env, addr, oi, retaddr);
125
+}
126
+
127
static uint64_t full_be_lduw_cmmu(CPUArchState *env, target_ulong addr,
128
TCGMemOpIdx oi, uintptr_t retaddr)
129
{
130
@@ -XXX,XX +XXX,XX @@ static uint64_t full_be_lduw_cmmu(CPUArchState *env, target_ulong addr,
131
full_be_lduw_cmmu);
132
}
133
134
-uint16_t helper_be_ldw_cmmu(CPUArchState *env, target_ulong addr,
135
+uint16_t helper_be_lduw_cmmu(CPUArchState *env, target_ulong addr,
136
TCGMemOpIdx oi, uintptr_t retaddr)
137
{
138
return full_be_lduw_cmmu(env, addr, oi, retaddr);
139
}
140
141
+int16_t helper_be_ldsw_cmmu(CPUArchState *env, target_ulong addr,
142
+ TCGMemOpIdx oi, uintptr_t retaddr)
143
+{
144
+ return (int16_t) full_be_lduw_cmmu(env, addr, oi, retaddr);
145
+}
146
+
147
static uint64_t full_le_ldul_cmmu(CPUArchState *env, target_ulong addr,
148
TCGMemOpIdx oi, uintptr_t retaddr)
149
{
150
diff --git a/target/cris/translate_v10.inc.c b/target/cris/translate_v10.inc.c
151
index XXXXXXX..XXXXXXX 100644
152
--- a/target/cris/translate_v10.inc.c
153
+++ b/target/cris/translate_v10.inc.c
154
@@ -XXX,XX +XXX,XX @@ static unsigned int dec10_ind(CPUCRISState *env, DisasContext *dc)
155
case CRISV10_IND_BCC_M:
156
157
cris_cc_mask(dc, 0);
158
- imm = cpu_ldsw_code(env, dc->pc + 2);
159
- simm = (int16_t)imm;
160
+ simm = cpu_ldsw_code(env, dc->pc + 2);
161
simm += 4;
162
163
LOG_DIS("bcc_m: b%s %x\n", cc_name(dc->cond), dc->pc + simm);
164
--
165
2.17.1
166
167
diff view generated by jsdifflib
Deleted patch
1
From: Wei Yang <richardw.yang@linux.intel.com>
2
1
3
Use ROUND_UP() to define, which is a little bit easy to read.
4
5
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
6
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
7
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
8
Reviewed-by: Juan Quintela <quintela@redhat.com>
9
Signed-off-by: Wei Yang <richardw.yang@linux.intel.com>
10
Message-Id: <20191013021145.16011-2-richardw.yang@linux.intel.com>
11
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
12
---
13
include/exec/cpu-all.h | 7 +++----
14
1 file changed, 3 insertions(+), 4 deletions(-)
15
16
diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h
17
index XXXXXXX..XXXXXXX 100644
18
--- a/include/exec/cpu-all.h
19
+++ b/include/exec/cpu-all.h
20
@@ -XXX,XX +XXX,XX @@ extern int target_page_bits;
21
22
#define TARGET_PAGE_SIZE (1 << TARGET_PAGE_BITS)
23
#define TARGET_PAGE_MASK ~(TARGET_PAGE_SIZE - 1)
24
-#define TARGET_PAGE_ALIGN(addr) (((addr) + TARGET_PAGE_SIZE - 1) & TARGET_PAGE_MASK)
25
+#define TARGET_PAGE_ALIGN(addr) ROUND_UP((addr), TARGET_PAGE_SIZE)
26
27
/* Using intptr_t ensures that qemu_*_page_mask is sign-extended even
28
* when intptr_t is 32-bit and we are aligning a long long.
29
@@ -XXX,XX +XXX,XX @@ extern int target_page_bits;
30
extern uintptr_t qemu_host_page_size;
31
extern intptr_t qemu_host_page_mask;
32
33
-#define HOST_PAGE_ALIGN(addr) (((addr) + qemu_host_page_size - 1) & qemu_host_page_mask)
34
-#define REAL_HOST_PAGE_ALIGN(addr) (((addr) + qemu_real_host_page_size - 1) & \
35
- qemu_real_host_page_mask)
36
+#define HOST_PAGE_ALIGN(addr) ROUND_UP((addr), qemu_host_page_size)
37
+#define REAL_HOST_PAGE_ALIGN(addr) ROUND_UP((addr), qemu_real_host_page_size)
38
39
/* same as PROT_xxx */
40
#define PAGE_READ 0x0001
41
--
42
2.17.1
43
44
diff view generated by jsdifflib
Deleted patch
1
The next patch will play a trick with "const" that will
2
confuse the compiler about the uses of target_page_bits
3
within exec.c. Moving everything to a new file prevents
4
this confusion.
5
1
6
No functional change so far.
7
8
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
9
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
10
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
11
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
12
---
13
Makefile.target | 2 +-
14
include/qemu-common.h | 6 +++++
15
exec-vary.c | 57 +++++++++++++++++++++++++++++++++++++++++++
16
exec.c | 34 --------------------------
17
4 files changed, 64 insertions(+), 35 deletions(-)
18
create mode 100644 exec-vary.c
19
20
diff --git a/Makefile.target b/Makefile.target
21
index XXXXXXX..XXXXXXX 100644
22
--- a/Makefile.target
23
+++ b/Makefile.target
24
@@ -XXX,XX +XXX,XX @@ obj-y += trace/
25
26
#########################################################
27
# cpu emulator library
28
-obj-y += exec.o
29
+obj-y += exec.o exec-vary.o
30
obj-y += accel/
31
obj-$(CONFIG_TCG) += tcg/tcg.o tcg/tcg-op.o tcg/tcg-op-vec.o tcg/tcg-op-gvec.o
32
obj-$(CONFIG_TCG) += tcg/tcg-common.o tcg/optimize.o
33
diff --git a/include/qemu-common.h b/include/qemu-common.h
34
index XXXXXXX..XXXXXXX 100644
35
--- a/include/qemu-common.h
36
+++ b/include/qemu-common.h
37
@@ -XXX,XX +XXX,XX @@ void cpu_exec_step_atomic(CPUState *cpu);
38
*/
39
bool set_preferred_target_page_bits(int bits);
40
41
+/**
42
+ * finalize_target_page_bits:
43
+ * Commit the final value set by set_preferred_target_page_bits.
44
+ */
45
+void finalize_target_page_bits(void);
46
+
47
/**
48
* Sends a (part of) iovec down a socket, yielding when the socket is full, or
49
* Receives data into a (part of) iovec from a socket,
50
diff --git a/exec-vary.c b/exec-vary.c
51
new file mode 100644
52
index XXXXXXX..XXXXXXX
53
--- /dev/null
54
+++ b/exec-vary.c
55
@@ -XXX,XX +XXX,XX @@
56
+/*
57
+ * Variable page size handling
58
+ *
59
+ * Copyright (c) 2003 Fabrice Bellard
60
+ *
61
+ * This library is free software; you can redistribute it and/or
62
+ * modify it under the terms of the GNU Lesser General Public
63
+ * License as published by the Free Software Foundation; either
64
+ * version 2 of the License, or (at your option) any later version.
65
+ *
66
+ * This library is distributed in the hope that it will be useful,
67
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
68
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
69
+ * Lesser General Public License for more details.
70
+ *
71
+ * You should have received a copy of the GNU Lesser General Public
72
+ * License along with this library; if not, see <http://www.gnu.org/licenses/>.
73
+ */
74
+
75
+#include "qemu/osdep.h"
76
+#include "qemu-common.h"
77
+#include "exec/exec-all.h"
78
+
79
+#ifdef TARGET_PAGE_BITS_VARY
80
+int target_page_bits;
81
+bool target_page_bits_decided;
82
+#endif
83
+
84
+bool set_preferred_target_page_bits(int bits)
85
+{
86
+ /*
87
+ * The target page size is the lowest common denominator for all
88
+ * the CPUs in the system, so we can only make it smaller, never
89
+ * larger. And we can't make it smaller once we've committed to
90
+ * a particular size.
91
+ */
92
+#ifdef TARGET_PAGE_BITS_VARY
93
+ assert(bits >= TARGET_PAGE_BITS_MIN);
94
+ if (target_page_bits == 0 || target_page_bits > bits) {
95
+ if (target_page_bits_decided) {
96
+ return false;
97
+ }
98
+ target_page_bits = bits;
99
+ }
100
+#endif
101
+ return true;
102
+}
103
+
104
+void finalize_target_page_bits(void)
105
+{
106
+#ifdef TARGET_PAGE_BITS_VARY
107
+ if (target_page_bits == 0) {
108
+ target_page_bits = TARGET_PAGE_BITS_MIN;
109
+ }
110
+ target_page_bits_decided = true;
111
+#endif
112
+}
113
diff --git a/exec.c b/exec.c
114
index XXXXXXX..XXXXXXX 100644
115
--- a/exec.c
116
+++ b/exec.c
117
@@ -XXX,XX +XXX,XX @@ AddressSpace address_space_memory;
118
static MemoryRegion io_mem_unassigned;
119
#endif
120
121
-#ifdef TARGET_PAGE_BITS_VARY
122
-int target_page_bits;
123
-bool target_page_bits_decided;
124
-#endif
125
-
126
CPUTailQ cpus = QTAILQ_HEAD_INITIALIZER(cpus);
127
128
/* current CPU in the current thread. It is only valid inside
129
@@ -XXX,XX +XXX,XX @@ int use_icount;
130
uintptr_t qemu_host_page_size;
131
intptr_t qemu_host_page_mask;
132
133
-bool set_preferred_target_page_bits(int bits)
134
-{
135
- /* The target page size is the lowest common denominator for all
136
- * the CPUs in the system, so we can only make it smaller, never
137
- * larger. And we can't make it smaller once we've committed to
138
- * a particular size.
139
- */
140
-#ifdef TARGET_PAGE_BITS_VARY
141
- assert(bits >= TARGET_PAGE_BITS_MIN);
142
- if (target_page_bits == 0 || target_page_bits > bits) {
143
- if (target_page_bits_decided) {
144
- return false;
145
- }
146
- target_page_bits = bits;
147
- }
148
-#endif
149
- return true;
150
-}
151
-
152
#if !defined(CONFIG_USER_ONLY)
153
154
-static void finalize_target_page_bits(void)
155
-{
156
-#ifdef TARGET_PAGE_BITS_VARY
157
- if (target_page_bits == 0) {
158
- target_page_bits = TARGET_PAGE_BITS_MIN;
159
- }
160
- target_page_bits_decided = true;
161
-#endif
162
-}
163
-
164
typedef struct PhysPageEntry PhysPageEntry;
165
166
struct PhysPageEntry {
167
--
168
2.17.1
169
170
diff view generated by jsdifflib
Deleted patch
1
Such support is present almost everywhere, except for Xcode 9.
2
It is added in Xcode 10, but travis uses xcode9 by default,
3
so we should support it for a while yet.
4
1
5
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
6
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
7
---
8
configure | 19 +++++++++++++++++++
9
1 file changed, 19 insertions(+)
10
11
diff --git a/configure b/configure
12
index XXXXXXX..XXXXXXX 100755
13
--- a/configure
14
+++ b/configure
15
@@ -XXX,XX +XXX,XX @@ if compile_prog "" "" ; then
16
vector16=yes
17
fi
18
19
+########################################
20
+# See if __attribute__((alias)) is supported.
21
+# This false for Xcode 9, but has been remedied for Xcode 10.
22
+# Unfortunately, travis uses Xcode 9 by default.
23
+
24
+attralias=no
25
+cat > $TMPC << EOF
26
+int x = 1;
27
+extern const int y __attribute__((alias("x")));
28
+int main(void) { return 0; }
29
+EOF
30
+if compile_prog "" "" ; then
31
+ attralias=yes
32
+fi
33
+
34
########################################
35
# check if getauxval is available.
36
37
@@ -XXX,XX +XXX,XX @@ if test "$vector16" = "yes" ; then
38
echo "CONFIG_VECTOR16=y" >> $config_host_mak
39
fi
40
41
+if test "$attralias" = "yes" ; then
42
+ echo "CONFIG_ATTRIBUTE_ALIAS=y" >> $config_host_mak
43
+fi
44
+
45
if test "$getauxval" = "yes" ; then
46
echo "CONFIG_GETAUXVAL=y" >> $config_host_mak
47
fi
48
--
49
2.17.1
50
51
diff view generated by jsdifflib
Deleted patch
1
Using a variable that is declared "const" for this tells the
2
compiler that it may read the value once and assume that it
3
does not change across function calls.
4
1
5
For target_page_size, this means we have only one assert per
6
function, and one read of the variable.
7
8
This reduces the size of qemu-system-aarch64 by 8k.
9
10
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
11
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
12
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
13
---
14
include/exec/cpu-all.h | 14 +++++++---
15
exec-vary.c | 60 ++++++++++++++++++++++++++++++++++++------
16
2 files changed, 62 insertions(+), 12 deletions(-)
17
18
diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h
19
index XXXXXXX..XXXXXXX 100644
20
--- a/include/exec/cpu-all.h
21
+++ b/include/exec/cpu-all.h
22
@@ -XXX,XX +XXX,XX @@ static inline void stl_phys_notdirty(AddressSpace *as, hwaddr addr, uint32_t val
23
/* page related stuff */
24
25
#ifdef TARGET_PAGE_BITS_VARY
26
-extern bool target_page_bits_decided;
27
-extern int target_page_bits;
28
-#define TARGET_PAGE_BITS ({ assert(target_page_bits_decided); \
29
- target_page_bits; })
30
+typedef struct {
31
+ bool decided;
32
+ int bits;
33
+} TargetPageBits;
34
+# if defined(CONFIG_ATTRIBUTE_ALIAS) || !defined(IN_EXEC_VARY)
35
+extern const TargetPageBits target_page;
36
+#else
37
+extern TargetPageBits target_page;
38
+# endif
39
+#define TARGET_PAGE_BITS (assert(target_page.decided), target_page.bits)
40
#else
41
#define TARGET_PAGE_BITS_MIN TARGET_PAGE_BITS
42
#endif
43
diff --git a/exec-vary.c b/exec-vary.c
44
index XXXXXXX..XXXXXXX 100644
45
--- a/exec-vary.c
46
+++ b/exec-vary.c
47
@@ -XXX,XX +XXX,XX @@
48
49
#include "qemu/osdep.h"
50
#include "qemu-common.h"
51
+
52
+#define IN_EXEC_VARY 1
53
+
54
#include "exec/exec-all.h"
55
56
#ifdef TARGET_PAGE_BITS_VARY
57
-int target_page_bits;
58
-bool target_page_bits_decided;
59
+# ifdef CONFIG_ATTRIBUTE_ALIAS
60
+/*
61
+ * We want to declare the "target_page" variable as const, which tells
62
+ * the compiler that it can cache any value that it reads across calls.
63
+ * This avoids multiple assertions and multiple reads within any one user.
64
+ *
65
+ * This works because we initialize the target_page data very early, in a
66
+ * location far removed from the functions that require the final results.
67
+ *
68
+ * This also requires that we have a non-constant symbol by which we can
69
+ * perform the actual initialization, and which forces the data to be
70
+ * allocated within writable memory. Thus "init_target_page", and we use
71
+ * that symbol exclusively in the two functions that initialize this value.
72
+ *
73
+ * The "target_page" symbol is created as an alias of "init_target_page".
74
+ */
75
+static TargetPageBits init_target_page;
76
+
77
+/*
78
+ * Note that this is *not* a redundant decl, this is the definition of
79
+ * the "target_page" symbol. The syntax for this definition requires
80
+ * the use of the extern keyword. This seems to be a GCC bug in
81
+ * either the syntax for the alias attribute or in -Wredundant-decls.
82
+ *
83
+ * See https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91765
84
+ */
85
+# pragma GCC diagnostic push
86
+# pragma GCC diagnostic ignored "-Wredundant-decls"
87
+
88
+extern const TargetPageBits target_page
89
+ __attribute__((alias("init_target_page")));
90
+
91
+# pragma GCC diagnostic pop
92
+# else
93
+/*
94
+ * When aliases are not supported then we force two different declarations,
95
+ * by way of suppressing the header declaration with IN_EXEC_VARY.
96
+ * We assume that on such an old compiler, LTO cannot be used, and so the
97
+ * compiler cannot not detect the mismatched declarations, and all is well.
98
+ */
99
+TargetPageBits target_page;
100
+# define init_target_page target_page
101
+# endif
102
#endif
103
104
bool set_preferred_target_page_bits(int bits)
105
@@ -XXX,XX +XXX,XX @@ bool set_preferred_target_page_bits(int bits)
106
*/
107
#ifdef TARGET_PAGE_BITS_VARY
108
assert(bits >= TARGET_PAGE_BITS_MIN);
109
- if (target_page_bits == 0 || target_page_bits > bits) {
110
- if (target_page_bits_decided) {
111
+ if (init_target_page.bits == 0 || init_target_page.bits > bits) {
112
+ if (init_target_page.decided) {
113
return false;
114
}
115
- target_page_bits = bits;
116
+ init_target_page.bits = bits;
117
}
118
#endif
119
return true;
120
@@ -XXX,XX +XXX,XX @@ bool set_preferred_target_page_bits(int bits)
121
void finalize_target_page_bits(void)
122
{
123
#ifdef TARGET_PAGE_BITS_VARY
124
- if (target_page_bits == 0) {
125
- target_page_bits = TARGET_PAGE_BITS_MIN;
126
+ if (init_target_page.bits == 0) {
127
+ init_target_page.bits = TARGET_PAGE_BITS_MIN;
128
}
129
- target_page_bits_decided = true;
130
+ init_target_page.decided = true;
131
#endif
132
}
133
--
134
2.17.1
135
136
diff view generated by jsdifflib
Deleted patch
1
This reduces the size of a release build by about 10k.
2
Noticably, within the tlb miss helpers.
3
1
4
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
5
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
6
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
7
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
8
---
9
include/exec/cpu-all.h | 6 +++++-
10
1 file changed, 5 insertions(+), 1 deletion(-)
11
12
diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h
13
index XXXXXXX..XXXXXXX 100644
14
--- a/include/exec/cpu-all.h
15
+++ b/include/exec/cpu-all.h
16
@@ -XXX,XX +XXX,XX @@ extern const TargetPageBits target_page;
17
#else
18
extern TargetPageBits target_page;
19
# endif
20
-#define TARGET_PAGE_BITS (assert(target_page.decided), target_page.bits)
21
+# ifdef CONFIG_DEBUG_TCG
22
+# define TARGET_PAGE_BITS (assert(target_page.decided), target_page.bits)
23
+# else
24
+# define TARGET_PAGE_BITS target_page.bits
25
+# endif
26
#else
27
#define TARGET_PAGE_BITS_MIN TARGET_PAGE_BITS
28
#endif
29
--
30
2.17.1
31
32
diff view generated by jsdifflib
Deleted patch
1
There are some uint64_t uses that expect TARGET_PAGE_MASK to
2
extend for a 32-bit, so this must continue to be a signed type.
3
Define based on TARGET_PAGE_BITS not TARGET_PAGE_SIZE; this
4
will make a following patch more clear.
5
1
6
This should not have a functional effect so far.
7
8
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
9
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
10
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
11
---
12
include/exec/cpu-all.h | 2 +-
13
1 file changed, 1 insertion(+), 1 deletion(-)
14
15
diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h
16
index XXXXXXX..XXXXXXX 100644
17
--- a/include/exec/cpu-all.h
18
+++ b/include/exec/cpu-all.h
19
@@ -XXX,XX +XXX,XX @@ extern TargetPageBits target_page;
20
#endif
21
22
#define TARGET_PAGE_SIZE (1 << TARGET_PAGE_BITS)
23
-#define TARGET_PAGE_MASK ~(TARGET_PAGE_SIZE - 1)
24
+#define TARGET_PAGE_MASK ((target_long)-1 << TARGET_PAGE_BITS)
25
#define TARGET_PAGE_ALIGN(addr) ROUND_UP((addr), TARGET_PAGE_SIZE)
26
27
/* Using intptr_t ensures that qemu_*_page_mask is sign-extended even
28
--
29
2.17.1
30
31
diff view generated by jsdifflib
Deleted patch
1
This eliminates a set of runtime shifts. It turns out that we
2
require TARGET_PAGE_MASK more often than TARGET_PAGE_SIZE, so
3
redefine TARGET_PAGE_SIZE based on TARGET_PAGE_MASK instead of
4
the other way around.
5
1
6
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
7
Reviewed-by: David Hildenbrand <david@redhat.com>
8
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
9
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
10
---
11
include/exec/cpu-all.h | 8 ++++++--
12
exec-vary.c | 1 +
13
2 files changed, 7 insertions(+), 2 deletions(-)
14
15
diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h
16
index XXXXXXX..XXXXXXX 100644
17
--- a/include/exec/cpu-all.h
18
+++ b/include/exec/cpu-all.h
19
@@ -XXX,XX +XXX,XX @@ static inline void stl_phys_notdirty(AddressSpace *as, hwaddr addr, uint32_t val
20
typedef struct {
21
bool decided;
22
int bits;
23
+ target_long mask;
24
} TargetPageBits;
25
# if defined(CONFIG_ATTRIBUTE_ALIAS) || !defined(IN_EXEC_VARY)
26
extern const TargetPageBits target_page;
27
@@ -XXX,XX +XXX,XX @@ extern TargetPageBits target_page;
28
# endif
29
# ifdef CONFIG_DEBUG_TCG
30
# define TARGET_PAGE_BITS (assert(target_page.decided), target_page.bits)
31
+# define TARGET_PAGE_MASK (assert(target_page.decided), target_page.mask)
32
# else
33
# define TARGET_PAGE_BITS target_page.bits
34
+# define TARGET_PAGE_MASK target_page.mask
35
# endif
36
+# define TARGET_PAGE_SIZE (-(int)TARGET_PAGE_MASK)
37
#else
38
#define TARGET_PAGE_BITS_MIN TARGET_PAGE_BITS
39
+#define TARGET_PAGE_SIZE (1 << TARGET_PAGE_BITS)
40
+#define TARGET_PAGE_MASK ((target_long)-1 << TARGET_PAGE_BITS)
41
#endif
42
43
-#define TARGET_PAGE_SIZE (1 << TARGET_PAGE_BITS)
44
-#define TARGET_PAGE_MASK ((target_long)-1 << TARGET_PAGE_BITS)
45
#define TARGET_PAGE_ALIGN(addr) ROUND_UP((addr), TARGET_PAGE_SIZE)
46
47
/* Using intptr_t ensures that qemu_*_page_mask is sign-extended even
48
diff --git a/exec-vary.c b/exec-vary.c
49
index XXXXXXX..XXXXXXX 100644
50
--- a/exec-vary.c
51
+++ b/exec-vary.c
52
@@ -XXX,XX +XXX,XX @@ void finalize_target_page_bits(void)
53
init_target_page.bits = TARGET_PAGE_BITS_MIN;
54
}
55
init_target_page.decided = true;
56
+ init_target_page.mask = (target_long)-1 << init_target_page.bits;
57
#endif
58
}
59
--
60
2.17.1
61
62
diff view generated by jsdifflib
Deleted patch
1
Using uintptr_t instead of target_ulong meant that, for 64-bit guest
2
and 32-bit host, we truncated the guest address comparator and so may
3
not hit the tlb when we should.
4
1
5
Fixes: 4811e9095c0
6
Reviewed-by: David Hildenbrand <david@redhat.com>
7
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
8
---
9
accel/tcg/cputlb.c | 2 +-
10
1 file changed, 1 insertion(+), 1 deletion(-)
11
12
diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
13
index XXXXXXX..XXXXXXX 100644
14
--- a/accel/tcg/cputlb.c
15
+++ b/accel/tcg/cputlb.c
16
@@ -XXX,XX +XXX,XX @@ void *tlb_vaddr_to_host(CPUArchState *env, abi_ptr addr,
17
MMUAccessType access_type, int mmu_idx)
18
{
19
CPUTLBEntry *entry = tlb_entry(env, mmu_idx, addr);
20
- uintptr_t tlb_addr, page;
21
+ target_ulong tlb_addr, page;
22
size_t elt_ofs;
23
24
switch (access_type) {
25
--
26
2.17.1
27
28
diff view generated by jsdifflib
1
From: Clement Deschamps <clement.deschamps@greensocs.com>
1
When single-stepping with a debugger attached to QEMU, and when an
2
interrupt is raised, the debugger misses the first instruction after
3
the interrupt.
2
4
3
This fixes a segmentation fault in icount mode when executing
5
Tested-by: Luc Michel <luc.michel@greensocs.com>
4
from an IO region.
6
Reviewed-by: Luc Michel <luc.michel@greensocs.com>
5
7
Buglink: https://bugs.launchpad.net/qemu/+bug/757702
6
TB is marked as CF_NOCACHE but tb->orig_tb is not initialized
8
Message-Id: <20200717163029.2737546-1-richard.henderson@linaro.org>
7
(equals previous value in code_gen_buffer).
8
9
The issue happens in cpu_io_recompile() when it tries to invalidate orig_tb.
10
11
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
12
Signed-off-by: Clement Deschamps <clement.deschamps@greensocs.com>
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Message-Id: <20191022140016.918371-1-clement.deschamps@greensocs.com>
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Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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---
10
---
16
accel/tcg/translate-all.c | 1 +
11
accel/tcg/cpu-exec.c | 8 +++++++-
17
1 file changed, 1 insertion(+)
12
1 file changed, 7 insertions(+), 1 deletion(-)
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13
19
diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c
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diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c
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index XXXXXXX..XXXXXXX 100644
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index XXXXXXX..XXXXXXX 100644
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--- a/accel/tcg/translate-all.c
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--- a/accel/tcg/cpu-exec.c
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+++ b/accel/tcg/translate-all.c
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+++ b/accel/tcg/cpu-exec.c
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@@ -XXX,XX +XXX,XX @@ TranslationBlock *tb_gen_code(CPUState *cpu,
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@@ -XXX,XX +XXX,XX @@ static inline bool cpu_handle_interrupt(CPUState *cpu,
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tb->cs_base = cs_base;
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else {
25
tb->flags = flags;
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if (cc->cpu_exec_interrupt(cpu, interrupt_request)) {
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tb->cflags = cflags;
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replay_interrupt();
27
+ tb->orig_tb = NULL;
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- cpu->exception_index = -1;
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tb->trace_vcpu_dstate = *cpu->trace_dstate;
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+ /*
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tcg_ctx->tb_cflags = cflags;
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+ * After processing the interrupt, ensure an EXCP_DEBUG is
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tb_overflow:
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+ * raised when single-stepping so that GDB doesn't miss the
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+ * next instruction.
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+ */
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+ cpu->exception_index =
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+ (cpu->singlestep_enabled ? EXCP_DEBUG : -1);
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*last_tb = NULL;
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}
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/* The target hook may have updated the 'cpu->interrupt_request';
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--
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--
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2.17.1
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2.25.1
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35
34
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