1 | The following changes since commit bad76ac319556dab2497429d473b49a237672e1c: | 1 | The following changes since commit e18e5501d8ac692d32657a3e1ef545b14e72b730: |
---|---|---|---|
2 | 2 | ||
3 | Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-pull-request' into staging (2019-10-25 14:17:08 +0100) | 3 | Merge remote-tracking branch 'remotes/dgilbert-gitlab/tags/pull-virtiofs-20200210' into staging (2020-02-10 18:09:14 +0000) |
4 | 4 | ||
5 | are available in the Git repository at: | 5 | are available in the Git repository at: |
6 | 6 | ||
7 | https://github.com/rth7680/qemu.git tags/pull-tcg-20191025 | 7 | https://github.com/rth7680/qemu.git tags/pull-tcg-20200212 |
8 | 8 | ||
9 | for you to fetch changes up to 0ed1bfb046b740b70eed2cf3581e01768703b185: | 9 | for you to fetch changes up to 2445971604c1cfd3ec484457159f4ac300fb04d2: |
10 | 10 | ||
11 | translate-all: Remove tb_alloc (2019-10-25 10:15:25 -0400) | 11 | tcg: Add tcg_gen_gvec_5_ptr (2020-02-12 14:58:36 -0800) |
12 | 12 | ||
13 | ---------------------------------------------------------------- | 13 | ---------------------------------------------------------------- |
14 | Improvements for TARGET_PAGE_BITS_VARY | 14 | Fix breakpoint invalidation. |
15 | Fix for TCI ld16u_i64. | 15 | Add support for tcg helpers with 7 arguments. |
16 | Fix for segv on icount execute from i/o memory. | 16 | Add support for gvec helpers with 5 arguments. |
17 | Two misc cleanups. | ||
18 | 17 | ||
19 | ---------------------------------------------------------------- | 18 | ---------------------------------------------------------------- |
20 | Alex Bennée (1): | 19 | Max Filippov (1): |
21 | cputlb: ensure _cmmu helper functions follow the naming standard | 20 | exec: flush CPU TB cache in breakpoint_invalidate |
22 | 21 | ||
23 | Clement Deschamps (1): | 22 | Richard Henderson (1): |
24 | translate-all: fix uninitialized tb->orig_tb | 23 | tcg: Add tcg_gen_gvec_5_ptr |
25 | 24 | ||
26 | Richard Henderson (8): | 25 | Taylor Simpson (1): |
27 | exec: Split out variable page size support to exec-vary.c | 26 | tcg: Add support for a helper with 7 arguments |
28 | configure: Detect compiler support for __attribute__((alias)) | ||
29 | exec: Use const alias for TARGET_PAGE_BITS_VARY | ||
30 | exec: Restrict TARGET_PAGE_BITS_VARY assert to CONFIG_DEBUG_TCG | ||
31 | exec: Promote TARGET_PAGE_MASK to target_long | ||
32 | exec: Cache TARGET_PAGE_MASK for TARGET_PAGE_BITS_VARY | ||
33 | cputlb: Fix tlb_vaddr_to_host | ||
34 | translate-all: Remove tb_alloc | ||
35 | 27 | ||
36 | Stefan Weil (1): | 28 | include/exec/helper-gen.h | 13 +++++++++++++ |
37 | tci: Add implementation for INDEX_op_ld16u_i64 | 29 | include/exec/helper-head.h | 2 ++ |
30 | include/exec/helper-proto.h | 6 ++++++ | ||
31 | include/exec/helper-tcg.h | 7 +++++++ | ||
32 | include/tcg/tcg-op-gvec.h | 7 +++++++ | ||
33 | exec.c | 15 +++++++-------- | ||
34 | tcg/tcg-op-gvec.c | 32 ++++++++++++++++++++++++++++++++ | ||
35 | 7 files changed, 74 insertions(+), 8 deletions(-) | ||
38 | 36 | ||
39 | Wei Yang (1): | ||
40 | cpu: use ROUND_UP() to define xxx_PAGE_ALIGN | ||
41 | |||
42 | Makefile.target | 2 +- | ||
43 | include/exec/cpu-all.h | 33 +++++++++---- | ||
44 | include/exec/cpu_ldst_template.h | 4 +- | ||
45 | include/qemu-common.h | 6 +++ | ||
46 | tcg/tcg.h | 20 +++++--- | ||
47 | accel/tcg/cputlb.c | 26 ++++++++-- | ||
48 | accel/tcg/translate-all.c | 21 ++------ | ||
49 | exec-vary.c | 102 +++++++++++++++++++++++++++++++++++++++ | ||
50 | exec.c | 34 ------------- | ||
51 | target/cris/translate_v10.inc.c | 3 +- | ||
52 | tcg/tci.c | 15 ++++++ | ||
53 | configure | 19 ++++++++ | ||
54 | 12 files changed, 208 insertions(+), 77 deletions(-) | ||
55 | create mode 100644 exec-vary.c | ||
56 | diff view generated by jsdifflib |
Deleted patch | |||
---|---|---|---|
1 | From: Stefan Weil <sw@weilnetz.de> | ||
2 | 1 | ||
3 | This fixes "make check-tcg" on a Debian x86_64 host. | ||
4 | |||
5 | Signed-off-by: Stefan Weil <sw@weilnetz.de> | ||
6 | Tested-by: Thomas Huth <thuth@redhat.com> | ||
7 | Message-Id: <20190410194838.10123-1-sw@weilnetz.de> | ||
8 | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> | ||
9 | --- | ||
10 | tcg/tci.c | 15 +++++++++++++++ | ||
11 | 1 file changed, 15 insertions(+) | ||
12 | |||
13 | diff --git a/tcg/tci.c b/tcg/tci.c | ||
14 | index XXXXXXX..XXXXXXX 100644 | ||
15 | --- a/tcg/tci.c | ||
16 | +++ b/tcg/tci.c | ||
17 | @@ -XXX,XX +XXX,XX @@ static void tci_write_reg8(tcg_target_ulong *regs, TCGReg index, uint8_t value) | ||
18 | tci_write_reg(regs, index, value); | ||
19 | } | ||
20 | |||
21 | +static void | ||
22 | +tci_write_reg16(tcg_target_ulong *regs, TCGReg index, uint16_t value) | ||
23 | +{ | ||
24 | + tci_write_reg(regs, index, value); | ||
25 | +} | ||
26 | + | ||
27 | static void | ||
28 | tci_write_reg32(tcg_target_ulong *regs, TCGReg index, uint32_t value) | ||
29 | { | ||
30 | @@ -XXX,XX +XXX,XX @@ uintptr_t tcg_qemu_tb_exec(CPUArchState *env, uint8_t *tb_ptr) | ||
31 | tci_write_reg8(regs, t0, *(uint8_t *)(t1 + t2)); | ||
32 | break; | ||
33 | case INDEX_op_ld8s_i32: | ||
34 | + TODO(); | ||
35 | + break; | ||
36 | case INDEX_op_ld16u_i32: | ||
37 | TODO(); | ||
38 | break; | ||
39 | @@ -XXX,XX +XXX,XX @@ uintptr_t tcg_qemu_tb_exec(CPUArchState *env, uint8_t *tb_ptr) | ||
40 | tci_write_reg8(regs, t0, *(uint8_t *)(t1 + t2)); | ||
41 | break; | ||
42 | case INDEX_op_ld8s_i64: | ||
43 | + TODO(); | ||
44 | + break; | ||
45 | case INDEX_op_ld16u_i64: | ||
46 | + t0 = *tb_ptr++; | ||
47 | + t1 = tci_read_r(regs, &tb_ptr); | ||
48 | + t2 = tci_read_s32(&tb_ptr); | ||
49 | + tci_write_reg16(regs, t0, *(uint16_t *)(t1 + t2)); | ||
50 | + break; | ||
51 | case INDEX_op_ld16s_i64: | ||
52 | TODO(); | ||
53 | break; | ||
54 | -- | ||
55 | 2.17.1 | ||
56 | |||
57 | diff view generated by jsdifflib |
1 | The next patch will play a trick with "const" that will | 1 | From: Max Filippov <jcmvbkbc@gmail.com> |
---|---|---|---|
2 | confuse the compiler about the uses of target_page_bits | ||
3 | within exec.c. Moving everything to a new file prevents | ||
4 | this confusion. | ||
5 | 2 | ||
6 | No functional change so far. | 3 | When a breakpoint is inserted at location for which there's currently no |
4 | virtual to physical translation no action is taken on CPU TB cache. If a | ||
5 | TB for that virtual address already exists but is not visible ATM the | ||
6 | breakpoint won't be hit next time an instruction at that address will be | ||
7 | executed. | ||
7 | 8 | ||
8 | Reviewed-by: Alex Bennée <alex.bennee@linaro.org> | 9 | Flush entire CPU TB cache in breakpoint_invalidate to force |
9 | Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> | 10 | re-translation of all TBs for the breakpoint address. |
10 | Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> | 11 | |
12 | This change fixes the following scenario: | ||
13 | - linux user application is running | ||
14 | - a breakpoint is inserted from QEMU gdbstub for a user address that is | ||
15 | not currently present in the target CPU TLB | ||
16 | - an instruction at that address is executed, but the external debugger | ||
17 | doesn't get control. | ||
18 | |||
19 | Reviewed-by: Richard Henderson <richard.henderson@linaro.org> | ||
20 | Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> | ||
21 | Message-Id: <20191127220602.10827-2-jcmvbkbc@gmail.com> | ||
11 | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> | 22 | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
12 | --- | 23 | --- |
13 | Makefile.target | 2 +- | 24 | exec.c | 15 +++++++-------- |
14 | include/qemu-common.h | 6 +++++ | 25 | 1 file changed, 7 insertions(+), 8 deletions(-) |
15 | exec-vary.c | 57 +++++++++++++++++++++++++++++++++++++++++++ | ||
16 | exec.c | 34 -------------------------- | ||
17 | 4 files changed, 64 insertions(+), 35 deletions(-) | ||
18 | create mode 100644 exec-vary.c | ||
19 | 26 | ||
20 | diff --git a/Makefile.target b/Makefile.target | ||
21 | index XXXXXXX..XXXXXXX 100644 | ||
22 | --- a/Makefile.target | ||
23 | +++ b/Makefile.target | ||
24 | @@ -XXX,XX +XXX,XX @@ obj-y += trace/ | ||
25 | |||
26 | ######################################################### | ||
27 | # cpu emulator library | ||
28 | -obj-y += exec.o | ||
29 | +obj-y += exec.o exec-vary.o | ||
30 | obj-y += accel/ | ||
31 | obj-$(CONFIG_TCG) += tcg/tcg.o tcg/tcg-op.o tcg/tcg-op-vec.o tcg/tcg-op-gvec.o | ||
32 | obj-$(CONFIG_TCG) += tcg/tcg-common.o tcg/optimize.o | ||
33 | diff --git a/include/qemu-common.h b/include/qemu-common.h | ||
34 | index XXXXXXX..XXXXXXX 100644 | ||
35 | --- a/include/qemu-common.h | ||
36 | +++ b/include/qemu-common.h | ||
37 | @@ -XXX,XX +XXX,XX @@ void cpu_exec_step_atomic(CPUState *cpu); | ||
38 | */ | ||
39 | bool set_preferred_target_page_bits(int bits); | ||
40 | |||
41 | +/** | ||
42 | + * finalize_target_page_bits: | ||
43 | + * Commit the final value set by set_preferred_target_page_bits. | ||
44 | + */ | ||
45 | +void finalize_target_page_bits(void); | ||
46 | + | ||
47 | /** | ||
48 | * Sends a (part of) iovec down a socket, yielding when the socket is full, or | ||
49 | * Receives data into a (part of) iovec from a socket, | ||
50 | diff --git a/exec-vary.c b/exec-vary.c | ||
51 | new file mode 100644 | ||
52 | index XXXXXXX..XXXXXXX | ||
53 | --- /dev/null | ||
54 | +++ b/exec-vary.c | ||
55 | @@ -XXX,XX +XXX,XX @@ | ||
56 | +/* | ||
57 | + * Variable page size handling | ||
58 | + * | ||
59 | + * Copyright (c) 2003 Fabrice Bellard | ||
60 | + * | ||
61 | + * This library is free software; you can redistribute it and/or | ||
62 | + * modify it under the terms of the GNU Lesser General Public | ||
63 | + * License as published by the Free Software Foundation; either | ||
64 | + * version 2 of the License, or (at your option) any later version. | ||
65 | + * | ||
66 | + * This library is distributed in the hope that it will be useful, | ||
67 | + * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
68 | + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
69 | + * Lesser General Public License for more details. | ||
70 | + * | ||
71 | + * You should have received a copy of the GNU Lesser General Public | ||
72 | + * License along with this library; if not, see <http://www.gnu.org/licenses/>. | ||
73 | + */ | ||
74 | + | ||
75 | +#include "qemu/osdep.h" | ||
76 | +#include "qemu-common.h" | ||
77 | +#include "exec/exec-all.h" | ||
78 | + | ||
79 | +#ifdef TARGET_PAGE_BITS_VARY | ||
80 | +int target_page_bits; | ||
81 | +bool target_page_bits_decided; | ||
82 | +#endif | ||
83 | + | ||
84 | +bool set_preferred_target_page_bits(int bits) | ||
85 | +{ | ||
86 | + /* | ||
87 | + * The target page size is the lowest common denominator for all | ||
88 | + * the CPUs in the system, so we can only make it smaller, never | ||
89 | + * larger. And we can't make it smaller once we've committed to | ||
90 | + * a particular size. | ||
91 | + */ | ||
92 | +#ifdef TARGET_PAGE_BITS_VARY | ||
93 | + assert(bits >= TARGET_PAGE_BITS_MIN); | ||
94 | + if (target_page_bits == 0 || target_page_bits > bits) { | ||
95 | + if (target_page_bits_decided) { | ||
96 | + return false; | ||
97 | + } | ||
98 | + target_page_bits = bits; | ||
99 | + } | ||
100 | +#endif | ||
101 | + return true; | ||
102 | +} | ||
103 | + | ||
104 | +void finalize_target_page_bits(void) | ||
105 | +{ | ||
106 | +#ifdef TARGET_PAGE_BITS_VARY | ||
107 | + if (target_page_bits == 0) { | ||
108 | + target_page_bits = TARGET_PAGE_BITS_MIN; | ||
109 | + } | ||
110 | + target_page_bits_decided = true; | ||
111 | +#endif | ||
112 | +} | ||
113 | diff --git a/exec.c b/exec.c | 27 | diff --git a/exec.c b/exec.c |
114 | index XXXXXXX..XXXXXXX 100644 | 28 | index XXXXXXX..XXXXXXX 100644 |
115 | --- a/exec.c | 29 | --- a/exec.c |
116 | +++ b/exec.c | 30 | +++ b/exec.c |
117 | @@ -XXX,XX +XXX,XX @@ AddressSpace address_space_memory; | 31 | @@ -XXX,XX +XXX,XX @@ void tb_invalidate_phys_addr(AddressSpace *as, hwaddr addr, MemTxAttrs attrs) |
118 | static MemoryRegion io_mem_unassigned; | 32 | |
33 | static void breakpoint_invalidate(CPUState *cpu, target_ulong pc) | ||
34 | { | ||
35 | - MemTxAttrs attrs; | ||
36 | - hwaddr phys = cpu_get_phys_page_attrs_debug(cpu, pc, &attrs); | ||
37 | - int asidx = cpu_asidx_from_attrs(cpu, attrs); | ||
38 | - if (phys != -1) { | ||
39 | - /* Locks grabbed by tb_invalidate_phys_addr */ | ||
40 | - tb_invalidate_phys_addr(cpu->cpu_ases[asidx].as, | ||
41 | - phys | (pc & ~TARGET_PAGE_MASK), attrs); | ||
42 | - } | ||
43 | + /* | ||
44 | + * There may not be a virtual to physical translation for the pc | ||
45 | + * right now, but there may exist cached TB for this pc. | ||
46 | + * Flush the whole TB cache to force re-translation of such TBs. | ||
47 | + * This is heavyweight, but we're debugging anyway. | ||
48 | + */ | ||
49 | + tb_flush(cpu); | ||
50 | } | ||
119 | #endif | 51 | #endif |
120 | 52 | ||
121 | -#ifdef TARGET_PAGE_BITS_VARY | ||
122 | -int target_page_bits; | ||
123 | -bool target_page_bits_decided; | ||
124 | -#endif | ||
125 | - | ||
126 | CPUTailQ cpus = QTAILQ_HEAD_INITIALIZER(cpus); | ||
127 | |||
128 | /* current CPU in the current thread. It is only valid inside | ||
129 | @@ -XXX,XX +XXX,XX @@ int use_icount; | ||
130 | uintptr_t qemu_host_page_size; | ||
131 | intptr_t qemu_host_page_mask; | ||
132 | |||
133 | -bool set_preferred_target_page_bits(int bits) | ||
134 | -{ | ||
135 | - /* The target page size is the lowest common denominator for all | ||
136 | - * the CPUs in the system, so we can only make it smaller, never | ||
137 | - * larger. And we can't make it smaller once we've committed to | ||
138 | - * a particular size. | ||
139 | - */ | ||
140 | -#ifdef TARGET_PAGE_BITS_VARY | ||
141 | - assert(bits >= TARGET_PAGE_BITS_MIN); | ||
142 | - if (target_page_bits == 0 || target_page_bits > bits) { | ||
143 | - if (target_page_bits_decided) { | ||
144 | - return false; | ||
145 | - } | ||
146 | - target_page_bits = bits; | ||
147 | - } | ||
148 | -#endif | ||
149 | - return true; | ||
150 | -} | ||
151 | - | ||
152 | #if !defined(CONFIG_USER_ONLY) | ||
153 | |||
154 | -static void finalize_target_page_bits(void) | ||
155 | -{ | ||
156 | -#ifdef TARGET_PAGE_BITS_VARY | ||
157 | - if (target_page_bits == 0) { | ||
158 | - target_page_bits = TARGET_PAGE_BITS_MIN; | ||
159 | - } | ||
160 | - target_page_bits_decided = true; | ||
161 | -#endif | ||
162 | -} | ||
163 | - | ||
164 | typedef struct PhysPageEntry PhysPageEntry; | ||
165 | |||
166 | struct PhysPageEntry { | ||
167 | -- | 53 | -- |
168 | 2.17.1 | 54 | 2.20.1 |
169 | 55 | ||
170 | 56 | diff view generated by jsdifflib |
1 | From: Alex Bennée <alex.bennee@linaro.org> | 1 | From: Taylor Simpson <tsimpson@quicinc.com> |
---|---|---|---|
2 | 2 | ||
3 | We document this in docs/devel/load-stores.rst so lets follow it. The | 3 | Currently, helpers can only take up to 6 arguments. This patch adds the |
4 | 32 bit and 64 bit access functions have historically not included the | 4 | capability for up to 7 arguments. I have tested it with the Hexagon port |
5 | sign so we leave those as is. We also introduce some signed helpers | 5 | that I am preparing for submission. |
6 | which are used for loading immediate values in the translator. | ||
7 | 6 | ||
8 | Fixes: 282dffc8 | 7 | Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> |
9 | Reviewed-by: Richard Henderson <richard.henderson@linaro.org> | 8 | Message-Id: <1580942510-2820-1-git-send-email-tsimpson@quicinc.com> |
10 | Signed-off-by: Alex Bennée <alex.bennee@linaro.org> | ||
11 | Message-Id: <20191021150910.23216-1-alex.bennee@linaro.org> | ||
12 | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> | 9 | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
13 | --- | 10 | --- |
14 | include/exec/cpu_ldst_template.h | 4 ++-- | 11 | include/exec/helper-gen.h | 13 +++++++++++++ |
15 | tcg/tcg.h | 20 ++++++++++++++------ | 12 | include/exec/helper-head.h | 2 ++ |
16 | accel/tcg/cputlb.c | 24 +++++++++++++++++++++--- | 13 | include/exec/helper-proto.h | 6 ++++++ |
17 | target/cris/translate_v10.inc.c | 3 +-- | 14 | include/exec/helper-tcg.h | 7 +++++++ |
18 | 4 files changed, 38 insertions(+), 13 deletions(-) | 15 | 4 files changed, 28 insertions(+) |
19 | 16 | ||
20 | diff --git a/include/exec/cpu_ldst_template.h b/include/exec/cpu_ldst_template.h | 17 | diff --git a/include/exec/helper-gen.h b/include/exec/helper-gen.h |
21 | index XXXXXXX..XXXXXXX 100644 | 18 | index XXXXXXX..XXXXXXX 100644 |
22 | --- a/include/exec/cpu_ldst_template.h | 19 | --- a/include/exec/helper-gen.h |
23 | +++ b/include/exec/cpu_ldst_template.h | 20 | +++ b/include/exec/helper-gen.h |
24 | @@ -XXX,XX +XXX,XX @@ | 21 | @@ -XXX,XX +XXX,XX @@ static inline void glue(gen_helper_, name)(dh_retvar_decl(ret) \ |
25 | #ifdef SOFTMMU_CODE_ACCESS | 22 | tcg_gen_callN(HELPER(name), dh_retvar(ret), 6, args); \ |
26 | #define ADDR_READ addr_code | ||
27 | #define MMUSUFFIX _cmmu | ||
28 | -#define URETSUFFIX SUFFIX | ||
29 | -#define SRETSUFFIX SUFFIX | ||
30 | +#define URETSUFFIX USUFFIX | ||
31 | +#define SRETSUFFIX glue(s, SUFFIX) | ||
32 | #else | ||
33 | #define ADDR_READ addr_read | ||
34 | #define MMUSUFFIX _mmu | ||
35 | diff --git a/tcg/tcg.h b/tcg/tcg.h | ||
36 | index XXXXXXX..XXXXXXX 100644 | ||
37 | --- a/tcg/tcg.h | ||
38 | +++ b/tcg/tcg.h | ||
39 | @@ -XXX,XX +XXX,XX @@ void helper_be_stl_mmu(CPUArchState *env, target_ulong addr, uint32_t val, | ||
40 | void helper_be_stq_mmu(CPUArchState *env, target_ulong addr, uint64_t val, | ||
41 | TCGMemOpIdx oi, uintptr_t retaddr); | ||
42 | |||
43 | -uint8_t helper_ret_ldb_cmmu(CPUArchState *env, target_ulong addr, | ||
44 | +uint8_t helper_ret_ldub_cmmu(CPUArchState *env, target_ulong addr, | ||
45 | TCGMemOpIdx oi, uintptr_t retaddr); | ||
46 | -uint16_t helper_le_ldw_cmmu(CPUArchState *env, target_ulong addr, | ||
47 | +int8_t helper_ret_ldsb_cmmu(CPUArchState *env, target_ulong addr, | ||
48 | TCGMemOpIdx oi, uintptr_t retaddr); | ||
49 | +uint16_t helper_le_lduw_cmmu(CPUArchState *env, target_ulong addr, | ||
50 | + TCGMemOpIdx oi, uintptr_t retaddr); | ||
51 | +int16_t helper_le_ldsw_cmmu(CPUArchState *env, target_ulong addr, | ||
52 | + TCGMemOpIdx oi, uintptr_t retaddr); | ||
53 | uint32_t helper_le_ldl_cmmu(CPUArchState *env, target_ulong addr, | ||
54 | TCGMemOpIdx oi, uintptr_t retaddr); | ||
55 | uint64_t helper_le_ldq_cmmu(CPUArchState *env, target_ulong addr, | ||
56 | TCGMemOpIdx oi, uintptr_t retaddr); | ||
57 | -uint16_t helper_be_ldw_cmmu(CPUArchState *env, target_ulong addr, | ||
58 | - TCGMemOpIdx oi, uintptr_t retaddr); | ||
59 | +uint16_t helper_be_lduw_cmmu(CPUArchState *env, target_ulong addr, | ||
60 | + TCGMemOpIdx oi, uintptr_t retaddr); | ||
61 | +int16_t helper_be_ldsw_cmmu(CPUArchState *env, target_ulong addr, | ||
62 | + TCGMemOpIdx oi, uintptr_t retaddr); | ||
63 | uint32_t helper_be_ldl_cmmu(CPUArchState *env, target_ulong addr, | ||
64 | TCGMemOpIdx oi, uintptr_t retaddr); | ||
65 | uint64_t helper_be_ldq_cmmu(CPUArchState *env, target_ulong addr, | ||
66 | @@ -XXX,XX +XXX,XX @@ uint64_t helper_be_ldq_cmmu(CPUArchState *env, target_ulong addr, | ||
67 | # define helper_ret_stw_mmu helper_be_stw_mmu | ||
68 | # define helper_ret_stl_mmu helper_be_stl_mmu | ||
69 | # define helper_ret_stq_mmu helper_be_stq_mmu | ||
70 | -# define helper_ret_ldw_cmmu helper_be_ldw_cmmu | ||
71 | +# define helper_ret_lduw_cmmu helper_be_lduw_cmmu | ||
72 | +# define helper_ret_ldsw_cmmu helper_be_ldsw_cmmu | ||
73 | # define helper_ret_ldl_cmmu helper_be_ldl_cmmu | ||
74 | # define helper_ret_ldq_cmmu helper_be_ldq_cmmu | ||
75 | #else | ||
76 | @@ -XXX,XX +XXX,XX @@ uint64_t helper_be_ldq_cmmu(CPUArchState *env, target_ulong addr, | ||
77 | # define helper_ret_stw_mmu helper_le_stw_mmu | ||
78 | # define helper_ret_stl_mmu helper_le_stl_mmu | ||
79 | # define helper_ret_stq_mmu helper_le_stq_mmu | ||
80 | -# define helper_ret_ldw_cmmu helper_le_ldw_cmmu | ||
81 | +# define helper_ret_lduw_cmmu helper_le_lduw_cmmu | ||
82 | +# define helper_ret_ldsw_cmmu helper_le_ldsw_cmmu | ||
83 | # define helper_ret_ldl_cmmu helper_le_ldl_cmmu | ||
84 | # define helper_ret_ldq_cmmu helper_le_ldq_cmmu | ||
85 | #endif | ||
86 | diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c | ||
87 | index XXXXXXX..XXXXXXX 100644 | ||
88 | --- a/accel/tcg/cputlb.c | ||
89 | +++ b/accel/tcg/cputlb.c | ||
90 | @@ -XXX,XX +XXX,XX @@ static uint64_t full_ldub_cmmu(CPUArchState *env, target_ulong addr, | ||
91 | return load_helper(env, addr, oi, retaddr, MO_8, true, full_ldub_cmmu); | ||
92 | } | 23 | } |
93 | 24 | ||
94 | -uint8_t helper_ret_ldb_cmmu(CPUArchState *env, target_ulong addr, | 25 | +#define DEF_HELPER_FLAGS_7(name, flags, ret, t1, t2, t3, t4, t5, t6, t7)\ |
95 | +uint8_t helper_ret_ldub_cmmu(CPUArchState *env, target_ulong addr, | 26 | +static inline void glue(gen_helper_, name)(dh_retvar_decl(ret) \ |
96 | TCGMemOpIdx oi, uintptr_t retaddr) | 27 | + dh_arg_decl(t1, 1), dh_arg_decl(t2, 2), dh_arg_decl(t3, 3), \ |
97 | { | 28 | + dh_arg_decl(t4, 4), dh_arg_decl(t5, 5), dh_arg_decl(t6, 6), \ |
98 | return full_ldub_cmmu(env, addr, oi, retaddr); | 29 | + dh_arg_decl(t7, 7)) \ |
99 | } | 30 | +{ \ |
100 | 31 | + TCGTemp *args[7] = { dh_arg(t1, 1), dh_arg(t2, 2), dh_arg(t3, 3), \ | |
101 | +int8_t helper_ret_ldsb_cmmu(CPUArchState *env, target_ulong addr, | 32 | + dh_arg(t4, 4), dh_arg(t5, 5), dh_arg(t6, 6), \ |
102 | + TCGMemOpIdx oi, uintptr_t retaddr) | 33 | + dh_arg(t7, 7) }; \ |
103 | +{ | 34 | + tcg_gen_callN(HELPER(name), dh_retvar(ret), 7, args); \ |
104 | + return (int8_t) full_ldub_cmmu(env, addr, oi, retaddr); | ||
105 | +} | 35 | +} |
106 | + | 36 | + |
107 | static uint64_t full_le_lduw_cmmu(CPUArchState *env, target_ulong addr, | 37 | #include "helper.h" |
108 | TCGMemOpIdx oi, uintptr_t retaddr) | 38 | #include "trace/generated-helpers.h" |
109 | { | 39 | #include "trace/generated-helpers-wrappers.h" |
110 | @@ -XXX,XX +XXX,XX @@ static uint64_t full_le_lduw_cmmu(CPUArchState *env, target_ulong addr, | 40 | @@ -XXX,XX +XXX,XX @@ static inline void glue(gen_helper_, name)(dh_retvar_decl(ret) \ |
111 | full_le_lduw_cmmu); | 41 | #undef DEF_HELPER_FLAGS_4 |
112 | } | 42 | #undef DEF_HELPER_FLAGS_5 |
113 | 43 | #undef DEF_HELPER_FLAGS_6 | |
114 | -uint16_t helper_le_ldw_cmmu(CPUArchState *env, target_ulong addr, | 44 | +#undef DEF_HELPER_FLAGS_7 |
115 | +uint16_t helper_le_lduw_cmmu(CPUArchState *env, target_ulong addr, | 45 | #undef GEN_HELPER |
116 | TCGMemOpIdx oi, uintptr_t retaddr) | 46 | |
117 | { | 47 | #endif /* HELPER_GEN_H */ |
118 | return full_le_lduw_cmmu(env, addr, oi, retaddr); | 48 | diff --git a/include/exec/helper-head.h b/include/exec/helper-head.h |
119 | } | 49 | index XXXXXXX..XXXXXXX 100644 |
120 | 50 | --- a/include/exec/helper-head.h | |
121 | +int16_t helper_le_ldsw_cmmu(CPUArchState *env, target_ulong addr, | 51 | +++ b/include/exec/helper-head.h |
122 | + TCGMemOpIdx oi, uintptr_t retaddr) | 52 | @@ -XXX,XX +XXX,XX @@ |
123 | +{ | 53 | DEF_HELPER_FLAGS_5(name, 0, ret, t1, t2, t3, t4, t5) |
124 | + return (int16_t) full_le_lduw_cmmu(env, addr, oi, retaddr); | 54 | #define DEF_HELPER_6(name, ret, t1, t2, t3, t4, t5, t6) \ |
125 | +} | 55 | DEF_HELPER_FLAGS_6(name, 0, ret, t1, t2, t3, t4, t5, t6) |
56 | +#define DEF_HELPER_7(name, ret, t1, t2, t3, t4, t5, t6, t7) \ | ||
57 | + DEF_HELPER_FLAGS_7(name, 0, ret, t1, t2, t3, t4, t5, t6, t7) | ||
58 | |||
59 | /* MAX_OPC_PARAM_IARGS must be set to n if last entry is DEF_HELPER_FLAGS_n. */ | ||
60 | |||
61 | diff --git a/include/exec/helper-proto.h b/include/exec/helper-proto.h | ||
62 | index XXXXXXX..XXXXXXX 100644 | ||
63 | --- a/include/exec/helper-proto.h | ||
64 | +++ b/include/exec/helper-proto.h | ||
65 | @@ -XXX,XX +XXX,XX @@ dh_ctype(ret) HELPER(name) (dh_ctype(t1), dh_ctype(t2), dh_ctype(t3), \ | ||
66 | dh_ctype(ret) HELPER(name) (dh_ctype(t1), dh_ctype(t2), dh_ctype(t3), \ | ||
67 | dh_ctype(t4), dh_ctype(t5), dh_ctype(t6)); | ||
68 | |||
69 | +#define DEF_HELPER_FLAGS_7(name, flags, ret, t1, t2, t3, t4, t5, t6, t7) \ | ||
70 | +dh_ctype(ret) HELPER(name) (dh_ctype(t1), dh_ctype(t2), dh_ctype(t3), \ | ||
71 | + dh_ctype(t4), dh_ctype(t5), dh_ctype(t6), \ | ||
72 | + dh_ctype(t7)); | ||
126 | + | 73 | + |
127 | static uint64_t full_be_lduw_cmmu(CPUArchState *env, target_ulong addr, | 74 | #include "helper.h" |
128 | TCGMemOpIdx oi, uintptr_t retaddr) | 75 | #include "trace/generated-helpers.h" |
129 | { | 76 | #include "tcg-runtime.h" |
130 | @@ -XXX,XX +XXX,XX @@ static uint64_t full_be_lduw_cmmu(CPUArchState *env, target_ulong addr, | 77 | @@ -XXX,XX +XXX,XX @@ dh_ctype(ret) HELPER(name) (dh_ctype(t1), dh_ctype(t2), dh_ctype(t3), \ |
131 | full_be_lduw_cmmu); | 78 | #undef DEF_HELPER_FLAGS_4 |
132 | } | 79 | #undef DEF_HELPER_FLAGS_5 |
133 | 80 | #undef DEF_HELPER_FLAGS_6 | |
134 | -uint16_t helper_be_ldw_cmmu(CPUArchState *env, target_ulong addr, | 81 | +#undef DEF_HELPER_FLAGS_7 |
135 | +uint16_t helper_be_lduw_cmmu(CPUArchState *env, target_ulong addr, | 82 | |
136 | TCGMemOpIdx oi, uintptr_t retaddr) | 83 | #endif /* HELPER_PROTO_H */ |
137 | { | 84 | diff --git a/include/exec/helper-tcg.h b/include/exec/helper-tcg.h |
138 | return full_be_lduw_cmmu(env, addr, oi, retaddr); | 85 | index XXXXXXX..XXXXXXX 100644 |
139 | } | 86 | --- a/include/exec/helper-tcg.h |
140 | 87 | +++ b/include/exec/helper-tcg.h | |
141 | +int16_t helper_be_ldsw_cmmu(CPUArchState *env, target_ulong addr, | 88 | @@ -XXX,XX +XXX,XX @@ |
142 | + TCGMemOpIdx oi, uintptr_t retaddr) | 89 | | dh_sizemask(t2, 2) | dh_sizemask(t3, 3) | dh_sizemask(t4, 4) \ |
143 | +{ | 90 | | dh_sizemask(t5, 5) | dh_sizemask(t6, 6) }, |
144 | + return (int16_t) full_be_lduw_cmmu(env, addr, oi, retaddr); | 91 | |
145 | +} | 92 | +#define DEF_HELPER_FLAGS_7(NAME, FLAGS, ret, t1, t2, t3, t4, t5, t6, t7) \ |
93 | + { .func = HELPER(NAME), .name = str(NAME), .flags = FLAGS, \ | ||
94 | + .sizemask = dh_sizemask(ret, 0) | dh_sizemask(t1, 1) \ | ||
95 | + | dh_sizemask(t2, 2) | dh_sizemask(t3, 3) | dh_sizemask(t4, 4) \ | ||
96 | + | dh_sizemask(t5, 5) | dh_sizemask(t6, 6) | dh_sizemask(t7, 7) }, | ||
146 | + | 97 | + |
147 | static uint64_t full_le_ldul_cmmu(CPUArchState *env, target_ulong addr, | 98 | #include "helper.h" |
148 | TCGMemOpIdx oi, uintptr_t retaddr) | 99 | #include "trace/generated-helpers.h" |
149 | { | 100 | #include "tcg-runtime.h" |
150 | diff --git a/target/cris/translate_v10.inc.c b/target/cris/translate_v10.inc.c | 101 | @@ -XXX,XX +XXX,XX @@ |
151 | index XXXXXXX..XXXXXXX 100644 | 102 | #undef DEF_HELPER_FLAGS_4 |
152 | --- a/target/cris/translate_v10.inc.c | 103 | #undef DEF_HELPER_FLAGS_5 |
153 | +++ b/target/cris/translate_v10.inc.c | 104 | #undef DEF_HELPER_FLAGS_6 |
154 | @@ -XXX,XX +XXX,XX @@ static unsigned int dec10_ind(CPUCRISState *env, DisasContext *dc) | 105 | +#undef DEF_HELPER_FLAGS_7 |
155 | case CRISV10_IND_BCC_M: | 106 | |
156 | 107 | #endif /* HELPER_TCG_H */ | |
157 | cris_cc_mask(dc, 0); | ||
158 | - imm = cpu_ldsw_code(env, dc->pc + 2); | ||
159 | - simm = (int16_t)imm; | ||
160 | + simm = cpu_ldsw_code(env, dc->pc + 2); | ||
161 | simm += 4; | ||
162 | |||
163 | LOG_DIS("bcc_m: b%s %x\n", cc_name(dc->cond), dc->pc + simm); | ||
164 | -- | 108 | -- |
165 | 2.17.1 | 109 | 2.20.1 |
166 | 110 | ||
167 | 111 | diff view generated by jsdifflib |
Deleted patch | |||
---|---|---|---|
1 | From: Wei Yang <richardw.yang@linux.intel.com> | ||
2 | 1 | ||
3 | Use ROUND_UP() to define, which is a little bit easy to read. | ||
4 | |||
5 | Reviewed-by: Alex Bennée <alex.bennee@linaro.org> | ||
6 | Reviewed-by: Michael S. Tsirkin <mst@redhat.com> | ||
7 | Reviewed-by: David Gibson <david@gibson.dropbear.id.au> | ||
8 | Reviewed-by: Juan Quintela <quintela@redhat.com> | ||
9 | Signed-off-by: Wei Yang <richardw.yang@linux.intel.com> | ||
10 | Message-Id: <20191013021145.16011-2-richardw.yang@linux.intel.com> | ||
11 | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> | ||
12 | --- | ||
13 | include/exec/cpu-all.h | 7 +++---- | ||
14 | 1 file changed, 3 insertions(+), 4 deletions(-) | ||
15 | |||
16 | diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h | ||
17 | index XXXXXXX..XXXXXXX 100644 | ||
18 | --- a/include/exec/cpu-all.h | ||
19 | +++ b/include/exec/cpu-all.h | ||
20 | @@ -XXX,XX +XXX,XX @@ extern int target_page_bits; | ||
21 | |||
22 | #define TARGET_PAGE_SIZE (1 << TARGET_PAGE_BITS) | ||
23 | #define TARGET_PAGE_MASK ~(TARGET_PAGE_SIZE - 1) | ||
24 | -#define TARGET_PAGE_ALIGN(addr) (((addr) + TARGET_PAGE_SIZE - 1) & TARGET_PAGE_MASK) | ||
25 | +#define TARGET_PAGE_ALIGN(addr) ROUND_UP((addr), TARGET_PAGE_SIZE) | ||
26 | |||
27 | /* Using intptr_t ensures that qemu_*_page_mask is sign-extended even | ||
28 | * when intptr_t is 32-bit and we are aligning a long long. | ||
29 | @@ -XXX,XX +XXX,XX @@ extern int target_page_bits; | ||
30 | extern uintptr_t qemu_host_page_size; | ||
31 | extern intptr_t qemu_host_page_mask; | ||
32 | |||
33 | -#define HOST_PAGE_ALIGN(addr) (((addr) + qemu_host_page_size - 1) & qemu_host_page_mask) | ||
34 | -#define REAL_HOST_PAGE_ALIGN(addr) (((addr) + qemu_real_host_page_size - 1) & \ | ||
35 | - qemu_real_host_page_mask) | ||
36 | +#define HOST_PAGE_ALIGN(addr) ROUND_UP((addr), qemu_host_page_size) | ||
37 | +#define REAL_HOST_PAGE_ALIGN(addr) ROUND_UP((addr), qemu_real_host_page_size) | ||
38 | |||
39 | /* same as PROT_xxx */ | ||
40 | #define PAGE_READ 0x0001 | ||
41 | -- | ||
42 | 2.17.1 | ||
43 | |||
44 | diff view generated by jsdifflib |
Deleted patch | |||
---|---|---|---|
1 | Such support is present almost everywhere, except for Xcode 9. | ||
2 | It is added in Xcode 10, but travis uses xcode9 by default, | ||
3 | so we should support it for a while yet. | ||
4 | 1 | ||
5 | Reviewed-by: Alex Bennée <alex.bennee@linaro.org> | ||
6 | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> | ||
7 | --- | ||
8 | configure | 19 +++++++++++++++++++ | ||
9 | 1 file changed, 19 insertions(+) | ||
10 | |||
11 | diff --git a/configure b/configure | ||
12 | index XXXXXXX..XXXXXXX 100755 | ||
13 | --- a/configure | ||
14 | +++ b/configure | ||
15 | @@ -XXX,XX +XXX,XX @@ if compile_prog "" "" ; then | ||
16 | vector16=yes | ||
17 | fi | ||
18 | |||
19 | +######################################## | ||
20 | +# See if __attribute__((alias)) is supported. | ||
21 | +# This false for Xcode 9, but has been remedied for Xcode 10. | ||
22 | +# Unfortunately, travis uses Xcode 9 by default. | ||
23 | + | ||
24 | +attralias=no | ||
25 | +cat > $TMPC << EOF | ||
26 | +int x = 1; | ||
27 | +extern const int y __attribute__((alias("x"))); | ||
28 | +int main(void) { return 0; } | ||
29 | +EOF | ||
30 | +if compile_prog "" "" ; then | ||
31 | + attralias=yes | ||
32 | +fi | ||
33 | + | ||
34 | ######################################## | ||
35 | # check if getauxval is available. | ||
36 | |||
37 | @@ -XXX,XX +XXX,XX @@ if test "$vector16" = "yes" ; then | ||
38 | echo "CONFIG_VECTOR16=y" >> $config_host_mak | ||
39 | fi | ||
40 | |||
41 | +if test "$attralias" = "yes" ; then | ||
42 | + echo "CONFIG_ATTRIBUTE_ALIAS=y" >> $config_host_mak | ||
43 | +fi | ||
44 | + | ||
45 | if test "$getauxval" = "yes" ; then | ||
46 | echo "CONFIG_GETAUXVAL=y" >> $config_host_mak | ||
47 | fi | ||
48 | -- | ||
49 | 2.17.1 | ||
50 | |||
51 | diff view generated by jsdifflib |
Deleted patch | |||
---|---|---|---|
1 | Using a variable that is declared "const" for this tells the | ||
2 | compiler that it may read the value once and assume that it | ||
3 | does not change across function calls. | ||
4 | 1 | ||
5 | For target_page_size, this means we have only one assert per | ||
6 | function, and one read of the variable. | ||
7 | |||
8 | This reduces the size of qemu-system-aarch64 by 8k. | ||
9 | |||
10 | Reviewed-by: Alex Bennée <alex.bennee@linaro.org> | ||
11 | Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> | ||
12 | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> | ||
13 | --- | ||
14 | include/exec/cpu-all.h | 14 +++++++--- | ||
15 | exec-vary.c | 60 ++++++++++++++++++++++++++++++++++++------ | ||
16 | 2 files changed, 62 insertions(+), 12 deletions(-) | ||
17 | |||
18 | diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h | ||
19 | index XXXXXXX..XXXXXXX 100644 | ||
20 | --- a/include/exec/cpu-all.h | ||
21 | +++ b/include/exec/cpu-all.h | ||
22 | @@ -XXX,XX +XXX,XX @@ static inline void stl_phys_notdirty(AddressSpace *as, hwaddr addr, uint32_t val | ||
23 | /* page related stuff */ | ||
24 | |||
25 | #ifdef TARGET_PAGE_BITS_VARY | ||
26 | -extern bool target_page_bits_decided; | ||
27 | -extern int target_page_bits; | ||
28 | -#define TARGET_PAGE_BITS ({ assert(target_page_bits_decided); \ | ||
29 | - target_page_bits; }) | ||
30 | +typedef struct { | ||
31 | + bool decided; | ||
32 | + int bits; | ||
33 | +} TargetPageBits; | ||
34 | +# if defined(CONFIG_ATTRIBUTE_ALIAS) || !defined(IN_EXEC_VARY) | ||
35 | +extern const TargetPageBits target_page; | ||
36 | +#else | ||
37 | +extern TargetPageBits target_page; | ||
38 | +# endif | ||
39 | +#define TARGET_PAGE_BITS (assert(target_page.decided), target_page.bits) | ||
40 | #else | ||
41 | #define TARGET_PAGE_BITS_MIN TARGET_PAGE_BITS | ||
42 | #endif | ||
43 | diff --git a/exec-vary.c b/exec-vary.c | ||
44 | index XXXXXXX..XXXXXXX 100644 | ||
45 | --- a/exec-vary.c | ||
46 | +++ b/exec-vary.c | ||
47 | @@ -XXX,XX +XXX,XX @@ | ||
48 | |||
49 | #include "qemu/osdep.h" | ||
50 | #include "qemu-common.h" | ||
51 | + | ||
52 | +#define IN_EXEC_VARY 1 | ||
53 | + | ||
54 | #include "exec/exec-all.h" | ||
55 | |||
56 | #ifdef TARGET_PAGE_BITS_VARY | ||
57 | -int target_page_bits; | ||
58 | -bool target_page_bits_decided; | ||
59 | +# ifdef CONFIG_ATTRIBUTE_ALIAS | ||
60 | +/* | ||
61 | + * We want to declare the "target_page" variable as const, which tells | ||
62 | + * the compiler that it can cache any value that it reads across calls. | ||
63 | + * This avoids multiple assertions and multiple reads within any one user. | ||
64 | + * | ||
65 | + * This works because we initialize the target_page data very early, in a | ||
66 | + * location far removed from the functions that require the final results. | ||
67 | + * | ||
68 | + * This also requires that we have a non-constant symbol by which we can | ||
69 | + * perform the actual initialization, and which forces the data to be | ||
70 | + * allocated within writable memory. Thus "init_target_page", and we use | ||
71 | + * that symbol exclusively in the two functions that initialize this value. | ||
72 | + * | ||
73 | + * The "target_page" symbol is created as an alias of "init_target_page". | ||
74 | + */ | ||
75 | +static TargetPageBits init_target_page; | ||
76 | + | ||
77 | +/* | ||
78 | + * Note that this is *not* a redundant decl, this is the definition of | ||
79 | + * the "target_page" symbol. The syntax for this definition requires | ||
80 | + * the use of the extern keyword. This seems to be a GCC bug in | ||
81 | + * either the syntax for the alias attribute or in -Wredundant-decls. | ||
82 | + * | ||
83 | + * See https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91765 | ||
84 | + */ | ||
85 | +# pragma GCC diagnostic push | ||
86 | +# pragma GCC diagnostic ignored "-Wredundant-decls" | ||
87 | + | ||
88 | +extern const TargetPageBits target_page | ||
89 | + __attribute__((alias("init_target_page"))); | ||
90 | + | ||
91 | +# pragma GCC diagnostic pop | ||
92 | +# else | ||
93 | +/* | ||
94 | + * When aliases are not supported then we force two different declarations, | ||
95 | + * by way of suppressing the header declaration with IN_EXEC_VARY. | ||
96 | + * We assume that on such an old compiler, LTO cannot be used, and so the | ||
97 | + * compiler cannot not detect the mismatched declarations, and all is well. | ||
98 | + */ | ||
99 | +TargetPageBits target_page; | ||
100 | +# define init_target_page target_page | ||
101 | +# endif | ||
102 | #endif | ||
103 | |||
104 | bool set_preferred_target_page_bits(int bits) | ||
105 | @@ -XXX,XX +XXX,XX @@ bool set_preferred_target_page_bits(int bits) | ||
106 | */ | ||
107 | #ifdef TARGET_PAGE_BITS_VARY | ||
108 | assert(bits >= TARGET_PAGE_BITS_MIN); | ||
109 | - if (target_page_bits == 0 || target_page_bits > bits) { | ||
110 | - if (target_page_bits_decided) { | ||
111 | + if (init_target_page.bits == 0 || init_target_page.bits > bits) { | ||
112 | + if (init_target_page.decided) { | ||
113 | return false; | ||
114 | } | ||
115 | - target_page_bits = bits; | ||
116 | + init_target_page.bits = bits; | ||
117 | } | ||
118 | #endif | ||
119 | return true; | ||
120 | @@ -XXX,XX +XXX,XX @@ bool set_preferred_target_page_bits(int bits) | ||
121 | void finalize_target_page_bits(void) | ||
122 | { | ||
123 | #ifdef TARGET_PAGE_BITS_VARY | ||
124 | - if (target_page_bits == 0) { | ||
125 | - target_page_bits = TARGET_PAGE_BITS_MIN; | ||
126 | + if (init_target_page.bits == 0) { | ||
127 | + init_target_page.bits = TARGET_PAGE_BITS_MIN; | ||
128 | } | ||
129 | - target_page_bits_decided = true; | ||
130 | + init_target_page.decided = true; | ||
131 | #endif | ||
132 | } | ||
133 | -- | ||
134 | 2.17.1 | ||
135 | |||
136 | diff view generated by jsdifflib |
Deleted patch | |||
---|---|---|---|
1 | This reduces the size of a release build by about 10k. | ||
2 | Noticably, within the tlb miss helpers. | ||
3 | 1 | ||
4 | Reviewed-by: Alex Bennée <alex.bennee@linaro.org> | ||
5 | Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> | ||
6 | Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> | ||
7 | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> | ||
8 | --- | ||
9 | include/exec/cpu-all.h | 6 +++++- | ||
10 | 1 file changed, 5 insertions(+), 1 deletion(-) | ||
11 | |||
12 | diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h | ||
13 | index XXXXXXX..XXXXXXX 100644 | ||
14 | --- a/include/exec/cpu-all.h | ||
15 | +++ b/include/exec/cpu-all.h | ||
16 | @@ -XXX,XX +XXX,XX @@ extern const TargetPageBits target_page; | ||
17 | #else | ||
18 | extern TargetPageBits target_page; | ||
19 | # endif | ||
20 | -#define TARGET_PAGE_BITS (assert(target_page.decided), target_page.bits) | ||
21 | +# ifdef CONFIG_DEBUG_TCG | ||
22 | +# define TARGET_PAGE_BITS (assert(target_page.decided), target_page.bits) | ||
23 | +# else | ||
24 | +# define TARGET_PAGE_BITS target_page.bits | ||
25 | +# endif | ||
26 | #else | ||
27 | #define TARGET_PAGE_BITS_MIN TARGET_PAGE_BITS | ||
28 | #endif | ||
29 | -- | ||
30 | 2.17.1 | ||
31 | |||
32 | diff view generated by jsdifflib |
Deleted patch | |||
---|---|---|---|
1 | There are some uint64_t uses that expect TARGET_PAGE_MASK to | ||
2 | extend for a 32-bit, so this must continue to be a signed type. | ||
3 | Define based on TARGET_PAGE_BITS not TARGET_PAGE_SIZE; this | ||
4 | will make a following patch more clear. | ||
5 | 1 | ||
6 | This should not have a functional effect so far. | ||
7 | |||
8 | Reviewed-by: Alex Bennée <alex.bennee@linaro.org> | ||
9 | Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> | ||
10 | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> | ||
11 | --- | ||
12 | include/exec/cpu-all.h | 2 +- | ||
13 | 1 file changed, 1 insertion(+), 1 deletion(-) | ||
14 | |||
15 | diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h | ||
16 | index XXXXXXX..XXXXXXX 100644 | ||
17 | --- a/include/exec/cpu-all.h | ||
18 | +++ b/include/exec/cpu-all.h | ||
19 | @@ -XXX,XX +XXX,XX @@ extern TargetPageBits target_page; | ||
20 | #endif | ||
21 | |||
22 | #define TARGET_PAGE_SIZE (1 << TARGET_PAGE_BITS) | ||
23 | -#define TARGET_PAGE_MASK ~(TARGET_PAGE_SIZE - 1) | ||
24 | +#define TARGET_PAGE_MASK ((target_long)-1 << TARGET_PAGE_BITS) | ||
25 | #define TARGET_PAGE_ALIGN(addr) ROUND_UP((addr), TARGET_PAGE_SIZE) | ||
26 | |||
27 | /* Using intptr_t ensures that qemu_*_page_mask is sign-extended even | ||
28 | -- | ||
29 | 2.17.1 | ||
30 | |||
31 | diff view generated by jsdifflib |
Deleted patch | |||
---|---|---|---|
1 | This eliminates a set of runtime shifts. It turns out that we | ||
2 | require TARGET_PAGE_MASK more often than TARGET_PAGE_SIZE, so | ||
3 | redefine TARGET_PAGE_SIZE based on TARGET_PAGE_MASK instead of | ||
4 | the other way around. | ||
5 | 1 | ||
6 | Reviewed-by: Alex Bennée <alex.bennee@linaro.org> | ||
7 | Reviewed-by: David Hildenbrand <david@redhat.com> | ||
8 | Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> | ||
9 | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> | ||
10 | --- | ||
11 | include/exec/cpu-all.h | 8 ++++++-- | ||
12 | exec-vary.c | 1 + | ||
13 | 2 files changed, 7 insertions(+), 2 deletions(-) | ||
14 | |||
15 | diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h | ||
16 | index XXXXXXX..XXXXXXX 100644 | ||
17 | --- a/include/exec/cpu-all.h | ||
18 | +++ b/include/exec/cpu-all.h | ||
19 | @@ -XXX,XX +XXX,XX @@ static inline void stl_phys_notdirty(AddressSpace *as, hwaddr addr, uint32_t val | ||
20 | typedef struct { | ||
21 | bool decided; | ||
22 | int bits; | ||
23 | + target_long mask; | ||
24 | } TargetPageBits; | ||
25 | # if defined(CONFIG_ATTRIBUTE_ALIAS) || !defined(IN_EXEC_VARY) | ||
26 | extern const TargetPageBits target_page; | ||
27 | @@ -XXX,XX +XXX,XX @@ extern TargetPageBits target_page; | ||
28 | # endif | ||
29 | # ifdef CONFIG_DEBUG_TCG | ||
30 | # define TARGET_PAGE_BITS (assert(target_page.decided), target_page.bits) | ||
31 | +# define TARGET_PAGE_MASK (assert(target_page.decided), target_page.mask) | ||
32 | # else | ||
33 | # define TARGET_PAGE_BITS target_page.bits | ||
34 | +# define TARGET_PAGE_MASK target_page.mask | ||
35 | # endif | ||
36 | +# define TARGET_PAGE_SIZE (-(int)TARGET_PAGE_MASK) | ||
37 | #else | ||
38 | #define TARGET_PAGE_BITS_MIN TARGET_PAGE_BITS | ||
39 | +#define TARGET_PAGE_SIZE (1 << TARGET_PAGE_BITS) | ||
40 | +#define TARGET_PAGE_MASK ((target_long)-1 << TARGET_PAGE_BITS) | ||
41 | #endif | ||
42 | |||
43 | -#define TARGET_PAGE_SIZE (1 << TARGET_PAGE_BITS) | ||
44 | -#define TARGET_PAGE_MASK ((target_long)-1 << TARGET_PAGE_BITS) | ||
45 | #define TARGET_PAGE_ALIGN(addr) ROUND_UP((addr), TARGET_PAGE_SIZE) | ||
46 | |||
47 | /* Using intptr_t ensures that qemu_*_page_mask is sign-extended even | ||
48 | diff --git a/exec-vary.c b/exec-vary.c | ||
49 | index XXXXXXX..XXXXXXX 100644 | ||
50 | --- a/exec-vary.c | ||
51 | +++ b/exec-vary.c | ||
52 | @@ -XXX,XX +XXX,XX @@ void finalize_target_page_bits(void) | ||
53 | init_target_page.bits = TARGET_PAGE_BITS_MIN; | ||
54 | } | ||
55 | init_target_page.decided = true; | ||
56 | + init_target_page.mask = (target_long)-1 << init_target_page.bits; | ||
57 | #endif | ||
58 | } | ||
59 | -- | ||
60 | 2.17.1 | ||
61 | |||
62 | diff view generated by jsdifflib |
Deleted patch | |||
---|---|---|---|
1 | Using uintptr_t instead of target_ulong meant that, for 64-bit guest | ||
2 | and 32-bit host, we truncated the guest address comparator and so may | ||
3 | not hit the tlb when we should. | ||
4 | 1 | ||
5 | Fixes: 4811e9095c0 | ||
6 | Reviewed-by: David Hildenbrand <david@redhat.com> | ||
7 | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> | ||
8 | --- | ||
9 | accel/tcg/cputlb.c | 2 +- | ||
10 | 1 file changed, 1 insertion(+), 1 deletion(-) | ||
11 | |||
12 | diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c | ||
13 | index XXXXXXX..XXXXXXX 100644 | ||
14 | --- a/accel/tcg/cputlb.c | ||
15 | +++ b/accel/tcg/cputlb.c | ||
16 | @@ -XXX,XX +XXX,XX @@ void *tlb_vaddr_to_host(CPUArchState *env, abi_ptr addr, | ||
17 | MMUAccessType access_type, int mmu_idx) | ||
18 | { | ||
19 | CPUTLBEntry *entry = tlb_entry(env, mmu_idx, addr); | ||
20 | - uintptr_t tlb_addr, page; | ||
21 | + target_ulong tlb_addr, page; | ||
22 | size_t elt_ofs; | ||
23 | |||
24 | switch (access_type) { | ||
25 | -- | ||
26 | 2.17.1 | ||
27 | |||
28 | diff view generated by jsdifflib |
Deleted patch | |||
---|---|---|---|
1 | From: Clement Deschamps <clement.deschamps@greensocs.com> | ||
2 | 1 | ||
3 | This fixes a segmentation fault in icount mode when executing | ||
4 | from an IO region. | ||
5 | |||
6 | TB is marked as CF_NOCACHE but tb->orig_tb is not initialized | ||
7 | (equals previous value in code_gen_buffer). | ||
8 | |||
9 | The issue happens in cpu_io_recompile() when it tries to invalidate orig_tb. | ||
10 | |||
11 | Reviewed-by: Richard Henderson <richard.henderson@linaro.org> | ||
12 | Signed-off-by: Clement Deschamps <clement.deschamps@greensocs.com> | ||
13 | Message-Id: <20191022140016.918371-1-clement.deschamps@greensocs.com> | ||
14 | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> | ||
15 | --- | ||
16 | accel/tcg/translate-all.c | 1 + | ||
17 | 1 file changed, 1 insertion(+) | ||
18 | |||
19 | diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c | ||
20 | index XXXXXXX..XXXXXXX 100644 | ||
21 | --- a/accel/tcg/translate-all.c | ||
22 | +++ b/accel/tcg/translate-all.c | ||
23 | @@ -XXX,XX +XXX,XX @@ TranslationBlock *tb_gen_code(CPUState *cpu, | ||
24 | tb->cs_base = cs_base; | ||
25 | tb->flags = flags; | ||
26 | tb->cflags = cflags; | ||
27 | + tb->orig_tb = NULL; | ||
28 | tb->trace_vcpu_dstate = *cpu->trace_dstate; | ||
29 | tcg_ctx->tb_cflags = cflags; | ||
30 | tb_overflow: | ||
31 | -- | ||
32 | 2.17.1 | ||
33 | |||
34 | diff view generated by jsdifflib |
1 | Since 2ac01d6dafab, this function does only two things: assert a | 1 | Extend the vector generator infrastructure to handle |
---|---|---|---|
2 | lock is held, and call tcg_tb_alloc. It is used exactly once, | 2 | 5 vector arguments. |
3 | and its user has already done the assert. | ||
4 | 3 | ||
5 | Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> | 4 | Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> |
6 | Reviewed-by: Clement Deschamps <clement.deschamps@greensocs.com> | 5 | Reviewed-by: Alex Bennée <alex.bennee@linaro.org> |
6 | Reviewed-by: Taylor Simpson <tsimpson@quicinc.com> | ||
7 | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> | 7 | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
8 | --- | 8 | --- |
9 | accel/tcg/translate-all.c | 20 ++------------------ | 9 | include/tcg/tcg-op-gvec.h | 7 +++++++ |
10 | 1 file changed, 2 insertions(+), 18 deletions(-) | 10 | tcg/tcg-op-gvec.c | 32 ++++++++++++++++++++++++++++++++ |
11 | 2 files changed, 39 insertions(+) | ||
11 | 12 | ||
12 | diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c | 13 | diff --git a/include/tcg/tcg-op-gvec.h b/include/tcg/tcg-op-gvec.h |
13 | index XXXXXXX..XXXXXXX 100644 | 14 | index XXXXXXX..XXXXXXX 100644 |
14 | --- a/accel/tcg/translate-all.c | 15 | --- a/include/tcg/tcg-op-gvec.h |
15 | +++ b/accel/tcg/translate-all.c | 16 | +++ b/include/tcg/tcg-op-gvec.h |
16 | @@ -XXX,XX +XXX,XX @@ void tcg_exec_init(unsigned long tb_size) | 17 | @@ -XXX,XX +XXX,XX @@ void tcg_gen_gvec_4_ptr(uint32_t dofs, uint32_t aofs, uint32_t bofs, |
17 | #endif | 18 | uint32_t maxsz, int32_t data, |
19 | gen_helper_gvec_4_ptr *fn); | ||
20 | |||
21 | +typedef void gen_helper_gvec_5_ptr(TCGv_ptr, TCGv_ptr, TCGv_ptr, TCGv_ptr, | ||
22 | + TCGv_ptr, TCGv_ptr, TCGv_i32); | ||
23 | +void tcg_gen_gvec_5_ptr(uint32_t dofs, uint32_t aofs, uint32_t bofs, | ||
24 | + uint32_t cofs, uint32_t eofs, TCGv_ptr ptr, | ||
25 | + uint32_t oprsz, uint32_t maxsz, int32_t data, | ||
26 | + gen_helper_gvec_5_ptr *fn); | ||
27 | + | ||
28 | /* Expand a gvec operation. Either inline or out-of-line depending on | ||
29 | the actual vector size and the operations supported by the host. */ | ||
30 | typedef struct { | ||
31 | diff --git a/tcg/tcg-op-gvec.c b/tcg/tcg-op-gvec.c | ||
32 | index XXXXXXX..XXXXXXX 100644 | ||
33 | --- a/tcg/tcg-op-gvec.c | ||
34 | +++ b/tcg/tcg-op-gvec.c | ||
35 | @@ -XXX,XX +XXX,XX @@ void tcg_gen_gvec_4_ptr(uint32_t dofs, uint32_t aofs, uint32_t bofs, | ||
36 | tcg_temp_free_i32(desc); | ||
18 | } | 37 | } |
19 | 38 | ||
20 | -/* | 39 | +/* Generate a call to a gvec-style helper with five vector operands |
21 | - * Allocate a new translation block. Flush the translation buffer if | 40 | + and an extra pointer operand. */ |
22 | - * too many translation blocks or too much generated code. | 41 | +void tcg_gen_gvec_5_ptr(uint32_t dofs, uint32_t aofs, uint32_t bofs, |
23 | - */ | 42 | + uint32_t cofs, uint32_t eofs, TCGv_ptr ptr, |
24 | -static TranslationBlock *tb_alloc(target_ulong pc) | 43 | + uint32_t oprsz, uint32_t maxsz, int32_t data, |
25 | -{ | 44 | + gen_helper_gvec_5_ptr *fn) |
26 | - TranslationBlock *tb; | 45 | +{ |
27 | - | 46 | + TCGv_ptr a0, a1, a2, a3, a4; |
28 | - assert_memory_lock(); | 47 | + TCGv_i32 desc = tcg_const_i32(simd_desc(oprsz, maxsz, data)); |
29 | - | ||
30 | - tb = tcg_tb_alloc(tcg_ctx); | ||
31 | - if (unlikely(tb == NULL)) { | ||
32 | - return NULL; | ||
33 | - } | ||
34 | - return tb; | ||
35 | -} | ||
36 | - | ||
37 | /* call with @p->lock held */ | ||
38 | static inline void invalidate_page_bitmap(PageDesc *p) | ||
39 | { | ||
40 | @@ -XXX,XX +XXX,XX @@ TranslationBlock *tb_gen_code(CPUState *cpu, | ||
41 | TCGProfile *prof = &tcg_ctx->prof; | ||
42 | int64_t ti; | ||
43 | #endif | ||
44 | + | 48 | + |
45 | assert_memory_lock(); | 49 | + a0 = tcg_temp_new_ptr(); |
46 | 50 | + a1 = tcg_temp_new_ptr(); | |
47 | phys_pc = get_page_addr_code(env, pc); | 51 | + a2 = tcg_temp_new_ptr(); |
48 | @@ -XXX,XX +XXX,XX @@ TranslationBlock *tb_gen_code(CPUState *cpu, | 52 | + a3 = tcg_temp_new_ptr(); |
49 | } | 53 | + a4 = tcg_temp_new_ptr(); |
50 | 54 | + | |
51 | buffer_overflow: | 55 | + tcg_gen_addi_ptr(a0, cpu_env, dofs); |
52 | - tb = tb_alloc(pc); | 56 | + tcg_gen_addi_ptr(a1, cpu_env, aofs); |
53 | + tb = tcg_tb_alloc(tcg_ctx); | 57 | + tcg_gen_addi_ptr(a2, cpu_env, bofs); |
54 | if (unlikely(!tb)) { | 58 | + tcg_gen_addi_ptr(a3, cpu_env, cofs); |
55 | /* flush must be done */ | 59 | + tcg_gen_addi_ptr(a4, cpu_env, eofs); |
56 | tb_flush(cpu); | 60 | + |
61 | + fn(a0, a1, a2, a3, a4, ptr, desc); | ||
62 | + | ||
63 | + tcg_temp_free_ptr(a0); | ||
64 | + tcg_temp_free_ptr(a1); | ||
65 | + tcg_temp_free_ptr(a2); | ||
66 | + tcg_temp_free_ptr(a3); | ||
67 | + tcg_temp_free_ptr(a4); | ||
68 | + tcg_temp_free_i32(desc); | ||
69 | +} | ||
70 | + | ||
71 | /* Return true if we want to implement something of OPRSZ bytes | ||
72 | in units of LNSZ. This limits the expansion of inline code. */ | ||
73 | static inline bool check_size_impl(uint32_t oprsz, uint32_t lnsz) | ||
57 | -- | 74 | -- |
58 | 2.17.1 | 75 | 2.20.1 |
59 | 76 | ||
60 | 77 | diff view generated by jsdifflib |