1
Changes from v1: dropped SVE patchset.
1
The following changes since commit e3debd5e7d0ce031356024878a0a18b9d109354a:
2
2
3
The following changes since commit 58560ad254fbda71d4daa6622d71683190070ee2:
3
Merge tag 'pull-request-2023-03-24' of https://gitlab.com/thuth/qemu into staging (2023-03-24 16:08:46 +0000)
4
5
Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-4.2-20191024' into staging (2019-10-24 16:22:58 +0100)
6
4
7
are available in the Git repository at:
5
are available in the Git repository at:
8
6
9
https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20191025
7
https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20230328
10
8
11
for you to fetch changes up to f9469c1a01c333c08980e083e0ad3417256c8b9c:
9
for you to fetch changes up to 46e3b237c52e0c48bfd81bce020b51fbe300b23a:
12
10
13
hw/arm/highbank: Use AddressSpace when using write_secondary_boot() (2019-10-25 13:09:27 +0100)
11
target/arm/gdbstub: Only advertise M-profile features if TCG available (2023-03-28 10:53:40 +0100)
14
12
15
----------------------------------------------------------------
13
----------------------------------------------------------------
16
target-arm queue:
14
target-arm queue:
17
* raspi boards: some cleanup
15
* fix part of the "TCG-disabled builds are broken" issue
18
* raspi: implement the bcm2835 system timer device
19
* raspi: implement a dummy thermal sensor
20
* misc devices: switch to ptimer transaction API
21
* cache TB flag state to improve performance of cpu_get_tb_cpu_state
22
* aspeed: Add an AST2600 eval board
23
16
24
----------------------------------------------------------------
17
----------------------------------------------------------------
25
Cédric Le Goater (2):
18
Philippe Mathieu-Daudé (1):
26
hw/gpio: Fix property accessors of the AST2600 GPIO 1.8V model
19
target/arm/gdbstub: Only advertise M-profile features if TCG available
27
aspeed: Add an AST2600 eval board
28
20
29
Peter Maydell (8):
21
target/arm/gdbstub.c | 5 +++--
30
hw/net/fsl_etsec/etsec.c: Switch to transaction-based ptimer API
22
1 file changed, 3 insertions(+), 2 deletions(-)
31
hw/timer/xilinx_timer.c: Switch to transaction-based ptimer API
32
hw/dma/xilinx_axidma.c: Switch to transaction-based ptimer API
33
hw/timer/slavio_timer: Remove useless check for NULL t->timer
34
hw/timer/slavio_timer.c: Switch to transaction-based ptimer API
35
hw/timer/grlib_gptimer.c: Switch to transaction-based ptimer API
36
hw/m68k/mcf5206.c: Switch to transaction-based ptimer API
37
hw/watchdog/milkymist-sysctl.c: Switch to transaction-based ptimer API
38
23
39
Philippe Mathieu-Daudé (8):
40
hw/misc/bcm2835_thermal: Add a dummy BCM2835 thermal sensor
41
hw/arm/bcm2835_peripherals: Use the thermal sensor block
42
hw/timer/bcm2835: Add the BCM2835 SYS_timer
43
hw/arm/bcm2835_peripherals: Use the SYS_timer
44
hw/arm/bcm2836: Make the SoC code modular
45
hw/arm/bcm2836: Rename cpus[] as cpu[].core
46
hw/arm/raspi: Use AddressSpace when using arm_boot::write_secondary_boot
47
hw/arm/highbank: Use AddressSpace when using write_secondary_boot()
48
49
Richard Henderson (24):
50
target/arm: Split out rebuild_hflags_common
51
target/arm: Split out rebuild_hflags_a64
52
target/arm: Split out rebuild_hflags_common_32
53
target/arm: Split arm_cpu_data_is_big_endian
54
target/arm: Split out rebuild_hflags_m32
55
target/arm: Reduce tests vs M-profile in cpu_get_tb_cpu_state
56
target/arm: Split out rebuild_hflags_a32
57
target/arm: Split out rebuild_hflags_aprofile
58
target/arm: Hoist XSCALE_CPAR, VECLEN, VECSTRIDE in cpu_get_tb_cpu_state
59
target/arm: Simplify set of PSTATE_SS in cpu_get_tb_cpu_state
60
target/arm: Hoist computation of TBFLAG_A32.VFPEN
61
target/arm: Add arm_rebuild_hflags
62
target/arm: Split out arm_mmu_idx_el
63
target/arm: Hoist store to cs_base in cpu_get_tb_cpu_state
64
target/arm: Add HELPER(rebuild_hflags_{a32, a64, m32})
65
target/arm: Rebuild hflags at EL changes
66
target/arm: Rebuild hflags at MSR writes
67
target/arm: Rebuild hflags at CPSR writes
68
target/arm: Rebuild hflags at Xscale SCTLR writes
69
target/arm: Rebuild hflags for M-profile
70
target/arm: Rebuild hflags for M-profile NVIC
71
linux-user/aarch64: Rebuild hflags for TARGET_WORDS_BIGENDIAN
72
linux-user/arm: Rebuild hflags for TARGET_WORDS_BIGENDIAN
73
target/arm: Rely on hflags correct in cpu_get_tb_cpu_state
74
75
hw/misc/Makefile.objs | 1 +
76
hw/timer/Makefile.objs | 1 +
77
hw/net/fsl_etsec/etsec.h | 1 -
78
include/hw/arm/aspeed.h | 1 +
79
include/hw/arm/bcm2835_peripherals.h | 5 +-
80
include/hw/arm/bcm2836.h | 4 +-
81
include/hw/arm/raspi_platform.h | 1 +
82
include/hw/misc/bcm2835_thermal.h | 27 +++
83
include/hw/timer/bcm2835_systmr.h | 33 +++
84
target/arm/cpu.h | 84 +++++---
85
target/arm/helper.h | 4 +
86
target/arm/internals.h | 9 +
87
hw/arm/aspeed.c | 23 ++
88
hw/arm/bcm2835_peripherals.c | 30 ++-
89
hw/arm/bcm2836.c | 44 ++--
90
hw/arm/highbank.c | 3 +-
91
hw/arm/raspi.c | 14 +-
92
hw/dma/xilinx_axidma.c | 9 +-
93
hw/gpio/aspeed_gpio.c | 8 +-
94
hw/intc/armv7m_nvic.c | 22 +-
95
hw/m68k/mcf5206.c | 15 +-
96
hw/misc/bcm2835_thermal.c | 135 ++++++++++++
97
hw/net/fsl_etsec/etsec.c | 9 +-
98
hw/timer/bcm2835_systmr.c | 163 +++++++++++++++
99
hw/timer/grlib_gptimer.c | 28 ++-
100
hw/timer/milkymist-sysctl.c | 25 ++-
101
hw/timer/slavio_timer.c | 32 ++-
102
hw/timer/xilinx_timer.c | 13 +-
103
linux-user/aarch64/cpu_loop.c | 1 +
104
linux-user/arm/cpu_loop.c | 1 +
105
linux-user/syscall.c | 1 +
106
target/arm/cpu.c | 1 +
107
target/arm/helper-a64.c | 3 +
108
target/arm/helper.c | 393 +++++++++++++++++++++++------------
109
target/arm/m_helper.c | 6 +
110
target/arm/machine.c | 1 +
111
target/arm/op_helper.c | 4 +
112
target/arm/translate-a64.c | 13 +-
113
target/arm/translate.c | 33 ++-
114
hw/timer/trace-events | 5 +
115
40 files changed, 945 insertions(+), 261 deletions(-)
116
create mode 100644 include/hw/misc/bcm2835_thermal.h
117
create mode 100644 include/hw/timer/bcm2835_systmr.h
118
create mode 100644 hw/misc/bcm2835_thermal.c
119
create mode 100644 hw/timer/bcm2835_systmr.c
120
diff view generated by jsdifflib
New patch
1
From: Philippe Mathieu-Daudé <philmd@linaro.org>
1
2
3
Cortex-M profile is only emulable from TCG accelerator. Restrict
4
the GDBstub features to its availability in order to avoid a link
5
error when TCG is not enabled:
6
7
Undefined symbols for architecture arm64:
8
"_arm_v7m_get_sp_ptr", referenced from:
9
_m_sysreg_get in target_arm_gdbstub.c.o
10
"_arm_v7m_mrs_control", referenced from:
11
_arm_gdb_get_m_systemreg in target_arm_gdbstub.c.o
12
ld: symbol(s) not found for architecture arm64
13
clang: error: linker command failed with exit code 1 (use -v to see invocation)
14
15
Fixes: 7d8b28b8b5 ("target/arm: Implement gdbstub m-profile systemreg and secext")
16
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
17
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
18
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
19
Message-id: 20230322142902.69511-3-philmd@linaro.org
20
[PMM: add #include since I cherry-picked this patch from the series]
21
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
22
---
23
target/arm/gdbstub.c | 5 +++--
24
1 file changed, 3 insertions(+), 2 deletions(-)
25
26
diff --git a/target/arm/gdbstub.c b/target/arm/gdbstub.c
27
index XXXXXXX..XXXXXXX 100644
28
--- a/target/arm/gdbstub.c
29
+++ b/target/arm/gdbstub.c
30
@@ -XXX,XX +XXX,XX @@
31
#include "cpu.h"
32
#include "exec/gdbstub.h"
33
#include "gdbstub/helpers.h"
34
+#include "sysemu/tcg.h"
35
#include "internals.h"
36
#include "cpregs.h"
37
38
@@ -XXX,XX +XXX,XX @@ void arm_cpu_register_gdb_regs_for_features(ARMCPU *cpu)
39
2, "arm-vfp-sysregs.xml", 0);
40
}
41
}
42
- if (cpu_isar_feature(aa32_mve, cpu)) {
43
+ if (cpu_isar_feature(aa32_mve, cpu) && tcg_enabled()) {
44
gdb_register_coprocessor(cs, mve_gdb_get_reg, mve_gdb_set_reg,
45
1, "arm-m-profile-mve.xml", 0);
46
}
47
@@ -XXX,XX +XXX,XX @@ void arm_cpu_register_gdb_regs_for_features(ARMCPU *cpu)
48
arm_gen_dynamic_sysreg_xml(cs, cs->gdb_num_regs),
49
"system-registers.xml", 0);
50
51
- if (arm_feature(env, ARM_FEATURE_M)) {
52
+ if (arm_feature(env, ARM_FEATURE_M) && tcg_enabled()) {
53
gdb_register_coprocessor(cs,
54
arm_gdb_get_m_systemreg, arm_gdb_set_m_systemreg,
55
arm_gen_dynamic_m_systemreg_xml(cs, cs->gdb_num_regs),
56
--
57
2.34.1
58
59
diff view generated by jsdifflib