[PATCH v3 0/3] Update capstone module

Richard Henderson posted 3 patches 4 years, 6 months ago
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git fetch https://github.com/patchew-project/qemu tags/patchew/20191015175133.16598-1-richard.henderson@linaro.org
Maintainers: David Hildenbrand <david@redhat.com>, Cornelia Huck <cohuck@redhat.com>, Richard Henderson <rth@twiddle.net>
Makefile           |  2 ++
disas.c            | 40 ++++++++++++++++++++++++++++++++++++++++
target/s390x/cpu.c |  4 ++++
capstone           |  2 +-
configure          |  2 +-
5 files changed, 48 insertions(+), 2 deletions(-)
[PATCH v3 0/3] Update capstone module
Posted by Richard Henderson 4 years, 6 months ago
Tested vs centos7, fedora30, and bionic (with and without
system capstone installed).

Changes for v3:
  * Work around the various include directory nonsense.
  * Re-add the s390 skipdata callback, as a separate patch.

Changes for v2:
  * Drop the installed directory change.  This does force a
    different include change when building from git.
  * Drop the s390 skipdata callback for now.


r~


Richard Henderson (3):
  capstone: Update to master
  capstone: Enable disassembly for s390x
  capstone: Fix s390x skipdata

 Makefile           |  2 ++
 disas.c            | 40 ++++++++++++++++++++++++++++++++++++++++
 target/s390x/cpu.c |  4 ++++
 capstone           |  2 +-
 configure          |  2 +-
 5 files changed, 48 insertions(+), 2 deletions(-)

-- 
2.17.1


Re: [PATCH v3 0/3] Update capstone module
Posted by Philippe Mathieu-Daudé 4 years, 3 months ago
Hi Richard,

On 10/15/19 7:51 PM, Richard Henderson wrote:
> Tested vs centos7, fedora30, and bionic (with and without
> system capstone installed).

Change noted while testing:

* Raw byte dumped as hexa

   before: no
   after:  dumped by 16-bit

   OK

* Address format

   before: "0x" TARGET_FMT_lx (16 chars)
   after:  "0x%08" PRIx64     (8 chars)

   Shorten this might be OK because we now also dump
   the raw bytes previous to the mnemonic/arguments

   -0x0000000000010014:  mvi       163,1
   -0x0000000000010018:  slr       %r0,%r0
   -0x000000000001001a:  lhi       %r1,2
   +0x00010014:  9201 00a3       mvi      0xa3, 1
   +0x00010018:  1f00            slr      %r0, %r0
   +0x0001001a:  a718 0002       lhi      %r1, 2

* Number argument format

   before: decimal
   after:  hexa

   -0x00010014:  mvi       163,1
   +0x00010014:   mvi      0xa3, 1

   OK

* (Priviledged) Instruction missing

   -0x0001001e:  sigp      %r1,%r0,18
   +0x0001001e:   .byte    0xae, 0x10, 0x00, 0x12

   -0x00010066:  lmh       %r0,%r15,0(%r13)
   +0x00010066:   .byte    0xeb, 0x0f, 0xd0, 0x00, 0x00, 0x96

   -0x0001006c:  sam64
   +0x0001006c:   .byte    0x01, 0x0e

   -0x00010088:  lctlg     %c0,%c15,512
   +0x00010088:   .byte    0xeb, 0x0f, 0x02, 0x00, 0x00, 0x2f

   -0x0001008e:  stcke     808
   +0x0001008e:   .byte    0xb2, 0x78, 0x03, 0x28

   -0x00010098:  spt       80(%r13)
   +0x00010098:   .byte    0xb2, 0x08, 0xd0, 0x50

   -0x000149b6:  stfl      0
   +0x000149b6:   .byte    0xb2, 0xb1, 0x00, 0x00

   -0x000149da:  stfle     0(%r1)
   +0x000149da:   .byte    0xb2, 0xb0, 0x10, 0x00

   -0x00011a34:  icm       %r5,3,0(%r1)
   +0x00011a34:   .byte    0xbf, 0x53, 0x10, 0x00

   -0x0010e8f6:  lpswe     160(%r15)
   +0x0010e8f6:   .byte    0xb2, 0xb2, 0xf0, 0xa0

Is it possible to fallback to the older disassembler on a 
per-instruction basis if Capstone doesn't know about an instruction?

> Changes for v3:
>    * Work around the various include directory nonsense.
>    * Re-add the s390 skipdata callback, as a separate patch.
> 
> Changes for v2:
>    * Drop the installed directory change.  This does force a
>      different include change when building from git.
>    * Drop the s390 skipdata callback for now.


Re: [PATCH v3 0/3] Update capstone module
Posted by Richard Henderson 4 years, 3 months ago
On 1/3/20 6:16 PM, Philippe Mathieu-Daudé wrote:
>   -0x0010e8f6:  lpswe     160(%r15)
>   +0x0010e8f6:   .byte    0xb2, 0xb2, 0xf0, 0xa0
> 
> Is it possible to fallback to the older disassembler on a per-instruction basis
> if Capstone doesn't know about an instruction?

Not as written.  But I suppose we could rearrange both dump loops to allow such
a thing.


r~