[PATCH v5 0/2] x86: Enable user wait instructions

Tao Xu posted 2 patches 6 years, 1 month ago
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git fetch https://github.com/patchew-project/qemu tags/patchew/20190929015718.19562-1-tao3.xu@intel.com
Maintainers: Eduardo Habkost <ehabkost@redhat.com>, Marcelo Tosatti <mtosatti@redhat.com>, Richard Henderson <rth@twiddle.net>, Paolo Bonzini <pbonzini@redhat.com>
There is a newer version of this series
target/i386/cpu.c     |  3 ++-
target/i386/cpu.h     |  3 +++
target/i386/kvm.c     | 19 +++++++++++++++++++
target/i386/machine.c | 20 ++++++++++++++++++++
4 files changed, 44 insertions(+), 1 deletion(-)
[PATCH v5 0/2] x86: Enable user wait instructions
Posted by Tao Xu 6 years, 1 month ago
UMONITOR, UMWAIT and TPAUSE are a set of user wait instructions.

UMONITOR arms address monitoring hardware using an address. A store
to an address within the specified address range triggers the
monitoring hardware to wake up the processor waiting in umwait.

UMWAIT instructs the processor to enter an implementation-dependent
optimized state while monitoring a range of addresses. The optimized
state may be either a light-weight power/performance optimized state
(c0.1 state) or an improved power/performance optimized state
(c0.2 state).

TPAUSE instructs the processor to enter an implementation-dependent
optimized state c0.1 or c0.2 state and wake up when time-stamp counter
reaches specified timeout.

Availability of the user wait instructions is indicated by the presence
of the CPUID feature flag WAITPKG CPUID.0x07.0x0:ECX[5].

The patches enable the umonitor, umwait and tpause features in KVM.
Because umwait and tpause can put a (psysical) CPU into a power saving
state, by default we dont't expose it in kvm and provide a capability to
enable it. Use kvm capability to enable UMONITOR, UMWAIT and TPAUSE when
QEMU use "-overcommit cpu-pm=on, a VM can use UMONITOR, UMWAIT and TPAUSE
instructions. If the instruction causes a delay, the amount of time
delayed is called here the physical delay. The physical delay is first
computed by determining the virtual delay (the time to delay relative to
the VM’s timestamp counter). Otherwise, UMONITOR, UMWAIT and TPAUSE cause
an invalid-opcode exception(#UD).

The release document ref below link:
https://software.intel.com/sites/default/files/\
managed/39/c5/325462-sdm-vol-1-2abcd-3abcd.pdf

Changelog:
v5:
	Remove CPUID_7_0_ECX_WAITPKG if enable_cpu_pm is not set. (Paolo)
v4:
	Set IA32_UMWAIT_CONTROL 32bits
v3:
	Simplify the patches, expose user wait instructions when the guest
	has CPUID (Paolo)
v2:
	Separated from the series
	https://www.mail-archive.com/qemu-devel@nongnu.org/msg549526.html
	Use kvm capability to enable UMONITOR, UMWAIT and TPAUSE when
	QEMU use "-overcommit cpu-pm=on"	
v1:
	Sent out with MOVDIRI/MOVDIR64B instructions patches

Tao Xu (2):
  x86/cpu: Add support for UMONITOR/UMWAIT/TPAUSE
  target/i386: Add support for save/load IA32_UMWAIT_CONTROL MSR

 target/i386/cpu.c     |  3 ++-
 target/i386/cpu.h     |  3 +++
 target/i386/kvm.c     | 19 +++++++++++++++++++
 target/i386/machine.c | 20 ++++++++++++++++++++
 4 files changed, 44 insertions(+), 1 deletion(-)

-- 
2.20.1


Re: [PATCH v5 0/2] x86: Enable user wait instructions
Posted by Tao Xu 6 years, 1 month ago
Ping for comments :)

On 9/29/2019 9:57 AM, Xu, Tao3 wrote:
> UMONITOR, UMWAIT and TPAUSE are a set of user wait instructions.
> 
> UMONITOR arms address monitoring hardware using an address. A store
> to an address within the specified address range triggers the
> monitoring hardware to wake up the processor waiting in umwait.
> 
> UMWAIT instructs the processor to enter an implementation-dependent
> optimized state while monitoring a range of addresses. The optimized
> state may be either a light-weight power/performance optimized state
> (c0.1 state) or an improved power/performance optimized state
> (c0.2 state).
> 
> TPAUSE instructs the processor to enter an implementation-dependent
> optimized state c0.1 or c0.2 state and wake up when time-stamp counter
> reaches specified timeout.
> 
> Availability of the user wait instructions is indicated by the presence
> of the CPUID feature flag WAITPKG CPUID.0x07.0x0:ECX[5].
> 
> The patches enable the umonitor, umwait and tpause features in KVM.
> Because umwait and tpause can put a (psysical) CPU into a power saving
> state, by default we dont't expose it in kvm and provide a capability to
> enable it. Use kvm capability to enable UMONITOR, UMWAIT and TPAUSE when
> QEMU use "-overcommit cpu-pm=on, a VM can use UMONITOR, UMWAIT and TPAUSE
> instructions. If the instruction causes a delay, the amount of time
> delayed is called here the physical delay. The physical delay is first
> computed by determining the virtual delay (the time to delay relative to
> the VM’s timestamp counter). Otherwise, UMONITOR, UMWAIT and TPAUSE cause
> an invalid-opcode exception(#UD).
> 
> The release document ref below link:
> https://software.intel.com/sites/default/files/\
> managed/39/c5/325462-sdm-vol-1-2abcd-3abcd.pdf
> 
> Changelog:
> v5:
> 	Remove CPUID_7_0_ECX_WAITPKG if enable_cpu_pm is not set. (Paolo)
> v4:
> 	Set IA32_UMWAIT_CONTROL 32bits
> v3:
> 	Simplify the patches, expose user wait instructions when the guest
> 	has CPUID (Paolo)
> v2:
> 	Separated from the series
> 	https://www.mail-archive.com/qemu-devel@nongnu.org/msg549526.html
> 	Use kvm capability to enable UMONITOR, UMWAIT and TPAUSE when
> 	QEMU use "-overcommit cpu-pm=on"	
> v1:
> 	Sent out with MOVDIRI/MOVDIR64B instructions patches
> 
> Tao Xu (2):
>    x86/cpu: Add support for UMONITOR/UMWAIT/TPAUSE
>    target/i386: Add support for save/load IA32_UMWAIT_CONTROL MSR
> 
>   target/i386/cpu.c     |  3 ++-
>   target/i386/cpu.h     |  3 +++
>   target/i386/kvm.c     | 19 +++++++++++++++++++
>   target/i386/machine.c | 20 ++++++++++++++++++++
>   4 files changed, 44 insertions(+), 1 deletion(-)
>