On 22.09.19 05:54, Richard Henderson wrote:
> These bits do not need to vary with the actual page size
> used by the guest.
>
> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> include/exec/cpu-all.h | 16 ++++++++++------
> 1 file changed, 10 insertions(+), 6 deletions(-)
>
> diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h
> index d2d443c4f9..e0c8dc540c 100644
> --- a/include/exec/cpu-all.h
> +++ b/include/exec/cpu-all.h
> @@ -317,20 +317,24 @@ CPUArchState *cpu_copy(CPUArchState *env);
>
> #if !defined(CONFIG_USER_ONLY)
>
> -/* Flags stored in the low bits of the TLB virtual address. These are
> - * defined so that fast path ram access is all zeros.
> +/*
> + * Flags stored in the low bits of the TLB virtual address.
> + * These are defined so that fast path ram access is all zeros.
> * The flags all must be between TARGET_PAGE_BITS and
> * maximum address alignment bit.
> + *
> + * Use TARGET_PAGE_BITS_MIN so that these bits are constant
> + * when TARGET_PAGE_BITS_VARY is in effect.
> */
> /* Zero if TLB entry is valid. */
> -#define TLB_INVALID_MASK (1 << (TARGET_PAGE_BITS - 1))
> +#define TLB_INVALID_MASK (1 << (TARGET_PAGE_BITS_MIN - 1))
> /* Set if TLB entry references a clean RAM page. The iotlb entry will
> contain the page physical address. */
> -#define TLB_NOTDIRTY (1 << (TARGET_PAGE_BITS - 2))
> +#define TLB_NOTDIRTY (1 << (TARGET_PAGE_BITS_MIN - 2))
> /* Set if TLB entry is an IO callback. */
> -#define TLB_MMIO (1 << (TARGET_PAGE_BITS - 3))
> +#define TLB_MMIO (1 << (TARGET_PAGE_BITS_MIN - 3))
> /* Set if TLB entry contains a watchpoint. */
> -#define TLB_WATCHPOINT (1 << (TARGET_PAGE_BITS - 4))
> +#define TLB_WATCHPOINT (1 << (TARGET_PAGE_BITS_MIN - 4))
>
> /* Use this mask to check interception with an alignment mask
> * in a TCG backend.
>
Reviewed-by: David Hildenbrand <david@redhat.com>
--
Thanks,
David / dhildenb