1
The following changes since commit 1316b1ddc8a05e418c8134243f8bff8cccbbccb1:
1
The following changes since commit 2ecfc0657afa5d29a373271b342f704a1a3c6737:
2
2
3
Merge remote-tracking branch 'remotes/kevin/tags/for-upstream' into staging (2019-07-12 15:38:22 +0100)
3
Merge remote-tracking branch 'remotes/armbru/tags/pull-misc-2020-12-10' into staging (2020-12-10 17:01:05 +0000)
4
4
5
are available in the Git repository at:
5
are available in the Git repository at:
6
6
7
https://github.com/rth7680/qemu.git tags/pull-tcg-20190714
7
https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20201210
8
8
9
for you to fetch changes up to 52ba13f042714c4086416973fb88e2465e0888a1:
9
for you to fetch changes up to 9e2658d62ebc23efe7df43fc0e306f129510d874:
10
10
11
tcg: Release mmap_lock on translation fault (2019-07-14 12:19:01 +0200)
11
accel/tcg: rename tcg-cpus functions to match module name (2020-12-10 17:44:10 -0600)
12
12
13
----------------------------------------------------------------
13
----------------------------------------------------------------
14
Fixes for 3 tcg bugs
14
Split CpusAccel for tcg variants
15
15
16
----------------------------------------------------------------
16
----------------------------------------------------------------
17
Richard Henderson (7):
17
Claudio Fontana (3):
18
tcg: Fix constant folding of INDEX_op_extract2_i32
18
accel/tcg: split CpusAccel into three TCG variants
19
tcg/aarch64: Fix output of extract2 opcodes
19
accel/tcg: split tcg_start_vcpu_thread
20
include/qemu/atomic.h: Add signal_barrier
20
accel/tcg: rename tcg-cpus functions to match module name
21
tcg: Introduce set/clear_helper_retaddr
22
tcg: Remove cpu_ld*_code_ra
23
tcg: Remove duplicate #if !defined(CODE_ACCESS)
24
tcg: Release mmap_lock on translation fault
25
21
26
include/exec/cpu_ldst.h | 20 ++++++++
22
accel/tcg/tcg-cpus-icount.h | 17 ++
27
include/exec/cpu_ldst_useronly_template.h | 40 ++++++++++------
23
accel/tcg/tcg-cpus-rr.h | 21 ++
28
include/qemu/atomic.h | 11 +++++
24
accel/tcg/tcg-cpus.h | 12 +-
29
accel/tcg/user-exec.c | 77 +++++++++++++++++++++----------
25
accel/tcg/tcg-all.c | 13 +-
30
target/arm/helper-a64.c | 8 ++--
26
accel/tcg/tcg-cpus-icount.c | 147 +++++++++++++
31
target/arm/sve_helper.c | 43 +++++++++--------
27
accel/tcg/tcg-cpus-mttcg.c | 140 ++++++++++++
32
tcg/aarch64/tcg-target.inc.c | 2 +-
28
accel/tcg/tcg-cpus-rr.c | 305 ++++++++++++++++++++++++++
33
tcg/optimize.c | 4 +-
29
accel/tcg/tcg-cpus.c | 506 +-------------------------------------------
34
8 files changed, 139 insertions(+), 66 deletions(-)
30
softmmu/icount.c | 2 +-
31
accel/tcg/meson.build | 9 +-
32
10 files changed, 670 insertions(+), 502 deletions(-)
33
create mode 100644 accel/tcg/tcg-cpus-icount.h
34
create mode 100644 accel/tcg/tcg-cpus-rr.h
35
create mode 100644 accel/tcg/tcg-cpus-icount.c
36
create mode 100644 accel/tcg/tcg-cpus-mttcg.c
37
create mode 100644 accel/tcg/tcg-cpus-rr.c
35
38
diff view generated by jsdifflib
Deleted patch
1
On a 64-bit host, discard any replications of the 32-bit
2
sign bit when performing the shift and merge.
3
1
4
Fixes: https://bugs.launchpad.net/bugs/1834496
5
Tested-by: Christophe Lyon <christophe.lyon@linaro.org>
6
Tested-by: Alex Bennée <alex.bennee@linaro.org>
7
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
8
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9
---
10
tcg/optimize.c | 4 ++--
11
1 file changed, 2 insertions(+), 2 deletions(-)
12
13
diff --git a/tcg/optimize.c b/tcg/optimize.c
14
index XXXXXXX..XXXXXXX 100644
15
--- a/tcg/optimize.c
16
+++ b/tcg/optimize.c
17
@@ -XXX,XX +XXX,XX @@ void tcg_optimize(TCGContext *s)
18
if (opc == INDEX_op_extract2_i64) {
19
tmp = (v1 >> op->args[3]) | (v2 << (64 - op->args[3]));
20
} else {
21
- tmp = (v1 >> op->args[3]) | (v2 << (32 - op->args[3]));
22
- tmp = (int32_t)tmp;
23
+ tmp = (int32_t)(((uint32_t)v1 >> op->args[3]) |
24
+ ((uint32_t)v2 << (32 - op->args[3])));
25
}
26
tcg_opt_gen_movi(s, op, op->args[0], tmp);
27
break;
28
--
29
2.17.1
30
31
diff view generated by jsdifflib
Deleted patch
1
This patch fixes two problems:
2
(1) The inputs to the EXTR insn were reversed,
3
(2) The input constraints use rZ, which means that we need to use
4
the REG0 macro in order to supply XZR for a constant 0 input.
5
1
6
Fixes: 464c2969d5d
7
Reported-by: Peter Maydell <peter.maydell@linaro.org>
8
Tested-by: Alex Bennée <alex.bennee@linaro.org>
9
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
10
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
11
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
12
---
13
tcg/aarch64/tcg-target.inc.c | 2 +-
14
1 file changed, 1 insertion(+), 1 deletion(-)
15
16
diff --git a/tcg/aarch64/tcg-target.inc.c b/tcg/aarch64/tcg-target.inc.c
17
index XXXXXXX..XXXXXXX 100644
18
--- a/tcg/aarch64/tcg-target.inc.c
19
+++ b/tcg/aarch64/tcg-target.inc.c
20
@@ -XXX,XX +XXX,XX @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
21
22
case INDEX_op_extract2_i64:
23
case INDEX_op_extract2_i32:
24
- tcg_out_extr(s, ext, a0, a1, a2, args[3]);
25
+ tcg_out_extr(s, ext, a0, REG0(2), REG0(1), args[3]);
26
break;
27
28
case INDEX_op_add2_i32:
29
--
30
2.17.1
31
32
diff view generated by jsdifflib
Deleted patch
1
We have some potential race conditions vs our user-exec signal
2
handler that will be solved with this barrier.
3
1
4
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
5
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6
---
7
include/qemu/atomic.h | 11 +++++++++++
8
1 file changed, 11 insertions(+)
9
10
diff --git a/include/qemu/atomic.h b/include/qemu/atomic.h
11
index XXXXXXX..XXXXXXX 100644
12
--- a/include/qemu/atomic.h
13
+++ b/include/qemu/atomic.h
14
@@ -XXX,XX +XXX,XX @@
15
#define smp_read_barrier_depends() barrier()
16
#endif
17
18
+/*
19
+ * A signal barrier forces all pending local memory ops to be observed before
20
+ * a SIGSEGV is delivered to the *same* thread. In practice this is exactly
21
+ * the same as barrier(), but since we have the correct builtin, use it.
22
+ */
23
+#define signal_barrier() __atomic_signal_fence(__ATOMIC_SEQ_CST)
24
+
25
/* Sanity check that the size of an atomic operation isn't "overly large".
26
* Despite the fact that e.g. i686 has 64-bit atomic operations, we do not
27
* want to use them because we ought not need them, and this lets us do a
28
@@ -XXX,XX +XXX,XX @@
29
#define smp_read_barrier_depends() barrier()
30
#endif
31
32
+#ifndef signal_barrier
33
+#define signal_barrier() barrier()
34
+#endif
35
+
36
/* These will only be atomic if the processor does the fetch or store
37
* in a single issue memory operation
38
*/
39
--
40
2.17.1
41
42
diff view generated by jsdifflib
1
At present we have a potential error in that helper_retaddr contains
1
From: Claudio Fontana <cfontana@suse.de>
2
data for handle_cpu_signal, but we have not ensured that those stores
3
will be scheduled properly before the operation that may fault.
4
2
5
It might be that these races are not in practice observable, due to
3
split up the CpusAccel tcg_cpus into three TCG variants:
6
our use of -fno-strict-aliasing, but better safe than sorry.
7
4
8
Adjust all of the setters of helper_retaddr.
5
tcg_cpus_rr (single threaded, round robin cpus)
6
tcg_cpus_icount (same as rr, but with instruction counting enabled)
7
tcg_cpus_mttcg (multi-threaded cpus)
9
8
10
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
9
Suggested-by: Richard Henderson <richard.henderson@linaro.org>
10
Signed-off-by: Claudio Fontana <cfontana@suse.de>
11
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
12
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
13
Message-Id: <20201015143217.29337-2-cfontana@suse.de>
11
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
14
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
12
---
15
---
13
include/exec/cpu_ldst.h | 20 +++++++++++
16
accel/tcg/tcg-cpus-icount.h | 17 ++
14
include/exec/cpu_ldst_useronly_template.h | 12 +++----
17
accel/tcg/tcg-cpus-mttcg.h | 21 ++
15
accel/tcg/user-exec.c | 11 +++---
18
accel/tcg/tcg-cpus-rr.h | 20 ++
16
target/arm/helper-a64.c | 8 ++---
19
accel/tcg/tcg-cpus.h | 13 +-
17
target/arm/sve_helper.c | 43 +++++++++++------------
20
accel/tcg/tcg-all.c | 8 +-
18
5 files changed, 57 insertions(+), 37 deletions(-)
21
accel/tcg/tcg-cpus-icount.c | 147 +++++++++++
22
accel/tcg/tcg-cpus-mttcg.c | 117 +++++++++
23
accel/tcg/tcg-cpus-rr.c | 270 ++++++++++++++++++++
24
accel/tcg/tcg-cpus.c | 484 ++----------------------------------
25
softmmu/icount.c | 2 +-
26
accel/tcg/meson.build | 9 +-
27
11 files changed, 646 insertions(+), 462 deletions(-)
28
create mode 100644 accel/tcg/tcg-cpus-icount.h
29
create mode 100644 accel/tcg/tcg-cpus-mttcg.h
30
create mode 100644 accel/tcg/tcg-cpus-rr.h
31
create mode 100644 accel/tcg/tcg-cpus-icount.c
32
create mode 100644 accel/tcg/tcg-cpus-mttcg.c
33
create mode 100644 accel/tcg/tcg-cpus-rr.c
19
34
20
diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h
35
diff --git a/accel/tcg/tcg-cpus-icount.h b/accel/tcg/tcg-cpus-icount.h
36
new file mode 100644
37
index XXXXXXX..XXXXXXX
38
--- /dev/null
39
+++ b/accel/tcg/tcg-cpus-icount.h
40
@@ -XXX,XX +XXX,XX @@
41
+/*
42
+ * QEMU TCG Single Threaded vCPUs implementation using instruction counting
43
+ *
44
+ * Copyright 2020 SUSE LLC
45
+ *
46
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
47
+ * See the COPYING file in the top-level directory.
48
+ */
49
+
50
+#ifndef TCG_CPUS_ICOUNT_H
51
+#define TCG_CPUS_ICOUNT_H
52
+
53
+void handle_icount_deadline(void);
54
+void prepare_icount_for_run(CPUState *cpu);
55
+void process_icount_data(CPUState *cpu);
56
+
57
+#endif /* TCG_CPUS_ICOUNT_H */
58
diff --git a/accel/tcg/tcg-cpus-mttcg.h b/accel/tcg/tcg-cpus-mttcg.h
59
new file mode 100644
60
index XXXXXXX..XXXXXXX
61
--- /dev/null
62
+++ b/accel/tcg/tcg-cpus-mttcg.h
63
@@ -XXX,XX +XXX,XX @@
64
+/*
65
+ * QEMU TCG Multi Threaded vCPUs implementation
66
+ *
67
+ * Copyright 2020 SUSE LLC
68
+ *
69
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
70
+ * See the COPYING file in the top-level directory.
71
+ */
72
+
73
+#ifndef TCG_CPUS_MTTCG_H
74
+#define TCG_CPUS_MTTCG_H
75
+
76
+/*
77
+ * In the multi-threaded case each vCPU has its own thread. The TLS
78
+ * variable current_cpu can be used deep in the code to find the
79
+ * current CPUState for a given thread.
80
+ */
81
+
82
+void *tcg_cpu_thread_fn(void *arg);
83
+
84
+#endif /* TCG_CPUS_MTTCG_H */
85
diff --git a/accel/tcg/tcg-cpus-rr.h b/accel/tcg/tcg-cpus-rr.h
86
new file mode 100644
87
index XXXXXXX..XXXXXXX
88
--- /dev/null
89
+++ b/accel/tcg/tcg-cpus-rr.h
90
@@ -XXX,XX +XXX,XX @@
91
+/*
92
+ * QEMU TCG Single Threaded vCPUs implementation
93
+ *
94
+ * Copyright 2020 SUSE LLC
95
+ *
96
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
97
+ * See the COPYING file in the top-level directory.
98
+ */
99
+
100
+#ifndef TCG_CPUS_RR_H
101
+#define TCG_CPUS_RR_H
102
+
103
+#define TCG_KICK_PERIOD (NANOSECONDS_PER_SECOND / 10)
104
+
105
+/* Kick all RR vCPUs. */
106
+void qemu_cpu_kick_rr_cpus(CPUState *unused);
107
+
108
+void *tcg_rr_cpu_thread_fn(void *arg);
109
+
110
+#endif /* TCG_CPUS_RR_H */
111
diff --git a/accel/tcg/tcg-cpus.h b/accel/tcg/tcg-cpus.h
21
index XXXXXXX..XXXXXXX 100644
112
index XXXXXXX..XXXXXXX 100644
22
--- a/include/exec/cpu_ldst.h
113
--- a/accel/tcg/tcg-cpus.h
23
+++ b/include/exec/cpu_ldst.h
114
+++ b/accel/tcg/tcg-cpus.h
24
@@ -XXX,XX +XXX,XX @@ typedef target_ulong abi_ptr;
115
@@ -XXX,XX +XXX,XX @@
25
116
/*
26
extern __thread uintptr_t helper_retaddr;
117
- * Accelerator CPUS Interface
27
118
+ * QEMU TCG vCPU common functionality
28
+static inline void set_helper_retaddr(uintptr_t ra)
119
+ *
29
+{
120
+ * Functionality common to all TCG vcpu variants: mttcg, rr and icount.
30
+ helper_retaddr = ra;
121
*
122
* Copyright 2020 SUSE LLC
123
*
124
@@ -XXX,XX +XXX,XX @@
125
126
#include "sysemu/cpus.h"
127
128
-extern const CpusAccel tcg_cpus;
129
+extern const CpusAccel tcg_cpus_mttcg;
130
+extern const CpusAccel tcg_cpus_icount;
131
+extern const CpusAccel tcg_cpus_rr;
132
+
133
+void tcg_start_vcpu_thread(CPUState *cpu);
134
+void qemu_tcg_destroy_vcpu(CPUState *cpu);
135
+int tcg_cpu_exec(CPUState *cpu);
136
+void tcg_handle_interrupt(CPUState *cpu, int mask);
137
138
#endif /* TCG_CPUS_H */
139
diff --git a/accel/tcg/tcg-all.c b/accel/tcg/tcg-all.c
140
index XXXXXXX..XXXXXXX 100644
141
--- a/accel/tcg/tcg-all.c
142
+++ b/accel/tcg/tcg-all.c
143
@@ -XXX,XX +XXX,XX @@ static int tcg_init(MachineState *ms)
144
145
tcg_exec_init(s->tb_size * 1024 * 1024);
146
mttcg_enabled = s->mttcg_enabled;
147
- cpus_register_accel(&tcg_cpus);
148
149
+ if (mttcg_enabled) {
150
+ cpus_register_accel(&tcg_cpus_mttcg);
151
+ } else if (icount_enabled()) {
152
+ cpus_register_accel(&tcg_cpus_icount);
153
+ } else {
154
+ cpus_register_accel(&tcg_cpus_rr);
155
+ }
156
return 0;
157
}
158
159
diff --git a/accel/tcg/tcg-cpus-icount.c b/accel/tcg/tcg-cpus-icount.c
160
new file mode 100644
161
index XXXXXXX..XXXXXXX
162
--- /dev/null
163
+++ b/accel/tcg/tcg-cpus-icount.c
164
@@ -XXX,XX +XXX,XX @@
165
+/*
166
+ * QEMU TCG Single Threaded vCPUs implementation using instruction counting
167
+ *
168
+ * Copyright (c) 2003-2008 Fabrice Bellard
169
+ * Copyright (c) 2014 Red Hat Inc.
170
+ *
171
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
172
+ * of this software and associated documentation files (the "Software"), to deal
173
+ * in the Software without restriction, including without limitation the rights
174
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
175
+ * copies of the Software, and to permit persons to whom the Software is
176
+ * furnished to do so, subject to the following conditions:
177
+ *
178
+ * The above copyright notice and this permission notice shall be included in
179
+ * all copies or substantial portions of the Software.
180
+ *
181
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
182
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
183
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
184
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
185
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
186
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
187
+ * THE SOFTWARE.
188
+ */
189
+
190
+#include "qemu/osdep.h"
191
+#include "qemu-common.h"
192
+#include "sysemu/tcg.h"
193
+#include "sysemu/replay.h"
194
+#include "qemu/main-loop.h"
195
+#include "qemu/guest-random.h"
196
+#include "exec/exec-all.h"
197
+#include "hw/boards.h"
198
+
199
+#include "tcg-cpus.h"
200
+#include "tcg-cpus-icount.h"
201
+#include "tcg-cpus-rr.h"
202
+
203
+static int64_t tcg_get_icount_limit(void)
204
+{
205
+ int64_t deadline;
206
+
207
+ if (replay_mode != REPLAY_MODE_PLAY) {
208
+ /*
209
+ * Include all the timers, because they may need an attention.
210
+ * Too long CPU execution may create unnecessary delay in UI.
211
+ */
212
+ deadline = qemu_clock_deadline_ns_all(QEMU_CLOCK_VIRTUAL,
213
+ QEMU_TIMER_ATTR_ALL);
214
+ /* Check realtime timers, because they help with input processing */
215
+ deadline = qemu_soonest_timeout(deadline,
216
+ qemu_clock_deadline_ns_all(QEMU_CLOCK_REALTIME,
217
+ QEMU_TIMER_ATTR_ALL));
218
+
219
+ /*
220
+ * Maintain prior (possibly buggy) behaviour where if no deadline
221
+ * was set (as there is no QEMU_CLOCK_VIRTUAL timer) or it is more than
222
+ * INT32_MAX nanoseconds ahead, we still use INT32_MAX
223
+ * nanoseconds.
224
+ */
225
+ if ((deadline < 0) || (deadline > INT32_MAX)) {
226
+ deadline = INT32_MAX;
227
+ }
228
+
229
+ return icount_round(deadline);
230
+ } else {
231
+ return replay_get_instructions();
232
+ }
233
+}
234
+
235
+static void notify_aio_contexts(void)
236
+{
237
+ /* Wake up other AioContexts. */
238
+ qemu_clock_notify(QEMU_CLOCK_VIRTUAL);
239
+ qemu_clock_run_timers(QEMU_CLOCK_VIRTUAL);
240
+}
241
+
242
+void handle_icount_deadline(void)
243
+{
244
+ assert(qemu_in_vcpu_thread());
245
+ int64_t deadline = qemu_clock_deadline_ns_all(QEMU_CLOCK_VIRTUAL,
246
+ QEMU_TIMER_ATTR_ALL);
247
+
248
+ if (deadline == 0) {
249
+ notify_aio_contexts();
250
+ }
251
+}
252
+
253
+void prepare_icount_for_run(CPUState *cpu)
254
+{
255
+ int insns_left;
256
+
31
+ /*
257
+ /*
32
+ * Ensure that this write is visible to the SIGSEGV handler that
258
+ * These should always be cleared by process_icount_data after
33
+ * may be invoked due to a subsequent invalid memory operation.
259
+ * each vCPU execution. However u16.high can be raised
260
+ * asynchronously by cpu_exit/cpu_interrupt/tcg_handle_interrupt
34
+ */
261
+ */
35
+ signal_barrier();
262
+ g_assert(cpu_neg(cpu)->icount_decr.u16.low == 0);
36
+}
263
+ g_assert(cpu->icount_extra == 0);
37
+
264
+
38
+static inline void clear_helper_retaddr(void)
265
+ cpu->icount_budget = tcg_get_icount_limit();
39
+{
266
+ insns_left = MIN(0xffff, cpu->icount_budget);
40
+ /*
267
+ cpu_neg(cpu)->icount_decr.u16.low = insns_left;
41
+ * Ensure that previous memory operations have succeeded before
268
+ cpu->icount_extra = cpu->icount_budget - insns_left;
42
+ * removing the data visible to the signal handler.
269
+
43
+ */
270
+ replay_mutex_lock();
44
+ signal_barrier();
271
+
45
+ helper_retaddr = 0;
272
+ if (cpu->icount_budget == 0 && replay_has_checkpoint()) {
46
+}
273
+ notify_aio_contexts();
47
+
274
+ }
48
/* In user-only mode we provide only the _code and _data accessors. */
275
+}
49
276
+
50
#define MEMSUFFIX _data
277
+void process_icount_data(CPUState *cpu)
51
diff --git a/include/exec/cpu_ldst_useronly_template.h b/include/exec/cpu_ldst_useronly_template.h
278
+{
279
+ /* Account for executed instructions */
280
+ icount_update(cpu);
281
+
282
+ /* Reset the counters */
283
+ cpu_neg(cpu)->icount_decr.u16.low = 0;
284
+ cpu->icount_extra = 0;
285
+ cpu->icount_budget = 0;
286
+
287
+ replay_account_executed_instructions();
288
+
289
+ replay_mutex_unlock();
290
+}
291
+
292
+static void icount_handle_interrupt(CPUState *cpu, int mask)
293
+{
294
+ int old_mask = cpu->interrupt_request;
295
+
296
+ tcg_handle_interrupt(cpu, mask);
297
+ if (qemu_cpu_is_self(cpu) &&
298
+ !cpu->can_do_io
299
+ && (mask & ~old_mask) != 0) {
300
+ cpu_abort(cpu, "Raised interrupt while not in I/O function");
301
+ }
302
+}
303
+
304
+const CpusAccel tcg_cpus_icount = {
305
+ .create_vcpu_thread = tcg_start_vcpu_thread,
306
+ .kick_vcpu_thread = qemu_cpu_kick_rr_cpus,
307
+
308
+ .handle_interrupt = icount_handle_interrupt,
309
+ .get_virtual_clock = icount_get,
310
+ .get_elapsed_ticks = icount_get,
311
+};
312
diff --git a/accel/tcg/tcg-cpus-mttcg.c b/accel/tcg/tcg-cpus-mttcg.c
313
new file mode 100644
314
index XXXXXXX..XXXXXXX
315
--- /dev/null
316
+++ b/accel/tcg/tcg-cpus-mttcg.c
317
@@ -XXX,XX +XXX,XX @@
318
+/*
319
+ * QEMU TCG Multi Threaded vCPUs implementation
320
+ *
321
+ * Copyright (c) 2003-2008 Fabrice Bellard
322
+ * Copyright (c) 2014 Red Hat Inc.
323
+ *
324
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
325
+ * of this software and associated documentation files (the "Software"), to deal
326
+ * in the Software without restriction, including without limitation the rights
327
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
328
+ * copies of the Software, and to permit persons to whom the Software is
329
+ * furnished to do so, subject to the following conditions:
330
+ *
331
+ * The above copyright notice and this permission notice shall be included in
332
+ * all copies or substantial portions of the Software.
333
+ *
334
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
335
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
336
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
337
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
338
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
339
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
340
+ * THE SOFTWARE.
341
+ */
342
+
343
+#include "qemu/osdep.h"
344
+#include "qemu-common.h"
345
+#include "sysemu/tcg.h"
346
+#include "sysemu/replay.h"
347
+#include "qemu/main-loop.h"
348
+#include "qemu/guest-random.h"
349
+#include "exec/exec-all.h"
350
+#include "hw/boards.h"
351
+
352
+#include "tcg-cpus.h"
353
+#include "tcg-cpus-mttcg.h"
354
+
355
+/*
356
+ * In the multi-threaded case each vCPU has its own thread. The TLS
357
+ * variable current_cpu can be used deep in the code to find the
358
+ * current CPUState for a given thread.
359
+ */
360
+
361
+void *tcg_cpu_thread_fn(void *arg)
362
+{
363
+ CPUState *cpu = arg;
364
+
365
+ assert(tcg_enabled());
366
+ g_assert(!icount_enabled());
367
+
368
+ rcu_register_thread();
369
+ tcg_register_thread();
370
+
371
+ qemu_mutex_lock_iothread();
372
+ qemu_thread_get_self(cpu->thread);
373
+
374
+ cpu->thread_id = qemu_get_thread_id();
375
+ cpu->can_do_io = 1;
376
+ current_cpu = cpu;
377
+ cpu_thread_signal_created(cpu);
378
+ qemu_guest_random_seed_thread_part2(cpu->random_seed);
379
+
380
+ /* process any pending work */
381
+ cpu->exit_request = 1;
382
+
383
+ do {
384
+ if (cpu_can_run(cpu)) {
385
+ int r;
386
+ qemu_mutex_unlock_iothread();
387
+ r = tcg_cpu_exec(cpu);
388
+ qemu_mutex_lock_iothread();
389
+ switch (r) {
390
+ case EXCP_DEBUG:
391
+ cpu_handle_guest_debug(cpu);
392
+ break;
393
+ case EXCP_HALTED:
394
+ /*
395
+ * during start-up the vCPU is reset and the thread is
396
+ * kicked several times. If we don't ensure we go back
397
+ * to sleep in the halted state we won't cleanly
398
+ * start-up when the vCPU is enabled.
399
+ *
400
+ * cpu->halted should ensure we sleep in wait_io_event
401
+ */
402
+ g_assert(cpu->halted);
403
+ break;
404
+ case EXCP_ATOMIC:
405
+ qemu_mutex_unlock_iothread();
406
+ cpu_exec_step_atomic(cpu);
407
+ qemu_mutex_lock_iothread();
408
+ default:
409
+ /* Ignore everything else? */
410
+ break;
411
+ }
412
+ }
413
+
414
+ qatomic_mb_set(&cpu->exit_request, 0);
415
+ qemu_wait_io_event(cpu);
416
+ } while (!cpu->unplug || cpu_can_run(cpu));
417
+
418
+ qemu_tcg_destroy_vcpu(cpu);
419
+ qemu_mutex_unlock_iothread();
420
+ rcu_unregister_thread();
421
+ return NULL;
422
+}
423
+
424
+static void mttcg_kick_vcpu_thread(CPUState *cpu)
425
+{
426
+ cpu_exit(cpu);
427
+}
428
+
429
+const CpusAccel tcg_cpus_mttcg = {
430
+ .create_vcpu_thread = tcg_start_vcpu_thread,
431
+ .kick_vcpu_thread = mttcg_kick_vcpu_thread,
432
+
433
+ .handle_interrupt = tcg_handle_interrupt,
434
+};
435
diff --git a/accel/tcg/tcg-cpus-rr.c b/accel/tcg/tcg-cpus-rr.c
436
new file mode 100644
437
index XXXXXXX..XXXXXXX
438
--- /dev/null
439
+++ b/accel/tcg/tcg-cpus-rr.c
440
@@ -XXX,XX +XXX,XX @@
441
+/*
442
+ * QEMU TCG Single Threaded vCPUs implementation
443
+ *
444
+ * Copyright (c) 2003-2008 Fabrice Bellard
445
+ * Copyright (c) 2014 Red Hat Inc.
446
+ *
447
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
448
+ * of this software and associated documentation files (the "Software"), to deal
449
+ * in the Software without restriction, including without limitation the rights
450
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
451
+ * copies of the Software, and to permit persons to whom the Software is
452
+ * furnished to do so, subject to the following conditions:
453
+ *
454
+ * The above copyright notice and this permission notice shall be included in
455
+ * all copies or substantial portions of the Software.
456
+ *
457
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
458
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
459
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
460
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
461
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
462
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
463
+ * THE SOFTWARE.
464
+ */
465
+
466
+#include "qemu/osdep.h"
467
+#include "qemu-common.h"
468
+#include "sysemu/tcg.h"
469
+#include "sysemu/replay.h"
470
+#include "qemu/main-loop.h"
471
+#include "qemu/guest-random.h"
472
+#include "exec/exec-all.h"
473
+#include "hw/boards.h"
474
+
475
+#include "tcg-cpus.h"
476
+#include "tcg-cpus-rr.h"
477
+#include "tcg-cpus-icount.h"
478
+
479
+/* Kick all RR vCPUs */
480
+void qemu_cpu_kick_rr_cpus(CPUState *unused)
481
+{
482
+ CPUState *cpu;
483
+
484
+ CPU_FOREACH(cpu) {
485
+ cpu_exit(cpu);
486
+ };
487
+}
488
+
489
+/*
490
+ * TCG vCPU kick timer
491
+ *
492
+ * The kick timer is responsible for moving single threaded vCPU
493
+ * emulation on to the next vCPU. If more than one vCPU is running a
494
+ * timer event with force a cpu->exit so the next vCPU can get
495
+ * scheduled.
496
+ *
497
+ * The timer is removed if all vCPUs are idle and restarted again once
498
+ * idleness is complete.
499
+ */
500
+
501
+static QEMUTimer *tcg_kick_vcpu_timer;
502
+static CPUState *tcg_current_rr_cpu;
503
+
504
+#define TCG_KICK_PERIOD (NANOSECONDS_PER_SECOND / 10)
505
+
506
+static inline int64_t qemu_tcg_next_kick(void)
507
+{
508
+ return qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + TCG_KICK_PERIOD;
509
+}
510
+
511
+/* Kick the currently round-robin scheduled vCPU to next */
512
+static void qemu_cpu_kick_rr_next_cpu(void)
513
+{
514
+ CPUState *cpu;
515
+ do {
516
+ cpu = qatomic_mb_read(&tcg_current_rr_cpu);
517
+ if (cpu) {
518
+ cpu_exit(cpu);
519
+ }
520
+ } while (cpu != qatomic_mb_read(&tcg_current_rr_cpu));
521
+}
522
+
523
+static void kick_tcg_thread(void *opaque)
524
+{
525
+ timer_mod(tcg_kick_vcpu_timer, qemu_tcg_next_kick());
526
+ qemu_cpu_kick_rr_next_cpu();
527
+}
528
+
529
+static void start_tcg_kick_timer(void)
530
+{
531
+ if (!tcg_kick_vcpu_timer && CPU_NEXT(first_cpu)) {
532
+ tcg_kick_vcpu_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL,
533
+ kick_tcg_thread, NULL);
534
+ }
535
+ if (tcg_kick_vcpu_timer && !timer_pending(tcg_kick_vcpu_timer)) {
536
+ timer_mod(tcg_kick_vcpu_timer, qemu_tcg_next_kick());
537
+ }
538
+}
539
+
540
+static void stop_tcg_kick_timer(void)
541
+{
542
+ if (tcg_kick_vcpu_timer && timer_pending(tcg_kick_vcpu_timer)) {
543
+ timer_del(tcg_kick_vcpu_timer);
544
+ }
545
+}
546
+
547
+static void qemu_tcg_rr_wait_io_event(void)
548
+{
549
+ CPUState *cpu;
550
+
551
+ while (all_cpu_threads_idle()) {
552
+ stop_tcg_kick_timer();
553
+ qemu_cond_wait_iothread(first_cpu->halt_cond);
554
+ }
555
+
556
+ start_tcg_kick_timer();
557
+
558
+ CPU_FOREACH(cpu) {
559
+ qemu_wait_io_event_common(cpu);
560
+ }
561
+}
562
+
563
+/*
564
+ * Destroy any remaining vCPUs which have been unplugged and have
565
+ * finished running
566
+ */
567
+static void deal_with_unplugged_cpus(void)
568
+{
569
+ CPUState *cpu;
570
+
571
+ CPU_FOREACH(cpu) {
572
+ if (cpu->unplug && !cpu_can_run(cpu)) {
573
+ qemu_tcg_destroy_vcpu(cpu);
574
+ break;
575
+ }
576
+ }
577
+}
578
+
579
+/*
580
+ * In the single-threaded case each vCPU is simulated in turn. If
581
+ * there is more than a single vCPU we create a simple timer to kick
582
+ * the vCPU and ensure we don't get stuck in a tight loop in one vCPU.
583
+ * This is done explicitly rather than relying on side-effects
584
+ * elsewhere.
585
+ */
586
+
587
+void *tcg_rr_cpu_thread_fn(void *arg)
588
+{
589
+ CPUState *cpu = arg;
590
+
591
+ assert(tcg_enabled());
592
+ rcu_register_thread();
593
+ tcg_register_thread();
594
+
595
+ qemu_mutex_lock_iothread();
596
+ qemu_thread_get_self(cpu->thread);
597
+
598
+ cpu->thread_id = qemu_get_thread_id();
599
+ cpu->can_do_io = 1;
600
+ cpu_thread_signal_created(cpu);
601
+ qemu_guest_random_seed_thread_part2(cpu->random_seed);
602
+
603
+ /* wait for initial kick-off after machine start */
604
+ while (first_cpu->stopped) {
605
+ qemu_cond_wait_iothread(first_cpu->halt_cond);
606
+
607
+ /* process any pending work */
608
+ CPU_FOREACH(cpu) {
609
+ current_cpu = cpu;
610
+ qemu_wait_io_event_common(cpu);
611
+ }
612
+ }
613
+
614
+ start_tcg_kick_timer();
615
+
616
+ cpu = first_cpu;
617
+
618
+ /* process any pending work */
619
+ cpu->exit_request = 1;
620
+
621
+ while (1) {
622
+ qemu_mutex_unlock_iothread();
623
+ replay_mutex_lock();
624
+ qemu_mutex_lock_iothread();
625
+
626
+ if (icount_enabled()) {
627
+ /* Account partial waits to QEMU_CLOCK_VIRTUAL. */
628
+ icount_account_warp_timer();
629
+ /*
630
+ * Run the timers here. This is much more efficient than
631
+ * waking up the I/O thread and waiting for completion.
632
+ */
633
+ handle_icount_deadline();
634
+ }
635
+
636
+ replay_mutex_unlock();
637
+
638
+ if (!cpu) {
639
+ cpu = first_cpu;
640
+ }
641
+
642
+ while (cpu && cpu_work_list_empty(cpu) && !cpu->exit_request) {
643
+
644
+ qatomic_mb_set(&tcg_current_rr_cpu, cpu);
645
+ current_cpu = cpu;
646
+
647
+ qemu_clock_enable(QEMU_CLOCK_VIRTUAL,
648
+ (cpu->singlestep_enabled & SSTEP_NOTIMER) == 0);
649
+
650
+ if (cpu_can_run(cpu)) {
651
+ int r;
652
+
653
+ qemu_mutex_unlock_iothread();
654
+ if (icount_enabled()) {
655
+ prepare_icount_for_run(cpu);
656
+ }
657
+ r = tcg_cpu_exec(cpu);
658
+ if (icount_enabled()) {
659
+ process_icount_data(cpu);
660
+ }
661
+ qemu_mutex_lock_iothread();
662
+
663
+ if (r == EXCP_DEBUG) {
664
+ cpu_handle_guest_debug(cpu);
665
+ break;
666
+ } else if (r == EXCP_ATOMIC) {
667
+ qemu_mutex_unlock_iothread();
668
+ cpu_exec_step_atomic(cpu);
669
+ qemu_mutex_lock_iothread();
670
+ break;
671
+ }
672
+ } else if (cpu->stop) {
673
+ if (cpu->unplug) {
674
+ cpu = CPU_NEXT(cpu);
675
+ }
676
+ break;
677
+ }
678
+
679
+ cpu = CPU_NEXT(cpu);
680
+ } /* while (cpu && !cpu->exit_request).. */
681
+
682
+ /* Does not need qatomic_mb_set because a spurious wakeup is okay. */
683
+ qatomic_set(&tcg_current_rr_cpu, NULL);
684
+
685
+ if (cpu && cpu->exit_request) {
686
+ qatomic_mb_set(&cpu->exit_request, 0);
687
+ }
688
+
689
+ if (icount_enabled() && all_cpu_threads_idle()) {
690
+ /*
691
+ * When all cpus are sleeping (e.g in WFI), to avoid a deadlock
692
+ * in the main_loop, wake it up in order to start the warp timer.
693
+ */
694
+ qemu_notify_event();
695
+ }
696
+
697
+ qemu_tcg_rr_wait_io_event();
698
+ deal_with_unplugged_cpus();
699
+ }
700
+
701
+ rcu_unregister_thread();
702
+ return NULL;
703
+}
704
+
705
+const CpusAccel tcg_cpus_rr = {
706
+ .create_vcpu_thread = tcg_start_vcpu_thread,
707
+ .kick_vcpu_thread = qemu_cpu_kick_rr_cpus,
708
+
709
+ .handle_interrupt = tcg_handle_interrupt,
710
+};
711
diff --git a/accel/tcg/tcg-cpus.c b/accel/tcg/tcg-cpus.c
52
index XXXXXXX..XXXXXXX 100644
712
index XXXXXXX..XXXXXXX 100644
53
--- a/include/exec/cpu_ldst_useronly_template.h
713
--- a/accel/tcg/tcg-cpus.c
54
+++ b/include/exec/cpu_ldst_useronly_template.h
714
+++ b/accel/tcg/tcg-cpus.c
55
@@ -XXX,XX +XXX,XX @@ glue(glue(glue(cpu_ld, USUFFIX), MEMSUFFIX), _ra)(CPUArchState *env,
715
@@ -XXX,XX +XXX,XX @@
56
uintptr_t retaddr)
716
/*
717
- * QEMU System Emulator
718
+ * QEMU TCG vCPU common functionality
719
+ *
720
+ * Functionality common to all TCG vCPU variants: mttcg, rr and icount.
721
*
722
* Copyright (c) 2003-2008 Fabrice Bellard
723
* Copyright (c) 2014 Red Hat Inc.
724
@@ -XXX,XX +XXX,XX @@
725
#include "hw/boards.h"
726
727
#include "tcg-cpus.h"
728
+#include "tcg-cpus-mttcg.h"
729
+#include "tcg-cpus-rr.h"
730
731
-/* Kick all RR vCPUs */
732
-static void qemu_cpu_kick_rr_cpus(void)
733
-{
734
- CPUState *cpu;
735
+/* common functionality among all TCG variants */
736
737
- CPU_FOREACH(cpu) {
738
- cpu_exit(cpu);
739
- };
740
-}
741
-
742
-static void tcg_kick_vcpu_thread(CPUState *cpu)
743
-{
744
- if (qemu_tcg_mttcg_enabled()) {
745
- cpu_exit(cpu);
746
- } else {
747
- qemu_cpu_kick_rr_cpus();
748
- }
749
-}
750
-
751
-/*
752
- * TCG vCPU kick timer
753
- *
754
- * The kick timer is responsible for moving single threaded vCPU
755
- * emulation on to the next vCPU. If more than one vCPU is running a
756
- * timer event with force a cpu->exit so the next vCPU can get
757
- * scheduled.
758
- *
759
- * The timer is removed if all vCPUs are idle and restarted again once
760
- * idleness is complete.
761
- */
762
-
763
-static QEMUTimer *tcg_kick_vcpu_timer;
764
-static CPUState *tcg_current_rr_cpu;
765
-
766
-#define TCG_KICK_PERIOD (NANOSECONDS_PER_SECOND / 10)
767
-
768
-static inline int64_t qemu_tcg_next_kick(void)
769
-{
770
- return qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + TCG_KICK_PERIOD;
771
-}
772
-
773
-/* Kick the currently round-robin scheduled vCPU to next */
774
-static void qemu_cpu_kick_rr_next_cpu(void)
775
-{
776
- CPUState *cpu;
777
- do {
778
- cpu = qatomic_mb_read(&tcg_current_rr_cpu);
779
- if (cpu) {
780
- cpu_exit(cpu);
781
- }
782
- } while (cpu != qatomic_mb_read(&tcg_current_rr_cpu));
783
-}
784
-
785
-static void kick_tcg_thread(void *opaque)
786
-{
787
- timer_mod(tcg_kick_vcpu_timer, qemu_tcg_next_kick());
788
- qemu_cpu_kick_rr_next_cpu();
789
-}
790
-
791
-static void start_tcg_kick_timer(void)
792
-{
793
- assert(!mttcg_enabled);
794
- if (!tcg_kick_vcpu_timer && CPU_NEXT(first_cpu)) {
795
- tcg_kick_vcpu_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL,
796
- kick_tcg_thread, NULL);
797
- }
798
- if (tcg_kick_vcpu_timer && !timer_pending(tcg_kick_vcpu_timer)) {
799
- timer_mod(tcg_kick_vcpu_timer, qemu_tcg_next_kick());
800
- }
801
-}
802
-
803
-static void stop_tcg_kick_timer(void)
804
-{
805
- assert(!mttcg_enabled);
806
- if (tcg_kick_vcpu_timer && timer_pending(tcg_kick_vcpu_timer)) {
807
- timer_del(tcg_kick_vcpu_timer);
808
- }
809
-}
810
-
811
-static void qemu_tcg_destroy_vcpu(CPUState *cpu)
812
-{
813
-}
814
-
815
-static void qemu_tcg_rr_wait_io_event(void)
816
-{
817
- CPUState *cpu;
818
-
819
- while (all_cpu_threads_idle()) {
820
- stop_tcg_kick_timer();
821
- qemu_cond_wait_iothread(first_cpu->halt_cond);
822
- }
823
-
824
- start_tcg_kick_timer();
825
-
826
- CPU_FOREACH(cpu) {
827
- qemu_wait_io_event_common(cpu);
828
- }
829
-}
830
-
831
-static int64_t tcg_get_icount_limit(void)
832
-{
833
- int64_t deadline;
834
-
835
- if (replay_mode != REPLAY_MODE_PLAY) {
836
- /*
837
- * Include all the timers, because they may need an attention.
838
- * Too long CPU execution may create unnecessary delay in UI.
839
- */
840
- deadline = qemu_clock_deadline_ns_all(QEMU_CLOCK_VIRTUAL,
841
- QEMU_TIMER_ATTR_ALL);
842
- /* Check realtime timers, because they help with input processing */
843
- deadline = qemu_soonest_timeout(deadline,
844
- qemu_clock_deadline_ns_all(QEMU_CLOCK_REALTIME,
845
- QEMU_TIMER_ATTR_ALL));
846
-
847
- /*
848
- * Maintain prior (possibly buggy) behaviour where if no deadline
849
- * was set (as there is no QEMU_CLOCK_VIRTUAL timer) or it is more than
850
- * INT32_MAX nanoseconds ahead, we still use INT32_MAX
851
- * nanoseconds.
852
- */
853
- if ((deadline < 0) || (deadline > INT32_MAX)) {
854
- deadline = INT32_MAX;
855
- }
856
-
857
- return icount_round(deadline);
858
- } else {
859
- return replay_get_instructions();
860
- }
861
-}
862
-
863
-static void notify_aio_contexts(void)
864
-{
865
- /* Wake up other AioContexts. */
866
- qemu_clock_notify(QEMU_CLOCK_VIRTUAL);
867
- qemu_clock_run_timers(QEMU_CLOCK_VIRTUAL);
868
-}
869
-
870
-static void handle_icount_deadline(void)
871
-{
872
- assert(qemu_in_vcpu_thread());
873
- if (icount_enabled()) {
874
- int64_t deadline = qemu_clock_deadline_ns_all(QEMU_CLOCK_VIRTUAL,
875
- QEMU_TIMER_ATTR_ALL);
876
-
877
- if (deadline == 0) {
878
- notify_aio_contexts();
879
- }
880
- }
881
-}
882
-
883
-static void prepare_icount_for_run(CPUState *cpu)
884
-{
885
- if (icount_enabled()) {
886
- int insns_left;
887
-
888
- /*
889
- * These should always be cleared by process_icount_data after
890
- * each vCPU execution. However u16.high can be raised
891
- * asynchronously by cpu_exit/cpu_interrupt/tcg_handle_interrupt
892
- */
893
- g_assert(cpu_neg(cpu)->icount_decr.u16.low == 0);
894
- g_assert(cpu->icount_extra == 0);
895
-
896
- cpu->icount_budget = tcg_get_icount_limit();
897
- insns_left = MIN(0xffff, cpu->icount_budget);
898
- cpu_neg(cpu)->icount_decr.u16.low = insns_left;
899
- cpu->icount_extra = cpu->icount_budget - insns_left;
900
-
901
- replay_mutex_lock();
902
-
903
- if (cpu->icount_budget == 0 && replay_has_checkpoint()) {
904
- notify_aio_contexts();
905
- }
906
- }
907
-}
908
-
909
-static void process_icount_data(CPUState *cpu)
910
-{
911
- if (icount_enabled()) {
912
- /* Account for executed instructions */
913
- icount_update(cpu);
914
-
915
- /* Reset the counters */
916
- cpu_neg(cpu)->icount_decr.u16.low = 0;
917
- cpu->icount_extra = 0;
918
- cpu->icount_budget = 0;
919
-
920
- replay_account_executed_instructions();
921
-
922
- replay_mutex_unlock();
923
- }
924
-}
925
-
926
-static int tcg_cpu_exec(CPUState *cpu)
927
-{
928
- int ret;
929
-#ifdef CONFIG_PROFILER
930
- int64_t ti;
931
-#endif
932
-
933
- assert(tcg_enabled());
934
-#ifdef CONFIG_PROFILER
935
- ti = profile_getclock();
936
-#endif
937
- cpu_exec_start(cpu);
938
- ret = cpu_exec(cpu);
939
- cpu_exec_end(cpu);
940
-#ifdef CONFIG_PROFILER
941
- qatomic_set(&tcg_ctx->prof.cpu_exec_time,
942
- tcg_ctx->prof.cpu_exec_time + profile_getclock() - ti);
943
-#endif
944
- return ret;
945
-}
946
-
947
-/*
948
- * Destroy any remaining vCPUs which have been unplugged and have
949
- * finished running
950
- */
951
-static void deal_with_unplugged_cpus(void)
952
-{
953
- CPUState *cpu;
954
-
955
- CPU_FOREACH(cpu) {
956
- if (cpu->unplug && !cpu_can_run(cpu)) {
957
- qemu_tcg_destroy_vcpu(cpu);
958
- cpu_thread_signal_destroyed(cpu);
959
- break;
960
- }
961
- }
962
-}
963
-
964
-/*
965
- * Single-threaded TCG
966
- *
967
- * In the single-threaded case each vCPU is simulated in turn. If
968
- * there is more than a single vCPU we create a simple timer to kick
969
- * the vCPU and ensure we don't get stuck in a tight loop in one vCPU.
970
- * This is done explicitly rather than relying on side-effects
971
- * elsewhere.
972
- */
973
-
974
-static void *tcg_rr_cpu_thread_fn(void *arg)
975
-{
976
- CPUState *cpu = arg;
977
-
978
- assert(tcg_enabled());
979
- rcu_register_thread();
980
- tcg_register_thread();
981
-
982
- qemu_mutex_lock_iothread();
983
- qemu_thread_get_self(cpu->thread);
984
-
985
- cpu->thread_id = qemu_get_thread_id();
986
- cpu->can_do_io = 1;
987
- cpu_thread_signal_created(cpu);
988
- qemu_guest_random_seed_thread_part2(cpu->random_seed);
989
-
990
- /* wait for initial kick-off after machine start */
991
- while (first_cpu->stopped) {
992
- qemu_cond_wait_iothread(first_cpu->halt_cond);
993
-
994
- /* process any pending work */
995
- CPU_FOREACH(cpu) {
996
- current_cpu = cpu;
997
- qemu_wait_io_event_common(cpu);
998
- }
999
- }
1000
-
1001
- start_tcg_kick_timer();
1002
-
1003
- cpu = first_cpu;
1004
-
1005
- /* process any pending work */
1006
- cpu->exit_request = 1;
1007
-
1008
- while (1) {
1009
- qemu_mutex_unlock_iothread();
1010
- replay_mutex_lock();
1011
- qemu_mutex_lock_iothread();
1012
- /* Account partial waits to QEMU_CLOCK_VIRTUAL. */
1013
- icount_account_warp_timer();
1014
-
1015
- /*
1016
- * Run the timers here. This is much more efficient than
1017
- * waking up the I/O thread and waiting for completion.
1018
- */
1019
- handle_icount_deadline();
1020
-
1021
- replay_mutex_unlock();
1022
-
1023
- if (!cpu) {
1024
- cpu = first_cpu;
1025
- }
1026
-
1027
- while (cpu && cpu_work_list_empty(cpu) && !cpu->exit_request) {
1028
-
1029
- qatomic_mb_set(&tcg_current_rr_cpu, cpu);
1030
- current_cpu = cpu;
1031
-
1032
- qemu_clock_enable(QEMU_CLOCK_VIRTUAL,
1033
- (cpu->singlestep_enabled & SSTEP_NOTIMER) == 0);
1034
-
1035
- if (cpu_can_run(cpu)) {
1036
- int r;
1037
-
1038
- qemu_mutex_unlock_iothread();
1039
- prepare_icount_for_run(cpu);
1040
-
1041
- r = tcg_cpu_exec(cpu);
1042
-
1043
- process_icount_data(cpu);
1044
- qemu_mutex_lock_iothread();
1045
-
1046
- if (r == EXCP_DEBUG) {
1047
- cpu_handle_guest_debug(cpu);
1048
- break;
1049
- } else if (r == EXCP_ATOMIC) {
1050
- qemu_mutex_unlock_iothread();
1051
- cpu_exec_step_atomic(cpu);
1052
- qemu_mutex_lock_iothread();
1053
- break;
1054
- }
1055
- } else if (cpu->stop) {
1056
- if (cpu->unplug) {
1057
- cpu = CPU_NEXT(cpu);
1058
- }
1059
- break;
1060
- }
1061
-
1062
- cpu = CPU_NEXT(cpu);
1063
- } /* while (cpu && !cpu->exit_request).. */
1064
-
1065
- /* Does not need qatomic_mb_set because a spurious wakeup is okay. */
1066
- qatomic_set(&tcg_current_rr_cpu, NULL);
1067
-
1068
- if (cpu && cpu->exit_request) {
1069
- qatomic_mb_set(&cpu->exit_request, 0);
1070
- }
1071
-
1072
- if (icount_enabled() && all_cpu_threads_idle()) {
1073
- /*
1074
- * When all cpus are sleeping (e.g in WFI), to avoid a deadlock
1075
- * in the main_loop, wake it up in order to start the warp timer.
1076
- */
1077
- qemu_notify_event();
1078
- }
1079
-
1080
- qemu_tcg_rr_wait_io_event();
1081
- deal_with_unplugged_cpus();
1082
- }
1083
-
1084
- rcu_unregister_thread();
1085
- return NULL;
1086
-}
1087
-
1088
-/*
1089
- * Multi-threaded TCG
1090
- *
1091
- * In the multi-threaded case each vCPU has its own thread. The TLS
1092
- * variable current_cpu can be used deep in the code to find the
1093
- * current CPUState for a given thread.
1094
- */
1095
-
1096
-static void *tcg_cpu_thread_fn(void *arg)
1097
-{
1098
- CPUState *cpu = arg;
1099
-
1100
- assert(tcg_enabled());
1101
- g_assert(!icount_enabled());
1102
-
1103
- rcu_register_thread();
1104
- tcg_register_thread();
1105
-
1106
- qemu_mutex_lock_iothread();
1107
- qemu_thread_get_self(cpu->thread);
1108
-
1109
- cpu->thread_id = qemu_get_thread_id();
1110
- cpu->can_do_io = 1;
1111
- current_cpu = cpu;
1112
- cpu_thread_signal_created(cpu);
1113
- qemu_guest_random_seed_thread_part2(cpu->random_seed);
1114
-
1115
- /* process any pending work */
1116
- cpu->exit_request = 1;
1117
-
1118
- do {
1119
- if (cpu_can_run(cpu)) {
1120
- int r;
1121
- qemu_mutex_unlock_iothread();
1122
- r = tcg_cpu_exec(cpu);
1123
- qemu_mutex_lock_iothread();
1124
- switch (r) {
1125
- case EXCP_DEBUG:
1126
- cpu_handle_guest_debug(cpu);
1127
- break;
1128
- case EXCP_HALTED:
1129
- /*
1130
- * during start-up the vCPU is reset and the thread is
1131
- * kicked several times. If we don't ensure we go back
1132
- * to sleep in the halted state we won't cleanly
1133
- * start-up when the vCPU is enabled.
1134
- *
1135
- * cpu->halted should ensure we sleep in wait_io_event
1136
- */
1137
- g_assert(cpu->halted);
1138
- break;
1139
- case EXCP_ATOMIC:
1140
- qemu_mutex_unlock_iothread();
1141
- cpu_exec_step_atomic(cpu);
1142
- qemu_mutex_lock_iothread();
1143
- default:
1144
- /* Ignore everything else? */
1145
- break;
1146
- }
1147
- }
1148
-
1149
- qatomic_mb_set(&cpu->exit_request, 0);
1150
- qemu_wait_io_event(cpu);
1151
- } while (!cpu->unplug || cpu_can_run(cpu));
1152
-
1153
- qemu_tcg_destroy_vcpu(cpu);
1154
- cpu_thread_signal_destroyed(cpu);
1155
- qemu_mutex_unlock_iothread();
1156
- rcu_unregister_thread();
1157
- return NULL;
1158
-}
1159
-
1160
-static void tcg_start_vcpu_thread(CPUState *cpu)
1161
+void tcg_start_vcpu_thread(CPUState *cpu)
57
{
1162
{
58
RES_TYPE ret;
1163
char thread_name[VCPU_THREAD_NAME_SIZE];
59
- helper_retaddr = retaddr;
1164
static QemuCond *single_tcg_halt_cond;
60
+ set_helper_retaddr(retaddr);
1165
@@ -XXX,XX +XXX,XX @@ static void tcg_start_vcpu_thread(CPUState *cpu)
61
ret = glue(glue(cpu_ld, USUFFIX), MEMSUFFIX)(env, ptr);
1166
}
62
- helper_retaddr = 0;
63
+ clear_helper_retaddr();
64
return ret;
65
}
1167
}
66
1168
67
@@ -XXX,XX +XXX,XX @@ glue(glue(glue(cpu_lds, SUFFIX), MEMSUFFIX), _ra)(CPUArchState *env,
1169
-static int64_t tcg_get_virtual_clock(void)
68
uintptr_t retaddr)
1170
+void qemu_tcg_destroy_vcpu(CPUState *cpu)
69
{
1171
{
70
int ret;
1172
- if (icount_enabled()) {
71
- helper_retaddr = retaddr;
1173
- return icount_get();
72
+ set_helper_retaddr(retaddr);
1174
- }
73
ret = glue(glue(cpu_lds, SUFFIX), MEMSUFFIX)(env, ptr);
1175
- return cpu_get_clock();
74
- helper_retaddr = 0;
1176
+ cpu_thread_signal_destroyed(cpu);
75
+ clear_helper_retaddr();
76
return ret;
77
}
1177
}
78
#endif
1178
79
@@ -XXX,XX +XXX,XX @@ glue(glue(glue(cpu_st, SUFFIX), MEMSUFFIX), _ra)(CPUArchState *env,
1179
-static int64_t tcg_get_elapsed_ticks(void)
80
RES_TYPE v,
1180
+int tcg_cpu_exec(CPUState *cpu)
81
uintptr_t retaddr)
82
{
1181
{
83
- helper_retaddr = retaddr;
1182
- if (icount_enabled()) {
84
+ set_helper_retaddr(retaddr);
1183
- return icount_get();
85
glue(glue(cpu_st, SUFFIX), MEMSUFFIX)(env, ptr, v);
1184
- }
86
- helper_retaddr = 0;
1185
- return cpu_get_ticks();
87
+ clear_helper_retaddr();
1186
+ int ret;
88
}
1187
+#ifdef CONFIG_PROFILER
89
#endif
1188
+ int64_t ti;
90
1189
+#endif
91
diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c
1190
+ assert(tcg_enabled());
92
index XXXXXXX..XXXXXXX 100644
1191
+#ifdef CONFIG_PROFILER
93
--- a/accel/tcg/user-exec.c
1192
+ ti = profile_getclock();
94
+++ b/accel/tcg/user-exec.c
1193
+#endif
95
@@ -XXX,XX +XXX,XX @@ static inline int handle_cpu_signal(uintptr_t pc, siginfo_t *info,
1194
+ cpu_exec_start(cpu);
96
* currently executing TB was modified and must be exited
1195
+ ret = cpu_exec(cpu);
97
* immediately. Clear helper_retaddr for next execution.
1196
+ cpu_exec_end(cpu);
98
*/
1197
+#ifdef CONFIG_PROFILER
99
- helper_retaddr = 0;
1198
+ qatomic_set(&tcg_ctx->prof.cpu_exec_time,
100
+ clear_helper_retaddr();
1199
+ tcg_ctx->prof.cpu_exec_time + profile_getclock() - ti);
101
cpu_exit_tb_from_sighandler(cpu, old_set);
1200
+#endif
102
/* NORETURN */
103
104
@@ -XXX,XX +XXX,XX @@ static inline int handle_cpu_signal(uintptr_t pc, siginfo_t *info,
105
* an exception. Undo signal and retaddr state prior to longjmp.
106
*/
107
sigprocmask(SIG_SETMASK, old_set, NULL);
108
- helper_retaddr = 0;
109
+ clear_helper_retaddr();
110
111
cc = CPU_GET_CLASS(cpu);
112
access_type = is_write ? MMU_DATA_STORE : MMU_DATA_LOAD;
113
@@ -XXX,XX +XXX,XX @@ static void *atomic_mmu_lookup(CPUArchState *env, target_ulong addr,
114
if (unlikely(addr & (size - 1))) {
115
cpu_loop_exit_atomic(env_cpu(env), retaddr);
116
}
117
- helper_retaddr = retaddr;
118
- return g2h(addr);
119
+ void *ret = g2h(addr);
120
+ set_helper_retaddr(retaddr);
121
+ return ret;
1201
+ return ret;
122
}
1202
}
123
1203
124
/* Macro to call the above, with local variables from the use context. */
1204
/* mask must never be zero, except for A20 change call */
125
#define ATOMIC_MMU_DECLS do {} while (0)
1205
-static void tcg_handle_interrupt(CPUState *cpu, int mask)
126
#define ATOMIC_MMU_LOOKUP atomic_mmu_lookup(env, addr, DATA_SIZE, GETPC())
1206
+void tcg_handle_interrupt(CPUState *cpu, int mask)
127
-#define ATOMIC_MMU_CLEANUP do { helper_retaddr = 0; } while (0)
1207
{
128
+#define ATOMIC_MMU_CLEANUP do { clear_helper_retaddr(); } while (0)
1208
- int old_mask;
129
1209
g_assert(qemu_mutex_iothread_locked());
130
#define ATOMIC_NAME(X) HELPER(glue(glue(atomic_ ## X, SUFFIX), END))
1210
131
#define EXTRA_ARGS
1211
- old_mask = cpu->interrupt_request;
132
diff --git a/target/arm/helper-a64.c b/target/arm/helper-a64.c
1212
cpu->interrupt_request |= mask;
1213
1214
/*
1215
@@ -XXX,XX +XXX,XX @@ static void tcg_handle_interrupt(CPUState *cpu, int mask)
1216
qemu_cpu_kick(cpu);
1217
} else {
1218
qatomic_set(&cpu_neg(cpu)->icount_decr.u16.high, -1);
1219
- if (icount_enabled() &&
1220
- !cpu->can_do_io
1221
- && (mask & ~old_mask) != 0) {
1222
- cpu_abort(cpu, "Raised interrupt while not in I/O function");
1223
- }
1224
}
1225
}
1226
-
1227
-const CpusAccel tcg_cpus = {
1228
- .create_vcpu_thread = tcg_start_vcpu_thread,
1229
- .kick_vcpu_thread = tcg_kick_vcpu_thread,
1230
-
1231
- .handle_interrupt = tcg_handle_interrupt,
1232
-
1233
- .get_virtual_clock = tcg_get_virtual_clock,
1234
- .get_elapsed_ticks = tcg_get_elapsed_ticks,
1235
-};
1236
diff --git a/softmmu/icount.c b/softmmu/icount.c
133
index XXXXXXX..XXXXXXX 100644
1237
index XXXXXXX..XXXXXXX 100644
134
--- a/target/arm/helper-a64.c
1238
--- a/softmmu/icount.c
135
+++ b/target/arm/helper-a64.c
1239
+++ b/softmmu/icount.c
136
@@ -XXX,XX +XXX,XX @@ uint64_t HELPER(paired_cmpxchg64_le)(CPUARMState *env, uint64_t addr,
1240
@@ -XXX,XX +XXX,XX @@ void icount_start_warp_timer(void)
137
/* ??? Enforce alignment. */
1241
138
uint64_t *haddr = g2h(addr);
1242
void icount_account_warp_timer(void)
139
1243
{
140
- helper_retaddr = ra;
1244
- if (!icount_enabled() || !icount_sleep) {
141
+ set_helper_retaddr(ra);
1245
+ if (!icount_sleep) {
142
o0 = ldq_le_p(haddr + 0);
1246
return;
143
o1 = ldq_le_p(haddr + 1);
144
oldv = int128_make128(o0, o1);
145
@@ -XXX,XX +XXX,XX @@ uint64_t HELPER(paired_cmpxchg64_le)(CPUARMState *env, uint64_t addr,
146
stq_le_p(haddr + 0, int128_getlo(newv));
147
stq_le_p(haddr + 1, int128_gethi(newv));
148
}
1247
}
149
- helper_retaddr = 0;
1248
150
+ clear_helper_retaddr();
1249
diff --git a/accel/tcg/meson.build b/accel/tcg/meson.build
151
#else
152
int mem_idx = cpu_mmu_index(env, false);
153
TCGMemOpIdx oi0 = make_memop_idx(MO_LEQ | MO_ALIGN_16, mem_idx);
154
@@ -XXX,XX +XXX,XX @@ uint64_t HELPER(paired_cmpxchg64_be)(CPUARMState *env, uint64_t addr,
155
/* ??? Enforce alignment. */
156
uint64_t *haddr = g2h(addr);
157
158
- helper_retaddr = ra;
159
+ set_helper_retaddr(ra);
160
o1 = ldq_be_p(haddr + 0);
161
o0 = ldq_be_p(haddr + 1);
162
oldv = int128_make128(o0, o1);
163
@@ -XXX,XX +XXX,XX @@ uint64_t HELPER(paired_cmpxchg64_be)(CPUARMState *env, uint64_t addr,
164
stq_be_p(haddr + 0, int128_gethi(newv));
165
stq_be_p(haddr + 1, int128_getlo(newv));
166
}
167
- helper_retaddr = 0;
168
+ clear_helper_retaddr();
169
#else
170
int mem_idx = cpu_mmu_index(env, false);
171
TCGMemOpIdx oi0 = make_memop_idx(MO_BEQ | MO_ALIGN_16, mem_idx);
172
diff --git a/target/arm/sve_helper.c b/target/arm/sve_helper.c
173
index XXXXXXX..XXXXXXX 100644
1250
index XXXXXXX..XXXXXXX 100644
174
--- a/target/arm/sve_helper.c
1251
--- a/accel/tcg/meson.build
175
+++ b/target/arm/sve_helper.c
1252
+++ b/accel/tcg/meson.build
176
@@ -XXX,XX +XXX,XX @@ static intptr_t max_for_page(target_ulong base, intptr_t mem_off,
1253
@@ -XXX,XX +XXX,XX @@ tcg_ss.add(when: 'CONFIG_SOFTMMU', if_false: files('user-exec-stub.c'))
177
return MIN(split, mem_max - mem_off) + mem_off;
1254
tcg_ss.add(when: 'CONFIG_PLUGIN', if_true: [files('plugin-gen.c'), libdl])
178
}
1255
specific_ss.add_all(when: 'CONFIG_TCG', if_true: tcg_ss)
179
1256
180
-static inline void set_helper_retaddr(uintptr_t ra)
1257
-specific_ss.add(when: ['CONFIG_SOFTMMU', 'CONFIG_TCG'], if_true: files('tcg-all.c', 'cputlb.c', 'tcg-cpus.c'))
181
-{
1258
+specific_ss.add(when: ['CONFIG_SOFTMMU', 'CONFIG_TCG'], if_true: files(
182
-#ifdef CONFIG_USER_ONLY
1259
+ 'tcg-all.c',
183
- helper_retaddr = ra;
1260
+ 'cputlb.c',
184
+#ifndef CONFIG_USER_ONLY
1261
+ 'tcg-cpus.c',
185
+/* These are normally defined only for CONFIG_USER_ONLY in <exec/cpu_ldst.h> */
1262
+ 'tcg-cpus-mttcg.c',
186
+static inline void set_helper_retaddr(uintptr_t ra) { }
1263
+ 'tcg-cpus-icount.c',
187
+static inline void clear_helper_retaddr(void) { }
1264
+ 'tcg-cpus-rr.c'
188
#endif
1265
+))
189
-}
190
191
/*
192
* The result of tlb_vaddr_to_host for user-only is just g2h(x),
193
@@ -XXX,XX +XXX,XX @@ static void sve_ld1_r(CPUARMState *env, void *vg, const target_ulong addr,
194
if (test_host_page(host)) {
195
mem_off = host_fn(vd, vg, host - mem_off, mem_off, mem_max);
196
tcg_debug_assert(mem_off == mem_max);
197
- set_helper_retaddr(0);
198
+ clear_helper_retaddr();
199
/* After having taken any fault, zero leading inactive elements. */
200
swap_memzero(vd, reg_off);
201
return;
202
@@ -XXX,XX +XXX,XX @@ static void sve_ld1_r(CPUARMState *env, void *vg, const target_ulong addr,
203
}
204
#endif
205
206
- set_helper_retaddr(0);
207
+ clear_helper_retaddr();
208
memcpy(vd, &scratch, reg_max);
209
}
210
211
@@ -XXX,XX +XXX,XX @@ static void sve_ld2_r(CPUARMState *env, void *vg, target_ulong addr,
212
addr += 2 * size;
213
} while (i & 15);
214
}
215
- set_helper_retaddr(0);
216
+ clear_helper_retaddr();
217
218
/* Wait until all exceptions have been raised to write back. */
219
memcpy(&env->vfp.zregs[rd], &scratch[0], oprsz);
220
@@ -XXX,XX +XXX,XX @@ static void sve_ld3_r(CPUARMState *env, void *vg, target_ulong addr,
221
addr += 3 * size;
222
} while (i & 15);
223
}
224
- set_helper_retaddr(0);
225
+ clear_helper_retaddr();
226
227
/* Wait until all exceptions have been raised to write back. */
228
memcpy(&env->vfp.zregs[rd], &scratch[0], oprsz);
229
@@ -XXX,XX +XXX,XX @@ static void sve_ld4_r(CPUARMState *env, void *vg, target_ulong addr,
230
addr += 4 * size;
231
} while (i & 15);
232
}
233
- set_helper_retaddr(0);
234
+ clear_helper_retaddr();
235
236
/* Wait until all exceptions have been raised to write back. */
237
memcpy(&env->vfp.zregs[rd], &scratch[0], oprsz);
238
@@ -XXX,XX +XXX,XX @@ static void sve_ldff1_r(CPUARMState *env, void *vg, const target_ulong addr,
239
if (test_host_page(host)) {
240
mem_off = host_fn(vd, vg, host - mem_off, mem_off, mem_max);
241
tcg_debug_assert(mem_off == mem_max);
242
- set_helper_retaddr(0);
243
+ clear_helper_retaddr();
244
/* After any fault, zero any leading inactive elements. */
245
swap_memzero(vd, reg_off);
246
return;
247
@@ -XXX,XX +XXX,XX @@ static void sve_ldff1_r(CPUARMState *env, void *vg, const target_ulong addr,
248
}
249
#endif
250
251
- set_helper_retaddr(0);
252
+ clear_helper_retaddr();
253
record_fault(env, reg_off, reg_max);
254
}
255
256
@@ -XXX,XX +XXX,XX @@ static void sve_st1_r(CPUARMState *env, void *vg, target_ulong addr,
257
addr += msize;
258
} while (i & 15);
259
}
260
- set_helper_retaddr(0);
261
+ clear_helper_retaddr();
262
}
263
264
static void sve_st2_r(CPUARMState *env, void *vg, target_ulong addr,
265
@@ -XXX,XX +XXX,XX @@ static void sve_st2_r(CPUARMState *env, void *vg, target_ulong addr,
266
addr += 2 * msize;
267
} while (i & 15);
268
}
269
- set_helper_retaddr(0);
270
+ clear_helper_retaddr();
271
}
272
273
static void sve_st3_r(CPUARMState *env, void *vg, target_ulong addr,
274
@@ -XXX,XX +XXX,XX @@ static void sve_st3_r(CPUARMState *env, void *vg, target_ulong addr,
275
addr += 3 * msize;
276
} while (i & 15);
277
}
278
- set_helper_retaddr(0);
279
+ clear_helper_retaddr();
280
}
281
282
static void sve_st4_r(CPUARMState *env, void *vg, target_ulong addr,
283
@@ -XXX,XX +XXX,XX @@ static void sve_st4_r(CPUARMState *env, void *vg, target_ulong addr,
284
addr += 4 * msize;
285
} while (i & 15);
286
}
287
- set_helper_retaddr(0);
288
+ clear_helper_retaddr();
289
}
290
291
#define DO_STN_1(N, NAME, ESIZE) \
292
@@ -XXX,XX +XXX,XX @@ static void sve_ld1_zs(CPUARMState *env, void *vd, void *vg, void *vm,
293
i += 4, pg >>= 4;
294
} while (i & 15);
295
}
296
- set_helper_retaddr(0);
297
+ clear_helper_retaddr();
298
299
/* Wait until all exceptions have been raised to write back. */
300
memcpy(vd, &scratch, oprsz);
301
@@ -XXX,XX +XXX,XX @@ static void sve_ld1_zd(CPUARMState *env, void *vd, void *vg, void *vm,
302
tlb_fn(env, &scratch, i * 8, base + (off << scale), oi, ra);
303
}
304
}
305
- set_helper_retaddr(0);
306
+ clear_helper_retaddr();
307
308
/* Wait until all exceptions have been raised to write back. */
309
memcpy(vd, &scratch, oprsz * 8);
310
@@ -XXX,XX +XXX,XX @@ static inline void sve_ldff1_zs(CPUARMState *env, void *vd, void *vg, void *vm,
311
tlb_fn(env, vd, reg_off, addr, oi, ra);
312
313
/* The rest of the reads will be non-faulting. */
314
- set_helper_retaddr(0);
315
+ clear_helper_retaddr();
316
}
317
318
/* After any fault, zero the leading predicated false elements. */
319
@@ -XXX,XX +XXX,XX @@ static inline void sve_ldff1_zd(CPUARMState *env, void *vd, void *vg, void *vm,
320
tlb_fn(env, vd, reg_off, addr, oi, ra);
321
322
/* The rest of the reads will be non-faulting. */
323
- set_helper_retaddr(0);
324
+ clear_helper_retaddr();
325
}
326
327
/* After any fault, zero the leading predicated false elements. */
328
@@ -XXX,XX +XXX,XX @@ static void sve_st1_zs(CPUARMState *env, void *vd, void *vg, void *vm,
329
i += 4, pg >>= 4;
330
} while (i & 15);
331
}
332
- set_helper_retaddr(0);
333
+ clear_helper_retaddr();
334
}
335
336
static void sve_st1_zd(CPUARMState *env, void *vd, void *vg, void *vm,
337
@@ -XXX,XX +XXX,XX @@ static void sve_st1_zd(CPUARMState *env, void *vd, void *vg, void *vm,
338
tlb_fn(env, vd, i * 8, base + (off << scale), oi, ra);
339
}
340
}
341
- set_helper_retaddr(0);
342
+ clear_helper_retaddr();
343
}
344
345
#define DO_ST1_ZPZ_S(MEM, OFS) \
346
--
1266
--
347
2.17.1
1267
2.25.1
348
1268
349
1269
diff view generated by jsdifflib
1
These functions are not used, and are not usable in the
1
From: Claudio Fontana <cfontana@suse.de>
2
context of code generation, because we never have a helper
2
3
return address to pass in to them.
3
after the initial split into 3 tcg variants, we proceed to also
4
4
split tcg_start_vcpu_thread.
5
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
5
6
We actually split it in 2 this time, since the icount variant
7
just uses the round robin function.
8
9
Suggested-by: Richard Henderson <richard.henderson@linaro.org>
10
Signed-off-by: Claudio Fontana <cfontana@suse.de>
11
Message-Id: <20201015143217.29337-3-cfontana@suse.de>
6
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
12
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
7
---
13
---
8
include/exec/cpu_ldst_useronly_template.h | 6 +++++-
14
accel/tcg/tcg-cpus-mttcg.h | 21 --------------
9
1 file changed, 5 insertions(+), 1 deletion(-)
15
accel/tcg/tcg-cpus-rr.h | 3 +-
10
16
accel/tcg/tcg-cpus.h | 1 -
11
diff --git a/include/exec/cpu_ldst_useronly_template.h b/include/exec/cpu_ldst_useronly_template.h
17
accel/tcg/tcg-all.c | 5 ++++
12
index XXXXXXX..XXXXXXX 100644
18
accel/tcg/tcg-cpus-icount.c | 2 +-
13
--- a/include/exec/cpu_ldst_useronly_template.h
19
accel/tcg/tcg-cpus-mttcg.c | 29 +++++++++++++++++--
14
+++ b/include/exec/cpu_ldst_useronly_template.h
20
accel/tcg/tcg-cpus-rr.c | 39 +++++++++++++++++++++++--
15
@@ -XXX,XX +XXX,XX @@ glue(glue(cpu_ld, USUFFIX), MEMSUFFIX)(CPUArchState *env, abi_ptr ptr)
21
accel/tcg/tcg-cpus.c | 58 -------------------------------------
16
return glue(glue(ld, USUFFIX), _p)(g2h(ptr));
22
8 files changed, 71 insertions(+), 87 deletions(-)
23
delete mode 100644 accel/tcg/tcg-cpus-mttcg.h
24
25
diff --git a/accel/tcg/tcg-cpus-mttcg.h b/accel/tcg/tcg-cpus-mttcg.h
26
deleted file mode 100644
27
index XXXXXXX..XXXXXXX
28
--- a/accel/tcg/tcg-cpus-mttcg.h
29
+++ /dev/null
30
@@ -XXX,XX +XXX,XX @@
31
-/*
32
- * QEMU TCG Multi Threaded vCPUs implementation
33
- *
34
- * Copyright 2020 SUSE LLC
35
- *
36
- * This work is licensed under the terms of the GNU GPL, version 2 or later.
37
- * See the COPYING file in the top-level directory.
38
- */
39
-
40
-#ifndef TCG_CPUS_MTTCG_H
41
-#define TCG_CPUS_MTTCG_H
42
-
43
-/*
44
- * In the multi-threaded case each vCPU has its own thread. The TLS
45
- * variable current_cpu can be used deep in the code to find the
46
- * current CPUState for a given thread.
47
- */
48
-
49
-void *tcg_cpu_thread_fn(void *arg);
50
-
51
-#endif /* TCG_CPUS_MTTCG_H */
52
diff --git a/accel/tcg/tcg-cpus-rr.h b/accel/tcg/tcg-cpus-rr.h
53
index XXXXXXX..XXXXXXX 100644
54
--- a/accel/tcg/tcg-cpus-rr.h
55
+++ b/accel/tcg/tcg-cpus-rr.h
56
@@ -XXX,XX +XXX,XX @@
57
/* Kick all RR vCPUs. */
58
void qemu_cpu_kick_rr_cpus(CPUState *unused);
59
60
-void *tcg_rr_cpu_thread_fn(void *arg);
61
+/* start the round robin vcpu thread */
62
+void rr_start_vcpu_thread(CPUState *cpu);
63
64
#endif /* TCG_CPUS_RR_H */
65
diff --git a/accel/tcg/tcg-cpus.h b/accel/tcg/tcg-cpus.h
66
index XXXXXXX..XXXXXXX 100644
67
--- a/accel/tcg/tcg-cpus.h
68
+++ b/accel/tcg/tcg-cpus.h
69
@@ -XXX,XX +XXX,XX @@ extern const CpusAccel tcg_cpus_mttcg;
70
extern const CpusAccel tcg_cpus_icount;
71
extern const CpusAccel tcg_cpus_rr;
72
73
-void tcg_start_vcpu_thread(CPUState *cpu);
74
void qemu_tcg_destroy_vcpu(CPUState *cpu);
75
int tcg_cpu_exec(CPUState *cpu);
76
void tcg_handle_interrupt(CPUState *cpu, int mask);
77
diff --git a/accel/tcg/tcg-all.c b/accel/tcg/tcg-all.c
78
index XXXXXXX..XXXXXXX 100644
79
--- a/accel/tcg/tcg-all.c
80
+++ b/accel/tcg/tcg-all.c
81
@@ -XXX,XX +XXX,XX @@ static int tcg_init(MachineState *ms)
82
tcg_exec_init(s->tb_size * 1024 * 1024);
83
mttcg_enabled = s->mttcg_enabled;
84
85
+ /*
86
+ * Initialize TCG regions
87
+ */
88
+ tcg_region_init();
89
+
90
if (mttcg_enabled) {
91
cpus_register_accel(&tcg_cpus_mttcg);
92
} else if (icount_enabled()) {
93
diff --git a/accel/tcg/tcg-cpus-icount.c b/accel/tcg/tcg-cpus-icount.c
94
index XXXXXXX..XXXXXXX 100644
95
--- a/accel/tcg/tcg-cpus-icount.c
96
+++ b/accel/tcg/tcg-cpus-icount.c
97
@@ -XXX,XX +XXX,XX @@ static void icount_handle_interrupt(CPUState *cpu, int mask)
17
}
98
}
18
99
19
+#ifndef CODE_ACCESS
100
const CpusAccel tcg_cpus_icount = {
20
static inline RES_TYPE
101
- .create_vcpu_thread = tcg_start_vcpu_thread,
21
glue(glue(glue(cpu_ld, USUFFIX), MEMSUFFIX), _ra)(CPUArchState *env,
102
+ .create_vcpu_thread = rr_start_vcpu_thread,
22
abi_ptr ptr,
103
.kick_vcpu_thread = qemu_cpu_kick_rr_cpus,
23
@@ -XXX,XX +XXX,XX @@ glue(glue(glue(cpu_ld, USUFFIX), MEMSUFFIX), _ra)(CPUArchState *env,
104
24
clear_helper_retaddr();
105
.handle_interrupt = icount_handle_interrupt,
25
return ret;
106
diff --git a/accel/tcg/tcg-cpus-mttcg.c b/accel/tcg/tcg-cpus-mttcg.c
107
index XXXXXXX..XXXXXXX 100644
108
--- a/accel/tcg/tcg-cpus-mttcg.c
109
+++ b/accel/tcg/tcg-cpus-mttcg.c
110
@@ -XXX,XX +XXX,XX @@
111
#include "hw/boards.h"
112
113
#include "tcg-cpus.h"
114
-#include "tcg-cpus-mttcg.h"
115
116
/*
117
* In the multi-threaded case each vCPU has its own thread. The TLS
118
@@ -XXX,XX +XXX,XX @@
119
* current CPUState for a given thread.
120
*/
121
122
-void *tcg_cpu_thread_fn(void *arg)
123
+static void *tcg_cpu_thread_fn(void *arg)
124
{
125
CPUState *cpu = arg;
126
127
@@ -XXX,XX +XXX,XX @@ static void mttcg_kick_vcpu_thread(CPUState *cpu)
128
cpu_exit(cpu);
26
}
129
}
130
131
+static void mttcg_start_vcpu_thread(CPUState *cpu)
132
+{
133
+ char thread_name[VCPU_THREAD_NAME_SIZE];
134
+
135
+ g_assert(tcg_enabled());
136
+
137
+ parallel_cpus = (current_machine->smp.max_cpus > 1);
138
+
139
+ cpu->thread = g_malloc0(sizeof(QemuThread));
140
+ cpu->halt_cond = g_malloc0(sizeof(QemuCond));
141
+ qemu_cond_init(cpu->halt_cond);
142
+
143
+ /* create a thread per vCPU with TCG (MTTCG) */
144
+ snprintf(thread_name, VCPU_THREAD_NAME_SIZE, "CPU %d/TCG",
145
+ cpu->cpu_index);
146
+
147
+ qemu_thread_create(cpu->thread, thread_name, tcg_cpu_thread_fn,
148
+ cpu, QEMU_THREAD_JOINABLE);
149
+
150
+#ifdef _WIN32
151
+ cpu->hThread = qemu_thread_get_handle(cpu->thread);
27
+#endif
152
+#endif
28
153
+}
29
#if DATA_SIZE <= 2
154
+
30
static inline int
155
const CpusAccel tcg_cpus_mttcg = {
31
@@ -XXX,XX +XXX,XX @@ glue(glue(cpu_lds, SUFFIX), MEMSUFFIX)(CPUArchState *env, abi_ptr ptr)
156
- .create_vcpu_thread = tcg_start_vcpu_thread,
32
return glue(glue(lds, SUFFIX), _p)(g2h(ptr));
157
+ .create_vcpu_thread = mttcg_start_vcpu_thread,
158
.kick_vcpu_thread = mttcg_kick_vcpu_thread,
159
160
.handle_interrupt = tcg_handle_interrupt,
161
diff --git a/accel/tcg/tcg-cpus-rr.c b/accel/tcg/tcg-cpus-rr.c
162
index XXXXXXX..XXXXXXX 100644
163
--- a/accel/tcg/tcg-cpus-rr.c
164
+++ b/accel/tcg/tcg-cpus-rr.c
165
@@ -XXX,XX +XXX,XX @@ static void deal_with_unplugged_cpus(void)
166
* elsewhere.
167
*/
168
169
-void *tcg_rr_cpu_thread_fn(void *arg)
170
+static void *tcg_rr_cpu_thread_fn(void *arg)
171
{
172
CPUState *cpu = arg;
173
174
@@ -XXX,XX +XXX,XX @@ void *tcg_rr_cpu_thread_fn(void *arg)
175
return NULL;
33
}
176
}
34
177
35
+#ifndef CODE_ACCESS
178
+void rr_start_vcpu_thread(CPUState *cpu)
36
static inline int
179
+{
37
glue(glue(glue(cpu_lds, SUFFIX), MEMSUFFIX), _ra)(CPUArchState *env,
180
+ char thread_name[VCPU_THREAD_NAME_SIZE];
38
abi_ptr ptr,
181
+ static QemuCond *single_tcg_halt_cond;
39
@@ -XXX,XX +XXX,XX @@ glue(glue(glue(cpu_lds, SUFFIX), MEMSUFFIX), _ra)(CPUArchState *env,
182
+ static QemuThread *single_tcg_cpu_thread;
40
clear_helper_retaddr();
183
+
41
return ret;
184
+ g_assert(tcg_enabled());
42
}
185
+ parallel_cpus = false;
186
+
187
+ if (!single_tcg_cpu_thread) {
188
+ cpu->thread = g_malloc0(sizeof(QemuThread));
189
+ cpu->halt_cond = g_malloc0(sizeof(QemuCond));
190
+ qemu_cond_init(cpu->halt_cond);
191
+
192
+ /* share a single thread for all cpus with TCG */
193
+ snprintf(thread_name, VCPU_THREAD_NAME_SIZE, "ALL CPUs/TCG");
194
+ qemu_thread_create(cpu->thread, thread_name,
195
+ tcg_rr_cpu_thread_fn,
196
+ cpu, QEMU_THREAD_JOINABLE);
197
+
198
+ single_tcg_halt_cond = cpu->halt_cond;
199
+ single_tcg_cpu_thread = cpu->thread;
200
+#ifdef _WIN32
201
+ cpu->hThread = qemu_thread_get_handle(cpu->thread);
202
+#endif
203
+ } else {
204
+ /* we share the thread */
205
+ cpu->thread = single_tcg_cpu_thread;
206
+ cpu->halt_cond = single_tcg_halt_cond;
207
+ cpu->thread_id = first_cpu->thread_id;
208
+ cpu->can_do_io = 1;
209
+ cpu->created = true;
210
+ }
211
+}
212
+
213
const CpusAccel tcg_cpus_rr = {
214
- .create_vcpu_thread = tcg_start_vcpu_thread,
215
+ .create_vcpu_thread = rr_start_vcpu_thread,
216
.kick_vcpu_thread = qemu_cpu_kick_rr_cpus,
217
218
.handle_interrupt = tcg_handle_interrupt,
219
diff --git a/accel/tcg/tcg-cpus.c b/accel/tcg/tcg-cpus.c
220
index XXXXXXX..XXXXXXX 100644
221
--- a/accel/tcg/tcg-cpus.c
222
+++ b/accel/tcg/tcg-cpus.c
223
@@ -XXX,XX +XXX,XX @@
224
#include "hw/boards.h"
225
226
#include "tcg-cpus.h"
227
-#include "tcg-cpus-mttcg.h"
228
-#include "tcg-cpus-rr.h"
229
230
/* common functionality among all TCG variants */
231
232
-void tcg_start_vcpu_thread(CPUState *cpu)
233
-{
234
- char thread_name[VCPU_THREAD_NAME_SIZE];
235
- static QemuCond *single_tcg_halt_cond;
236
- static QemuThread *single_tcg_cpu_thread;
237
- static int tcg_region_inited;
238
-
239
- assert(tcg_enabled());
240
- /*
241
- * Initialize TCG regions--once. Now is a good time, because:
242
- * (1) TCG's init context, prologue and target globals have been set up.
243
- * (2) qemu_tcg_mttcg_enabled() works now (TCG init code runs before the
244
- * -accel flag is processed, so the check doesn't work then).
245
- */
246
- if (!tcg_region_inited) {
247
- tcg_region_inited = 1;
248
- tcg_region_init();
249
- parallel_cpus = qemu_tcg_mttcg_enabled() && current_machine->smp.max_cpus > 1;
250
- }
251
-
252
- if (qemu_tcg_mttcg_enabled() || !single_tcg_cpu_thread) {
253
- cpu->thread = g_malloc0(sizeof(QemuThread));
254
- cpu->halt_cond = g_malloc0(sizeof(QemuCond));
255
- qemu_cond_init(cpu->halt_cond);
256
-
257
- if (qemu_tcg_mttcg_enabled()) {
258
- /* create a thread per vCPU with TCG (MTTCG) */
259
- snprintf(thread_name, VCPU_THREAD_NAME_SIZE, "CPU %d/TCG",
260
- cpu->cpu_index);
261
-
262
- qemu_thread_create(cpu->thread, thread_name, tcg_cpu_thread_fn,
263
- cpu, QEMU_THREAD_JOINABLE);
264
-
265
- } else {
266
- /* share a single thread for all cpus with TCG */
267
- snprintf(thread_name, VCPU_THREAD_NAME_SIZE, "ALL CPUs/TCG");
268
- qemu_thread_create(cpu->thread, thread_name,
269
- tcg_rr_cpu_thread_fn,
270
- cpu, QEMU_THREAD_JOINABLE);
271
-
272
- single_tcg_halt_cond = cpu->halt_cond;
273
- single_tcg_cpu_thread = cpu->thread;
274
- }
275
-#ifdef _WIN32
276
- cpu->hThread = qemu_thread_get_handle(cpu->thread);
43
-#endif
277
-#endif
44
+#endif /* CODE_ACCESS */
278
- } else {
45
+#endif /* DATA_SIZE <= 2 */
279
- /* For non-MTTCG cases we share the thread */
46
280
- cpu->thread = single_tcg_cpu_thread;
47
#ifndef CODE_ACCESS
281
- cpu->halt_cond = single_tcg_halt_cond;
48
static inline void
282
- cpu->thread_id = first_cpu->thread_id;
283
- cpu->can_do_io = 1;
284
- cpu->created = true;
285
- }
286
-}
287
-
288
void qemu_tcg_destroy_vcpu(CPUState *cpu)
289
{
290
cpu_thread_signal_destroyed(cpu);
49
--
291
--
50
2.17.1
292
2.25.1
51
293
52
294
diff view generated by jsdifflib
1
This code block is already surrounded by #ifndef CODE_ACCESS.
1
From: Claudio Fontana <cfontana@suse.de>
2
2
3
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
3
Signed-off-by: Claudio Fontana <cfontana@suse.de>
4
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
5
Message-Id: <20201015143217.29337-4-cfontana@suse.de>
4
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5
---
7
---
6
include/exec/cpu_ldst_useronly_template.h | 2 --
8
accel/tcg/tcg-cpus-icount.h | 6 +--
7
1 file changed, 2 deletions(-)
9
accel/tcg/tcg-cpus-rr.h | 2 +-
10
accel/tcg/tcg-cpus.h | 6 +--
11
accel/tcg/tcg-cpus-icount.c | 24 ++++++------
12
accel/tcg/tcg-cpus-mttcg.c | 10 ++---
13
accel/tcg/tcg-cpus-rr.c | 74 ++++++++++++++++++-------------------
14
accel/tcg/tcg-cpus.c | 6 +--
15
7 files changed, 64 insertions(+), 64 deletions(-)
8
16
9
diff --git a/include/exec/cpu_ldst_useronly_template.h b/include/exec/cpu_ldst_useronly_template.h
17
diff --git a/accel/tcg/tcg-cpus-icount.h b/accel/tcg/tcg-cpus-icount.h
10
index XXXXXXX..XXXXXXX 100644
18
index XXXXXXX..XXXXXXX 100644
11
--- a/include/exec/cpu_ldst_useronly_template.h
19
--- a/accel/tcg/tcg-cpus-icount.h
12
+++ b/include/exec/cpu_ldst_useronly_template.h
20
+++ b/accel/tcg/tcg-cpus-icount.h
13
@@ -XXX,XX +XXX,XX @@ static inline void
21
@@ -XXX,XX +XXX,XX @@
14
glue(glue(cpu_st, SUFFIX), MEMSUFFIX)(CPUArchState *env, abi_ptr ptr,
22
#ifndef TCG_CPUS_ICOUNT_H
15
RES_TYPE v)
23
#define TCG_CPUS_ICOUNT_H
16
{
24
17
-#if !defined(CODE_ACCESS)
25
-void handle_icount_deadline(void);
18
trace_guest_mem_before_exec(
26
-void prepare_icount_for_run(CPUState *cpu);
19
env_cpu(env), ptr,
27
-void process_icount_data(CPUState *cpu);
20
trace_mem_build_info(SHIFT, false, MO_TE, true));
28
+void icount_handle_deadline(void);
21
-#endif
29
+void icount_prepare_for_run(CPUState *cpu);
22
glue(glue(st, SUFFIX), _p)(g2h(ptr), v);
30
+void icount_process_data(CPUState *cpu);
23
}
31
32
#endif /* TCG_CPUS_ICOUNT_H */
33
diff --git a/accel/tcg/tcg-cpus-rr.h b/accel/tcg/tcg-cpus-rr.h
34
index XXXXXXX..XXXXXXX 100644
35
--- a/accel/tcg/tcg-cpus-rr.h
36
+++ b/accel/tcg/tcg-cpus-rr.h
37
@@ -XXX,XX +XXX,XX @@
38
#define TCG_KICK_PERIOD (NANOSECONDS_PER_SECOND / 10)
39
40
/* Kick all RR vCPUs. */
41
-void qemu_cpu_kick_rr_cpus(CPUState *unused);
42
+void rr_kick_vcpu_thread(CPUState *unused);
43
44
/* start the round robin vcpu thread */
45
void rr_start_vcpu_thread(CPUState *cpu);
46
diff --git a/accel/tcg/tcg-cpus.h b/accel/tcg/tcg-cpus.h
47
index XXXXXXX..XXXXXXX 100644
48
--- a/accel/tcg/tcg-cpus.h
49
+++ b/accel/tcg/tcg-cpus.h
50
@@ -XXX,XX +XXX,XX @@ extern const CpusAccel tcg_cpus_mttcg;
51
extern const CpusAccel tcg_cpus_icount;
52
extern const CpusAccel tcg_cpus_rr;
53
54
-void qemu_tcg_destroy_vcpu(CPUState *cpu);
55
-int tcg_cpu_exec(CPUState *cpu);
56
-void tcg_handle_interrupt(CPUState *cpu, int mask);
57
+void tcg_cpus_destroy(CPUState *cpu);
58
+int tcg_cpus_exec(CPUState *cpu);
59
+void tcg_cpus_handle_interrupt(CPUState *cpu, int mask);
60
61
#endif /* TCG_CPUS_H */
62
diff --git a/accel/tcg/tcg-cpus-icount.c b/accel/tcg/tcg-cpus-icount.c
63
index XXXXXXX..XXXXXXX 100644
64
--- a/accel/tcg/tcg-cpus-icount.c
65
+++ b/accel/tcg/tcg-cpus-icount.c
66
@@ -XXX,XX +XXX,XX @@
67
#include "tcg-cpus-icount.h"
68
#include "tcg-cpus-rr.h"
69
70
-static int64_t tcg_get_icount_limit(void)
71
+static int64_t icount_get_limit(void)
72
{
73
int64_t deadline;
74
75
@@ -XXX,XX +XXX,XX @@ static int64_t tcg_get_icount_limit(void)
76
}
77
}
78
79
-static void notify_aio_contexts(void)
80
+static void icount_notify_aio_contexts(void)
81
{
82
/* Wake up other AioContexts. */
83
qemu_clock_notify(QEMU_CLOCK_VIRTUAL);
84
qemu_clock_run_timers(QEMU_CLOCK_VIRTUAL);
85
}
86
87
-void handle_icount_deadline(void)
88
+void icount_handle_deadline(void)
89
{
90
assert(qemu_in_vcpu_thread());
91
int64_t deadline = qemu_clock_deadline_ns_all(QEMU_CLOCK_VIRTUAL,
92
QEMU_TIMER_ATTR_ALL);
93
94
if (deadline == 0) {
95
- notify_aio_contexts();
96
+ icount_notify_aio_contexts();
97
}
98
}
99
100
-void prepare_icount_for_run(CPUState *cpu)
101
+void icount_prepare_for_run(CPUState *cpu)
102
{
103
int insns_left;
104
105
/*
106
- * These should always be cleared by process_icount_data after
107
+ * These should always be cleared by icount_process_data after
108
* each vCPU execution. However u16.high can be raised
109
- * asynchronously by cpu_exit/cpu_interrupt/tcg_handle_interrupt
110
+ * asynchronously by cpu_exit/cpu_interrupt/tcg_cpus_handle_interrupt
111
*/
112
g_assert(cpu_neg(cpu)->icount_decr.u16.low == 0);
113
g_assert(cpu->icount_extra == 0);
114
115
- cpu->icount_budget = tcg_get_icount_limit();
116
+ cpu->icount_budget = icount_get_limit();
117
insns_left = MIN(0xffff, cpu->icount_budget);
118
cpu_neg(cpu)->icount_decr.u16.low = insns_left;
119
cpu->icount_extra = cpu->icount_budget - insns_left;
120
@@ -XXX,XX +XXX,XX @@ void prepare_icount_for_run(CPUState *cpu)
121
replay_mutex_lock();
122
123
if (cpu->icount_budget == 0 && replay_has_checkpoint()) {
124
- notify_aio_contexts();
125
+ icount_notify_aio_contexts();
126
}
127
}
128
129
-void process_icount_data(CPUState *cpu)
130
+void icount_process_data(CPUState *cpu)
131
{
132
/* Account for executed instructions */
133
icount_update(cpu);
134
@@ -XXX,XX +XXX,XX @@ static void icount_handle_interrupt(CPUState *cpu, int mask)
135
{
136
int old_mask = cpu->interrupt_request;
137
138
- tcg_handle_interrupt(cpu, mask);
139
+ tcg_cpus_handle_interrupt(cpu, mask);
140
if (qemu_cpu_is_self(cpu) &&
141
!cpu->can_do_io
142
&& (mask & ~old_mask) != 0) {
143
@@ -XXX,XX +XXX,XX @@ static void icount_handle_interrupt(CPUState *cpu, int mask)
144
145
const CpusAccel tcg_cpus_icount = {
146
.create_vcpu_thread = rr_start_vcpu_thread,
147
- .kick_vcpu_thread = qemu_cpu_kick_rr_cpus,
148
+ .kick_vcpu_thread = rr_kick_vcpu_thread,
149
150
.handle_interrupt = icount_handle_interrupt,
151
.get_virtual_clock = icount_get,
152
diff --git a/accel/tcg/tcg-cpus-mttcg.c b/accel/tcg/tcg-cpus-mttcg.c
153
index XXXXXXX..XXXXXXX 100644
154
--- a/accel/tcg/tcg-cpus-mttcg.c
155
+++ b/accel/tcg/tcg-cpus-mttcg.c
156
@@ -XXX,XX +XXX,XX @@
157
* current CPUState for a given thread.
158
*/
159
160
-static void *tcg_cpu_thread_fn(void *arg)
161
+static void *mttcg_cpu_thread_fn(void *arg)
162
{
163
CPUState *cpu = arg;
164
165
@@ -XXX,XX +XXX,XX @@ static void *tcg_cpu_thread_fn(void *arg)
166
if (cpu_can_run(cpu)) {
167
int r;
168
qemu_mutex_unlock_iothread();
169
- r = tcg_cpu_exec(cpu);
170
+ r = tcg_cpus_exec(cpu);
171
qemu_mutex_lock_iothread();
172
switch (r) {
173
case EXCP_DEBUG:
174
@@ -XXX,XX +XXX,XX @@ static void *tcg_cpu_thread_fn(void *arg)
175
qemu_wait_io_event(cpu);
176
} while (!cpu->unplug || cpu_can_run(cpu));
177
178
- qemu_tcg_destroy_vcpu(cpu);
179
+ tcg_cpus_destroy(cpu);
180
qemu_mutex_unlock_iothread();
181
rcu_unregister_thread();
182
return NULL;
183
@@ -XXX,XX +XXX,XX @@ static void mttcg_start_vcpu_thread(CPUState *cpu)
184
snprintf(thread_name, VCPU_THREAD_NAME_SIZE, "CPU %d/TCG",
185
cpu->cpu_index);
186
187
- qemu_thread_create(cpu->thread, thread_name, tcg_cpu_thread_fn,
188
+ qemu_thread_create(cpu->thread, thread_name, mttcg_cpu_thread_fn,
189
cpu, QEMU_THREAD_JOINABLE);
190
191
#ifdef _WIN32
192
@@ -XXX,XX +XXX,XX @@ const CpusAccel tcg_cpus_mttcg = {
193
.create_vcpu_thread = mttcg_start_vcpu_thread,
194
.kick_vcpu_thread = mttcg_kick_vcpu_thread,
195
196
- .handle_interrupt = tcg_handle_interrupt,
197
+ .handle_interrupt = tcg_cpus_handle_interrupt,
198
};
199
diff --git a/accel/tcg/tcg-cpus-rr.c b/accel/tcg/tcg-cpus-rr.c
200
index XXXXXXX..XXXXXXX 100644
201
--- a/accel/tcg/tcg-cpus-rr.c
202
+++ b/accel/tcg/tcg-cpus-rr.c
203
@@ -XXX,XX +XXX,XX @@
204
#include "tcg-cpus-icount.h"
205
206
/* Kick all RR vCPUs */
207
-void qemu_cpu_kick_rr_cpus(CPUState *unused)
208
+void rr_kick_vcpu_thread(CPUState *unused)
209
{
210
CPUState *cpu;
211
212
@@ -XXX,XX +XXX,XX @@ void qemu_cpu_kick_rr_cpus(CPUState *unused)
213
* idleness is complete.
214
*/
215
216
-static QEMUTimer *tcg_kick_vcpu_timer;
217
-static CPUState *tcg_current_rr_cpu;
218
+static QEMUTimer *rr_kick_vcpu_timer;
219
+static CPUState *rr_current_cpu;
220
221
#define TCG_KICK_PERIOD (NANOSECONDS_PER_SECOND / 10)
222
223
-static inline int64_t qemu_tcg_next_kick(void)
224
+static inline int64_t rr_next_kick_time(void)
225
{
226
return qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + TCG_KICK_PERIOD;
227
}
228
229
/* Kick the currently round-robin scheduled vCPU to next */
230
-static void qemu_cpu_kick_rr_next_cpu(void)
231
+static void rr_kick_next_cpu(void)
232
{
233
CPUState *cpu;
234
do {
235
- cpu = qatomic_mb_read(&tcg_current_rr_cpu);
236
+ cpu = qatomic_mb_read(&rr_current_cpu);
237
if (cpu) {
238
cpu_exit(cpu);
239
}
240
- } while (cpu != qatomic_mb_read(&tcg_current_rr_cpu));
241
+ } while (cpu != qatomic_mb_read(&rr_current_cpu));
242
}
243
244
-static void kick_tcg_thread(void *opaque)
245
+static void rr_kick_thread(void *opaque)
246
{
247
- timer_mod(tcg_kick_vcpu_timer, qemu_tcg_next_kick());
248
- qemu_cpu_kick_rr_next_cpu();
249
+ timer_mod(rr_kick_vcpu_timer, rr_next_kick_time());
250
+ rr_kick_next_cpu();
251
}
252
253
-static void start_tcg_kick_timer(void)
254
+static void rr_start_kick_timer(void)
255
{
256
- if (!tcg_kick_vcpu_timer && CPU_NEXT(first_cpu)) {
257
- tcg_kick_vcpu_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL,
258
- kick_tcg_thread, NULL);
259
+ if (!rr_kick_vcpu_timer && CPU_NEXT(first_cpu)) {
260
+ rr_kick_vcpu_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL,
261
+ rr_kick_thread, NULL);
262
}
263
- if (tcg_kick_vcpu_timer && !timer_pending(tcg_kick_vcpu_timer)) {
264
- timer_mod(tcg_kick_vcpu_timer, qemu_tcg_next_kick());
265
+ if (rr_kick_vcpu_timer && !timer_pending(rr_kick_vcpu_timer)) {
266
+ timer_mod(rr_kick_vcpu_timer, rr_next_kick_time());
267
}
268
}
269
270
-static void stop_tcg_kick_timer(void)
271
+static void rr_stop_kick_timer(void)
272
{
273
- if (tcg_kick_vcpu_timer && timer_pending(tcg_kick_vcpu_timer)) {
274
- timer_del(tcg_kick_vcpu_timer);
275
+ if (rr_kick_vcpu_timer && timer_pending(rr_kick_vcpu_timer)) {
276
+ timer_del(rr_kick_vcpu_timer);
277
}
278
}
279
280
-static void qemu_tcg_rr_wait_io_event(void)
281
+static void rr_wait_io_event(void)
282
{
283
CPUState *cpu;
284
285
while (all_cpu_threads_idle()) {
286
- stop_tcg_kick_timer();
287
+ rr_stop_kick_timer();
288
qemu_cond_wait_iothread(first_cpu->halt_cond);
289
}
290
291
- start_tcg_kick_timer();
292
+ rr_start_kick_timer();
293
294
CPU_FOREACH(cpu) {
295
qemu_wait_io_event_common(cpu);
296
@@ -XXX,XX +XXX,XX @@ static void qemu_tcg_rr_wait_io_event(void)
297
* Destroy any remaining vCPUs which have been unplugged and have
298
* finished running
299
*/
300
-static void deal_with_unplugged_cpus(void)
301
+static void rr_deal_with_unplugged_cpus(void)
302
{
303
CPUState *cpu;
304
305
CPU_FOREACH(cpu) {
306
if (cpu->unplug && !cpu_can_run(cpu)) {
307
- qemu_tcg_destroy_vcpu(cpu);
308
+ tcg_cpus_destroy(cpu);
309
break;
310
}
311
}
312
@@ -XXX,XX +XXX,XX @@ static void deal_with_unplugged_cpus(void)
313
* elsewhere.
314
*/
315
316
-static void *tcg_rr_cpu_thread_fn(void *arg)
317
+static void *rr_cpu_thread_fn(void *arg)
318
{
319
CPUState *cpu = arg;
320
321
@@ -XXX,XX +XXX,XX @@ static void *tcg_rr_cpu_thread_fn(void *arg)
322
}
323
}
324
325
- start_tcg_kick_timer();
326
+ rr_start_kick_timer();
327
328
cpu = first_cpu;
329
330
@@ -XXX,XX +XXX,XX @@ static void *tcg_rr_cpu_thread_fn(void *arg)
331
* Run the timers here. This is much more efficient than
332
* waking up the I/O thread and waiting for completion.
333
*/
334
- handle_icount_deadline();
335
+ icount_handle_deadline();
336
}
337
338
replay_mutex_unlock();
339
@@ -XXX,XX +XXX,XX @@ static void *tcg_rr_cpu_thread_fn(void *arg)
340
341
while (cpu && cpu_work_list_empty(cpu) && !cpu->exit_request) {
342
343
- qatomic_mb_set(&tcg_current_rr_cpu, cpu);
344
+ qatomic_mb_set(&rr_current_cpu, cpu);
345
current_cpu = cpu;
346
347
qemu_clock_enable(QEMU_CLOCK_VIRTUAL,
348
@@ -XXX,XX +XXX,XX @@ static void *tcg_rr_cpu_thread_fn(void *arg)
349
350
qemu_mutex_unlock_iothread();
351
if (icount_enabled()) {
352
- prepare_icount_for_run(cpu);
353
+ icount_prepare_for_run(cpu);
354
}
355
- r = tcg_cpu_exec(cpu);
356
+ r = tcg_cpus_exec(cpu);
357
if (icount_enabled()) {
358
- process_icount_data(cpu);
359
+ icount_process_data(cpu);
360
}
361
qemu_mutex_lock_iothread();
362
363
@@ -XXX,XX +XXX,XX @@ static void *tcg_rr_cpu_thread_fn(void *arg)
364
} /* while (cpu && !cpu->exit_request).. */
365
366
/* Does not need qatomic_mb_set because a spurious wakeup is okay. */
367
- qatomic_set(&tcg_current_rr_cpu, NULL);
368
+ qatomic_set(&rr_current_cpu, NULL);
369
370
if (cpu && cpu->exit_request) {
371
qatomic_mb_set(&cpu->exit_request, 0);
372
@@ -XXX,XX +XXX,XX @@ static void *tcg_rr_cpu_thread_fn(void *arg)
373
qemu_notify_event();
374
}
375
376
- qemu_tcg_rr_wait_io_event();
377
- deal_with_unplugged_cpus();
378
+ rr_wait_io_event();
379
+ rr_deal_with_unplugged_cpus();
380
}
381
382
rcu_unregister_thread();
383
@@ -XXX,XX +XXX,XX @@ void rr_start_vcpu_thread(CPUState *cpu)
384
/* share a single thread for all cpus with TCG */
385
snprintf(thread_name, VCPU_THREAD_NAME_SIZE, "ALL CPUs/TCG");
386
qemu_thread_create(cpu->thread, thread_name,
387
- tcg_rr_cpu_thread_fn,
388
+ rr_cpu_thread_fn,
389
cpu, QEMU_THREAD_JOINABLE);
390
391
single_tcg_halt_cond = cpu->halt_cond;
392
@@ -XXX,XX +XXX,XX @@ void rr_start_vcpu_thread(CPUState *cpu)
393
394
const CpusAccel tcg_cpus_rr = {
395
.create_vcpu_thread = rr_start_vcpu_thread,
396
- .kick_vcpu_thread = qemu_cpu_kick_rr_cpus,
397
+ .kick_vcpu_thread = rr_kick_vcpu_thread,
398
399
- .handle_interrupt = tcg_handle_interrupt,
400
+ .handle_interrupt = tcg_cpus_handle_interrupt,
401
};
402
diff --git a/accel/tcg/tcg-cpus.c b/accel/tcg/tcg-cpus.c
403
index XXXXXXX..XXXXXXX 100644
404
--- a/accel/tcg/tcg-cpus.c
405
+++ b/accel/tcg/tcg-cpus.c
406
@@ -XXX,XX +XXX,XX @@
407
408
/* common functionality among all TCG variants */
409
410
-void qemu_tcg_destroy_vcpu(CPUState *cpu)
411
+void tcg_cpus_destroy(CPUState *cpu)
412
{
413
cpu_thread_signal_destroyed(cpu);
414
}
415
416
-int tcg_cpu_exec(CPUState *cpu)
417
+int tcg_cpus_exec(CPUState *cpu)
418
{
419
int ret;
420
#ifdef CONFIG_PROFILER
421
@@ -XXX,XX +XXX,XX @@ int tcg_cpu_exec(CPUState *cpu)
422
}
423
424
/* mask must never be zero, except for A20 change call */
425
-void tcg_handle_interrupt(CPUState *cpu, int mask)
426
+void tcg_cpus_handle_interrupt(CPUState *cpu, int mask)
427
{
428
g_assert(qemu_mutex_iothread_locked());
24
429
25
--
430
--
26
2.17.1
431
2.25.1
27
432
28
433
diff view generated by jsdifflib
Deleted patch
1
Turn helper_retaddr into a multi-state flag that may now also
2
indicate when we're performing a read on behalf of the translator.
3
In this case, release the mmap_lock before the longjmp back to
4
the main cpu loop, and thereby avoid a failing assert therein.
5
1
6
Fixes: https://bugs.launchpad.net/qemu/+bug/1832353
7
Tested-by: Alex Bennée <alex.bennee@linaro.org>
8
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
9
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
10
---
11
include/exec/cpu_ldst_useronly_template.h | 20 +++++--
12
accel/tcg/user-exec.c | 66 ++++++++++++++++-------
13
2 files changed, 63 insertions(+), 23 deletions(-)
14
15
diff --git a/include/exec/cpu_ldst_useronly_template.h b/include/exec/cpu_ldst_useronly_template.h
16
index XXXXXXX..XXXXXXX 100644
17
--- a/include/exec/cpu_ldst_useronly_template.h
18
+++ b/include/exec/cpu_ldst_useronly_template.h
19
@@ -XXX,XX +XXX,XX @@
20
static inline RES_TYPE
21
glue(glue(cpu_ld, USUFFIX), MEMSUFFIX)(CPUArchState *env, abi_ptr ptr)
22
{
23
-#if !defined(CODE_ACCESS)
24
+#ifdef CODE_ACCESS
25
+ RES_TYPE ret;
26
+ set_helper_retaddr(1);
27
+ ret = glue(glue(ld, USUFFIX), _p)(g2h(ptr));
28
+ clear_helper_retaddr();
29
+ return ret;
30
+#else
31
trace_guest_mem_before_exec(
32
env_cpu(env), ptr,
33
trace_mem_build_info(SHIFT, false, MO_TE, false));
34
-#endif
35
return glue(glue(ld, USUFFIX), _p)(g2h(ptr));
36
+#endif
37
}
38
39
#ifndef CODE_ACCESS
40
@@ -XXX,XX +XXX,XX @@ glue(glue(glue(cpu_ld, USUFFIX), MEMSUFFIX), _ra)(CPUArchState *env,
41
static inline int
42
glue(glue(cpu_lds, SUFFIX), MEMSUFFIX)(CPUArchState *env, abi_ptr ptr)
43
{
44
-#if !defined(CODE_ACCESS)
45
+#ifdef CODE_ACCESS
46
+ int ret;
47
+ set_helper_retaddr(1);
48
+ ret = glue(glue(lds, SUFFIX), _p)(g2h(ptr));
49
+ clear_helper_retaddr();
50
+ return ret;
51
+#else
52
trace_guest_mem_before_exec(
53
env_cpu(env), ptr,
54
trace_mem_build_info(SHIFT, true, MO_TE, false));
55
-#endif
56
return glue(glue(lds, SUFFIX), _p)(g2h(ptr));
57
+#endif
58
}
59
60
#ifndef CODE_ACCESS
61
diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c
62
index XXXXXXX..XXXXXXX 100644
63
--- a/accel/tcg/user-exec.c
64
+++ b/accel/tcg/user-exec.c
65
@@ -XXX,XX +XXX,XX @@ static inline int handle_cpu_signal(uintptr_t pc, siginfo_t *info,
66
CPUState *cpu = current_cpu;
67
CPUClass *cc;
68
unsigned long address = (unsigned long)info->si_addr;
69
- MMUAccessType access_type;
70
+ MMUAccessType access_type = is_write ? MMU_DATA_STORE : MMU_DATA_LOAD;
71
72
- /* We must handle PC addresses from two different sources:
73
- * a call return address and a signal frame address.
74
- *
75
- * Within cpu_restore_state_from_tb we assume the former and adjust
76
- * the address by -GETPC_ADJ so that the address is within the call
77
- * insn so that addr does not accidentally match the beginning of the
78
- * next guest insn.
79
- *
80
- * However, when the PC comes from the signal frame, it points to
81
- * the actual faulting host insn and not a call insn. Subtracting
82
- * GETPC_ADJ in that case may accidentally match the previous guest insn.
83
- *
84
- * So for the later case, adjust forward to compensate for what
85
- * will be done later by cpu_restore_state_from_tb.
86
- */
87
- if (helper_retaddr) {
88
+ switch (helper_retaddr) {
89
+ default:
90
+ /*
91
+ * Fault during host memory operation within a helper function.
92
+ * The helper's host return address, saved here, gives us a
93
+ * pointer into the generated code that will unwind to the
94
+ * correct guest pc.
95
+ */
96
pc = helper_retaddr;
97
- } else {
98
+ break;
99
+
100
+ case 0:
101
+ /*
102
+ * Fault during host memory operation within generated code.
103
+ * (Or, a unrelated bug within qemu, but we can't tell from here).
104
+ *
105
+ * We take the host pc from the signal frame. However, we cannot
106
+ * use that value directly. Within cpu_restore_state_from_tb, we
107
+ * assume PC comes from GETPC(), as used by the helper functions,
108
+ * so we adjust the address by -GETPC_ADJ to form an address that
109
+ * is within the call insn, so that the address does not accidentially
110
+ * match the beginning of the next guest insn. However, when the
111
+ * pc comes from the signal frame it points to the actual faulting
112
+ * host memory insn and not the return from a call insn.
113
+ *
114
+ * Therefore, adjust to compensate for what will be done later
115
+ * by cpu_restore_state_from_tb.
116
+ */
117
pc += GETPC_ADJ;
118
+ break;
119
+
120
+ case 1:
121
+ /*
122
+ * Fault during host read for translation, or loosely, "execution".
123
+ *
124
+ * The guest pc is already pointing to the start of the TB for which
125
+ * code is being generated. If the guest translator manages the
126
+ * page crossings correctly, this is exactly the correct address
127
+ * (and if the translator doesn't handle page boundaries correctly
128
+ * there's little we can do about that here). Therefore, do not
129
+ * trigger the unwinder.
130
+ *
131
+ * Like tb_gen_code, release the memory lock before cpu_loop_exit.
132
+ */
133
+ pc = 0;
134
+ access_type = MMU_INST_FETCH;
135
+ mmap_unlock();
136
+ break;
137
}
138
139
/* For synchronous signals we expect to be coming from the vCPU
140
@@ -XXX,XX +XXX,XX @@ static inline int handle_cpu_signal(uintptr_t pc, siginfo_t *info,
141
clear_helper_retaddr();
142
143
cc = CPU_GET_CLASS(cpu);
144
- access_type = is_write ? MMU_DATA_STORE : MMU_DATA_LOAD;
145
cc->tlb_fill(cpu, address, 0, access_type, MMU_USER_IDX, false, pc);
146
g_assert_not_reached();
147
}
148
--
149
2.17.1
150
151
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