The following changes since commit e18e5501d8ac692d32657a3e1ef545b14e72b730:

Merge remote-tracking branch 'remotes/dgilbert-gitlab/tags/pull-virtiofs-20200210' into staging (2020-02-10 18:09:14 +0000)

https://github.com/rth7680/qemu.git tags/pull-tcg-20200212

for you to fetch changes up to 2445971604c1cfd3ec484457159f4ac300fb04d2:

tcg: Add tcg_gen_gvec_5_ptr (2020-02-12 14:58:36 -0800)

Fix breakpoint invalidation.

Add support for tcg helpers with 7 arguments.

Add support for gvec helpers with 5 arguments.

Max Filippov (1):

exec: flush CPU TB cache in breakpoint_invalidate

Richard Henderson (1):

tcg: Add tcg_gen_gvec_5_ptr

From: Max Filippov <jcmvbkbc@gmail.com>

When a breakpoint is inserted at location for which there's currently no

virtual to physical translation no action is taken on CPU TB cache. If a

TB for that virtual address already exists but is not visible ATM the

breakpoint won't be hit next time an instruction at that address will be

executed.

Flush entire CPU TB cache in breakpoint_invalidate to force

re-translation of all TBs for the breakpoint address.

This change fixes the following scenario:

- linux user application is running

- a breakpoint is inserted from QEMU gdbstub for a user address that is

not currently present in the target CPU TLB

- an instruction at that address is executed, but the external debugger

doesn't get control.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>

Message-Id: <20191127220602.10827-2-jcmvbkbc@gmail.com>

exec.c | 15 +++++++--------

1 file changed, 7 insertions(+), 8 deletions(-)

diff --git a/exec.c b/exec.c

--- a/exec.c

+++ b/exec.c

@@ -XXX,XX +XXX,XX @@ void tb_invalidate_phys_addr(AddressSpace *as, hwaddr addr, MemTxAttrs attrs)

static void breakpoint_invalidate(CPUState *cpu, target_ulong pc)

- MemTxAttrs attrs;

- hwaddr phys = cpu_get_phys_page_attrs_debug(cpu, pc, &attrs);

- int asidx = cpu_asidx_from_attrs(cpu, attrs);

- if (phys != -1) {

- /* Locks grabbed by tb_invalidate_phys_addr */

- tb_invalidate_phys_addr(cpu->cpu_ases[asidx].as,

- phys | (pc & ~TARGET_PAGE_MASK), attrs);

- }

+ /*

+ * There may not be a virtual to physical translation for the pc

+ * right now, but there may exist cached TB for this pc.

+ * Flush the whole TB cache to force re-translation of such TBs.

+ * This is heavyweight, but we're debugging anyway.

+ */

+ tb_flush(cpu);

2.20.1

From: Taylor Simpson <tsimpson@quicinc.com>

Currently, helpers can only take up to 6 arguments. This patch adds the

capability for up to 7 arguments. I have tested it with the Hexagon port

that I am preparing for submission.

Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>

Message-Id: <1580942510-2820-1-git-send-email-tsimpson@quicinc.com>

include/exec/helper-gen.h | 13 +++++++++++++

include/exec/helper-head.h | 2 ++

include/exec/helper-proto.h | 6 ++++++

include/exec/helper-tcg.h | 7 +++++++

4 files changed, 28 insertions(+)

diff --git a/include/exec/helper-gen.h b/include/exec/helper-gen.h

--- a/include/exec/helper-gen.h

+++ b/include/exec/helper-gen.h

@@ -XXX,XX +XXX,XX @@ static inline void glue(gen_helper_, name)(dh_retvar_decl(ret) \

tcg_gen_callN(HELPER(name), dh_retvar(ret), 6, args); \

}

+#define DEF_HELPER_FLAGS_7(name, flags, ret, t1, t2, t3, t4, t5, t6, t7)\

+static inline void glue(gen_helper_, name)(dh_retvar_decl(ret) \

+ dh_arg_decl(t1, 1), dh_arg_decl(t2, 2), dh_arg_decl(t3, 3), \

+ dh_arg_decl(t4, 4), dh_arg_decl(t5, 5), dh_arg_decl(t6, 6), \

+ dh_arg_decl(t7, 7)) \

+{ \

+ TCGTemp *args[7] = { dh_arg(t1, 1), dh_arg(t2, 2), dh_arg(t3, 3), \

+ dh_arg(t4, 4), dh_arg(t5, 5), dh_arg(t6, 6), \

+ dh_arg(t7, 7) }; \

+ tcg_gen_callN(HELPER(name), dh_retvar(ret), 7, args); \

#include "helper.h"

#include "trace/generated-helpers.h"

#include "trace/generated-helpers-wrappers.h"

@@ -XXX,XX +XXX,XX @@ static inline void glue(gen_helper_, name)(dh_retvar_decl(ret) \

#undef DEF_HELPER_FLAGS_4

#undef DEF_HELPER_FLAGS_5

#undef DEF_HELPER_FLAGS_6

+#undef DEF_HELPER_FLAGS_7

#undef GEN_HELPER

#endif /* HELPER_GEN_H */

diff --git a/include/exec/helper-head.h b/include/exec/helper-head.h

index XXXXXXX..XXXXXXX 100644

--- a/include/exec/helper-head.h

+++ b/include/exec/helper-head.h

@@ -XXX,XX +XXX,XX @@

DEF_HELPER_FLAGS_5(name, 0, ret, t1, t2, t3, t4, t5)

#define DEF_HELPER_6(name, ret, t1, t2, t3, t4, t5, t6) \

DEF_HELPER_FLAGS_6(name, 0, ret, t1, t2, t3, t4, t5, t6)

+#define DEF_HELPER_7(name, ret, t1, t2, t3, t4, t5, t6, t7) \

+ DEF_HELPER_FLAGS_7(name, 0, ret, t1, t2, t3, t4, t5, t6, t7)

/* MAX_OPC_PARAM_IARGS must be set to n if last entry is DEF_HELPER_FLAGS_n. */

diff --git a/include/exec/helper-proto.h b/include/exec/helper-proto.h

index XXXXXXX..XXXXXXX 100644

--- a/include/exec/helper-proto.h

+++ b/include/exec/helper-proto.h

@@ -XXX,XX +XXX,XX @@ dh_ctype(ret) HELPER(name) (dh_ctype(t1), dh_ctype(t2), dh_ctype(t3), \

dh_ctype(ret) HELPER(name) (dh_ctype(t1), dh_ctype(t2), dh_ctype(t3), \

dh_ctype(t4), dh_ctype(t5), dh_ctype(t6));

+#define DEF_HELPER_FLAGS_7(name, flags, ret, t1, t2, t3, t4, t5, t6, t7) \

+dh_ctype(ret) HELPER(name) (dh_ctype(t1), dh_ctype(t2), dh_ctype(t3), \

+ dh_ctype(t4), dh_ctype(t5), dh_ctype(t6), \

+ dh_ctype(t7));

#include "helper.h"

#include "trace/generated-helpers.h"

#include "tcg-runtime.h"

@@ -XXX,XX +XXX,XX @@ dh_ctype(ret) HELPER(name) (dh_ctype(t1), dh_ctype(t2), dh_ctype(t3), \

#undef DEF_HELPER_FLAGS_4

#undef DEF_HELPER_FLAGS_5

#undef DEF_HELPER_FLAGS_6

+#undef DEF_HELPER_FLAGS_7

#endif /* HELPER_PROTO_H */

diff --git a/include/exec/helper-tcg.h b/include/exec/helper-tcg.h

--- a/include/exec/helper-tcg.h

+++ b/include/exec/helper-tcg.h

@@ -XXX,XX +XXX,XX @@

| dh_sizemask(t2, 2) | dh_sizemask(t3, 3) | dh_sizemask(t4, 4) \

| dh_sizemask(t5, 5) | dh_sizemask(t6, 6) },

+#define DEF_HELPER_FLAGS_7(NAME, FLAGS, ret, t1, t2, t3, t4, t5, t6, t7) \

+ { .func = HELPER(NAME), .name = str(NAME), .flags = FLAGS, \

+ .sizemask = dh_sizemask(ret, 0) | dh_sizemask(t1, 1) \

+ | dh_sizemask(t2, 2) | dh_sizemask(t3, 3) | dh_sizemask(t4, 4) \

+ | dh_sizemask(t5, 5) | dh_sizemask(t6, 6) | dh_sizemask(t7, 7) },

+

#include "helper.h"

#include "trace/generated-helpers.h"

#include "tcg-runtime.h"

@@ -XXX,XX +XXX,XX @@

#undef DEF_HELPER_FLAGS_4

#undef DEF_HELPER_FLAGS_5

#undef DEF_HELPER_FLAGS_6

+#undef DEF_HELPER_FLAGS_7

#endif /* HELPER_TCG_H */

2.20.1

Extend the vector generator infrastructure to handle

5 vector arguments.

Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>

include/tcg/tcg-op-gvec.h | 7 +++++++

tcg/tcg-op-gvec.c | 32 ++++++++++++++++++++++++++++++++

2 files changed, 39 insertions(+)

diff --git a/include/tcg/tcg-op-gvec.h b/include/tcg/tcg-op-gvec.h

--- a/include/tcg/tcg-op-gvec.h

+++ b/include/tcg/tcg-op-gvec.h

@@ -XXX,XX +XXX,XX @@ void tcg_gen_gvec_4_ptr(uint32_t dofs, uint32_t aofs, uint32_t bofs,

uint32_t maxsz, int32_t data,

gen_helper_gvec_4_ptr *fn);

+typedef void gen_helper_gvec_5_ptr(TCGv_ptr, TCGv_ptr, TCGv_ptr, TCGv_ptr,

+ TCGv_ptr, TCGv_ptr, TCGv_i32);

+void tcg_gen_gvec_5_ptr(uint32_t dofs, uint32_t aofs, uint32_t bofs,

+ uint32_t cofs, uint32_t eofs, TCGv_ptr ptr,

+ uint32_t oprsz, uint32_t maxsz, int32_t data,

+ gen_helper_gvec_5_ptr *fn);

+

/* Expand a gvec operation. Either inline or out-of-line depending on

the actual vector size and the operations supported by the host. */

typedef struct {

diff --git a/tcg/tcg-op-gvec.c b/tcg/tcg-op-gvec.c

index XXXXXXX..XXXXXXX 100644

--- a/tcg/tcg-op-gvec.c

+++ b/tcg/tcg-op-gvec.c

@@ -XXX,XX +XXX,XX @@ void tcg_gen_gvec_4_ptr(uint32_t dofs, uint32_t aofs, uint32_t bofs,

tcg_temp_free_i32(desc);

+/* Generate a call to a gvec-style helper with five vector operands

+ and an extra pointer operand. */

+void tcg_gen_gvec_5_ptr(uint32_t dofs, uint32_t aofs, uint32_t bofs,

+ uint32_t cofs, uint32_t eofs, TCGv_ptr ptr,

+ uint32_t oprsz, uint32_t maxsz, int32_t data,

+ gen_helper_gvec_5_ptr *fn)

+{

+ TCGv_ptr a0, a1, a2, a3, a4;

+ TCGv_i32 desc = tcg_const_i32(simd_desc(oprsz, maxsz, data));

+ a0 = tcg_temp_new_ptr();

+ a1 = tcg_temp_new_ptr();

+ a2 = tcg_temp_new_ptr();

+ a3 = tcg_temp_new_ptr();

+ a4 = tcg_temp_new_ptr();

+ tcg_gen_addi_ptr(a0, cpu_env, dofs);

+ tcg_gen_addi_ptr(a1, cpu_env, aofs);

+ tcg_gen_addi_ptr(a2, cpu_env, bofs);

+ tcg_gen_addi_ptr(a3, cpu_env, cofs);

+ tcg_gen_addi_ptr(a4, cpu_env, eofs);

+

+ fn(a0, a1, a2, a3, a4, ptr, desc);

+

+ tcg_temp_free_ptr(a0);

+ tcg_temp_free_ptr(a1);

+ tcg_temp_free_ptr(a2);

+ tcg_temp_free_ptr(a3);

+ tcg_temp_free_ptr(a4);

+ tcg_temp_free_i32(desc);

+}

+

/* Return true if we want to implement something of OPRSZ bytes

in units of LNSZ. This limits the expansion of inline code. */

static inline bool check_size_impl(uint32_t oprsz, uint32_t lnsz)

2.20.1