We have some potential race conditions vs our user-exec signal
handler that will be solved with this barrier.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 include/qemu/atomic.h | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/include/qemu/atomic.h b/include/qemu/atomic.h
index a6ac188188..f9cd24c899 100644
--- a/include/qemu/atomic.h
+++ b/include/qemu/atomic.h
@@ -88,6 +88,13 @@
 #define smp_read_barrier_depends()   barrier()
 #endif
 
+/*
+ * A signal barrier forces all pending local memory ops to be observed before
+ * a SIGSEGV is delivered to the *same* thread.  In practice this is exactly
+ * the same as barrier(), but since we have the correct builtin, use it.
+ */
+#define signal_barrier()    __atomic_signal_fence(__ATOMIC_SEQ_CST)
+
 /* Sanity check that the size of an atomic operation isn't "overly large".
  * Despite the fact that e.g. i686 has 64-bit atomic operations, we do not
  * want to use them because we ought not need them, and this lets us do a
@@ -308,6 +315,10 @@
 #define smp_read_barrier_depends()   barrier()
 #endif
 
+#ifndef signal_barrier
+#define signal_barrier()    barrier()
+#endif
+
 /* These will only be atomic if the processor does the fetch or store
  * in a single issue memory operation
  */
-- 
2.17.1

Richard Henderson <richard.henderson@linaro.org> writes:

> We have some potential race conditions vs our user-exec signal
> handler that will be solved with this barrier.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>

> ---
>  include/qemu/atomic.h | 11 +++++++++++
>  1 file changed, 11 insertions(+)
>
> diff --git a/include/qemu/atomic.h b/include/qemu/atomic.h
> index a6ac188188..f9cd24c899 100644
> --- a/include/qemu/atomic.h
> +++ b/include/qemu/atomic.h
> @@ -88,6 +88,13 @@
>  #define smp_read_barrier_depends()   barrier()
>  #endif
>
> +/*
> + * A signal barrier forces all pending local memory ops to be observed before
> + * a SIGSEGV is delivered to the *same* thread.  In practice this is exactly
> + * the same as barrier(), but since we have the correct builtin, use it.
> + */
> +#define signal_barrier()    __atomic_signal_fence(__ATOMIC_SEQ_CST)
> +
>  /* Sanity check that the size of an atomic operation isn't "overly large".
>   * Despite the fact that e.g. i686 has 64-bit atomic operations, we do not
>   * want to use them because we ought not need them, and this lets us do a
> @@ -308,6 +315,10 @@
>  #define smp_read_barrier_depends()   barrier()
>  #endif
>
> +#ifndef signal_barrier
> +#define signal_barrier()    barrier()
> +#endif
> +
>  /* These will only be atomic if the processor does the fetch or store
>   * in a single issue memory operation
>   */


--
Alex Bennée