[Qemu-devel] [PULL 0/9] target-arm queue
[PULL v2 00/11] target-arm queue
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A last collection of patches to squeeze in before rc0.
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Massively slimmed down v2: MemTag broke bsd-user, and the npcm7xx
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The patches from me are all bugfixes. Philippe's are just
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ethernet device failed 'make check' on big-endian hosts.
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code-movement, but I wanted to get these into 4.1 because
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that kind of patch is so painful to have to rebase.
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(The diffstat is huge but it's just code moving from file to file.)
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3
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v2: fix up for clash with the qapi refactor which only
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showed up in a build-from-clean.
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thanks
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-- PMM
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-- PMM
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The following changes since commit 83339e21d05c824ebc9131d644f25c23d0e41ecf:
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The following changes since commit c3e1d838cfa5aac1a6210c8ddf182d0ef7d95dd8:
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Merge remote-tracking branch 'remotes/stefanha-gitlab/tags/block-pull-request' into staging (2021-02-10 15:42:20 +0000)
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Merge remote-tracking branch 'remotes/kraxel/tags/ui-20190704-pull-request' into staging (2019-07-04 16:43:13 +0100)
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are available in the Git repository at:
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are available in the Git repository at:
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https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20190704-1
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https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20210211-1
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for you to fetch changes up to 89a11ff756410aecb87d2c774df6e45dbf4105c1:
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for you to fetch changes up to d3c1183ffeb71ca3a783eae3d7e1c51e71e8a621:
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target/arm: Correct VMOV_imm_dp handling of short vectors (2019-07-04 17:25:30 +0100)
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target/arm: Correctly initialize MDCR_EL2.HPMN (2021-02-11 19:48:09 +0000)
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----------------------------------------------------------------
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----------------------------------------------------------------
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target-arm queue:
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target-arm queue:
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* more code-movement to separate TCG-only functions into their own files
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* Correctly initialize MDCR_EL2.HPMN
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* Correct VMOV_imm_dp handling of short vectors
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* versal: Use nr_apu_cpus in favor of hard coding 2
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* Execute Thumb instructions when their condbits are 0xf
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* accel/tcg: Add URL of clang bug to comment about our workaround
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* armv7m_systick: Forbid non-privileged accesses
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* Add support for FEAT_DIT, Data Independent Timing
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* Use _ra versions of cpu_stl_data() in v7M helpers
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* Remove GPIO from unimplemented NPCM7XX
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* v8M: Check state of exception being returned from
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* Fix SCR RES1 handling
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* v8M: Forcibly clear negative-priority exceptions on deactivate
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* Don't migrate CPUARMState.features
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----------------------------------------------------------------
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----------------------------------------------------------------
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Peter Maydell (6):
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Aaron Lindsay (1):
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arm v8M: Forcibly clear negative-priority exceptions on deactivate
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target/arm: Don't migrate CPUARMState.features
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target/arm: v8M: Check state of exception being returned from
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target/arm: Use _ra versions of cpu_stl_data() in v7M helpers
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hw/timer/armv7m_systick: Forbid non-privileged accesses
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target/arm: Execute Thumb instructions when their condbits are 0xf
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target/arm: Correct VMOV_imm_dp handling of short vectors
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Philippe Mathieu-Daudé (3):
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Daniel Müller (1):
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target/arm: Move debug routines to debug_helper.c
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target/arm: Correctly initialize MDCR_EL2.HPMN
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target/arm: Restrict semi-hosting to TCG
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target/arm/helper: Move M profile routines to m_helper.c
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target/arm/Makefile.objs | 5 +-
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Edgar E. Iglesias (1):
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target/arm/cpu.h | 7 +
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hw/arm: versal: Use nr_apu_cpus in favor of hard coding 2
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hw/intc/armv7m_nvic.c | 54 +-
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hw/timer/armv7m_systick.c | 26 +-
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target/arm/cpu.c | 9 +-
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target/arm/debug_helper.c | 311 +++++
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target/arm/helper.c | 2646 +--------------------------------------
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target/arm/m_helper.c | 2679 ++++++++++++++++++++++++++++++++++++++++
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target/arm/op_helper.c | 295 -----
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target/arm/translate-vfp.inc.c | 2 +-
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target/arm/translate.c | 15 +-
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11 files changed, 3096 insertions(+), 2953 deletions(-)
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create mode 100644 target/arm/debug_helper.c
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create mode 100644 target/arm/m_helper.c
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Hao Wu (1):
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hw/arm: Remove GPIO from unimplemented NPCM7XX
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Mike Nawrocki (1):
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target/arm: Fix SCR RES1 handling
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Peter Maydell (2):
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arm: Update infocenter.arm.com URLs
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accel/tcg: Add URL of clang bug to comment about our workaround
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Rebecca Cran (4):
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target/arm: Add support for FEAT_DIT, Data Independent Timing
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target/arm: Support AA32 DIT by moving PSTATE_SS from cpsr into env->pstate
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target/arm: Set ID_AA64PFR0.DIT and ID_PFR0.DIT to 1 for "max" AA64 CPU
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target/arm: Set ID_PFR0.DIT to 1 for "max" 32-bit CPU
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include/hw/dma/pl080.h | 7 ++--
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include/hw/misc/arm_integrator_debug.h | 2 +-
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include/hw/ssi/pl022.h | 5 ++-
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target/arm/cpu.h | 17 ++++++++
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target/arm/internals.h | 6 +++
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accel/tcg/cpu-exec.c | 25 +++++++++---
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hw/arm/aspeed_ast2600.c | 2 +-
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hw/arm/musca.c | 4 +-
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hw/arm/npcm7xx.c | 8 ----
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hw/arm/xlnx-versal.c | 4 +-
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hw/misc/arm_integrator_debug.c | 2 +-
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hw/timer/arm_timer.c | 7 ++--
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target/arm/cpu.c | 4 ++
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target/arm/cpu64.c | 5 +++
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target/arm/helper-a64.c | 27 +++++++++++--
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target/arm/helper.c | 71 +++++++++++++++++++++++++++-------
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target/arm/machine.c | 2 +-
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target/arm/op_helper.c | 9 +----
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target/arm/translate-a64.c | 12 ++++++
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19 files changed, 164 insertions(+), 55 deletions(-)
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diff view generated by jsdifflib

Patchew 2.1-devel-b67e4c2

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