1 | A last collection of patches to squeeze in before rc0. | 1 | v2: drop pvpanic-pci patches. |
---|---|---|---|
2 | The patches from me are all bugfixes. Philippe's are just | ||
3 | code-movement, but I wanted to get these into 4.1 because | ||
4 | that kind of patch is so painful to have to rebase. | ||
5 | (The diffstat is huge but it's just code moving from file to file.) | ||
6 | 2 | ||
7 | v2: fix up for clash with the qapi refactor which only | 3 | The following changes since commit f1fcb6851aba6dd9838886dc179717a11e344a1c: |
8 | showed up in a build-from-clean. | ||
9 | 4 | ||
10 | thanks | 5 | Merge remote-tracking branch 'remotes/huth-gitlab/tags/pull-request-2021-01-19' into staging (2021-01-19 11:57:07 +0000) |
11 | -- PMM | ||
12 | |||
13 | |||
14 | The following changes since commit c3e1d838cfa5aac1a6210c8ddf182d0ef7d95dd8: | ||
15 | |||
16 | Merge remote-tracking branch 'remotes/kraxel/tags/ui-20190704-pull-request' into staging (2019-07-04 16:43:13 +0100) | ||
17 | 6 | ||
18 | are available in the Git repository at: | 7 | are available in the Git repository at: |
19 | 8 | ||
20 | https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20190704-1 | 9 | https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20210119-1 |
21 | 10 | ||
22 | for you to fetch changes up to 89a11ff756410aecb87d2c774df6e45dbf4105c1: | 11 | for you to fetch changes up to b93f4fbdc48283a39089469c44a5529d79dc40a8: |
23 | 12 | ||
24 | target/arm: Correct VMOV_imm_dp handling of short vectors (2019-07-04 17:25:30 +0100) | 13 | docs: Build and install all the docs in a single manual (2021-01-19 15:45:14 +0000) |
25 | 14 | ||
26 | ---------------------------------------------------------------- | 15 | ---------------------------------------------------------------- |
27 | target-arm queue: | 16 | target-arm queue: |
28 | * more code-movement to separate TCG-only functions into their own files | 17 | * Implement IMPDEF pauth algorithm |
29 | * Correct VMOV_imm_dp handling of short vectors | 18 | * Support ARMv8.4-SEL2 |
30 | * Execute Thumb instructions when their condbits are 0xf | 19 | * Fix bug where we were truncating predicate vector lengths in SVE insns |
31 | * armv7m_systick: Forbid non-privileged accesses | 20 | * npcm7xx_adc-test: Fix memleak in adc_qom_set |
32 | * Use _ra versions of cpu_stl_data() in v7M helpers | 21 | * target/arm/m_helper: Silence GCC 10 maybe-uninitialized error |
33 | * v8M: Check state of exception being returned from | 22 | * docs: Build and install all the docs in a single manual |
34 | * v8M: Forcibly clear negative-priority exceptions on deactivate | ||
35 | 23 | ||
36 | ---------------------------------------------------------------- | 24 | ---------------------------------------------------------------- |
37 | Peter Maydell (6): | 25 | Gan Qixin (1): |
38 | arm v8M: Forcibly clear negative-priority exceptions on deactivate | 26 | npcm7xx_adc-test: Fix memleak in adc_qom_set |
39 | target/arm: v8M: Check state of exception being returned from | ||
40 | target/arm: Use _ra versions of cpu_stl_data() in v7M helpers | ||
41 | hw/timer/armv7m_systick: Forbid non-privileged accesses | ||
42 | target/arm: Execute Thumb instructions when their condbits are 0xf | ||
43 | target/arm: Correct VMOV_imm_dp handling of short vectors | ||
44 | 27 | ||
45 | Philippe Mathieu-Daudé (3): | 28 | Peter Maydell (1): |
46 | target/arm: Move debug routines to debug_helper.c | 29 | docs: Build and install all the docs in a single manual |
47 | target/arm: Restrict semi-hosting to TCG | ||
48 | target/arm/helper: Move M profile routines to m_helper.c | ||
49 | 30 | ||
50 | target/arm/Makefile.objs | 5 +- | 31 | Philippe Mathieu-Daudé (1): |
51 | target/arm/cpu.h | 7 + | 32 | target/arm/m_helper: Silence GCC 10 maybe-uninitialized error |
52 | hw/intc/armv7m_nvic.c | 54 +- | ||
53 | hw/timer/armv7m_systick.c | 26 +- | ||
54 | target/arm/cpu.c | 9 +- | ||
55 | target/arm/debug_helper.c | 311 +++++ | ||
56 | target/arm/helper.c | 2646 +-------------------------------------- | ||
57 | target/arm/m_helper.c | 2679 ++++++++++++++++++++++++++++++++++++++++ | ||
58 | target/arm/op_helper.c | 295 ----- | ||
59 | target/arm/translate-vfp.inc.c | 2 +- | ||
60 | target/arm/translate.c | 15 +- | ||
61 | 11 files changed, 3096 insertions(+), 2953 deletions(-) | ||
62 | create mode 100644 target/arm/debug_helper.c | ||
63 | create mode 100644 target/arm/m_helper.c | ||
64 | 33 | ||
34 | Richard Henderson (7): | ||
35 | target/arm: Implement an IMPDEF pauth algorithm | ||
36 | target/arm: Add cpu properties to control pauth | ||
37 | target/arm: Use object_property_add_bool for "sve" property | ||
38 | target/arm: Introduce PREDDESC field definitions | ||
39 | target/arm: Update PFIRST, PNEXT for pred_desc | ||
40 | target/arm: Update ZIP, UZP, TRN for pred_desc | ||
41 | target/arm: Update REV, PUNPK for pred_desc | ||
42 | |||
43 | Rémi Denis-Courmont (19): | ||
44 | target/arm: remove redundant tests | ||
45 | target/arm: add arm_is_el2_enabled() helper | ||
46 | target/arm: use arm_is_el2_enabled() where applicable | ||
47 | target/arm: use arm_hcr_el2_eff() where applicable | ||
48 | target/arm: factor MDCR_EL2 common handling | ||
49 | target/arm: Define isar_feature function to test for presence of SEL2 | ||
50 | target/arm: add 64-bit S-EL2 to EL exception table | ||
51 | target/arm: add MMU stage 1 for Secure EL2 | ||
52 | target/arm: add ARMv8.4-SEL2 system registers | ||
53 | target/arm: handle VMID change in secure state | ||
54 | target/arm: do S1_ptw_translate() before address space lookup | ||
55 | target/arm: translate NS bit in page-walks | ||
56 | target/arm: generalize 2-stage page-walk condition | ||
57 | target/arm: secure stage 2 translation regime | ||
58 | target/arm: set HPFAR_EL2.NS on secure stage 2 faults | ||
59 | target/arm: revector to run-time pick target EL | ||
60 | target/arm: Implement SCR_EL2.EEL2 | ||
61 | target/arm: enable Secure EL2 in max CPU | ||
62 | target/arm: refactor vae1_tlbmask() | ||
63 | |||
64 | docs/conf.py | 46 ++++- | ||
65 | docs/devel/conf.py | 15 -- | ||
66 | docs/index.html.in | 17 -- | ||
67 | docs/interop/conf.py | 28 --- | ||
68 | docs/meson.build | 64 +++--- | ||
69 | docs/specs/conf.py | 16 -- | ||
70 | docs/system/arm/cpu-features.rst | 21 ++ | ||
71 | docs/system/conf.py | 28 --- | ||
72 | docs/tools/conf.py | 37 ---- | ||
73 | docs/user/conf.py | 15 -- | ||
74 | include/qemu/xxhash.h | 98 +++++++++ | ||
75 | target/arm/cpu-param.h | 2 +- | ||
76 | target/arm/cpu.h | 107 ++++++++-- | ||
77 | target/arm/internals.h | 45 +++++ | ||
78 | target/arm/cpu.c | 23 ++- | ||
79 | target/arm/cpu64.c | 65 ++++-- | ||
80 | target/arm/helper-a64.c | 8 +- | ||
81 | target/arm/helper.c | 414 ++++++++++++++++++++++++++------------- | ||
82 | target/arm/m_helper.c | 2 +- | ||
83 | target/arm/monitor.c | 1 + | ||
84 | target/arm/op_helper.c | 4 +- | ||
85 | target/arm/pauth_helper.c | 27 ++- | ||
86 | target/arm/sve_helper.c | 33 ++-- | ||
87 | target/arm/tlb_helper.c | 3 + | ||
88 | target/arm/translate-a64.c | 4 + | ||
89 | target/arm/translate-sve.c | 31 ++- | ||
90 | target/arm/translate.c | 36 +++- | ||
91 | tests/qtest/arm-cpu-features.c | 13 ++ | ||
92 | tests/qtest/npcm7xx_adc-test.c | 1 + | ||
93 | .gitlab-ci.yml | 4 +- | ||
94 | 30 files changed, 770 insertions(+), 438 deletions(-) | ||
95 | delete mode 100644 docs/devel/conf.py | ||
96 | delete mode 100644 docs/index.html.in | ||
97 | delete mode 100644 docs/interop/conf.py | ||
98 | delete mode 100644 docs/specs/conf.py | ||
99 | delete mode 100644 docs/system/conf.py | ||
100 | delete mode 100644 docs/tools/conf.py | ||
101 | delete mode 100644 docs/user/conf.py | ||
102 | diff view generated by jsdifflib |