[Qemu-devel] [PATCH 00/10] hw/pci-host: Clean the GT64120 north bridge

Philippe Mathieu-Daudé posted 10 patches 4 years, 10 months ago
Test checkpatch passed
Test s390x passed
Test asan passed
Test docker-mingw@fedora passed
Test FreeBSD passed
Test docker-clang@ubuntu failed
Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20190624222844.26584-1-f4bug@amsat.org
Maintainers: Aleksandar Markovic <amarkovic@wavecomp.com>, Aurelien Jarno <aurelien@aurel32.net>, Aleksandar Rikalo <arikalo@wavecomp.com>
Makefile.objs                                 |   1 +
include/hw/mips/mips.h                        |   2 +-
hw/mips/mips_malta.c                          |   8 +-
hw/{mips/gt64xxx_pci.c => pci-host/gt64120.c} | 542 ++++++++++--------
MAINTAINERS                                   |   2 +-
hw/mips/Makefile.objs                         |   2 +-
hw/mips/trace-events                          |   0
hw/pci-host/Makefile.objs                     |   2 +-
hw/pci-host/trace-events                      |   5 +
9 files changed, 307 insertions(+), 257 deletions(-)
rename hw/{mips/gt64xxx_pci.c => pci-host/gt64120.c} (68%)
create mode 100644 hw/mips/trace-events
[Qemu-devel] [PATCH 00/10] hw/pci-host: Clean the GT64120 north bridge
Posted by Philippe Mathieu-Daudé 4 years, 10 months ago
Hi,

This series clean the gt64120 device.
It is no more target-dependent, and tracing is improved.

Regards,

Phil.

Based-on: 20190624220056.25861-1-f4bug@amsat.org
https://lists.gnu.org/archive/html/qemu-devel/2019-06/msg05304.html

Philippe Mathieu-Daudé (10):
  hw/mips/gt64xxx_pci: Fix multiline comment syntax
  hw/mips/gt64xxx_pci: Fix 'tabs' coding style issues
  hw/mips/gt64xxx_pci: Fix 'braces' coding style issues
  hw/mips/gt64xxx_pci: Fix 'spaces' coding style issues
  hw/mips/gt64xxx_pci: Use qemu_log_mask() instead of debug printf()
  hw/mips/gt64xxx_pci: Convert debug printf()s to trace events
  hw/mips/gt64xxx_pci: Align the pci0-mem size
  hw/mips/gt64xxx_pci: Add a 'cpu_big_endian' qdev property
  hw/mips/gt64xxx_pci: Move it to hw/pci-host/
  hw/pci-host/gt64120: Clean the decoded address space

 Makefile.objs                                 |   1 +
 include/hw/mips/mips.h                        |   2 +-
 hw/mips/mips_malta.c                          |   8 +-
 hw/{mips/gt64xxx_pci.c => pci-host/gt64120.c} | 542 ++++++++++--------
 MAINTAINERS                                   |   2 +-
 hw/mips/Makefile.objs                         |   2 +-
 hw/mips/trace-events                          |   0
 hw/pci-host/Makefile.objs                     |   2 +-
 hw/pci-host/trace-events                      |   5 +
 9 files changed, 307 insertions(+), 257 deletions(-)
 rename hw/{mips/gt64xxx_pci.c => pci-host/gt64120.c} (68%)
 create mode 100644 hw/mips/trace-events

-- 
2.19.1


Re: [Qemu-devel] [PATCH 00/10] hw/pci-host: Clean the GT64120 north bridge
Posted by Aleksandar Markovic 4 years, 9 months ago
On Jun 25, 2019 12:31 AM, "Philippe Mathieu-Daudé" <f4bug@amsat.org> wrote:
>
> Hi,
>
> This series clean the gt64120 device.
> It is no more target-dependent, and tracing is improved.
>

If nobody objects, I am going to select majority of the patches for mips
queue scheduled tomorrow. Those that remain will be those that Philippe
still didn't make his mind.

Thanks thousand times, Philippe!

Aleksandar

> Regards,
>
> Phil.
>
> Based-on: 20190624220056.25861-1-f4bug@amsat.org
> https://lists.gnu.org/archive/html/qemu-devel/2019-06/msg05304.html
>
> Philippe Mathieu-Daudé (10):
>   hw/mips/gt64xxx_pci: Fix multiline comment syntax
>   hw/mips/gt64xxx_pci: Fix 'tabs' coding style issues
>   hw/mips/gt64xxx_pci: Fix 'braces' coding style issues
>   hw/mips/gt64xxx_pci: Fix 'spaces' coding style issues
>   hw/mips/gt64xxx_pci: Use qemu_log_mask() instead of debug printf()
>   hw/mips/gt64xxx_pci: Convert debug printf()s to trace events
>   hw/mips/gt64xxx_pci: Align the pci0-mem size
>   hw/mips/gt64xxx_pci: Add a 'cpu_big_endian' qdev property
>   hw/mips/gt64xxx_pci: Move it to hw/pci-host/
>   hw/pci-host/gt64120: Clean the decoded address space
>
>  Makefile.objs                                 |   1 +
>  include/hw/mips/mips.h                        |   2 +-
>  hw/mips/mips_malta.c                          |   8 +-
>  hw/{mips/gt64xxx_pci.c => pci-host/gt64120.c} | 542 ++++++++++--------
>  MAINTAINERS                                   |   2 +-
>  hw/mips/Makefile.objs                         |   2 +-
>  hw/mips/trace-events                          |   0
>  hw/pci-host/Makefile.objs                     |   2 +-
>  hw/pci-host/trace-events                      |   5 +
>  9 files changed, 307 insertions(+), 257 deletions(-)
>  rename hw/{mips/gt64xxx_pci.c => pci-host/gt64120.c} (68%)
>  create mode 100644 hw/mips/trace-events
>
> --
> 2.19.1
>
>
Re: [Qemu-devel] [PATCH 00/10] hw/pci-host: Clean the GT64120 north bridge
Posted by Philippe Mathieu-Daudé 4 years, 9 months ago
Hi Aleksandar,

On 7/1/19 7:16 PM, Aleksandar Markovic wrote:
> 
> On Jun 25, 2019 12:31 AM, "Philippe Mathieu-Daudé" <f4bug@amsat.org
> <mailto:f4bug@amsat.org>> wrote:
>>
>> Hi,
>>
>> This series clean the gt64120 device.
>> It is no more target-dependent, and tracing is improved.
>>
> 
> If nobody objects, I am going to select majority of the patches for mips
> queue scheduled tomorrow. Those that remain will be those that Philippe
> still didn't make his mind.

Which ones remain?

For "pci-host/gt64120: Clean the decoded address space", I'd like a
review from someone comfortable with MEMTXATTRS and address spaces.
I'll ping on the patch.

> Thanks thousand times, Philippe!
> 
> Aleksandar
> 
>> Regards,
>>
>> Phil.
>>
>> Based-on: 20190624220056.25861-1-f4bug@amsat.org
> <mailto:20190624220056.25861-1-f4bug@amsat.org>
>> https://lists.gnu.org/archive/html/qemu-devel/2019-06/msg05304.html
>>
>> Philippe Mathieu-Daudé (10):
>>   hw/mips/gt64xxx_pci: Fix multiline comment syntax
>>   hw/mips/gt64xxx_pci: Fix 'tabs' coding style issues
>>   hw/mips/gt64xxx_pci: Fix 'braces' coding style issues
>>   hw/mips/gt64xxx_pci: Fix 'spaces' coding style issues
>>   hw/mips/gt64xxx_pci: Use qemu_log_mask() instead of debug printf()
>>   hw/mips/gt64xxx_pci: Convert debug printf()s to trace events
>>   hw/mips/gt64xxx_pci: Align the pci0-mem size
>>   hw/mips/gt64xxx_pci: Add a 'cpu_big_endian' qdev property
>>   hw/mips/gt64xxx_pci: Move it to hw/pci-host/
>>   hw/pci-host/gt64120: Clean the decoded address space
>>
>>  Makefile.objs                                 |   1 +
>>  include/hw/mips/mips.h                        |   2 +-
>>  hw/mips/mips_malta.c                          |   8 +-
>>  hw/{mips/gt64xxx_pci.c => pci-host/gt64120.c} | 542 ++++++++++--------
>>  MAINTAINERS                                   |   2 +-
>>  hw/mips/Makefile.objs                         |   2 +-
>>  hw/mips/trace-events                          |   0
>>  hw/pci-host/Makefile.objs                     |   2 +-
>>  hw/pci-host/trace-events                      |   5 +
>>  9 files changed, 307 insertions(+), 257 deletions(-)
>>  rename hw/{mips/gt64xxx_pci.c => pci-host/gt64120.c} (68%)
>>  create mode 100644 hw/mips/trace-events
>>
>> --
>> 2.19.1
>>
>>
> 

Re: [Qemu-devel] [PATCH 00/10] hw/pci-host: Clean the GT64120 north bridge
Posted by Aleksandar Markovic 4 years, 9 months ago
On Jul 1, 2019 7:46 PM, "Philippe Mathieu-Daudé" <f4bug@amsat.org> wrote:
>
> Hi Aleksandar,
>
> On 7/1/19 7:16 PM, Aleksandar Markovic wrote:
> >
> > On Jun 25, 2019 12:31 AM, "Philippe Mathieu-Daudé" <f4bug@amsat.org
> > <mailto:f4bug@amsat.org>> wrote:
> >>
> >> Hi,
> >>
> >> This series clean the gt64120 device.
> >> It is no more target-dependent, and tracing is improved.
> >>
> >
> > If nobody objects, I am going to select majority of the patches for mips
> > queue scheduled tomorrow. Those that remain will be those that Philippe
> > still didn't make his mind.
>
> Which ones remain?
>
> For "pci-host/gt64120: Clean the decoded address space", I'd like a
> review from someone comfortable with MEMTXATTRS and address spaces.
> I'll ping on the patch.
>

Don't worry, the addres space one was left for later.

Sorry for confusion, but these patches are already in main tree (this is
from today):

Philippe Mathieu-Daudé (7):

hw/mips/gt64xxx_pci: Fix multiline comment syntax

hw/mips/gt64xxx_pci: Fix 'tabs' coding style issues

hw/mips/gt64xxx_pci: Fix 'braces' coding style issues

hw/mips/gt64xxx_pci: Fix 'spaces' coding style issues

hw/mips/gt64xxx_pci: Use qemu_log_mask() instead of debug printf()

hw/mips/gt64xxx_pci: Convert debug printf()s to trace events

hw/mips/gt64xxx_pci: Align the pci0-mem size

Let me know if you want more for tomorrow, otherwise I won't do anything.

Amicalement,
Aleksandar

> > Thanks thousand times, Philippe!
> >
> > Aleksandar
> >
> >> Regards,
> >>
> >> Phil.
> >>
> >> Based-on: 20190624220056.25861-1-f4bug@amsat.org
> > <mailto:20190624220056.25861-1-f4bug@amsat.org>
> >> https://lists.gnu.org/archive/html/qemu-devel/2019-06/msg05304.html
> >>
> >> Philippe Mathieu-Daudé (10):
> >>   hw/mips/gt64xxx_pci: Fix multiline comment syntax
> >>   hw/mips/gt64xxx_pci: Fix 'tabs' coding style issues
> >>   hw/mips/gt64xxx_pci: Fix 'braces' coding style issues
> >>   hw/mips/gt64xxx_pci: Fix 'spaces' coding style issues
> >>   hw/mips/gt64xxx_pci: Use qemu_log_mask() instead of debug printf()
> >>   hw/mips/gt64xxx_pci: Convert debug printf()s to trace events
> >>   hw/mips/gt64xxx_pci: Align the pci0-mem size
> >>   hw/mips/gt64xxx_pci: Add a 'cpu_big_endian' qdev property
> >>   hw/mips/gt64xxx_pci: Move it to hw/pci-host/
> >>   hw/pci-host/gt64120: Clean the decoded address space
> >>
> >>  Makefile.objs                                 |   1 +
> >>  include/hw/mips/mips.h                        |   2 +-
> >>  hw/mips/mips_malta.c                          |   8 +-
> >>  hw/{mips/gt64xxx_pci.c => pci-host/gt64120.c} | 542 ++++++++++--------
> >>  MAINTAINERS                                   |   2 +-
> >>  hw/mips/Makefile.objs                         |   2 +-
> >>  hw/mips/trace-events                          |   0
> >>  hw/pci-host/Makefile.objs                     |   2 +-
> >>  hw/pci-host/trace-events                      |   5 +
> >>  9 files changed, 307 insertions(+), 257 deletions(-)
> >>  rename hw/{mips/gt64xxx_pci.c => pci-host/gt64120.c} (68%)
> >>  create mode 100644 hw/mips/trace-events
> >>
> >> --
> >> 2.19.1
> >>
> >>
> >
Re: [Qemu-devel] [PATCH 00/10] hw/pci-host: Clean the GT64120 north bridge
Posted by Philippe Mathieu-Daudé 4 years, 9 months ago
On 7/1/19 8:39 PM, Aleksandar Markovic wrote:
> On Jul 1, 2019 7:46 PM, "Philippe Mathieu-Daudé" <f4bug@amsat.org> wrote:
>>
>> Hi Aleksandar,
>>
>> On 7/1/19 7:16 PM, Aleksandar Markovic wrote:
>>>
>>> On Jun 25, 2019 12:31 AM, "Philippe Mathieu-Daudé" <f4bug@amsat.org
>>> <mailto:f4bug@amsat.org>> wrote:
>>>>
>>>> Hi,
>>>>
>>>> This series clean the gt64120 device.
>>>> It is no more target-dependent, and tracing is improved.
>>>>
>>>
>>> If nobody objects, I am going to select majority of the patches for mips
>>> queue scheduled tomorrow. Those that remain will be those that Philippe
>>> still didn't make his mind.
>>
>> Which ones remain?
>>
>> For "pci-host/gt64120: Clean the decoded address space", I'd like a
>> review from someone comfortable with MEMTXATTRS and address spaces.
>> I'll ping on the patch.
>>
> 
> Don't worry, the addres space one was left for later.
> 
> Sorry for confusion, but these patches are already in main tree (this is
> from today):
> 
> Philippe Mathieu-Daudé (7):
> 
> hw/mips/gt64xxx_pci: Fix multiline comment syntax
> 
> hw/mips/gt64xxx_pci: Fix 'tabs' coding style issues
> 
> hw/mips/gt64xxx_pci: Fix 'braces' coding style issues
> 
> hw/mips/gt64xxx_pci: Fix 'spaces' coding style issues
> 
> hw/mips/gt64xxx_pci: Use qemu_log_mask() instead of debug printf()
> 
> hw/mips/gt64xxx_pci: Convert debug printf()s to trace events
> 
> hw/mips/gt64xxx_pci: Align the pci0-mem size
> 
> Let me know if you want more for tomorrow, otherwise I won't do anything.

Excellent, thank you!

patch #8 "hw/mips/gt64xxx_pci: Add a 'cpu_big_endian' qdev property"
needs R-b (Thomas/Paolo eventually).

patch #9 depends of #8

I pinged Linux kernel people for patch #10.

Regards,

Phil.

> Amicalement,
> Aleksandar