[Qemu-devel] [PATCH v3 00/15] target/ppc: remove getVSR()/putVSR() and further tidy-up

Mark Cave-Ayland posted 15 patches 4 years, 10 months ago
Test s390x passed
Test checkpatch failed
Test asan passed
Test docker-mingw@fedora passed
Test docker-clang@ubuntu passed
Test FreeBSD passed
Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20190616123751.781-1-mark.cave-ayland@ilande.co.uk
Maintainers: David Gibson <david@gibson.dropbear.id.au>
target/ppc/fpu_helper.c             | 841 ++++++++++++++++--------------------
target/ppc/helper.h                 | 320 +++++++-------
target/ppc/int_helper.c             |  26 +-
target/ppc/internal.h               |  12 -
target/ppc/mem_helper.c             |  25 +-
target/ppc/translate/vsx-impl.inc.c | 567 ++++++++++++++++--------
target/ppc/translate/vsx-ops.inc.c  |  70 +--
7 files changed, 952 insertions(+), 909 deletions(-)
[Qemu-devel] [PATCH v3 00/15] target/ppc: remove getVSR()/putVSR() and further tidy-up
Posted by Mark Cave-Ayland 4 years, 10 months ago
With the conversion of PPC VSX registers to host endian during the 4.0 development
cycle, the VSX helpers getVSR() and putVSR() which were used to convert between big
endian and host endian (and are currently just a no-op) can now be removed. This
eliminates an extra copy for each VSX source register at runtime.

Patches 1-3 do the elimination work on a per-file basis and switch VSX register
accesses to be via pointers rather than on copies managed using getVSR()/putVSR().

After this patches 4-14 change the VSX registers to be passed to helpers via pointers
rather than register number so that the decode of the vector register pointers occurs
at translation time instead of at runtime. This matches how VMX instructions are
currently decoded.

Finally patch 15 performs some related tidy-up around VSX_FMADD which decodes the
a or m form at translation time, allowing a single helper function to be used for
both implementations.

Greg: I've added you as CC since you managed to find a bug in my last series. This
one is much more mechanical, but if you are able to confirm this doesn't introduce
any regressions in your test images then that would be great.

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>

v3:
- Rebase onto master
- Add latest R-B tags from Richard
- Fix zero init in helper_xvxsigsp() in patch 1
- Preserve order of do_float_check_status() in helper_xsrqpi() in patch 1
- Remove accidental write after store in VSX_STXVL() macro, and also just use
  the xt pointer directly in patch 2

v2:
- Rebase onto master
- Use working copy of VSX destination registers in patches 1-3 to keep current
  semantics where src == dest and exception handling
- Add patches 4 and 6 to split out helper functions still requiring an opcode
  parameter
- Remove opcode parameter from GEN_VSX_HELPER_X3 and GEN_VSX_HELPER_X2 as it
  isn't required for the common case
- Drop VSX_TEST_DC improvement patch since it is no longer applicable with the
  removal of opcode from the above macros
- Rework VSX_MADD improvement patch to use a single helper for both a and m
  forms as suggested by Richard


Mark Cave-Ayland (15):
  target/ppc: remove getVSR()/putVSR() from fpu_helper.c
  target/ppc: remove getVSR()/putVSR() from mem_helper.c
  target/ppc: remove getVSR()/putVSR() from int_helper.c
  target/ppc: introduce separate VSX_CMP macro for xvcmp* instructions
  target/ppc: introduce GEN_VSX_HELPER_X3 macro to fpu_helper.c
  target/ppc: introduce separate generator and helper for xscvqpdp
  target/ppc: introduce GEN_VSX_HELPER_X2 macro to fpu_helper.c
  target/ppc: introduce GEN_VSX_HELPER_X2_AB macro to fpu_helper.c
  target/ppc: introduce GEN_VSX_HELPER_X1 macro to fpu_helper.c
  target/ppc: introduce GEN_VSX_HELPER_R3 macro to fpu_helper.c
  target/ppc: introduce GEN_VSX_HELPER_R2 macro to fpu_helper.c
  target/ppc: introduce GEN_VSX_HELPER_R2_AB macro to fpu_helper.c
  target/ppc: decode target register in VSX_VECTOR_LOAD_STORE_LENGTH at
    translation time
  target/ppc: decode target register in VSX_EXTRACT_INSERT at
    translation time
  target/ppc: improve VSX_FMADD with new GEN_VSX_HELPER_VSX_MADD macro

 target/ppc/fpu_helper.c             | 841 ++++++++++++++++--------------------
 target/ppc/helper.h                 | 320 +++++++-------
 target/ppc/int_helper.c             |  26 +-
 target/ppc/internal.h               |  12 -
 target/ppc/mem_helper.c             |  25 +-
 target/ppc/translate/vsx-impl.inc.c | 567 ++++++++++++++++--------
 target/ppc/translate/vsx-ops.inc.c  |  70 +--
 7 files changed, 952 insertions(+), 909 deletions(-)

-- 
2.11.0


Re: [Qemu-devel] [PATCH v3 00/15] target/ppc: remove getVSR()/putVSR() and further tidy-up
Posted by David Gibson 4 years, 9 months ago
On Sun, Jun 16, 2019 at 01:37:36PM +0100, Mark Cave-Ayland wrote:
> With the conversion of PPC VSX registers to host endian during the 4.0 development
> cycle, the VSX helpers getVSR() and putVSR() which were used to convert between big
> endian and host endian (and are currently just a no-op) can now be removed. This
> eliminates an extra copy for each VSX source register at runtime.
> 
> Patches 1-3 do the elimination work on a per-file basis and switch VSX register
> accesses to be via pointers rather than on copies managed using getVSR()/putVSR().
> 
> After this patches 4-14 change the VSX registers to be passed to helpers via pointers
> rather than register number so that the decode of the vector register pointers occurs
> at translation time instead of at runtime. This matches how VMX instructions are
> currently decoded.
> 
> Finally patch 15 performs some related tidy-up around VSX_FMADD which decodes the
> a or m form at translation time, allowing a single helper function to be used for
> both implementations.
> 
> Greg: I've added you as CC since you managed to find a bug in my last series. This
> one is much more mechanical, but if you are able to confirm this doesn't introduce
> any regressions in your test images then that would be great.
> 
> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
>

I've now applied the rest of this series to my ppc-for-4.1 tree.


> v3:
> - Rebase onto master
> - Add latest R-B tags from Richard
> - Fix zero init in helper_xvxsigsp() in patch 1
> - Preserve order of do_float_check_status() in helper_xsrqpi() in patch 1
> - Remove accidental write after store in VSX_STXVL() macro, and also just use
>   the xt pointer directly in patch 2
> 
> v2:
> - Rebase onto master
> - Use working copy of VSX destination registers in patches 1-3 to keep current
>   semantics where src == dest and exception handling
> - Add patches 4 and 6 to split out helper functions still requiring an opcode
>   parameter
> - Remove opcode parameter from GEN_VSX_HELPER_X3 and GEN_VSX_HELPER_X2 as it
>   isn't required for the common case
> - Drop VSX_TEST_DC improvement patch since it is no longer applicable with the
>   removal of opcode from the above macros
> - Rework VSX_MADD improvement patch to use a single helper for both a and m
>   forms as suggested by Richard
> 
> 
> Mark Cave-Ayland (15):
>   target/ppc: remove getVSR()/putVSR() from fpu_helper.c
>   target/ppc: remove getVSR()/putVSR() from mem_helper.c
>   target/ppc: remove getVSR()/putVSR() from int_helper.c
>   target/ppc: introduce separate VSX_CMP macro for xvcmp* instructions
>   target/ppc: introduce GEN_VSX_HELPER_X3 macro to fpu_helper.c
>   target/ppc: introduce separate generator and helper for xscvqpdp
>   target/ppc: introduce GEN_VSX_HELPER_X2 macro to fpu_helper.c
>   target/ppc: introduce GEN_VSX_HELPER_X2_AB macro to fpu_helper.c
>   target/ppc: introduce GEN_VSX_HELPER_X1 macro to fpu_helper.c
>   target/ppc: introduce GEN_VSX_HELPER_R3 macro to fpu_helper.c
>   target/ppc: introduce GEN_VSX_HELPER_R2 macro to fpu_helper.c
>   target/ppc: introduce GEN_VSX_HELPER_R2_AB macro to fpu_helper.c
>   target/ppc: decode target register in VSX_VECTOR_LOAD_STORE_LENGTH at
>     translation time
>   target/ppc: decode target register in VSX_EXTRACT_INSERT at
>     translation time
>   target/ppc: improve VSX_FMADD with new GEN_VSX_HELPER_VSX_MADD macro
> 
>  target/ppc/fpu_helper.c             | 841 ++++++++++++++++--------------------
>  target/ppc/helper.h                 | 320 +++++++-------
>  target/ppc/int_helper.c             |  26 +-
>  target/ppc/internal.h               |  12 -
>  target/ppc/mem_helper.c             |  25 +-
>  target/ppc/translate/vsx-impl.inc.c | 567 ++++++++++++++++--------
>  target/ppc/translate/vsx-ops.inc.c  |  70 +--
>  7 files changed, 952 insertions(+), 909 deletions(-)
> 

-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson
Re: [Qemu-devel] [PATCH v3 00/15] target/ppc: remove getVSR()/putVSR() and further tidy-up
Posted by no-reply@patchew.org 4 years, 10 months ago
Patchew URL: https://patchew.org/QEMU/20190616123751.781-1-mark.cave-ayland@ilande.co.uk/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Subject: [Qemu-devel] [PATCH v3 00/15] target/ppc: remove getVSR()/putVSR() and further tidy-up
Type: series
Message-id: 20190616123751.781-1-mark.cave-ayland@ilande.co.uk

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git rev-parse base > /dev/null || exit 0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

From https://github.com/patchew-project/qemu
 * [new tag]               patchew/20190616123751.781-1-mark.cave-ayland@ilande.co.uk -> patchew/20190616123751.781-1-mark.cave-ayland@ilande.co.uk
Switched to a new branch 'test'
cf215f0211 target/ppc: improve VSX_FMADD with new GEN_VSX_HELPER_VSX_MADD macro
6181c072c0 target/ppc: decode target register in VSX_EXTRACT_INSERT at translation time
172bdc4e29 target/ppc: decode target register in VSX_VECTOR_LOAD_STORE_LENGTH at translation time
14ca2eedff target/ppc: introduce GEN_VSX_HELPER_R2_AB macro to fpu_helper.c
e2c44f0799 target/ppc: introduce GEN_VSX_HELPER_R2 macro to fpu_helper.c
2f79ed9a9a target/ppc: introduce GEN_VSX_HELPER_R3 macro to fpu_helper.c
17abdcb489 target/ppc: introduce GEN_VSX_HELPER_X1 macro to fpu_helper.c
2090258624 target/ppc: introduce GEN_VSX_HELPER_X2_AB macro to fpu_helper.c
0195869440 target/ppc: introduce GEN_VSX_HELPER_X2 macro to fpu_helper.c
dacf650f62 target/ppc: introduce separate generator and helper for xscvqpdp
8274d1ddd3 target/ppc: introduce GEN_VSX_HELPER_X3 macro to fpu_helper.c
25605f2cb6 target/ppc: introduce separate VSX_CMP macro for xvcmp* instructions
b87783ade3 target/ppc: remove getVSR()/putVSR() from int_helper.c
27f85ba7f7 target/ppc: remove getVSR()/putVSR() from mem_helper.c
c11cf2467d target/ppc: remove getVSR()/putVSR() from fpu_helper.c

=== OUTPUT BEGIN ===
1/15 Checking commit c11cf2467d33 (target/ppc: remove getVSR()/putVSR() from fpu_helper.c)
2/15 Checking commit 27f85ba7f7ce (target/ppc: remove getVSR()/putVSR() from mem_helper.c)
3/15 Checking commit b87783ade3f7 (target/ppc: remove getVSR()/putVSR() from int_helper.c)
4/15 Checking commit 25605f2cb6af (target/ppc: introduce separate VSX_CMP macro for xvcmp* instructions)
5/15 Checking commit 8274d1ddd37f (target/ppc: introduce GEN_VSX_HELPER_X3 macro to fpu_helper.c)
6/15 Checking commit dacf650f62e2 (target/ppc: introduce separate generator and helper for xscvqpdp)
7/15 Checking commit 0195869440db (target/ppc: introduce GEN_VSX_HELPER_X2 macro to fpu_helper.c)
8/15 Checking commit 209025862401 (target/ppc: introduce GEN_VSX_HELPER_X2_AB macro to fpu_helper.c)
9/15 Checking commit 17abdcb48935 (target/ppc: introduce GEN_VSX_HELPER_X1 macro to fpu_helper.c)
10/15 Checking commit 2f79ed9a9aff (target/ppc: introduce GEN_VSX_HELPER_R3 macro to fpu_helper.c)
11/15 Checking commit e2c44f079928 (target/ppc: introduce GEN_VSX_HELPER_R2 macro to fpu_helper.c)
12/15 Checking commit 14ca2eedff9c (target/ppc: introduce GEN_VSX_HELPER_R2_AB macro to fpu_helper.c)
13/15 Checking commit 172bdc4e2952 (target/ppc: decode target register in VSX_VECTOR_LOAD_STORE_LENGTH at translation time)
14/15 Checking commit 6181c072c009 (target/ppc: decode target register in VSX_EXTRACT_INSERT at translation time)
15/15 Checking commit cf215f0211f2 (target/ppc: improve VSX_FMADD with new GEN_VSX_HELPER_VSX_MADD macro)
WARNING: Block comments use a leading /* on a separate line
#279: FILE: target/ppc/translate/vsx-impl.inc.c:1312:
+        /*                                                                    \

WARNING: Block comments use a leading /* on a separate line
#285: FILE: target/ppc/translate/vsx-impl.inc.c:1318:
+        /*                                                                    \

ERROR: Macros with complex values should be enclosed in parenthesis
#326: FILE: target/ppc/translate/vsx-ops.inc.c:66:
+#define GEN_XX3FORM_NAME(name, opcname, opc2, opc3, fl2)               \
+GEN_HANDLER2_E(name, opcname, 0x3C, opc2 | 0, opc3, 0, PPC_NONE, fl2), \
+GEN_HANDLER2_E(name, opcname, 0x3C, opc2 | 1, opc3, 0, PPC_NONE, fl2), \
+GEN_HANDLER2_E(name, opcname, 0x3C, opc2 | 2, opc3, 0, PPC_NONE, fl2), \
+GEN_HANDLER2_E(name, opcname, 0x3C, opc2 | 3, opc3, 0, PPC_NONE, fl2)

total: 1 errors, 2 warnings, 377 lines checked

Patch 15/15 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

=== OUTPUT END ===

Test command exited with code: 1


The full log is available at
http://patchew.org/logs/20190616123751.781-1-mark.cave-ayland@ilande.co.uk/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [https://patchew.org/].
Please send your feedback to patchew-devel@redhat.com
Re: [Qemu-devel] [PATCH v3 00/15] target/ppc: remove getVSR()/putVSR() and further tidy-up
Posted by David Gibson 4 years, 10 months ago
On Sun, Jun 16, 2019 at 01:37:36PM +0100, Mark Cave-Ayland wrote:
> With the conversion of PPC VSX registers to host endian during the 4.0 development
> cycle, the VSX helpers getVSR() and putVSR() which were used to convert between big
> endian and host endian (and are currently just a no-op) can now be removed. This
> eliminates an extra copy for each VSX source register at runtime.
> 
> Patches 1-3 do the elimination work on a per-file basis and switch VSX register
> accesses to be via pointers rather than on copies managed using getVSR()/putVSR().
> 
> After this patches 4-14 change the VSX registers to be passed to helpers via pointers
> rather than register number so that the decode of the vector register pointers occurs
> at translation time instead of at runtime. This matches how VMX instructions are
> currently decoded.
> 
> Finally patch 15 performs some related tidy-up around VSX_FMADD which decodes the
> a or m form at translation time, allowing a single helper function to be used for
> both implementations.
> 
> Greg: I've added you as CC since you managed to find a bug in my last series. This
> one is much more mechanical, but if you are able to confirm this doesn't introduce
> any regressions in your test images then that would be great.
> 
> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>

Patches 1 & 2 applied.

> 
> v3:
> - Rebase onto master
> - Add latest R-B tags from Richard
> - Fix zero init in helper_xvxsigsp() in patch 1
> - Preserve order of do_float_check_status() in helper_xsrqpi() in patch 1
> - Remove accidental write after store in VSX_STXVL() macro, and also just use
>   the xt pointer directly in patch 2
> 
> v2:
> - Rebase onto master
> - Use working copy of VSX destination registers in patches 1-3 to keep current
>   semantics where src == dest and exception handling
> - Add patches 4 and 6 to split out helper functions still requiring an opcode
>   parameter
> - Remove opcode parameter from GEN_VSX_HELPER_X3 and GEN_VSX_HELPER_X2 as it
>   isn't required for the common case
> - Drop VSX_TEST_DC improvement patch since it is no longer applicable with the
>   removal of opcode from the above macros
> - Rework VSX_MADD improvement patch to use a single helper for both a and m
>   forms as suggested by Richard
> 
> 
> Mark Cave-Ayland (15):
>   target/ppc: remove getVSR()/putVSR() from fpu_helper.c
>   target/ppc: remove getVSR()/putVSR() from mem_helper.c
>   target/ppc: remove getVSR()/putVSR() from int_helper.c
>   target/ppc: introduce separate VSX_CMP macro for xvcmp* instructions
>   target/ppc: introduce GEN_VSX_HELPER_X3 macro to fpu_helper.c
>   target/ppc: introduce separate generator and helper for xscvqpdp
>   target/ppc: introduce GEN_VSX_HELPER_X2 macro to fpu_helper.c
>   target/ppc: introduce GEN_VSX_HELPER_X2_AB macro to fpu_helper.c
>   target/ppc: introduce GEN_VSX_HELPER_X1 macro to fpu_helper.c
>   target/ppc: introduce GEN_VSX_HELPER_R3 macro to fpu_helper.c
>   target/ppc: introduce GEN_VSX_HELPER_R2 macro to fpu_helper.c
>   target/ppc: introduce GEN_VSX_HELPER_R2_AB macro to fpu_helper.c
>   target/ppc: decode target register in VSX_VECTOR_LOAD_STORE_LENGTH at
>     translation time
>   target/ppc: decode target register in VSX_EXTRACT_INSERT at
>     translation time
>   target/ppc: improve VSX_FMADD with new GEN_VSX_HELPER_VSX_MADD macro
> 
>  target/ppc/fpu_helper.c             | 841 ++++++++++++++++--------------------
>  target/ppc/helper.h                 | 320 +++++++-------
>  target/ppc/int_helper.c             |  26 +-
>  target/ppc/internal.h               |  12 -
>  target/ppc/mem_helper.c             |  25 +-
>  target/ppc/translate/vsx-impl.inc.c | 567 ++++++++++++++++--------
>  target/ppc/translate/vsx-ops.inc.c  |  70 +--
>  7 files changed, 952 insertions(+), 909 deletions(-)
> 

-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson