The only FP instruction we can implement without an helper.

Signed-off-by: David Hildenbrand <david@redhat.com>
---
 target/s390x/insn-data.def      |  2 ++
 target/s390x/translate_vx.inc.c | 42 +++++++++++++++++++++++++++++++++
 2 files changed, 44 insertions(+)

diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.def
index e86ade9e44..fa2e801747 100644
--- a/target/s390x/insn-data.def
+++ b/target/s390x/insn-data.def
@@ -1240,6 +1240,8 @@
     F(0xe78f, VFMA,    VRR_e, V,   0, 0, 0, 0, vfma, 0, IF_VEC)
 /* VECTOR FP MULTIPLY AND SUBTRACT */
     F(0xe78e, VFMS,    VRR_e, V,   0, 0, 0, 0, vfma, 0, IF_VEC)
+/* VECTOR FP PERFORM SIGN OPERATION */
+    F(0xe7cc, VFPSO,   VRR_a, V,   0, 0, 0, 0, vfpso, 0, IF_VEC)
 
 #ifndef CONFIG_USER_ONLY
 /* COMPARE AND SWAP AND PURGE */
diff --git a/target/s390x/translate_vx.inc.c b/target/s390x/translate_vx.inc.c
index b624c7a8aa..b80d2a7a88 100644
--- a/target/s390x/translate_vx.inc.c
+++ b/target/s390x/translate_vx.inc.c
@@ -2727,3 +2727,45 @@ static DisasJumpType op_vfma(DisasContext *s, DisasOps *o)
                    0, fn);
     return DISAS_NEXT;
 }
+
+static DisasJumpType op_vfpso(DisasContext *s, DisasOps *o)
+{
+    const uint8_t fpf = get_field(s->fields, m3);
+    const uint8_t m4 = get_field(s->fields, m4);
+    const uint8_t m5 = get_field(s->fields, m5);
+    const bool se = extract32(m4, 3, 1);
+    TCGv_i64 tmp;
+    int i;
+
+    if (fpf != FPF_LONG || extract32(m4, 0, 3) || m5 > 2) {
+        gen_program_exception(s, PGM_SPECIFICATION);
+        return DISAS_NORETURN;
+    }
+
+    tmp = tcg_temp_new_i64();
+    for (i = 0; i < 2; i++) {
+        read_vec_element_i64(tmp, get_field(s->fields, v2), i, ES_64);
+
+        switch (m5) {
+        case 0:
+            /* sign bit is inverted (complement) */
+            tcg_gen_xori_i64(tmp, tmp, 1ull << 63);
+            break;
+        case 1:
+            /* sign bit is set to one (negative) */
+            tcg_gen_ori_i64(tmp, tmp, 1ull << 63);
+            break;
+        case 2:
+            /* sign bit is set to zero (positive) */
+            tcg_gen_andi_i64(tmp, tmp, (1ull << 63) - 1);
+            break;
+        }
+
+        write_vec_element_i64(tmp, get_field(s->fields, v1), i, ES_64);
+        if (se) {
+            break;
+        }
+    }
+    tcg_temp_free_i64(tmp);
+    return DISAS_NEXT;
+}
-- 
2.20.1

On 5/31/19 5:44 AM, David Hildenbrand wrote:
> +static DisasJumpType op_vfpso(DisasContext *s, DisasOps *o)
> +{
> +    const uint8_t fpf = get_field(s->fields, m3);
> +    const uint8_t m4 = get_field(s->fields, m4);
> +    const uint8_t m5 = get_field(s->fields, m5);
> +    const bool se = extract32(m4, 3, 1);
> +    TCGv_i64 tmp;
> +    int i;
> +
> +    if (fpf != FPF_LONG || extract32(m4, 0, 3) || m5 > 2) {
> +        gen_program_exception(s, PGM_SPECIFICATION);
> +        return DISAS_NORETURN;
> +    }
> +
> +    tmp = tcg_temp_new_i64();
> +    for (i = 0; i < 2; i++) {
> +        read_vec_element_i64(tmp, get_field(s->fields, v2), i, ES_64);
> +
> +        switch (m5) {
> +        case 0:
> +            /* sign bit is inverted (complement) */
> +            tcg_gen_xori_i64(tmp, tmp, 1ull << 63);
> +            break;
> +        case 1:
> +            /* sign bit is set to one (negative) */
> +            tcg_gen_ori_i64(tmp, tmp, 1ull << 63);
> +            break;
> +        case 2:
> +            /* sign bit is set to zero (positive) */
> +            tcg_gen_andi_i64(tmp, tmp, (1ull << 63) - 1);
> +            break;
> +        }
> +
> +        write_vec_element_i64(tmp, get_field(s->fields, v1), i, ES_64);
> +        if (se) {
> +            break;
> +        }
> +    }
> +    tcg_temp_free_i64(tmp);
> +    return DISAS_NEXT;
> +}

Better to use tcg_gen_gvec_{and,xor,or}i to do all of the elements at once.
Won't work for FPF_EXTENDED, but much better for FPF_SINGLE, once they're
supported.


r~

On 31.05.19 19:48, Richard Henderson wrote:
> On 5/31/19 5:44 AM, David Hildenbrand wrote:
>> +static DisasJumpType op_vfpso(DisasContext *s, DisasOps *o)
>> +{
>> +    const uint8_t fpf = get_field(s->fields, m3);
>> +    const uint8_t m4 = get_field(s->fields, m4);
>> +    const uint8_t m5 = get_field(s->fields, m5);
>> +    const bool se = extract32(m4, 3, 1);
>> +    TCGv_i64 tmp;
>> +    int i;
>> +
>> +    if (fpf != FPF_LONG || extract32(m4, 0, 3) || m5 > 2) {
>> +        gen_program_exception(s, PGM_SPECIFICATION);
>> +        return DISAS_NORETURN;
>> +    }
>> +
>> +    tmp = tcg_temp_new_i64();
>> +    for (i = 0; i < 2; i++) {
>> +        read_vec_element_i64(tmp, get_field(s->fields, v2), i, ES_64);
>> +
>> +        switch (m5) {
>> +        case 0:
>> +            /* sign bit is inverted (complement) */
>> +            tcg_gen_xori_i64(tmp, tmp, 1ull << 63);
>> +            break;
>> +        case 1:
>> +            /* sign bit is set to one (negative) */
>> +            tcg_gen_ori_i64(tmp, tmp, 1ull << 63);
>> +            break;
>> +        case 2:
>> +            /* sign bit is set to zero (positive) */
>> +            tcg_gen_andi_i64(tmp, tmp, (1ull << 63) - 1);
>> +            break;
>> +        }
>> +
>> +        write_vec_element_i64(tmp, get_field(s->fields, v1), i, ES_64);
>> +        if (se) {
>> +            break;
>> +        }
>> +    }
>> +    tcg_temp_free_i64(tmp);
>> +    return DISAS_NEXT;
>> +}
> 
> Better to use tcg_gen_gvec_{and,xor,or}i to do all of the elements at once.
> Won't work for FPF_EXTENDED, but much better for FPF_SINGLE, once they're
> supported.
> 

How could I miss that :)

Thanks!


-- 

Thanks,

David / dhildenb