1 | Not very much here, but several people have fallen over | 1 | The following changes since commit 7993b0f83fe5c3f8555e79781d5d098f99751a94: |
---|---|---|---|
2 | the vector operation segfault bug, so let's get the fix | ||
3 | into master. | ||
4 | 2 | ||
5 | thanks | 3 | Merge remote-tracking branch 'remotes/nvme/tags/nvme-fixes-for-6.0-pull-request' into staging (2021-03-29 18:45:12 +0100) |
6 | -- PMM | ||
7 | |||
8 | The following changes since commit d418238dca7b4e0b124135827ead3076233052b1: | ||
9 | |||
10 | Merge remote-tracking branch 'remotes/rth/tags/pull-rng-20190522' into staging (2019-05-23 12:57:17 +0100) | ||
11 | 4 | ||
12 | are available in the Git repository at: | 5 | are available in the Git repository at: |
13 | 6 | ||
14 | https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20190523 | 7 | https://git.linaro.org/people/pmaydell/qemu-arm.git pull-target-arm-20210330 |
15 | 8 | ||
16 | for you to fetch changes up to 98e4f4fdb8ea05d840f51f47125924c2bb9df2df: | 9 | for you to fetch changes up to b9e3f1579a4b06fc63dfa8cdb68df1c58eeb0cf1: |
17 | 10 | ||
18 | hw/arm/exynos4210: QOM'ify the Exynos4210 SoC (2019-05-23 14:47:44 +0100) | 11 | hw/timer/renesas_tmr: Add default-case asserts in read_tcnt() (2021-03-30 14:05:34 +0100) |
19 | 12 | ||
20 | ---------------------------------------------------------------- | 13 | ---------------------------------------------------------------- |
21 | target-arm queue: | 14 | * net/npcm7xx_emc.c: Fix handling of receiving packets when RSDR not set |
22 | * exynos4210: QOM'ify the Exynos4210 SoC | 15 | * hw/display/xlnx_dp: Free FIFOs adding xlnx_dp_finalize() |
23 | * exynos4210: Add DMA support for the Exynos4210 | 16 | * hw/arm/smmuv3: Drop unused CDM_VALID() and is_cd_valid() |
24 | * arm_gicv3: Fix writes to ICC_CTLR_EL3 | 17 | * target/arm: Make number of counters in PMCR follow the CPU |
25 | * arm_gicv3: Fix write of ICH_VMCR_EL2.{VBPR0, VBPR1} | 18 | * hw/timer/renesas_tmr: Add default-case asserts in read_tcnt() |
26 | * target/arm: Fix vector operation segfault | ||
27 | * target/arm: Minor improvements to BFXIL, EXTR | ||
28 | 19 | ||
29 | ---------------------------------------------------------------- | 20 | ---------------------------------------------------------------- |
30 | Alistair Francis (1): | 21 | Doug Evans (1): |
31 | target/arm: Fix vector operation segfault | 22 | net/npcm7xx_emc.c: Fix handling of receiving packets when RSDR not set |
32 | 23 | ||
33 | Guenter Roeck (1): | 24 | Peter Maydell (2): |
34 | hw/arm/exynos4210: Add DMA support for the Exynos4210 | 25 | target/arm: Make number of counters in PMCR follow the CPU |
26 | hw/timer/renesas_tmr: Add default-case asserts in read_tcnt() | ||
35 | 27 | ||
36 | Peter Maydell (5): | 28 | Philippe Mathieu-Daudé (1): |
37 | arm: Move system_clock_scale to armv7m_systick.h | 29 | hw/display/xlnx_dp: Free FIFOs adding xlnx_dp_finalize() |
38 | arm: Remove unnecessary includes of hw/arm/arm.h | ||
39 | arm: Rename hw/arm/arm.h to hw/arm/boot.h | ||
40 | hw/intc/arm_gicv3: Fix write of ICH_VMCR_EL2.{VBPR0, VBPR1} | ||
41 | hw/intc/arm_gicv3: Fix writes to ICC_CTLR_EL3 | ||
42 | 30 | ||
43 | Philippe Mathieu-Daudé (3): | 31 | Zenghui Yu (1): |
44 | hw/arm/exynos4: Remove unuseful debug code | 32 | hw/arm/smmuv3: Drop unused CDM_VALID() and is_cd_valid() |
45 | hw/arm/exynos4: Use the IEC binary prefix definitions | ||
46 | hw/arm/exynos4210: QOM'ify the Exynos4210 SoC | ||
47 | 33 | ||
48 | Richard Henderson (2): | 34 | hw/arm/smmuv3-internal.h | 7 ------- |
49 | target/arm: Use extract2 for EXTR | 35 | target/arm/cpu.h | 1 + |
50 | target/arm: Simplify BFXIL expansion | 36 | hw/display/xlnx_dp.c | 9 +++++++++ |
37 | hw/net/npcm7xx_emc.c | 4 +++- | ||
38 | hw/timer/renesas_tmr.c | 4 ++++ | ||
39 | target/arm/cpu64.c | 3 +++ | ||
40 | target/arm/cpu_tcg.c | 5 +++++ | ||
41 | target/arm/helper.c | 29 +++++++++++++++++------------ | ||
42 | target/arm/kvm64.c | 2 ++ | ||
43 | tests/qtest/npcm7xx_emc-test.c | 30 +++++++++++++++++++++--------- | ||
44 | 10 files changed, 65 insertions(+), 29 deletions(-) | ||
51 | 45 | ||
52 | include/hw/arm/allwinner-a10.h | 2 +- | ||
53 | include/hw/arm/aspeed_soc.h | 1 - | ||
54 | include/hw/arm/bcm2836.h | 1 - | ||
55 | include/hw/arm/{arm.h => boot.h} | 12 +++------ | ||
56 | include/hw/arm/exynos4210.h | 9 +++++-- | ||
57 | include/hw/arm/fsl-imx25.h | 2 +- | ||
58 | include/hw/arm/fsl-imx31.h | 2 +- | ||
59 | include/hw/arm/fsl-imx6.h | 2 +- | ||
60 | include/hw/arm/fsl-imx6ul.h | 2 +- | ||
61 | include/hw/arm/fsl-imx7.h | 2 +- | ||
62 | include/hw/arm/virt.h | 2 +- | ||
63 | include/hw/arm/xlnx-versal.h | 2 +- | ||
64 | include/hw/arm/xlnx-zynqmp.h | 2 +- | ||
65 | include/hw/timer/armv7m_systick.h | 22 ++++++++++++++++ | ||
66 | hw/arm/armsse.c | 2 +- | ||
67 | hw/arm/armv7m.c | 2 +- | ||
68 | hw/arm/aspeed.c | 2 +- | ||
69 | hw/arm/boot.c | 2 +- | ||
70 | hw/arm/collie.c | 2 +- | ||
71 | hw/arm/exynos4210.c | 54 ++++++++++++++++++++++++++++++++++++--- | ||
72 | hw/arm/exynos4_boards.c | 40 ++++++++--------------------- | ||
73 | hw/arm/highbank.c | 2 +- | ||
74 | hw/arm/integratorcp.c | 2 +- | ||
75 | hw/arm/mainstone.c | 2 +- | ||
76 | hw/arm/microbit.c | 2 +- | ||
77 | hw/arm/mps2-tz.c | 2 +- | ||
78 | hw/arm/mps2.c | 2 +- | ||
79 | hw/arm/msf2-soc.c | 1 - | ||
80 | hw/arm/msf2-som.c | 2 +- | ||
81 | hw/arm/musca.c | 2 +- | ||
82 | hw/arm/musicpal.c | 2 +- | ||
83 | hw/arm/netduino2.c | 2 +- | ||
84 | hw/arm/nrf51_soc.c | 2 +- | ||
85 | hw/arm/nseries.c | 2 +- | ||
86 | hw/arm/omap1.c | 2 +- | ||
87 | hw/arm/omap2.c | 2 +- | ||
88 | hw/arm/omap_sx1.c | 2 +- | ||
89 | hw/arm/palm.c | 2 +- | ||
90 | hw/arm/raspi.c | 2 +- | ||
91 | hw/arm/realview.c | 2 +- | ||
92 | hw/arm/spitz.c | 2 +- | ||
93 | hw/arm/stellaris.c | 2 +- | ||
94 | hw/arm/stm32f205_soc.c | 2 +- | ||
95 | hw/arm/strongarm.c | 2 +- | ||
96 | hw/arm/tosa.c | 2 +- | ||
97 | hw/arm/versatilepb.c | 2 +- | ||
98 | hw/arm/vexpress.c | 2 +- | ||
99 | hw/arm/virt.c | 2 +- | ||
100 | hw/arm/xilinx_zynq.c | 2 +- | ||
101 | hw/arm/xlnx-versal.c | 2 +- | ||
102 | hw/arm/z2.c | 2 +- | ||
103 | hw/intc/arm_gicv3_cpuif.c | 6 ++--- | ||
104 | hw/intc/armv7m_nvic.c | 1 - | ||
105 | target/arm/arm-semi.c | 1 - | ||
106 | target/arm/cpu.c | 1 - | ||
107 | target/arm/cpu64.c | 1 - | ||
108 | target/arm/kvm.c | 1 - | ||
109 | target/arm/kvm32.c | 1 - | ||
110 | target/arm/kvm64.c | 1 - | ||
111 | target/arm/translate-a64.c | 44 ++++++++++++++++--------------- | ||
112 | target/arm/translate.c | 4 +-- | ||
113 | 61 files changed, 164 insertions(+), 123 deletions(-) | ||
114 | rename include/hw/arm/{arm.h => boot.h} (96%) | ||
115 | diff view generated by jsdifflib |
Deleted patch | |||
---|---|---|---|
1 | From: Richard Henderson <richard.henderson@linaro.org> | ||
2 | 1 | ||
3 | This is, after all, how we implement extract2 in tcg/aarch64. | ||
4 | |||
5 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> | ||
6 | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> | ||
7 | Message-id: 20190514011129.11330-2-richard.henderson@linaro.org | ||
8 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | ||
9 | --- | ||
10 | target/arm/translate-a64.c | 38 ++++++++++++++++++++------------------ | ||
11 | 1 file changed, 20 insertions(+), 18 deletions(-) | ||
12 | |||
13 | diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c | ||
14 | index XXXXXXX..XXXXXXX 100644 | ||
15 | --- a/target/arm/translate-a64.c | ||
16 | +++ b/target/arm/translate-a64.c | ||
17 | @@ -XXX,XX +XXX,XX @@ static void disas_extract(DisasContext *s, uint32_t insn) | ||
18 | } else { | ||
19 | tcg_gen_ext32u_i64(tcg_rd, cpu_reg(s, rm)); | ||
20 | } | ||
21 | - } else if (rm == rn) { /* ROR */ | ||
22 | - tcg_rm = cpu_reg(s, rm); | ||
23 | - if (sf) { | ||
24 | - tcg_gen_rotri_i64(tcg_rd, tcg_rm, imm); | ||
25 | - } else { | ||
26 | - TCGv_i32 tmp = tcg_temp_new_i32(); | ||
27 | - tcg_gen_extrl_i64_i32(tmp, tcg_rm); | ||
28 | - tcg_gen_rotri_i32(tmp, tmp, imm); | ||
29 | - tcg_gen_extu_i32_i64(tcg_rd, tmp); | ||
30 | - tcg_temp_free_i32(tmp); | ||
31 | - } | ||
32 | } else { | ||
33 | - tcg_rm = read_cpu_reg(s, rm, sf); | ||
34 | - tcg_rn = read_cpu_reg(s, rn, sf); | ||
35 | - tcg_gen_shri_i64(tcg_rm, tcg_rm, imm); | ||
36 | - tcg_gen_shli_i64(tcg_rn, tcg_rn, bitsize - imm); | ||
37 | - tcg_gen_or_i64(tcg_rd, tcg_rm, tcg_rn); | ||
38 | - if (!sf) { | ||
39 | - tcg_gen_ext32u_i64(tcg_rd, tcg_rd); | ||
40 | + tcg_rm = cpu_reg(s, rm); | ||
41 | + tcg_rn = cpu_reg(s, rn); | ||
42 | + | ||
43 | + if (sf) { | ||
44 | + /* Specialization to ROR happens in EXTRACT2. */ | ||
45 | + tcg_gen_extract2_i64(tcg_rd, tcg_rm, tcg_rn, imm); | ||
46 | + } else { | ||
47 | + TCGv_i32 t0 = tcg_temp_new_i32(); | ||
48 | + | ||
49 | + tcg_gen_extrl_i64_i32(t0, tcg_rm); | ||
50 | + if (rm == rn) { | ||
51 | + tcg_gen_rotri_i32(t0, t0, imm); | ||
52 | + } else { | ||
53 | + TCGv_i32 t1 = tcg_temp_new_i32(); | ||
54 | + tcg_gen_extrl_i64_i32(t1, tcg_rn); | ||
55 | + tcg_gen_extract2_i32(t0, t0, t1, imm); | ||
56 | + tcg_temp_free_i32(t1); | ||
57 | + } | ||
58 | + tcg_gen_extu_i32_i64(tcg_rd, t0); | ||
59 | + tcg_temp_free_i32(t0); | ||
60 | } | ||
61 | } | ||
62 | } | ||
63 | -- | ||
64 | 2.20.1 | ||
65 | |||
66 | diff view generated by jsdifflib |
Deleted patch | |||
---|---|---|---|
1 | From: Richard Henderson <richard.henderson@linaro.org> | ||
2 | 1 | ||
3 | The mask implied by the extract is redundant with the one | ||
4 | implied by the deposit. Also, fix spelling of BFXIL. | ||
5 | |||
6 | Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> | ||
7 | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> | ||
8 | Message-id: 20190514011129.11330-3-richard.henderson@linaro.org | ||
9 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | ||
10 | --- | ||
11 | target/arm/translate-a64.c | 6 +++--- | ||
12 | 1 file changed, 3 insertions(+), 3 deletions(-) | ||
13 | |||
14 | diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c | ||
15 | index XXXXXXX..XXXXXXX 100644 | ||
16 | --- a/target/arm/translate-a64.c | ||
17 | +++ b/target/arm/translate-a64.c | ||
18 | @@ -XXX,XX +XXX,XX @@ static void disas_bitfield(DisasContext *s, uint32_t insn) | ||
19 | tcg_gen_extract_i64(tcg_rd, tcg_tmp, ri, len); | ||
20 | return; | ||
21 | } | ||
22 | - /* opc == 1, BXFIL fall through to deposit */ | ||
23 | - tcg_gen_extract_i64(tcg_tmp, tcg_tmp, ri, len); | ||
24 | + /* opc == 1, BFXIL fall through to deposit */ | ||
25 | + tcg_gen_shri_i64(tcg_tmp, tcg_tmp, ri); | ||
26 | pos = 0; | ||
27 | } else { | ||
28 | /* Handle the ri > si case with a deposit | ||
29 | @@ -XXX,XX +XXX,XX @@ static void disas_bitfield(DisasContext *s, uint32_t insn) | ||
30 | len = ri; | ||
31 | } | ||
32 | |||
33 | - if (opc == 1) { /* BFM, BXFIL */ | ||
34 | + if (opc == 1) { /* BFM, BFXIL */ | ||
35 | tcg_gen_deposit_i64(tcg_rd, tcg_rd, tcg_tmp, pos, len); | ||
36 | } else { | ||
37 | /* SBFM or UBFM: We start with zero, and we haven't modified | ||
38 | -- | ||
39 | 2.20.1 | ||
40 | |||
41 | diff view generated by jsdifflib |
Deleted patch | |||
---|---|---|---|
1 | From: Alistair Francis <alistair.francis@wdc.com> | ||
2 | 1 | ||
3 | Commit 89e68b575 "target/arm: Use vector operations for saturation" | ||
4 | causes this abort() when booting QEMU ARM with a Cortex-A15: | ||
5 | |||
6 | 0 0x00007ffff4c2382f in raise () at /usr/lib/libc.so.6 | ||
7 | 1 0x00007ffff4c0e672 in abort () at /usr/lib/libc.so.6 | ||
8 | 2 0x00005555559c1839 in disas_neon_data_insn (insn=<optimized out>, s=<optimized out>) at ./target/arm/translate.c:6673 | ||
9 | 3 0x00005555559c1839 in disas_neon_data_insn (s=<optimized out>, insn=<optimized out>) at ./target/arm/translate.c:6386 | ||
10 | 4 0x00005555559cd8a4 in disas_arm_insn (insn=4081107068, s=0x7fffe59a9510) at ./target/arm/translate.c:9289 | ||
11 | 5 0x00005555559cd8a4 in arm_tr_translate_insn (dcbase=0x7fffe59a9510, cpu=<optimized out>) at ./target/arm/translate.c:13612 | ||
12 | 6 0x00005555558d1d39 in translator_loop (ops=0x5555561cc580 <arm_translator_ops>, db=0x7fffe59a9510, cpu=0x55555686a2f0, tb=<optimized out>, max_insns=<optimized out>) at ./accel/tcg/translator.c:96 | ||
13 | 7 0x00005555559d10d4 in gen_intermediate_code (cpu=cpu@entry=0x55555686a2f0, tb=tb@entry=0x7fffd7840080 <code_gen_buffer+126091347>, max_insns=max_insns@entry=512) at ./target/arm/translate.c:13901 | ||
14 | 8 0x00005555558d06b9 in tb_gen_code (cpu=cpu@entry=0x55555686a2f0, pc=3067096216, cs_base=0, flags=192, cflags=-16252928, cflags@entry=524288) at ./accel/tcg/translate-all.c:1736 | ||
15 | 9 0x00005555558ce467 in tb_find (cf_mask=524288, tb_exit=1, last_tb=0x7fffd783e640 <code_gen_buffer+126084627>, cpu=0x1) at ./accel/tcg/cpu-exec.c:407 | ||
16 | 10 0x00005555558ce467 in cpu_exec (cpu=cpu@entry=0x55555686a2f0) at ./accel/tcg/cpu-exec.c:728 | ||
17 | 11 0x000055555588b0cf in tcg_cpu_exec (cpu=0x55555686a2f0) at ./cpus.c:1431 | ||
18 | 12 0x000055555588d223 in qemu_tcg_cpu_thread_fn (arg=0x55555686a2f0) at ./cpus.c:1735 | ||
19 | 13 0x000055555588d223 in qemu_tcg_cpu_thread_fn (arg=arg@entry=0x55555686a2f0) at ./cpus.c:1709 | ||
20 | 14 0x0000555555d2629a in qemu_thread_start (args=<optimized out>) at ./util/qemu-thread-posix.c:502 | ||
21 | 15 0x00007ffff4db8a92 in start_thread () at /usr/lib/libpthread. | ||
22 | |||
23 | This patch ensures that we don't hit the abort() in the second switch | ||
24 | case in disas_neon_data_insn() as we will return from the first case. | ||
25 | |||
26 | Signed-off-by: Alistair Francis <alistair.francis@wdc.com> | ||
27 | Reviewed-by: Richard Henderson <richard.henderson@linaro.org> | ||
28 | Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> | ||
29 | Reviewed-by: Alex Bennée <alex.bennee@linaro.org> | ||
30 | Tested-by: Alex Bennée <alex.bennee@linaro.org> | ||
31 | Message-id: ad91b397f360b2fc7f4087e476f7df5b04d42ddb.1558021877.git.alistair.francis@wdc.com | ||
32 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | ||
33 | --- | ||
34 | target/arm/translate.c | 4 ++-- | ||
35 | 1 file changed, 2 insertions(+), 2 deletions(-) | ||
36 | |||
37 | diff --git a/target/arm/translate.c b/target/arm/translate.c | ||
38 | index XXXXXXX..XXXXXXX 100644 | ||
39 | --- a/target/arm/translate.c | ||
40 | +++ b/target/arm/translate.c | ||
41 | @@ -XXX,XX +XXX,XX @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn) | ||
42 | tcg_gen_gvec_4(rd_ofs, offsetof(CPUARMState, vfp.qc), | ||
43 | rn_ofs, rm_ofs, vec_size, vec_size, | ||
44 | (u ? uqadd_op : sqadd_op) + size); | ||
45 | - break; | ||
46 | + return 0; | ||
47 | |||
48 | case NEON_3R_VQSUB: | ||
49 | tcg_gen_gvec_4(rd_ofs, offsetof(CPUARMState, vfp.qc), | ||
50 | rn_ofs, rm_ofs, vec_size, vec_size, | ||
51 | (u ? uqsub_op : sqsub_op) + size); | ||
52 | - break; | ||
53 | + return 0; | ||
54 | |||
55 | case NEON_3R_VMUL: /* VMUL */ | ||
56 | if (u) { | ||
57 | -- | ||
58 | 2.20.1 | ||
59 | |||
60 | diff view generated by jsdifflib |
Deleted patch | |||
---|---|---|---|
1 | The system_clock_scale global is used only by the armv7m systick | ||
2 | device; move the extern declaration to the armv7m_systick.h header, | ||
3 | and expand the comment to explain what it is and that it should | ||
4 | ideally be replaced with a different approach. | ||
5 | 1 | ||
6 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | ||
7 | Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> | ||
8 | Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> | ||
9 | Message-id: 20190516163857.6430-2-peter.maydell@linaro.org | ||
10 | --- | ||
11 | include/hw/arm/arm.h | 4 ---- | ||
12 | include/hw/timer/armv7m_systick.h | 22 ++++++++++++++++++++++ | ||
13 | 2 files changed, 22 insertions(+), 4 deletions(-) | ||
14 | |||
15 | diff --git a/include/hw/arm/arm.h b/include/hw/arm/arm.h | ||
16 | index XXXXXXX..XXXXXXX 100644 | ||
17 | --- a/include/hw/arm/arm.h | ||
18 | +++ b/include/hw/arm/arm.h | ||
19 | @@ -XXX,XX +XXX,XX @@ void arm_write_secure_board_setup_dummy_smc(ARMCPU *cpu, | ||
20 | const struct arm_boot_info *info, | ||
21 | hwaddr mvbar_addr); | ||
22 | |||
23 | -/* Multiplication factor to convert from system clock ticks to qemu timer | ||
24 | - ticks. */ | ||
25 | -extern int system_clock_scale; | ||
26 | - | ||
27 | #endif /* HW_ARM_H */ | ||
28 | diff --git a/include/hw/timer/armv7m_systick.h b/include/hw/timer/armv7m_systick.h | ||
29 | index XXXXXXX..XXXXXXX 100644 | ||
30 | --- a/include/hw/timer/armv7m_systick.h | ||
31 | +++ b/include/hw/timer/armv7m_systick.h | ||
32 | @@ -XXX,XX +XXX,XX @@ typedef struct SysTickState { | ||
33 | qemu_irq irq; | ||
34 | } SysTickState; | ||
35 | |||
36 | +/* | ||
37 | + * Multiplication factor to convert from system clock ticks to qemu timer | ||
38 | + * ticks. This should be set (by board code, usually) to a value | ||
39 | + * equal to NANOSECONDS_PER_SECOND / frq, where frq is the clock frequency | ||
40 | + * in Hz of the CPU. | ||
41 | + * | ||
42 | + * This value is used by the systick device when it is running in | ||
43 | + * its "use the CPU clock" mode (ie when SYST_CSR.CLKSOURCE == 1) to | ||
44 | + * set how fast the timer should tick. | ||
45 | + * | ||
46 | + * TODO: we should refactor this so that rather than using a global | ||
47 | + * we use a device property or something similar. This is complicated | ||
48 | + * because (a) the property would need to be plumbed through from the | ||
49 | + * board code down through various layers to the systick device | ||
50 | + * and (b) the property needs to be modifiable after realize, because | ||
51 | + * the stellaris board uses this to implement the behaviour where the | ||
52 | + * guest can reprogram the PLL registers to downclock the CPU, and the | ||
53 | + * systick device needs to react accordingly. Possibly this should | ||
54 | + * be deferred until we have a good API for modelling clock trees. | ||
55 | + */ | ||
56 | +extern int system_clock_scale; | ||
57 | + | ||
58 | #endif | ||
59 | -- | ||
60 | 2.20.1 | ||
61 | |||
62 | diff view generated by jsdifflib |
1 | From: Guenter Roeck <linux@roeck-us.net> | 1 | From: Doug Evans <dje@google.com> |
---|---|---|---|
2 | 2 | ||
3 | QEMU already supports pl330. Instantiate it for Exynos4210. | 3 | Turning REG_MCMDR_RXON is enough to start receiving packets. |
4 | 4 | ||
5 | Relevant part of Linux arch/arm/boot/dts/exynos4.dtsi: | 5 | Signed-off-by: Doug Evans <dje@google.com> |
6 | 6 | Message-id: 20210319195044.741821-1-dje@google.com | |
7 | / { | ||
8 | soc: soc { | ||
9 | amba { | ||
10 | pdma0: pdma@12680000 { | ||
11 | compatible = "arm,pl330", "arm,primecell"; | ||
12 | reg = <0x12680000 0x1000>; | ||
13 | interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; | ||
14 | clocks = <&clock CLK_PDMA0>; | ||
15 | clock-names = "apb_pclk"; | ||
16 | #dma-cells = <1>; | ||
17 | #dma-channels = <8>; | ||
18 | #dma-requests = <32>; | ||
19 | }; | ||
20 | pdma1: pdma@12690000 { | ||
21 | compatible = "arm,pl330", "arm,primecell"; | ||
22 | reg = <0x12690000 0x1000>; | ||
23 | interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; | ||
24 | clocks = <&clock CLK_PDMA1>; | ||
25 | clock-names = "apb_pclk"; | ||
26 | #dma-cells = <1>; | ||
27 | #dma-channels = <8>; | ||
28 | #dma-requests = <32>; | ||
29 | }; | ||
30 | mdma1: mdma@12850000 { | ||
31 | compatible = "arm,pl330", "arm,primecell"; | ||
32 | reg = <0x12850000 0x1000>; | ||
33 | interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; | ||
34 | clocks = <&clock CLK_MDMA>; | ||
35 | clock-names = "apb_pclk"; | ||
36 | #dma-cells = <1>; | ||
37 | #dma-channels = <8>; | ||
38 | #dma-requests = <1>; | ||
39 | }; | ||
40 | }; | ||
41 | }; | ||
42 | }; | ||
43 | |||
44 | Signed-off-by: Guenter Roeck <linux@roeck-us.net> | ||
45 | Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> | ||
46 | Reviewed-by: Alistair Francis <alistair.francis@wdc.com> | ||
47 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> | ||
48 | Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> | ||
49 | Message-id: 20190520214342.13709-4-philmd@redhat.com | ||
50 | [PMD: Do not set default qdev properties, create the controllers in the SoC | ||
51 | rather than the board (Peter Maydell), add dtsi in commit message] | ||
52 | Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> | ||
53 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> | 7 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> |
54 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | 8 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
55 | --- | 9 | --- |
56 | hw/arm/exynos4210.c | 26 ++++++++++++++++++++++++++ | 10 | hw/net/npcm7xx_emc.c | 4 +++- |
57 | 1 file changed, 26 insertions(+) | 11 | tests/qtest/npcm7xx_emc-test.c | 30 +++++++++++++++++++++--------- |
12 | 2 files changed, 24 insertions(+), 10 deletions(-) | ||
58 | 13 | ||
59 | diff --git a/hw/arm/exynos4210.c b/hw/arm/exynos4210.c | 14 | diff --git a/hw/net/npcm7xx_emc.c b/hw/net/npcm7xx_emc.c |
60 | index XXXXXXX..XXXXXXX 100644 | 15 | index XXXXXXX..XXXXXXX 100644 |
61 | --- a/hw/arm/exynos4210.c | 16 | --- a/hw/net/npcm7xx_emc.c |
62 | +++ b/hw/arm/exynos4210.c | 17 | +++ b/hw/net/npcm7xx_emc.c |
63 | @@ -XXX,XX +XXX,XX @@ | 18 | @@ -XXX,XX +XXX,XX @@ static void npcm7xx_emc_write(void *opaque, hwaddr offset, |
64 | /* EHCI */ | 19 | !(value & REG_MCMDR_RXON)) { |
65 | #define EXYNOS4210_EHCI_BASE_ADDR 0x12580000 | 20 | emc->regs[REG_MGSTA] |= REG_MGSTA_RXHA; |
66 | 21 | } | |
67 | +/* DMA */ | 22 | - if (!(value & REG_MCMDR_RXON)) { |
68 | +#define EXYNOS4210_PL330_BASE0_ADDR 0x12680000 | 23 | + if (value & REG_MCMDR_RXON) { |
69 | +#define EXYNOS4210_PL330_BASE1_ADDR 0x12690000 | 24 | + emc->rx_active = true; |
70 | +#define EXYNOS4210_PL330_BASE2_ADDR 0x12850000 | 25 | + } else { |
26 | emc_halt_rx(emc, 0); | ||
27 | } | ||
28 | break; | ||
29 | diff --git a/tests/qtest/npcm7xx_emc-test.c b/tests/qtest/npcm7xx_emc-test.c | ||
30 | index XXXXXXX..XXXXXXX 100644 | ||
31 | --- a/tests/qtest/npcm7xx_emc-test.c | ||
32 | +++ b/tests/qtest/npcm7xx_emc-test.c | ||
33 | @@ -XXX,XX +XXX,XX @@ static void enable_tx(QTestState *qts, const EMCModule *mod, | ||
34 | mcmdr |= REG_MCMDR_TXON; | ||
35 | emc_write(qts, mod, REG_MCMDR, mcmdr); | ||
36 | } | ||
37 | - | ||
38 | - /* Prod the device to send the packet. */ | ||
39 | - emc_write(qts, mod, REG_TSDR, 1); | ||
40 | } | ||
41 | |||
42 | static void emc_send_verify1(QTestState *qts, const EMCModule *mod, int fd, | ||
43 | @@ -XXX,XX +XXX,XX @@ static void emc_send_verify(QTestState *qts, const EMCModule *mod, int fd, | ||
44 | enable_tx(qts, mod, &desc[0], NUM_TX_DESCRIPTORS, desc_addr, | ||
45 | with_irq ? REG_MIEN_ENTXINTR : 0); | ||
46 | |||
47 | + /* Prod the device to send the packet. */ | ||
48 | + emc_write(qts, mod, REG_TSDR, 1); | ||
71 | + | 49 | + |
72 | static uint8_t chipid_and_omr[] = { 0x11, 0x02, 0x21, 0x43, | 50 | /* |
73 | 0x09, 0x00, 0x00, 0x00 }; | 51 | * It's problematic to observe the interrupt for each packet. |
74 | 52 | * Instead just wait until all the packets go out. | |
75 | @@ -XXX,XX +XXX,XX @@ static uint64_t exynos4210_calc_affinity(int cpu) | 53 | @@ -XXX,XX +XXX,XX @@ static void enable_rx(QTestState *qts, const EMCModule *mod, |
76 | return (0x9 << ARM_AFF1_SHIFT) | cpu; | 54 | mcmdr |= REG_MCMDR_RXON | mcmdr_flags; |
55 | emc_write(qts, mod, REG_MCMDR, mcmdr); | ||
56 | } | ||
57 | - | ||
58 | - /* Prod the device to accept a packet. */ | ||
59 | - emc_write(qts, mod, REG_RSDR, 1); | ||
77 | } | 60 | } |
78 | 61 | ||
79 | +static void pl330_create(uint32_t base, qemu_irq irq, int nreq) | 62 | static void emc_recv_verify(QTestState *qts, const EMCModule *mod, int fd, |
80 | +{ | 63 | - bool with_irq) |
81 | + SysBusDevice *busdev; | 64 | + bool with_irq, bool pump_rsdr) |
82 | + DeviceState *dev; | 65 | { |
66 | NPCM7xxEMCRxDesc desc[NUM_RX_DESCRIPTORS]; | ||
67 | uint32_t desc_addr = DESC_ADDR; | ||
68 | @@ -XXX,XX +XXX,XX @@ static void emc_recv_verify(QTestState *qts, const EMCModule *mod, int fd, | ||
69 | enable_rx(qts, mod, &desc[0], NUM_RX_DESCRIPTORS, desc_addr, | ||
70 | with_irq ? REG_MIEN_ENRXINTR : 0, 0); | ||
71 | |||
72 | + /* | ||
73 | + * If requested, prod the device to accept a packet. | ||
74 | + * This isn't necessary, the linux driver doesn't do this. | ||
75 | + * Test doing/not-doing this for robustness. | ||
76 | + */ | ||
77 | + if (pump_rsdr) { | ||
78 | + emc_write(qts, mod, REG_RSDR, 1); | ||
79 | + } | ||
83 | + | 80 | + |
84 | + dev = qdev_create(NULL, "pl330"); | 81 | /* Send test packet to device's socket. */ |
85 | + qdev_prop_set_uint8(dev, "num_periph_req", nreq); | 82 | ret = iov_send(fd, iov, 2, 0, sizeof(len) + sizeof(test)); |
86 | + qdev_init_nofail(dev); | 83 | g_assert_cmpint(ret, == , sizeof(test) + sizeof(len)); |
87 | + busdev = SYS_BUS_DEVICE(dev); | 84 | @@ -XXX,XX +XXX,XX @@ static void test_rx(gconstpointer test_data) |
88 | + sysbus_mmio_map(busdev, 0, base); | 85 | |
89 | + sysbus_connect_irq(busdev, 0, irq); | 86 | qtest_irq_intercept_in(qts, "/machine/soc/a9mpcore/gic"); |
90 | +} | 87 | |
91 | + | 88 | - emc_recv_verify(qts, td->module, test_sockets[0], /*with_irq=*/false); |
92 | Exynos4210State *exynos4210_init(MemoryRegion *system_mem) | 89 | - emc_recv_verify(qts, td->module, test_sockets[0], /*with_irq=*/true); |
93 | { | 90 | + emc_recv_verify(qts, td->module, test_sockets[0], /*with_irq=*/false, |
94 | Exynos4210State *s = g_new0(Exynos4210State, 1); | 91 | + /*pump_rsdr=*/false); |
95 | @@ -XXX,XX +XXX,XX @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem) | 92 | + emc_recv_verify(qts, td->module, test_sockets[0], /*with_irq=*/false, |
96 | sysbus_create_simple(TYPE_EXYNOS4210_EHCI, EXYNOS4210_EHCI_BASE_ADDR, | 93 | + /*pump_rsdr=*/true); |
97 | s->irq_table[exynos4210_get_irq(28, 3)]); | 94 | + emc_recv_verify(qts, td->module, test_sockets[0], /*with_irq=*/true, |
98 | 95 | + /*pump_rsdr=*/false); | |
99 | + /*** DMA controllers ***/ | 96 | + emc_recv_verify(qts, td->module, test_sockets[0], /*with_irq=*/true, |
100 | + pl330_create(EXYNOS4210_PL330_BASE0_ADDR, | 97 | + /*pump_rsdr=*/true); |
101 | + qemu_irq_invert(s->irq_table[exynos4210_get_irq(35, 1)]), 32); | 98 | emc_test_ptle(qts, td->module, test_sockets[0]); |
102 | + pl330_create(EXYNOS4210_PL330_BASE1_ADDR, | 99 | |
103 | + qemu_irq_invert(s->irq_table[exynos4210_get_irq(36, 1)]), 32); | 100 | qtest_quit(qts); |
104 | + pl330_create(EXYNOS4210_PL330_BASE2_ADDR, | ||
105 | + qemu_irq_invert(s->irq_table[exynos4210_get_irq(34, 1)]), 1); | ||
106 | + | ||
107 | return s; | ||
108 | } | ||
109 | -- | 101 | -- |
110 | 2.20.1 | 102 | 2.20.1 |
111 | 103 | ||
112 | 104 | diff view generated by jsdifflib |
1 | From: Philippe Mathieu-Daudé <philmd@redhat.com> | 1 | From: Philippe Mathieu-Daudé <f4bug@amsat.org> |
---|---|---|---|
2 | 2 | ||
3 | Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> | 3 | When building with --enable-sanitizers we get: |
4 | |||
5 | Direct leak of 16 byte(s) in 1 object(s) allocated from: | ||
6 | #0 0x5618479ec7cf in malloc (qemu-system-aarch64+0x233b7cf) | ||
7 | #1 0x7f675745f958 in g_malloc (/lib64/libglib-2.0.so.0+0x58958) | ||
8 | #2 0x561847c2dcc9 in xlnx_dp_init hw/display/xlnx_dp.c:1259:5 | ||
9 | #3 0x56184a5bdab8 in object_init_with_type qom/object.c:375:9 | ||
10 | #4 0x56184a5a2bda in object_initialize_with_type qom/object.c:517:5 | ||
11 | #5 0x56184a5a24d5 in object_initialize qom/object.c:536:5 | ||
12 | #6 0x56184a5a2f6c in object_initialize_child_with_propsv qom/object.c:566:5 | ||
13 | #7 0x56184a5a2e60 in object_initialize_child_with_props qom/object.c:549:10 | ||
14 | #8 0x56184a5a3a1e in object_initialize_child_internal qom/object.c:603:5 | ||
15 | #9 0x5618495aa431 in xlnx_zynqmp_init hw/arm/xlnx-zynqmp.c:273:5 | ||
16 | |||
17 | The RX/TX FIFOs are created in xlnx_dp_init(), add xlnx_dp_finalize() | ||
18 | to destroy them. | ||
19 | |||
20 | Fixes: 58ac482a66d ("introduce xlnx-dp") | ||
21 | Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> | ||
4 | Reviewed-by: Alistair Francis <alistair.francis@wdc.com> | 22 | Reviewed-by: Alistair Francis <alistair.francis@wdc.com> |
5 | Message-id: 20190520214342.13709-5-philmd@redhat.com | 23 | Message-id: 20210323182958.277654-1-f4bug@amsat.org |
6 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | 24 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
7 | --- | 25 | --- |
8 | include/hw/arm/exynos4210.h | 9 +++++++-- | 26 | hw/display/xlnx_dp.c | 9 +++++++++ |
9 | hw/arm/exynos4210.c | 28 ++++++++++++++++++++++++---- | 27 | 1 file changed, 9 insertions(+) |
10 | hw/arm/exynos4_boards.c | 9 ++++++--- | ||
11 | 3 files changed, 37 insertions(+), 9 deletions(-) | ||
12 | 28 | ||
13 | diff --git a/include/hw/arm/exynos4210.h b/include/hw/arm/exynos4210.h | 29 | diff --git a/hw/display/xlnx_dp.c b/hw/display/xlnx_dp.c |
14 | index XXXXXXX..XXXXXXX 100644 | 30 | index XXXXXXX..XXXXXXX 100644 |
15 | --- a/include/hw/arm/exynos4210.h | 31 | --- a/hw/display/xlnx_dp.c |
16 | +++ b/include/hw/arm/exynos4210.h | 32 | +++ b/hw/display/xlnx_dp.c |
17 | @@ -XXX,XX +XXX,XX @@ typedef struct Exynos4210Irq { | 33 | @@ -XXX,XX +XXX,XX @@ static void xlnx_dp_init(Object *obj) |
18 | } Exynos4210Irq; | 34 | fifo8_create(&s->tx_fifo, 16); |
19 | 35 | } | |
20 | typedef struct Exynos4210State { | 36 | |
21 | + /*< private >*/ | 37 | +static void xlnx_dp_finalize(Object *obj) |
22 | + SysBusDevice parent_obj; | 38 | +{ |
23 | + /*< public >*/ | 39 | + XlnxDPState *s = XLNX_DP(obj); |
24 | ARMCPU *cpu[EXYNOS4210_NCPUS]; | ||
25 | Exynos4210Irq irqs; | ||
26 | qemu_irq *irq_table; | ||
27 | @@ -XXX,XX +XXX,XX @@ typedef struct Exynos4210State { | ||
28 | I2CBus *i2c_if[EXYNOS4210_I2C_NUMBER]; | ||
29 | } Exynos4210State; | ||
30 | |||
31 | +#define TYPE_EXYNOS4210_SOC "exynos4210" | ||
32 | +#define EXYNOS4210_SOC(obj) \ | ||
33 | + OBJECT_CHECK(Exynos4210State, obj, TYPE_EXYNOS4210_SOC) | ||
34 | + | 40 | + |
35 | void exynos4210_write_secondary(ARMCPU *cpu, | 41 | + fifo8_destroy(&s->tx_fifo); |
36 | const struct arm_boot_info *info); | 42 | + fifo8_destroy(&s->rx_fifo); |
37 | |||
38 | -Exynos4210State *exynos4210_init(MemoryRegion *system_mem); | ||
39 | - | ||
40 | /* Initialize exynos4210 IRQ subsystem stub */ | ||
41 | qemu_irq *exynos4210_init_irq(Exynos4210Irq *env); | ||
42 | |||
43 | diff --git a/hw/arm/exynos4210.c b/hw/arm/exynos4210.c | ||
44 | index XXXXXXX..XXXXXXX 100644 | ||
45 | --- a/hw/arm/exynos4210.c | ||
46 | +++ b/hw/arm/exynos4210.c | ||
47 | @@ -XXX,XX +XXX,XX @@ static void pl330_create(uint32_t base, qemu_irq irq, int nreq) | ||
48 | sysbus_connect_irq(busdev, 0, irq); | ||
49 | } | ||
50 | |||
51 | -Exynos4210State *exynos4210_init(MemoryRegion *system_mem) | ||
52 | +static void exynos4210_realize(DeviceState *socdev, Error **errp) | ||
53 | { | ||
54 | - Exynos4210State *s = g_new0(Exynos4210State, 1); | ||
55 | + Exynos4210State *s = EXYNOS4210_SOC(socdev); | ||
56 | + MemoryRegion *system_mem = get_system_memory(); | ||
57 | qemu_irq gate_irq[EXYNOS4210_NCPUS][EXYNOS4210_IRQ_GATE_NINPUTS]; | ||
58 | SysBusDevice *busdev; | ||
59 | DeviceState *dev; | ||
60 | @@ -XXX,XX +XXX,XX @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem) | ||
61 | qemu_irq_invert(s->irq_table[exynos4210_get_irq(36, 1)]), 32); | ||
62 | pl330_create(EXYNOS4210_PL330_BASE2_ADDR, | ||
63 | qemu_irq_invert(s->irq_table[exynos4210_get_irq(34, 1)]), 1); | ||
64 | - | ||
65 | - return s; | ||
66 | } | ||
67 | + | ||
68 | +static void exynos4210_class_init(ObjectClass *klass, void *data) | ||
69 | +{ | ||
70 | + DeviceClass *dc = DEVICE_CLASS(klass); | ||
71 | + | ||
72 | + dc->realize = exynos4210_realize; | ||
73 | +} | 43 | +} |
74 | + | 44 | + |
75 | +static const TypeInfo exynos4210_info = { | 45 | static void xlnx_dp_realize(DeviceState *dev, Error **errp) |
76 | + .name = TYPE_EXYNOS4210_SOC, | 46 | { |
77 | + .parent = TYPE_SYS_BUS_DEVICE, | 47 | XlnxDPState *s = XLNX_DP(dev); |
78 | + .instance_size = sizeof(Exynos4210State), | 48 | @@ -XXX,XX +XXX,XX @@ static const TypeInfo xlnx_dp_info = { |
79 | + .class_init = exynos4210_class_init, | 49 | .parent = TYPE_SYS_BUS_DEVICE, |
80 | +}; | 50 | .instance_size = sizeof(XlnxDPState), |
81 | + | 51 | .instance_init = xlnx_dp_init, |
82 | +static void exynos4210_register_types(void) | 52 | + .instance_finalize = xlnx_dp_finalize, |
83 | +{ | 53 | .class_init = xlnx_dp_class_init, |
84 | + type_register_static(&exynos4210_info); | 54 | }; |
85 | +} | ||
86 | + | ||
87 | +type_init(exynos4210_register_types) | ||
88 | diff --git a/hw/arm/exynos4_boards.c b/hw/arm/exynos4_boards.c | ||
89 | index XXXXXXX..XXXXXXX 100644 | ||
90 | --- a/hw/arm/exynos4_boards.c | ||
91 | +++ b/hw/arm/exynos4_boards.c | ||
92 | @@ -XXX,XX +XXX,XX @@ typedef enum Exynos4BoardType { | ||
93 | } Exynos4BoardType; | ||
94 | |||
95 | typedef struct Exynos4BoardState { | ||
96 | - Exynos4210State *soc; | ||
97 | + Exynos4210State soc; | ||
98 | MemoryRegion dram0_mem; | ||
99 | MemoryRegion dram1_mem; | ||
100 | } Exynos4BoardState; | ||
101 | @@ -XXX,XX +XXX,XX @@ exynos4_boards_init_common(MachineState *machine, | ||
102 | exynos4_boards_init_ram(s, get_system_memory(), | ||
103 | exynos4_board_ram_size[board_type]); | ||
104 | |||
105 | - s->soc = exynos4210_init(get_system_memory()); | ||
106 | + object_initialize(&s->soc, sizeof(s->soc), TYPE_EXYNOS4210_SOC); | ||
107 | + qdev_set_parent_bus(DEVICE(&s->soc), sysbus_get_default()); | ||
108 | + object_property_set_bool(OBJECT(&s->soc), true, "realized", | ||
109 | + &error_fatal); | ||
110 | |||
111 | return s; | ||
112 | } | ||
113 | @@ -XXX,XX +XXX,XX @@ static void smdkc210_init(MachineState *machine) | ||
114 | EXYNOS4_BOARD_SMDKC210); | ||
115 | |||
116 | lan9215_init(SMDK_LAN9118_BASE_ADDR, | ||
117 | - qemu_irq_invert(s->soc->irq_table[exynos4210_get_irq(37, 1)])); | ||
118 | + qemu_irq_invert(s->soc.irq_table[exynos4210_get_irq(37, 1)])); | ||
119 | arm_load_kernel(ARM_CPU(first_cpu), &exynos4_board_binfo); | ||
120 | } | ||
121 | 55 | ||
122 | -- | 56 | -- |
123 | 2.20.1 | 57 | 2.20.1 |
124 | 58 | ||
125 | 59 | diff view generated by jsdifflib |
1 | From: Philippe Mathieu-Daudé <philmd@redhat.com> | 1 | From: Zenghui Yu <yuzenghui@huawei.com> |
---|---|---|---|
2 | 2 | ||
3 | It eases code review, unit is explicit. | 3 | They were introduced in commit 9bde7f0674fe ("hw/arm/smmuv3: Implement |
4 | translate callback") but never actually used. Drop them. | ||
4 | 5 | ||
5 | Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> | 6 | Signed-off-by: Zenghui Yu <yuzenghui@huawei.com> |
6 | Reviewed-by: Alistair Francis <alistair.francis@wdc.com> | 7 | Acked-by: Eric Auger <eric.auger@redhat.com> |
7 | Message-id: 20190520214342.13709-3-philmd@redhat.com | 8 | Message-id: 20210325142702.790-1-yuzenghui@huawei.com |
9 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> | ||
8 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | 10 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
9 | --- | 11 | --- |
10 | hw/arm/exynos4_boards.c | 5 +++-- | 12 | hw/arm/smmuv3-internal.h | 7 ------- |
11 | 1 file changed, 3 insertions(+), 2 deletions(-) | 13 | 1 file changed, 7 deletions(-) |
12 | 14 | ||
13 | diff --git a/hw/arm/exynos4_boards.c b/hw/arm/exynos4_boards.c | 15 | diff --git a/hw/arm/smmuv3-internal.h b/hw/arm/smmuv3-internal.h |
14 | index XXXXXXX..XXXXXXX 100644 | 16 | index XXXXXXX..XXXXXXX 100644 |
15 | --- a/hw/arm/exynos4_boards.c | 17 | --- a/hw/arm/smmuv3-internal.h |
16 | +++ b/hw/arm/exynos4_boards.c | 18 | +++ b/hw/arm/smmuv3-internal.h |
17 | @@ -XXX,XX +XXX,XX @@ | 19 | @@ -XXX,XX +XXX,XX @@ static inline int pa_range(STE *ste) |
18 | */ | 20 | #define CD_A(x) extract32((x)->word[1], 14, 1) |
19 | 21 | #define CD_AARCH64(x) extract32((x)->word[1], 9 , 1) | |
20 | #include "qemu/osdep.h" | 22 | |
21 | +#include "qemu/units.h" | 23 | -#define CDM_VALID(x) ((x)->word[0] & 0x1) |
22 | #include "qapi/error.h" | 24 | - |
23 | #include "qemu/error-report.h" | 25 | -static inline int is_cd_valid(SMMUv3State *s, STE *ste, CD *cd) |
24 | #include "qemu-common.h" | 26 | -{ |
25 | @@ -XXX,XX +XXX,XX @@ static int exynos4_board_smp_bootreg_addr[EXYNOS4_NUM_OF_BOARDS] = { | 27 | - return CD_VALID(cd); |
26 | }; | 28 | -} |
27 | 29 | - | |
28 | static unsigned long exynos4_board_ram_size[EXYNOS4_NUM_OF_BOARDS] = { | 30 | /** |
29 | - [EXYNOS4_BOARD_NURI] = 0x40000000, | 31 | * tg2granule - Decodes the CD translation granule size field according |
30 | - [EXYNOS4_BOARD_SMDKC210] = 0x40000000, | 32 | * to the ttbr in use |
31 | + [EXYNOS4_BOARD_NURI] = 1 * GiB, | ||
32 | + [EXYNOS4_BOARD_SMDKC210] = 1 * GiB, | ||
33 | }; | ||
34 | |||
35 | static struct arm_boot_info exynos4_board_binfo = { | ||
36 | -- | 33 | -- |
37 | 2.20.1 | 34 | 2.20.1 |
38 | 35 | ||
39 | 36 | diff view generated by jsdifflib |
1 | The hw/arm/arm.h header now only includes declarations relating | 1 | Currently we give all the v7-and-up CPUs a PMU with 4 counters. This |
---|---|---|---|
2 | to boot.c code, so it is only needed by Arm board or SoC code. | 2 | means that we don't provide the 6 counters that are required by the |
3 | Remove some unnecessary inclusions of it from target/arm files | 3 | Arm BSA (Base System Architecture) specification if the CPU supports |
4 | and from hw/intc/armv7m_nvic.c. | 4 | the Virtualization extensions. |
5 | |||
6 | Instead of having a single PMCR_NUM_COUNTERS, make each CPU type | ||
7 | specify the PMCR reset value (obtained from the appropriate TRM), and | ||
8 | use the 'N' field of that value to define the number of counters | ||
9 | provided. | ||
10 | |||
11 | This means that we now supply 6 counters for Cortex-A53, A57, A72, | ||
12 | A15 and A9 as well as '-cpu max'; Cortex-A7 and A8 stay at 4; and | ||
13 | Cortex-R5 goes down to 3. | ||
14 | |||
15 | Note that because we now use the PMCR reset value of the specific | ||
16 | implementation, we no longer set the LC bit out of reset. This has | ||
17 | an UNKNOWN value out of reset for all cores with any AArch32 support, | ||
18 | so guest software should be setting it anyway if it wants it. | ||
5 | 19 | ||
6 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | 20 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
7 | Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> | 21 | Tested-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org> |
8 | Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> | 22 | Message-id: 20210311165947.27470-1-peter.maydell@linaro.org |
9 | Message-id: 20190516163857.6430-3-peter.maydell@linaro.org | 23 | Reviewed-by: Richard Henderson <richard.henderson@linaro.org> |
10 | --- | 24 | --- |
11 | hw/intc/armv7m_nvic.c | 1 - | 25 | target/arm/cpu.h | 1 + |
12 | target/arm/arm-semi.c | 1 - | 26 | target/arm/cpu64.c | 3 +++ |
13 | target/arm/cpu.c | 1 - | 27 | target/arm/cpu_tcg.c | 5 +++++ |
14 | target/arm/cpu64.c | 1 - | 28 | target/arm/helper.c | 29 +++++++++++++++++------------ |
15 | target/arm/kvm.c | 1 - | 29 | target/arm/kvm64.c | 2 ++ |
16 | target/arm/kvm32.c | 1 - | 30 | 5 files changed, 28 insertions(+), 12 deletions(-) |
17 | target/arm/kvm64.c | 1 - | 31 | |
18 | 7 files changed, 7 deletions(-) | 32 | diff --git a/target/arm/cpu.h b/target/arm/cpu.h |
19 | 33 | index XXXXXXX..XXXXXXX 100644 | |
20 | diff --git a/hw/intc/armv7m_nvic.c b/hw/intc/armv7m_nvic.c | 34 | --- a/target/arm/cpu.h |
21 | index XXXXXXX..XXXXXXX 100644 | 35 | +++ b/target/arm/cpu.h |
22 | --- a/hw/intc/armv7m_nvic.c | 36 | @@ -XXX,XX +XXX,XX @@ struct ARMCPU { |
23 | +++ b/hw/intc/armv7m_nvic.c | 37 | uint64_t id_aa64mmfr2; |
24 | @@ -XXX,XX +XXX,XX @@ | 38 | uint64_t id_aa64dfr0; |
25 | #include "cpu.h" | 39 | uint64_t id_aa64dfr1; |
26 | #include "hw/sysbus.h" | 40 | + uint64_t reset_pmcr_el0; |
27 | #include "qemu/timer.h" | 41 | } isar; |
28 | -#include "hw/arm/arm.h" | 42 | uint64_t midr; |
29 | #include "hw/intc/armv7m_nvic.h" | 43 | uint32_t revidr; |
30 | #include "target/arm/cpu.h" | ||
31 | #include "exec/exec-all.h" | ||
32 | diff --git a/target/arm/arm-semi.c b/target/arm/arm-semi.c | ||
33 | index XXXXXXX..XXXXXXX 100644 | ||
34 | --- a/target/arm/arm-semi.c | ||
35 | +++ b/target/arm/arm-semi.c | ||
36 | @@ -XXX,XX +XXX,XX @@ | ||
37 | #else | ||
38 | #include "qemu-common.h" | ||
39 | #include "exec/gdbstub.h" | ||
40 | -#include "hw/arm/arm.h" | ||
41 | #include "qemu/cutils.h" | ||
42 | #endif | ||
43 | |||
44 | diff --git a/target/arm/cpu.c b/target/arm/cpu.c | ||
45 | index XXXXXXX..XXXXXXX 100644 | ||
46 | --- a/target/arm/cpu.c | ||
47 | +++ b/target/arm/cpu.c | ||
48 | @@ -XXX,XX +XXX,XX @@ | ||
49 | #if !defined(CONFIG_USER_ONLY) | ||
50 | #include "hw/loader.h" | ||
51 | #endif | ||
52 | -#include "hw/arm/arm.h" | ||
53 | #include "sysemu/sysemu.h" | ||
54 | #include "sysemu/hw_accel.h" | ||
55 | #include "kvm_arm.h" | ||
56 | diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c | 44 | diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c |
57 | index XXXXXXX..XXXXXXX 100644 | 45 | index XXXXXXX..XXXXXXX 100644 |
58 | --- a/target/arm/cpu64.c | 46 | --- a/target/arm/cpu64.c |
59 | +++ b/target/arm/cpu64.c | 47 | +++ b/target/arm/cpu64.c |
48 | @@ -XXX,XX +XXX,XX @@ static void aarch64_a57_initfn(Object *obj) | ||
49 | cpu->gic_num_lrs = 4; | ||
50 | cpu->gic_vpribits = 5; | ||
51 | cpu->gic_vprebits = 5; | ||
52 | + cpu->isar.reset_pmcr_el0 = 0x41013000; | ||
53 | define_arm_cp_regs(cpu, cortex_a72_a57_a53_cp_reginfo); | ||
54 | } | ||
55 | |||
56 | @@ -XXX,XX +XXX,XX @@ static void aarch64_a53_initfn(Object *obj) | ||
57 | cpu->gic_num_lrs = 4; | ||
58 | cpu->gic_vpribits = 5; | ||
59 | cpu->gic_vprebits = 5; | ||
60 | + cpu->isar.reset_pmcr_el0 = 0x41033000; | ||
61 | define_arm_cp_regs(cpu, cortex_a72_a57_a53_cp_reginfo); | ||
62 | } | ||
63 | |||
64 | @@ -XXX,XX +XXX,XX @@ static void aarch64_a72_initfn(Object *obj) | ||
65 | cpu->gic_num_lrs = 4; | ||
66 | cpu->gic_vpribits = 5; | ||
67 | cpu->gic_vprebits = 5; | ||
68 | + cpu->isar.reset_pmcr_el0 = 0x41023000; | ||
69 | define_arm_cp_regs(cpu, cortex_a72_a57_a53_cp_reginfo); | ||
70 | } | ||
71 | |||
72 | diff --git a/target/arm/cpu_tcg.c b/target/arm/cpu_tcg.c | ||
73 | index XXXXXXX..XXXXXXX 100644 | ||
74 | --- a/target/arm/cpu_tcg.c | ||
75 | +++ b/target/arm/cpu_tcg.c | ||
76 | @@ -XXX,XX +XXX,XX @@ static void cortex_a8_initfn(Object *obj) | ||
77 | cpu->ccsidr[1] = 0x2007e01a; /* 16k L1 icache. */ | ||
78 | cpu->ccsidr[2] = 0xf0000000; /* No L2 icache. */ | ||
79 | cpu->reset_auxcr = 2; | ||
80 | + cpu->isar.reset_pmcr_el0 = 0x41002000; | ||
81 | define_arm_cp_regs(cpu, cortexa8_cp_reginfo); | ||
82 | } | ||
83 | |||
84 | @@ -XXX,XX +XXX,XX @@ static void cortex_a9_initfn(Object *obj) | ||
85 | cpu->clidr = (1 << 27) | (1 << 24) | 3; | ||
86 | cpu->ccsidr[0] = 0xe00fe019; /* 16k L1 dcache. */ | ||
87 | cpu->ccsidr[1] = 0x200fe019; /* 16k L1 icache. */ | ||
88 | + cpu->isar.reset_pmcr_el0 = 0x41093000; | ||
89 | define_arm_cp_regs(cpu, cortexa9_cp_reginfo); | ||
90 | } | ||
91 | |||
92 | @@ -XXX,XX +XXX,XX @@ static void cortex_a7_initfn(Object *obj) | ||
93 | cpu->ccsidr[0] = 0x701fe00a; /* 32K L1 dcache */ | ||
94 | cpu->ccsidr[1] = 0x201fe00a; /* 32K L1 icache */ | ||
95 | cpu->ccsidr[2] = 0x711fe07a; /* 4096K L2 unified cache */ | ||
96 | + cpu->isar.reset_pmcr_el0 = 0x41072000; | ||
97 | define_arm_cp_regs(cpu, cortexa15_cp_reginfo); /* Same as A15 */ | ||
98 | } | ||
99 | |||
100 | @@ -XXX,XX +XXX,XX @@ static void cortex_a15_initfn(Object *obj) | ||
101 | cpu->ccsidr[0] = 0x701fe00a; /* 32K L1 dcache */ | ||
102 | cpu->ccsidr[1] = 0x201fe00a; /* 32K L1 icache */ | ||
103 | cpu->ccsidr[2] = 0x711fe07a; /* 4096K L2 unified cache */ | ||
104 | + cpu->isar.reset_pmcr_el0 = 0x410F3000; | ||
105 | define_arm_cp_regs(cpu, cortexa15_cp_reginfo); | ||
106 | } | ||
107 | |||
108 | @@ -XXX,XX +XXX,XX @@ static void cortex_r5_initfn(Object *obj) | ||
109 | cpu->isar.id_isar6 = 0x0; | ||
110 | cpu->mp_is_up = true; | ||
111 | cpu->pmsav7_dregion = 16; | ||
112 | + cpu->isar.reset_pmcr_el0 = 0x41151800; | ||
113 | define_arm_cp_regs(cpu, cortexr5_cp_reginfo); | ||
114 | } | ||
115 | |||
116 | diff --git a/target/arm/helper.c b/target/arm/helper.c | ||
117 | index XXXXXXX..XXXXXXX 100644 | ||
118 | --- a/target/arm/helper.c | ||
119 | +++ b/target/arm/helper.c | ||
60 | @@ -XXX,XX +XXX,XX @@ | 120 | @@ -XXX,XX +XXX,XX @@ |
61 | #if !defined(CONFIG_USER_ONLY) | ||
62 | #include "hw/loader.h" | ||
63 | #endif | 121 | #endif |
64 | -#include "hw/arm/arm.h" | 122 | |
65 | #include "sysemu/sysemu.h" | 123 | #define ARM_CPU_FREQ 1000000000 /* FIXME: 1 GHz, should be configurable */ |
66 | #include "sysemu/kvm.h" | 124 | -#define PMCR_NUM_COUNTERS 4 /* QEMU IMPDEF choice */ |
67 | #include "kvm_arm.h" | 125 | |
68 | diff --git a/target/arm/kvm.c b/target/arm/kvm.c | 126 | #ifndef CONFIG_USER_ONLY |
69 | index XXXXXXX..XXXXXXX 100644 | 127 | |
70 | --- a/target/arm/kvm.c | 128 | @@ -XXX,XX +XXX,XX @@ static const ARMCPRegInfo v6_cp_reginfo[] = { |
71 | +++ b/target/arm/kvm.c | 129 | |
72 | @@ -XXX,XX +XXX,XX @@ | 130 | static inline uint32_t pmu_num_counters(CPUARMState *env) |
73 | #include "cpu.h" | 131 | { |
74 | #include "trace.h" | 132 | - return (env->cp15.c9_pmcr & PMCRN_MASK) >> PMCRN_SHIFT; |
75 | #include "internals.h" | 133 | + ARMCPU *cpu = env_archcpu(env); |
76 | -#include "hw/arm/arm.h" | 134 | + |
77 | #include "hw/pci/pci.h" | 135 | + return (cpu->isar.reset_pmcr_el0 & PMCRN_MASK) >> PMCRN_SHIFT; |
78 | #include "exec/memattrs.h" | 136 | } |
79 | #include "exec/address-spaces.h" | 137 | |
80 | diff --git a/target/arm/kvm32.c b/target/arm/kvm32.c | 138 | /* Bits allowed to be set/cleared for PMCNTEN* and PMINTEN* */ |
81 | index XXXXXXX..XXXXXXX 100644 | 139 | @@ -XXX,XX +XXX,XX @@ static const ARMCPRegInfo el2_cp_reginfo[] = { |
82 | --- a/target/arm/kvm32.c | 140 | .resetvalue = 0, |
83 | +++ b/target/arm/kvm32.c | 141 | .writefn = gt_hyp_ctl_write, .raw_writefn = raw_write }, |
84 | @@ -XXX,XX +XXX,XX @@ | 142 | #endif |
85 | #include "sysemu/kvm.h" | 143 | - /* The only field of MDCR_EL2 that has a defined architectural reset value |
86 | #include "kvm_arm.h" | 144 | - * is MDCR_EL2.HPMN which should reset to the value of PMCR_EL0.N. |
87 | #include "internals.h" | 145 | - */ |
88 | -#include "hw/arm/arm.h" | 146 | - { .name = "MDCR_EL2", .state = ARM_CP_STATE_BOTH, |
89 | #include "qemu/log.h" | 147 | - .opc0 = 3, .opc1 = 4, .crn = 1, .crm = 1, .opc2 = 1, |
90 | 148 | - .access = PL2_RW, .resetvalue = PMCR_NUM_COUNTERS, | |
91 | static inline void set_feature(uint64_t *features, int feature) | 149 | - .fieldoffset = offsetof(CPUARMState, cp15.mdcr_el2), }, |
150 | { .name = "HPFAR", .state = ARM_CP_STATE_AA32, | ||
151 | .cp = 15, .opc1 = 4, .crn = 6, .crm = 0, .opc2 = 4, | ||
152 | .access = PL2_RW, .accessfn = access_el3_aa32ns, | ||
153 | @@ -XXX,XX +XXX,XX @@ static void define_pmu_regs(ARMCPU *cpu) | ||
154 | * field as main ID register, and we implement four counters in | ||
155 | * addition to the cycle count register. | ||
156 | */ | ||
157 | - unsigned int i, pmcrn = PMCR_NUM_COUNTERS; | ||
158 | + unsigned int i, pmcrn = pmu_num_counters(&cpu->env); | ||
159 | ARMCPRegInfo pmcr = { | ||
160 | .name = "PMCR", .cp = 15, .crn = 9, .crm = 12, .opc1 = 0, .opc2 = 0, | ||
161 | .access = PL0_RW, | ||
162 | @@ -XXX,XX +XXX,XX @@ static void define_pmu_regs(ARMCPU *cpu) | ||
163 | .access = PL0_RW, .accessfn = pmreg_access, | ||
164 | .type = ARM_CP_IO, | ||
165 | .fieldoffset = offsetof(CPUARMState, cp15.c9_pmcr), | ||
166 | - .resetvalue = (cpu->midr & 0xff000000) | (pmcrn << PMCRN_SHIFT) | | ||
167 | - PMCRLC, | ||
168 | + .resetvalue = cpu->isar.reset_pmcr_el0, | ||
169 | .writefn = pmcr_write, .raw_writefn = raw_write, | ||
170 | }; | ||
171 | + | ||
172 | define_one_arm_cp_reg(cpu, &pmcr); | ||
173 | define_one_arm_cp_reg(cpu, &pmcr64); | ||
174 | for (i = 0; i < pmcrn; i++) { | ||
175 | @@ -XXX,XX +XXX,XX @@ void register_cp_regs_for_features(ARMCPU *cpu) | ||
176 | .fieldoffset = offsetof(CPUARMState, cp15.vmpidr_el2) }, | ||
177 | REGINFO_SENTINEL | ||
178 | }; | ||
179 | + /* | ||
180 | + * The only field of MDCR_EL2 that has a defined architectural reset | ||
181 | + * value is MDCR_EL2.HPMN which should reset to the value of PMCR_EL0.N. | ||
182 | + */ | ||
183 | + ARMCPRegInfo mdcr_el2 = { | ||
184 | + .name = "MDCR_EL2", .state = ARM_CP_STATE_BOTH, | ||
185 | + .opc0 = 3, .opc1 = 4, .crn = 1, .crm = 1, .opc2 = 1, | ||
186 | + .access = PL2_RW, .resetvalue = pmu_num_counters(env), | ||
187 | + .fieldoffset = offsetof(CPUARMState, cp15.mdcr_el2), | ||
188 | + }; | ||
189 | + define_one_arm_cp_reg(cpu, &mdcr_el2); | ||
190 | define_arm_cp_regs(cpu, vpidr_regs); | ||
191 | define_arm_cp_regs(cpu, el2_cp_reginfo); | ||
192 | if (arm_feature(env, ARM_FEATURE_V8)) { | ||
92 | diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c | 193 | diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c |
93 | index XXXXXXX..XXXXXXX 100644 | 194 | index XXXXXXX..XXXXXXX 100644 |
94 | --- a/target/arm/kvm64.c | 195 | --- a/target/arm/kvm64.c |
95 | +++ b/target/arm/kvm64.c | 196 | +++ b/target/arm/kvm64.c |
96 | @@ -XXX,XX +XXX,XX @@ | 197 | @@ -XXX,XX +XXX,XX @@ bool kvm_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf) |
97 | #include "sysemu/kvm.h" | 198 | ARM64_SYS_REG(3, 0, 0, 7, 1)); |
98 | #include "kvm_arm.h" | 199 | err |= read_sys_reg64(fdarray[2], &ahcf->isar.id_aa64mmfr2, |
99 | #include "internals.h" | 200 | ARM64_SYS_REG(3, 0, 0, 7, 2)); |
100 | -#include "hw/arm/arm.h" | 201 | + err |= read_sys_reg64(fdarray[2], &ahcf->isar.reset_pmcr_el0, |
101 | 202 | + ARM64_SYS_REG(3, 3, 9, 12, 0)); | |
102 | static bool have_guest_debug; | 203 | |
103 | 204 | /* | |
205 | * Note that if AArch32 support is not present in the host, | ||
104 | -- | 206 | -- |
105 | 2.20.1 | 207 | 2.20.1 |
106 | 208 | ||
107 | 209 | diff view generated by jsdifflib |
Deleted patch | |||
---|---|---|---|
1 | The header file hw/arm/arm.h now includes only declarations | ||
2 | relating to hw/arm/boot.c functionality. Rename it accordingly, | ||
3 | and adjust its header comment. | ||
4 | 1 | ||
5 | The bulk of this commit was created via | ||
6 | perl -pi -e 's|hw/arm/arm.h|hw/arm/boot.h|' hw/arm/*.c include/hw/arm/*.h | ||
7 | |||
8 | In a few cases we can just delete the #include: | ||
9 | hw/arm/msf2-soc.c, include/hw/arm/aspeed_soc.h and | ||
10 | include/hw/arm/bcm2836.h did not require it. | ||
11 | |||
12 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | ||
13 | Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> | ||
14 | Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> | ||
15 | Message-id: 20190516163857.6430-4-peter.maydell@linaro.org | ||
16 | --- | ||
17 | include/hw/arm/allwinner-a10.h | 2 +- | ||
18 | include/hw/arm/aspeed_soc.h | 1 - | ||
19 | include/hw/arm/bcm2836.h | 1 - | ||
20 | include/hw/arm/{arm.h => boot.h} | 8 ++++---- | ||
21 | include/hw/arm/fsl-imx25.h | 2 +- | ||
22 | include/hw/arm/fsl-imx31.h | 2 +- | ||
23 | include/hw/arm/fsl-imx6.h | 2 +- | ||
24 | include/hw/arm/fsl-imx6ul.h | 2 +- | ||
25 | include/hw/arm/fsl-imx7.h | 2 +- | ||
26 | include/hw/arm/virt.h | 2 +- | ||
27 | include/hw/arm/xlnx-versal.h | 2 +- | ||
28 | include/hw/arm/xlnx-zynqmp.h | 2 +- | ||
29 | hw/arm/armsse.c | 2 +- | ||
30 | hw/arm/armv7m.c | 2 +- | ||
31 | hw/arm/aspeed.c | 2 +- | ||
32 | hw/arm/boot.c | 2 +- | ||
33 | hw/arm/collie.c | 2 +- | ||
34 | hw/arm/exynos4210.c | 2 +- | ||
35 | hw/arm/exynos4_boards.c | 2 +- | ||
36 | hw/arm/highbank.c | 2 +- | ||
37 | hw/arm/integratorcp.c | 2 +- | ||
38 | hw/arm/mainstone.c | 2 +- | ||
39 | hw/arm/microbit.c | 2 +- | ||
40 | hw/arm/mps2-tz.c | 2 +- | ||
41 | hw/arm/mps2.c | 2 +- | ||
42 | hw/arm/msf2-soc.c | 1 - | ||
43 | hw/arm/msf2-som.c | 2 +- | ||
44 | hw/arm/musca.c | 2 +- | ||
45 | hw/arm/musicpal.c | 2 +- | ||
46 | hw/arm/netduino2.c | 2 +- | ||
47 | hw/arm/nrf51_soc.c | 2 +- | ||
48 | hw/arm/nseries.c | 2 +- | ||
49 | hw/arm/omap1.c | 2 +- | ||
50 | hw/arm/omap2.c | 2 +- | ||
51 | hw/arm/omap_sx1.c | 2 +- | ||
52 | hw/arm/palm.c | 2 +- | ||
53 | hw/arm/raspi.c | 2 +- | ||
54 | hw/arm/realview.c | 2 +- | ||
55 | hw/arm/spitz.c | 2 +- | ||
56 | hw/arm/stellaris.c | 2 +- | ||
57 | hw/arm/stm32f205_soc.c | 2 +- | ||
58 | hw/arm/strongarm.c | 2 +- | ||
59 | hw/arm/tosa.c | 2 +- | ||
60 | hw/arm/versatilepb.c | 2 +- | ||
61 | hw/arm/vexpress.c | 2 +- | ||
62 | hw/arm/virt.c | 2 +- | ||
63 | hw/arm/xilinx_zynq.c | 2 +- | ||
64 | hw/arm/xlnx-versal.c | 2 +- | ||
65 | hw/arm/z2.c | 2 +- | ||
66 | 49 files changed, 49 insertions(+), 52 deletions(-) | ||
67 | rename include/hw/arm/{arm.h => boot.h} (98%) | ||
68 | |||
69 | diff --git a/include/hw/arm/allwinner-a10.h b/include/hw/arm/allwinner-a10.h | ||
70 | index XXXXXXX..XXXXXXX 100644 | ||
71 | --- a/include/hw/arm/allwinner-a10.h | ||
72 | +++ b/include/hw/arm/allwinner-a10.h | ||
73 | @@ -XXX,XX +XXX,XX @@ | ||
74 | #include "qemu-common.h" | ||
75 | #include "qemu/error-report.h" | ||
76 | #include "hw/char/serial.h" | ||
77 | -#include "hw/arm/arm.h" | ||
78 | +#include "hw/arm/boot.h" | ||
79 | #include "hw/timer/allwinner-a10-pit.h" | ||
80 | #include "hw/intc/allwinner-a10-pic.h" | ||
81 | #include "hw/net/allwinner_emac.h" | ||
82 | diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h | ||
83 | index XXXXXXX..XXXXXXX 100644 | ||
84 | --- a/include/hw/arm/aspeed_soc.h | ||
85 | +++ b/include/hw/arm/aspeed_soc.h | ||
86 | @@ -XXX,XX +XXX,XX @@ | ||
87 | #ifndef ASPEED_SOC_H | ||
88 | #define ASPEED_SOC_H | ||
89 | |||
90 | -#include "hw/arm/arm.h" | ||
91 | #include "hw/intc/aspeed_vic.h" | ||
92 | #include "hw/misc/aspeed_scu.h" | ||
93 | #include "hw/misc/aspeed_sdmc.h" | ||
94 | diff --git a/include/hw/arm/bcm2836.h b/include/hw/arm/bcm2836.h | ||
95 | index XXXXXXX..XXXXXXX 100644 | ||
96 | --- a/include/hw/arm/bcm2836.h | ||
97 | +++ b/include/hw/arm/bcm2836.h | ||
98 | @@ -XXX,XX +XXX,XX @@ | ||
99 | #ifndef BCM2836_H | ||
100 | #define BCM2836_H | ||
101 | |||
102 | -#include "hw/arm/arm.h" | ||
103 | #include "hw/arm/bcm2835_peripherals.h" | ||
104 | #include "hw/intc/bcm2836_control.h" | ||
105 | |||
106 | diff --git a/include/hw/arm/arm.h b/include/hw/arm/boot.h | ||
107 | similarity index 98% | ||
108 | rename from include/hw/arm/arm.h | ||
109 | rename to include/hw/arm/boot.h | ||
110 | index XXXXXXX..XXXXXXX 100644 | ||
111 | --- a/include/hw/arm/arm.h | ||
112 | +++ b/include/hw/arm/boot.h | ||
113 | @@ -XXX,XX +XXX,XX @@ | ||
114 | /* | ||
115 | - * Misc ARM declarations | ||
116 | + * ARM kernel loader. | ||
117 | * | ||
118 | * Copyright (c) 2006 CodeSourcery. | ||
119 | * Written by Paul Brook | ||
120 | @@ -XXX,XX +XXX,XX @@ | ||
121 | * | ||
122 | */ | ||
123 | |||
124 | -#ifndef HW_ARM_H | ||
125 | -#define HW_ARM_H | ||
126 | +#ifndef HW_ARM_BOOT_H | ||
127 | +#define HW_ARM_BOOT_H | ||
128 | |||
129 | #include "exec/memory.h" | ||
130 | #include "target/arm/cpu-qom.h" | ||
131 | @@ -XXX,XX +XXX,XX @@ void arm_write_secure_board_setup_dummy_smc(ARMCPU *cpu, | ||
132 | const struct arm_boot_info *info, | ||
133 | hwaddr mvbar_addr); | ||
134 | |||
135 | -#endif /* HW_ARM_H */ | ||
136 | +#endif /* HW_ARM_BOOT_H */ | ||
137 | diff --git a/include/hw/arm/fsl-imx25.h b/include/hw/arm/fsl-imx25.h | ||
138 | index XXXXXXX..XXXXXXX 100644 | ||
139 | --- a/include/hw/arm/fsl-imx25.h | ||
140 | +++ b/include/hw/arm/fsl-imx25.h | ||
141 | @@ -XXX,XX +XXX,XX @@ | ||
142 | #ifndef FSL_IMX25_H | ||
143 | #define FSL_IMX25_H | ||
144 | |||
145 | -#include "hw/arm/arm.h" | ||
146 | +#include "hw/arm/boot.h" | ||
147 | #include "hw/intc/imx_avic.h" | ||
148 | #include "hw/misc/imx25_ccm.h" | ||
149 | #include "hw/char/imx_serial.h" | ||
150 | diff --git a/include/hw/arm/fsl-imx31.h b/include/hw/arm/fsl-imx31.h | ||
151 | index XXXXXXX..XXXXXXX 100644 | ||
152 | --- a/include/hw/arm/fsl-imx31.h | ||
153 | +++ b/include/hw/arm/fsl-imx31.h | ||
154 | @@ -XXX,XX +XXX,XX @@ | ||
155 | #ifndef FSL_IMX31_H | ||
156 | #define FSL_IMX31_H | ||
157 | |||
158 | -#include "hw/arm/arm.h" | ||
159 | +#include "hw/arm/boot.h" | ||
160 | #include "hw/intc/imx_avic.h" | ||
161 | #include "hw/misc/imx31_ccm.h" | ||
162 | #include "hw/char/imx_serial.h" | ||
163 | diff --git a/include/hw/arm/fsl-imx6.h b/include/hw/arm/fsl-imx6.h | ||
164 | index XXXXXXX..XXXXXXX 100644 | ||
165 | --- a/include/hw/arm/fsl-imx6.h | ||
166 | +++ b/include/hw/arm/fsl-imx6.h | ||
167 | @@ -XXX,XX +XXX,XX @@ | ||
168 | #ifndef FSL_IMX6_H | ||
169 | #define FSL_IMX6_H | ||
170 | |||
171 | -#include "hw/arm/arm.h" | ||
172 | +#include "hw/arm/boot.h" | ||
173 | #include "hw/cpu/a9mpcore.h" | ||
174 | #include "hw/misc/imx6_ccm.h" | ||
175 | #include "hw/misc/imx6_src.h" | ||
176 | diff --git a/include/hw/arm/fsl-imx6ul.h b/include/hw/arm/fsl-imx6ul.h | ||
177 | index XXXXXXX..XXXXXXX 100644 | ||
178 | --- a/include/hw/arm/fsl-imx6ul.h | ||
179 | +++ b/include/hw/arm/fsl-imx6ul.h | ||
180 | @@ -XXX,XX +XXX,XX @@ | ||
181 | #ifndef FSL_IMX6UL_H | ||
182 | #define FSL_IMX6UL_H | ||
183 | |||
184 | -#include "hw/arm/arm.h" | ||
185 | +#include "hw/arm/boot.h" | ||
186 | #include "hw/cpu/a15mpcore.h" | ||
187 | #include "hw/misc/imx6ul_ccm.h" | ||
188 | #include "hw/misc/imx6_src.h" | ||
189 | diff --git a/include/hw/arm/fsl-imx7.h b/include/hw/arm/fsl-imx7.h | ||
190 | index XXXXXXX..XXXXXXX 100644 | ||
191 | --- a/include/hw/arm/fsl-imx7.h | ||
192 | +++ b/include/hw/arm/fsl-imx7.h | ||
193 | @@ -XXX,XX +XXX,XX @@ | ||
194 | #ifndef FSL_IMX7_H | ||
195 | #define FSL_IMX7_H | ||
196 | |||
197 | -#include "hw/arm/arm.h" | ||
198 | +#include "hw/arm/boot.h" | ||
199 | #include "hw/cpu/a15mpcore.h" | ||
200 | #include "hw/intc/imx_gpcv2.h" | ||
201 | #include "hw/misc/imx7_ccm.h" | ||
202 | diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h | ||
203 | index XXXXXXX..XXXXXXX 100644 | ||
204 | --- a/include/hw/arm/virt.h | ||
205 | +++ b/include/hw/arm/virt.h | ||
206 | @@ -XXX,XX +XXX,XX @@ | ||
207 | #include "exec/hwaddr.h" | ||
208 | #include "qemu/notify.h" | ||
209 | #include "hw/boards.h" | ||
210 | -#include "hw/arm/arm.h" | ||
211 | +#include "hw/arm/boot.h" | ||
212 | #include "hw/block/flash.h" | ||
213 | #include "sysemu/kvm.h" | ||
214 | #include "hw/intc/arm_gicv3_common.h" | ||
215 | diff --git a/include/hw/arm/xlnx-versal.h b/include/hw/arm/xlnx-versal.h | ||
216 | index XXXXXXX..XXXXXXX 100644 | ||
217 | --- a/include/hw/arm/xlnx-versal.h | ||
218 | +++ b/include/hw/arm/xlnx-versal.h | ||
219 | @@ -XXX,XX +XXX,XX @@ | ||
220 | #define XLNX_VERSAL_H | ||
221 | |||
222 | #include "hw/sysbus.h" | ||
223 | -#include "hw/arm/arm.h" | ||
224 | +#include "hw/arm/boot.h" | ||
225 | #include "hw/intc/arm_gicv3.h" | ||
226 | |||
227 | #define TYPE_XLNX_VERSAL "xlnx-versal" | ||
228 | diff --git a/include/hw/arm/xlnx-zynqmp.h b/include/hw/arm/xlnx-zynqmp.h | ||
229 | index XXXXXXX..XXXXXXX 100644 | ||
230 | --- a/include/hw/arm/xlnx-zynqmp.h | ||
231 | +++ b/include/hw/arm/xlnx-zynqmp.h | ||
232 | @@ -XXX,XX +XXX,XX @@ | ||
233 | #ifndef XLNX_ZYNQMP_H | ||
234 | |||
235 | #include "qemu-common.h" | ||
236 | -#include "hw/arm/arm.h" | ||
237 | +#include "hw/arm/boot.h" | ||
238 | #include "hw/intc/arm_gic.h" | ||
239 | #include "hw/net/cadence_gem.h" | ||
240 | #include "hw/char/cadence_uart.h" | ||
241 | diff --git a/hw/arm/armsse.c b/hw/arm/armsse.c | ||
242 | index XXXXXXX..XXXXXXX 100644 | ||
243 | --- a/hw/arm/armsse.c | ||
244 | +++ b/hw/arm/armsse.c | ||
245 | @@ -XXX,XX +XXX,XX @@ | ||
246 | #include "hw/sysbus.h" | ||
247 | #include "hw/registerfields.h" | ||
248 | #include "hw/arm/armsse.h" | ||
249 | -#include "hw/arm/arm.h" | ||
250 | +#include "hw/arm/boot.h" | ||
251 | |||
252 | /* Format of the System Information block SYS_CONFIG register */ | ||
253 | typedef enum SysConfigFormat { | ||
254 | diff --git a/hw/arm/armv7m.c b/hw/arm/armv7m.c | ||
255 | index XXXXXXX..XXXXXXX 100644 | ||
256 | --- a/hw/arm/armv7m.c | ||
257 | +++ b/hw/arm/armv7m.c | ||
258 | @@ -XXX,XX +XXX,XX @@ | ||
259 | #include "qemu-common.h" | ||
260 | #include "cpu.h" | ||
261 | #include "hw/sysbus.h" | ||
262 | -#include "hw/arm/arm.h" | ||
263 | +#include "hw/arm/boot.h" | ||
264 | #include "hw/loader.h" | ||
265 | #include "elf.h" | ||
266 | #include "sysemu/qtest.h" | ||
267 | diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c | ||
268 | index XXXXXXX..XXXXXXX 100644 | ||
269 | --- a/hw/arm/aspeed.c | ||
270 | +++ b/hw/arm/aspeed.c | ||
271 | @@ -XXX,XX +XXX,XX @@ | ||
272 | #include "qemu-common.h" | ||
273 | #include "cpu.h" | ||
274 | #include "exec/address-spaces.h" | ||
275 | -#include "hw/arm/arm.h" | ||
276 | +#include "hw/arm/boot.h" | ||
277 | #include "hw/arm/aspeed.h" | ||
278 | #include "hw/arm/aspeed_soc.h" | ||
279 | #include "hw/boards.h" | ||
280 | diff --git a/hw/arm/boot.c b/hw/arm/boot.c | ||
281 | index XXXXXXX..XXXXXXX 100644 | ||
282 | --- a/hw/arm/boot.c | ||
283 | +++ b/hw/arm/boot.c | ||
284 | @@ -XXX,XX +XXX,XX @@ | ||
285 | #include "qapi/error.h" | ||
286 | #include <libfdt.h> | ||
287 | #include "hw/hw.h" | ||
288 | -#include "hw/arm/arm.h" | ||
289 | +#include "hw/arm/boot.h" | ||
290 | #include "hw/arm/linux-boot-if.h" | ||
291 | #include "sysemu/kvm.h" | ||
292 | #include "sysemu/sysemu.h" | ||
293 | diff --git a/hw/arm/collie.c b/hw/arm/collie.c | ||
294 | index XXXXXXX..XXXXXXX 100644 | ||
295 | --- a/hw/arm/collie.c | ||
296 | +++ b/hw/arm/collie.c | ||
297 | @@ -XXX,XX +XXX,XX @@ | ||
298 | #include "hw/sysbus.h" | ||
299 | #include "hw/boards.h" | ||
300 | #include "strongarm.h" | ||
301 | -#include "hw/arm/arm.h" | ||
302 | +#include "hw/arm/boot.h" | ||
303 | #include "hw/block/flash.h" | ||
304 | #include "exec/address-spaces.h" | ||
305 | #include "cpu.h" | ||
306 | diff --git a/hw/arm/exynos4210.c b/hw/arm/exynos4210.c | ||
307 | index XXXXXXX..XXXXXXX 100644 | ||
308 | --- a/hw/arm/exynos4210.c | ||
309 | +++ b/hw/arm/exynos4210.c | ||
310 | @@ -XXX,XX +XXX,XX @@ | ||
311 | #include "hw/boards.h" | ||
312 | #include "sysemu/sysemu.h" | ||
313 | #include "hw/sysbus.h" | ||
314 | -#include "hw/arm/arm.h" | ||
315 | +#include "hw/arm/boot.h" | ||
316 | #include "hw/loader.h" | ||
317 | #include "hw/arm/exynos4210.h" | ||
318 | #include "hw/sd/sdhci.h" | ||
319 | diff --git a/hw/arm/exynos4_boards.c b/hw/arm/exynos4_boards.c | ||
320 | index XXXXXXX..XXXXXXX 100644 | ||
321 | --- a/hw/arm/exynos4_boards.c | ||
322 | +++ b/hw/arm/exynos4_boards.c | ||
323 | @@ -XXX,XX +XXX,XX @@ | ||
324 | #include "sysemu/sysemu.h" | ||
325 | #include "hw/sysbus.h" | ||
326 | #include "net/net.h" | ||
327 | -#include "hw/arm/arm.h" | ||
328 | +#include "hw/arm/boot.h" | ||
329 | #include "exec/address-spaces.h" | ||
330 | #include "hw/arm/exynos4210.h" | ||
331 | #include "hw/net/lan9118.h" | ||
332 | diff --git a/hw/arm/highbank.c b/hw/arm/highbank.c | ||
333 | index XXXXXXX..XXXXXXX 100644 | ||
334 | --- a/hw/arm/highbank.c | ||
335 | +++ b/hw/arm/highbank.c | ||
336 | @@ -XXX,XX +XXX,XX @@ | ||
337 | #include "qemu/osdep.h" | ||
338 | #include "qapi/error.h" | ||
339 | #include "hw/sysbus.h" | ||
340 | -#include "hw/arm/arm.h" | ||
341 | +#include "hw/arm/boot.h" | ||
342 | #include "hw/loader.h" | ||
343 | #include "net/net.h" | ||
344 | #include "sysemu/kvm.h" | ||
345 | diff --git a/hw/arm/integratorcp.c b/hw/arm/integratorcp.c | ||
346 | index XXXXXXX..XXXXXXX 100644 | ||
347 | --- a/hw/arm/integratorcp.c | ||
348 | +++ b/hw/arm/integratorcp.c | ||
349 | @@ -XXX,XX +XXX,XX @@ | ||
350 | #include "cpu.h" | ||
351 | #include "hw/sysbus.h" | ||
352 | #include "hw/boards.h" | ||
353 | -#include "hw/arm/arm.h" | ||
354 | +#include "hw/arm/boot.h" | ||
355 | #include "hw/misc/arm_integrator_debug.h" | ||
356 | #include "hw/net/smc91c111.h" | ||
357 | #include "net/net.h" | ||
358 | diff --git a/hw/arm/mainstone.c b/hw/arm/mainstone.c | ||
359 | index XXXXXXX..XXXXXXX 100644 | ||
360 | --- a/hw/arm/mainstone.c | ||
361 | +++ b/hw/arm/mainstone.c | ||
362 | @@ -XXX,XX +XXX,XX @@ | ||
363 | #include "qapi/error.h" | ||
364 | #include "hw/hw.h" | ||
365 | #include "hw/arm/pxa.h" | ||
366 | -#include "hw/arm/arm.h" | ||
367 | +#include "hw/arm/boot.h" | ||
368 | #include "net/net.h" | ||
369 | #include "hw/net/smc91c111.h" | ||
370 | #include "hw/boards.h" | ||
371 | diff --git a/hw/arm/microbit.c b/hw/arm/microbit.c | ||
372 | index XXXXXXX..XXXXXXX 100644 | ||
373 | --- a/hw/arm/microbit.c | ||
374 | +++ b/hw/arm/microbit.c | ||
375 | @@ -XXX,XX +XXX,XX @@ | ||
376 | #include "qemu/osdep.h" | ||
377 | #include "qapi/error.h" | ||
378 | #include "hw/boards.h" | ||
379 | -#include "hw/arm/arm.h" | ||
380 | +#include "hw/arm/boot.h" | ||
381 | #include "sysemu/sysemu.h" | ||
382 | #include "exec/address-spaces.h" | ||
383 | |||
384 | diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c | ||
385 | index XXXXXXX..XXXXXXX 100644 | ||
386 | --- a/hw/arm/mps2-tz.c | ||
387 | +++ b/hw/arm/mps2-tz.c | ||
388 | @@ -XXX,XX +XXX,XX @@ | ||
389 | #include "qemu/osdep.h" | ||
390 | #include "qapi/error.h" | ||
391 | #include "qemu/error-report.h" | ||
392 | -#include "hw/arm/arm.h" | ||
393 | +#include "hw/arm/boot.h" | ||
394 | #include "hw/arm/armv7m.h" | ||
395 | #include "hw/or-irq.h" | ||
396 | #include "hw/boards.h" | ||
397 | diff --git a/hw/arm/mps2.c b/hw/arm/mps2.c | ||
398 | index XXXXXXX..XXXXXXX 100644 | ||
399 | --- a/hw/arm/mps2.c | ||
400 | +++ b/hw/arm/mps2.c | ||
401 | @@ -XXX,XX +XXX,XX @@ | ||
402 | #include "qemu/osdep.h" | ||
403 | #include "qapi/error.h" | ||
404 | #include "qemu/error-report.h" | ||
405 | -#include "hw/arm/arm.h" | ||
406 | +#include "hw/arm/boot.h" | ||
407 | #include "hw/arm/armv7m.h" | ||
408 | #include "hw/or-irq.h" | ||
409 | #include "hw/boards.h" | ||
410 | diff --git a/hw/arm/msf2-soc.c b/hw/arm/msf2-soc.c | ||
411 | index XXXXXXX..XXXXXXX 100644 | ||
412 | --- a/hw/arm/msf2-soc.c | ||
413 | +++ b/hw/arm/msf2-soc.c | ||
414 | @@ -XXX,XX +XXX,XX @@ | ||
415 | #include "qemu/units.h" | ||
416 | #include "qapi/error.h" | ||
417 | #include "qemu-common.h" | ||
418 | -#include "hw/arm/arm.h" | ||
419 | #include "exec/address-spaces.h" | ||
420 | #include "hw/char/serial.h" | ||
421 | #include "hw/boards.h" | ||
422 | diff --git a/hw/arm/msf2-som.c b/hw/arm/msf2-som.c | ||
423 | index XXXXXXX..XXXXXXX 100644 | ||
424 | --- a/hw/arm/msf2-som.c | ||
425 | +++ b/hw/arm/msf2-som.c | ||
426 | @@ -XXX,XX +XXX,XX @@ | ||
427 | #include "qapi/error.h" | ||
428 | #include "qemu/error-report.h" | ||
429 | #include "hw/boards.h" | ||
430 | -#include "hw/arm/arm.h" | ||
431 | +#include "hw/arm/boot.h" | ||
432 | #include "exec/address-spaces.h" | ||
433 | #include "hw/arm/msf2-soc.h" | ||
434 | #include "cpu.h" | ||
435 | diff --git a/hw/arm/musca.c b/hw/arm/musca.c | ||
436 | index XXXXXXX..XXXXXXX 100644 | ||
437 | --- a/hw/arm/musca.c | ||
438 | +++ b/hw/arm/musca.c | ||
439 | @@ -XXX,XX +XXX,XX @@ | ||
440 | #include "qapi/error.h" | ||
441 | #include "exec/address-spaces.h" | ||
442 | #include "sysemu/sysemu.h" | ||
443 | -#include "hw/arm/arm.h" | ||
444 | +#include "hw/arm/boot.h" | ||
445 | #include "hw/arm/armsse.h" | ||
446 | #include "hw/boards.h" | ||
447 | #include "hw/char/pl011.h" | ||
448 | diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c | ||
449 | index XXXXXXX..XXXXXXX 100644 | ||
450 | --- a/hw/arm/musicpal.c | ||
451 | +++ b/hw/arm/musicpal.c | ||
452 | @@ -XXX,XX +XXX,XX @@ | ||
453 | #include "qemu-common.h" | ||
454 | #include "cpu.h" | ||
455 | #include "hw/sysbus.h" | ||
456 | -#include "hw/arm/arm.h" | ||
457 | +#include "hw/arm/boot.h" | ||
458 | #include "net/net.h" | ||
459 | #include "sysemu/sysemu.h" | ||
460 | #include "hw/boards.h" | ||
461 | diff --git a/hw/arm/netduino2.c b/hw/arm/netduino2.c | ||
462 | index XXXXXXX..XXXXXXX 100644 | ||
463 | --- a/hw/arm/netduino2.c | ||
464 | +++ b/hw/arm/netduino2.c | ||
465 | @@ -XXX,XX +XXX,XX @@ | ||
466 | #include "hw/boards.h" | ||
467 | #include "qemu/error-report.h" | ||
468 | #include "hw/arm/stm32f205_soc.h" | ||
469 | -#include "hw/arm/arm.h" | ||
470 | +#include "hw/arm/boot.h" | ||
471 | |||
472 | static void netduino2_init(MachineState *machine) | ||
473 | { | ||
474 | diff --git a/hw/arm/nrf51_soc.c b/hw/arm/nrf51_soc.c | ||
475 | index XXXXXXX..XXXXXXX 100644 | ||
476 | --- a/hw/arm/nrf51_soc.c | ||
477 | +++ b/hw/arm/nrf51_soc.c | ||
478 | @@ -XXX,XX +XXX,XX @@ | ||
479 | #include "qemu/osdep.h" | ||
480 | #include "qapi/error.h" | ||
481 | #include "qemu-common.h" | ||
482 | -#include "hw/arm/arm.h" | ||
483 | +#include "hw/arm/boot.h" | ||
484 | #include "hw/sysbus.h" | ||
485 | #include "hw/boards.h" | ||
486 | #include "hw/misc/unimp.h" | ||
487 | diff --git a/hw/arm/nseries.c b/hw/arm/nseries.c | ||
488 | index XXXXXXX..XXXXXXX 100644 | ||
489 | --- a/hw/arm/nseries.c | ||
490 | +++ b/hw/arm/nseries.c | ||
491 | @@ -XXX,XX +XXX,XX @@ | ||
492 | #include "qemu/bswap.h" | ||
493 | #include "sysemu/sysemu.h" | ||
494 | #include "hw/arm/omap.h" | ||
495 | -#include "hw/arm/arm.h" | ||
496 | +#include "hw/arm/boot.h" | ||
497 | #include "hw/irq.h" | ||
498 | #include "ui/console.h" | ||
499 | #include "hw/boards.h" | ||
500 | diff --git a/hw/arm/omap1.c b/hw/arm/omap1.c | ||
501 | index XXXXXXX..XXXXXXX 100644 | ||
502 | --- a/hw/arm/omap1.c | ||
503 | +++ b/hw/arm/omap1.c | ||
504 | @@ -XXX,XX +XXX,XX @@ | ||
505 | #include "cpu.h" | ||
506 | #include "hw/boards.h" | ||
507 | #include "hw/hw.h" | ||
508 | -#include "hw/arm/arm.h" | ||
509 | +#include "hw/arm/boot.h" | ||
510 | #include "hw/arm/omap.h" | ||
511 | #include "sysemu/sysemu.h" | ||
512 | #include "hw/arm/soc_dma.h" | ||
513 | diff --git a/hw/arm/omap2.c b/hw/arm/omap2.c | ||
514 | index XXXXXXX..XXXXXXX 100644 | ||
515 | --- a/hw/arm/omap2.c | ||
516 | +++ b/hw/arm/omap2.c | ||
517 | @@ -XXX,XX +XXX,XX @@ | ||
518 | #include "sysemu/qtest.h" | ||
519 | #include "hw/boards.h" | ||
520 | #include "hw/hw.h" | ||
521 | -#include "hw/arm/arm.h" | ||
522 | +#include "hw/arm/boot.h" | ||
523 | #include "hw/arm/omap.h" | ||
524 | #include "sysemu/sysemu.h" | ||
525 | #include "qemu/timer.h" | ||
526 | diff --git a/hw/arm/omap_sx1.c b/hw/arm/omap_sx1.c | ||
527 | index XXXXXXX..XXXXXXX 100644 | ||
528 | --- a/hw/arm/omap_sx1.c | ||
529 | +++ b/hw/arm/omap_sx1.c | ||
530 | @@ -XXX,XX +XXX,XX @@ | ||
531 | #include "ui/console.h" | ||
532 | #include "hw/arm/omap.h" | ||
533 | #include "hw/boards.h" | ||
534 | -#include "hw/arm/arm.h" | ||
535 | +#include "hw/arm/boot.h" | ||
536 | #include "hw/block/flash.h" | ||
537 | #include "sysemu/qtest.h" | ||
538 | #include "exec/address-spaces.h" | ||
539 | diff --git a/hw/arm/palm.c b/hw/arm/palm.c | ||
540 | index XXXXXXX..XXXXXXX 100644 | ||
541 | --- a/hw/arm/palm.c | ||
542 | +++ b/hw/arm/palm.c | ||
543 | @@ -XXX,XX +XXX,XX @@ | ||
544 | #include "ui/console.h" | ||
545 | #include "hw/arm/omap.h" | ||
546 | #include "hw/boards.h" | ||
547 | -#include "hw/arm/arm.h" | ||
548 | +#include "hw/arm/boot.h" | ||
549 | #include "hw/input/tsc2xxx.h" | ||
550 | #include "hw/loader.h" | ||
551 | #include "exec/address-spaces.h" | ||
552 | diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c | ||
553 | index XXXXXXX..XXXXXXX 100644 | ||
554 | --- a/hw/arm/raspi.c | ||
555 | +++ b/hw/arm/raspi.c | ||
556 | @@ -XXX,XX +XXX,XX @@ | ||
557 | #include "qemu/error-report.h" | ||
558 | #include "hw/boards.h" | ||
559 | #include "hw/loader.h" | ||
560 | -#include "hw/arm/arm.h" | ||
561 | +#include "hw/arm/boot.h" | ||
562 | #include "sysemu/sysemu.h" | ||
563 | |||
564 | #define SMPBOOT_ADDR 0x300 /* this should leave enough space for ATAGS */ | ||
565 | diff --git a/hw/arm/realview.c b/hw/arm/realview.c | ||
566 | index XXXXXXX..XXXXXXX 100644 | ||
567 | --- a/hw/arm/realview.c | ||
568 | +++ b/hw/arm/realview.c | ||
569 | @@ -XXX,XX +XXX,XX @@ | ||
570 | #include "qemu-common.h" | ||
571 | #include "cpu.h" | ||
572 | #include "hw/sysbus.h" | ||
573 | -#include "hw/arm/arm.h" | ||
574 | +#include "hw/arm/boot.h" | ||
575 | #include "hw/arm/primecell.h" | ||
576 | #include "hw/net/lan9118.h" | ||
577 | #include "hw/net/smc91c111.h" | ||
578 | diff --git a/hw/arm/spitz.c b/hw/arm/spitz.c | ||
579 | index XXXXXXX..XXXXXXX 100644 | ||
580 | --- a/hw/arm/spitz.c | ||
581 | +++ b/hw/arm/spitz.c | ||
582 | @@ -XXX,XX +XXX,XX @@ | ||
583 | #include "qapi/error.h" | ||
584 | #include "hw/hw.h" | ||
585 | #include "hw/arm/pxa.h" | ||
586 | -#include "hw/arm/arm.h" | ||
587 | +#include "hw/arm/boot.h" | ||
588 | #include "sysemu/sysemu.h" | ||
589 | #include "hw/pcmcia.h" | ||
590 | #include "hw/i2c/i2c.h" | ||
591 | diff --git a/hw/arm/stellaris.c b/hw/arm/stellaris.c | ||
592 | index XXXXXXX..XXXXXXX 100644 | ||
593 | --- a/hw/arm/stellaris.c | ||
594 | +++ b/hw/arm/stellaris.c | ||
595 | @@ -XXX,XX +XXX,XX @@ | ||
596 | #include "qapi/error.h" | ||
597 | #include "hw/sysbus.h" | ||
598 | #include "hw/ssi/ssi.h" | ||
599 | -#include "hw/arm/arm.h" | ||
600 | +#include "hw/arm/boot.h" | ||
601 | #include "qemu/timer.h" | ||
602 | #include "hw/i2c/i2c.h" | ||
603 | #include "net/net.h" | ||
604 | diff --git a/hw/arm/stm32f205_soc.c b/hw/arm/stm32f205_soc.c | ||
605 | index XXXXXXX..XXXXXXX 100644 | ||
606 | --- a/hw/arm/stm32f205_soc.c | ||
607 | +++ b/hw/arm/stm32f205_soc.c | ||
608 | @@ -XXX,XX +XXX,XX @@ | ||
609 | #include "qemu/osdep.h" | ||
610 | #include "qapi/error.h" | ||
611 | #include "qemu-common.h" | ||
612 | -#include "hw/arm/arm.h" | ||
613 | +#include "hw/arm/boot.h" | ||
614 | #include "exec/address-spaces.h" | ||
615 | #include "hw/arm/stm32f205_soc.h" | ||
616 | |||
617 | diff --git a/hw/arm/strongarm.c b/hw/arm/strongarm.c | ||
618 | index XXXXXXX..XXXXXXX 100644 | ||
619 | --- a/hw/arm/strongarm.c | ||
620 | +++ b/hw/arm/strongarm.c | ||
621 | @@ -XXX,XX +XXX,XX @@ | ||
622 | #include "hw/sysbus.h" | ||
623 | #include "strongarm.h" | ||
624 | #include "qemu/error-report.h" | ||
625 | -#include "hw/arm/arm.h" | ||
626 | +#include "hw/arm/boot.h" | ||
627 | #include "chardev/char-fe.h" | ||
628 | #include "chardev/char-serial.h" | ||
629 | #include "sysemu/sysemu.h" | ||
630 | diff --git a/hw/arm/tosa.c b/hw/arm/tosa.c | ||
631 | index XXXXXXX..XXXXXXX 100644 | ||
632 | --- a/hw/arm/tosa.c | ||
633 | +++ b/hw/arm/tosa.c | ||
634 | @@ -XXX,XX +XXX,XX @@ | ||
635 | #include "qapi/error.h" | ||
636 | #include "hw/hw.h" | ||
637 | #include "hw/arm/pxa.h" | ||
638 | -#include "hw/arm/arm.h" | ||
639 | +#include "hw/arm/boot.h" | ||
640 | #include "hw/arm/sharpsl.h" | ||
641 | #include "hw/pcmcia.h" | ||
642 | #include "hw/boards.h" | ||
643 | diff --git a/hw/arm/versatilepb.c b/hw/arm/versatilepb.c | ||
644 | index XXXXXXX..XXXXXXX 100644 | ||
645 | --- a/hw/arm/versatilepb.c | ||
646 | +++ b/hw/arm/versatilepb.c | ||
647 | @@ -XXX,XX +XXX,XX @@ | ||
648 | #include "qemu-common.h" | ||
649 | #include "cpu.h" | ||
650 | #include "hw/sysbus.h" | ||
651 | -#include "hw/arm/arm.h" | ||
652 | +#include "hw/arm/boot.h" | ||
653 | #include "hw/net/smc91c111.h" | ||
654 | #include "net/net.h" | ||
655 | #include "sysemu/sysemu.h" | ||
656 | diff --git a/hw/arm/vexpress.c b/hw/arm/vexpress.c | ||
657 | index XXXXXXX..XXXXXXX 100644 | ||
658 | --- a/hw/arm/vexpress.c | ||
659 | +++ b/hw/arm/vexpress.c | ||
660 | @@ -XXX,XX +XXX,XX @@ | ||
661 | #include "qemu-common.h" | ||
662 | #include "cpu.h" | ||
663 | #include "hw/sysbus.h" | ||
664 | -#include "hw/arm/arm.h" | ||
665 | +#include "hw/arm/boot.h" | ||
666 | #include "hw/arm/primecell.h" | ||
667 | #include "hw/net/lan9118.h" | ||
668 | #include "hw/i2c/i2c.h" | ||
669 | diff --git a/hw/arm/virt.c b/hw/arm/virt.c | ||
670 | index XXXXXXX..XXXXXXX 100644 | ||
671 | --- a/hw/arm/virt.c | ||
672 | +++ b/hw/arm/virt.c | ||
673 | @@ -XXX,XX +XXX,XX @@ | ||
674 | #include "qemu/option.h" | ||
675 | #include "qapi/error.h" | ||
676 | #include "hw/sysbus.h" | ||
677 | -#include "hw/arm/arm.h" | ||
678 | +#include "hw/arm/boot.h" | ||
679 | #include "hw/arm/primecell.h" | ||
680 | #include "hw/arm/virt.h" | ||
681 | #include "hw/block/flash.h" | ||
682 | diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c | ||
683 | index XXXXXXX..XXXXXXX 100644 | ||
684 | --- a/hw/arm/xilinx_zynq.c | ||
685 | +++ b/hw/arm/xilinx_zynq.c | ||
686 | @@ -XXX,XX +XXX,XX @@ | ||
687 | #include "qemu-common.h" | ||
688 | #include "cpu.h" | ||
689 | #include "hw/sysbus.h" | ||
690 | -#include "hw/arm/arm.h" | ||
691 | +#include "hw/arm/boot.h" | ||
692 | #include "net/net.h" | ||
693 | #include "exec/address-spaces.h" | ||
694 | #include "sysemu/sysemu.h" | ||
695 | diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c | ||
696 | index XXXXXXX..XXXXXXX 100644 | ||
697 | --- a/hw/arm/xlnx-versal.c | ||
698 | +++ b/hw/arm/xlnx-versal.c | ||
699 | @@ -XXX,XX +XXX,XX @@ | ||
700 | #include "net/net.h" | ||
701 | #include "sysemu/sysemu.h" | ||
702 | #include "sysemu/kvm.h" | ||
703 | -#include "hw/arm/arm.h" | ||
704 | +#include "hw/arm/boot.h" | ||
705 | #include "kvm_arm.h" | ||
706 | #include "hw/misc/unimp.h" | ||
707 | #include "hw/intc/arm_gicv3_common.h" | ||
708 | diff --git a/hw/arm/z2.c b/hw/arm/z2.c | ||
709 | index XXXXXXX..XXXXXXX 100644 | ||
710 | --- a/hw/arm/z2.c | ||
711 | +++ b/hw/arm/z2.c | ||
712 | @@ -XXX,XX +XXX,XX @@ | ||
713 | #include "qemu/osdep.h" | ||
714 | #include "hw/hw.h" | ||
715 | #include "hw/arm/pxa.h" | ||
716 | -#include "hw/arm/arm.h" | ||
717 | +#include "hw/arm/boot.h" | ||
718 | #include "hw/i2c/i2c.h" | ||
719 | #include "hw/ssi/ssi.h" | ||
720 | #include "hw/boards.h" | ||
721 | -- | ||
722 | 2.20.1 | ||
723 | |||
724 | diff view generated by jsdifflib |
Deleted patch | |||
---|---|---|---|
1 | In ich_vmcr_write() we enforce "writes of BPR fields to less than | ||
2 | their minimum sets them to the minimum" by doing a "read vbpr and | ||
3 | write it back" operation. A typo here meant that we weren't handling | ||
4 | writes to these fields correctly, because we were reading from VBPR0 | ||
5 | but writing to VBPR1. | ||
6 | 1 | ||
7 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | ||
8 | Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> | ||
9 | Message-id: 20190520162809.2677-4-peter.maydell@linaro.org | ||
10 | --- | ||
11 | hw/intc/arm_gicv3_cpuif.c | 2 +- | ||
12 | 1 file changed, 1 insertion(+), 1 deletion(-) | ||
13 | |||
14 | diff --git a/hw/intc/arm_gicv3_cpuif.c b/hw/intc/arm_gicv3_cpuif.c | ||
15 | index XXXXXXX..XXXXXXX 100644 | ||
16 | --- a/hw/intc/arm_gicv3_cpuif.c | ||
17 | +++ b/hw/intc/arm_gicv3_cpuif.c | ||
18 | @@ -XXX,XX +XXX,XX @@ static void ich_vmcr_write(CPUARMState *env, const ARMCPRegInfo *ri, | ||
19 | /* Enforce "writing BPRs to less than minimum sets them to the minimum" | ||
20 | * by reading and writing back the fields. | ||
21 | */ | ||
22 | - write_vbpr(cs, GICV3_G1, read_vbpr(cs, GICV3_G0)); | ||
23 | + write_vbpr(cs, GICV3_G0, read_vbpr(cs, GICV3_G0)); | ||
24 | write_vbpr(cs, GICV3_G1, read_vbpr(cs, GICV3_G1)); | ||
25 | |||
26 | gicv3_cpuif_virt_update(cs); | ||
27 | -- | ||
28 | 2.20.1 | ||
29 | |||
30 | diff view generated by jsdifflib |
1 | The ICC_CTLR_EL3 register includes some bits which are aliases | 1 | In commit 81b3ddaf8772ec we fixed a use of uninitialized data |
---|---|---|---|
2 | of bits in the ICC_CTLR_EL1(S) and (NS) registers. QEMU chooses | 2 | in read_tcnt(). However this change wasn't enough to placate |
3 | to keep those bits in the cs->icc_ctlr_el1[] struct fields. | 3 | Coverity, which is not smart enough to see that if we read a |
4 | Unfortunately a missing '~' in the code to update the bits | 4 | 2 bit field and then handle cases 0, 1, 2 and 3 then there cannot |
5 | in those fields meant that writing to ICC_CTLR_EL3 would corrupt | 5 | be a flow of execution through the switch default. Add explicit |
6 | the ICC_CLTR_EL1 register values. | 6 | default cases which assert that they can't be reached, which |
7 | should help silence Coverity. | ||
7 | 8 | ||
8 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | 9 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
9 | Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> | 10 | Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> |
10 | Message-id: 20190520162809.2677-5-peter.maydell@linaro.org | 11 | Message-id: 20210319162458.13760-1-peter.maydell@linaro.org |
11 | --- | 12 | --- |
12 | hw/intc/arm_gicv3_cpuif.c | 4 ++-- | 13 | hw/timer/renesas_tmr.c | 4 ++++ |
13 | 1 file changed, 2 insertions(+), 2 deletions(-) | 14 | 1 file changed, 4 insertions(+) |
14 | 15 | ||
15 | diff --git a/hw/intc/arm_gicv3_cpuif.c b/hw/intc/arm_gicv3_cpuif.c | 16 | diff --git a/hw/timer/renesas_tmr.c b/hw/timer/renesas_tmr.c |
16 | index XXXXXXX..XXXXXXX 100644 | 17 | index XXXXXXX..XXXXXXX 100644 |
17 | --- a/hw/intc/arm_gicv3_cpuif.c | 18 | --- a/hw/timer/renesas_tmr.c |
18 | +++ b/hw/intc/arm_gicv3_cpuif.c | 19 | +++ b/hw/timer/renesas_tmr.c |
19 | @@ -XXX,XX +XXX,XX @@ static void icc_ctlr_el3_write(CPUARMState *env, const ARMCPRegInfo *ri, | 20 | @@ -XXX,XX +XXX,XX @@ static uint16_t read_tcnt(RTMRState *tmr, unsigned size, int ch) |
20 | trace_gicv3_icc_ctlr_el3_write(gicv3_redist_affid(cs), value); | 21 | case CSS_CASCADING: |
21 | 22 | tcnt[1] = tmr->tcnt[1]; | |
22 | /* *_EL1NS and *_EL1S bits are aliases into the ICC_CTLR_EL1 bits. */ | 23 | break; |
23 | - cs->icc_ctlr_el1[GICV3_NS] &= (ICC_CTLR_EL1_CBPR | ICC_CTLR_EL1_EOIMODE); | 24 | + default: |
24 | + cs->icc_ctlr_el1[GICV3_NS] &= ~(ICC_CTLR_EL1_CBPR | ICC_CTLR_EL1_EOIMODE); | 25 | + g_assert_not_reached(); |
25 | if (value & ICC_CTLR_EL3_EOIMODE_EL1NS) { | 26 | } |
26 | cs->icc_ctlr_el1[GICV3_NS] |= ICC_CTLR_EL1_EOIMODE; | 27 | switch (FIELD_EX8(tmr->tccr[0], TCCR, CSS)) { |
27 | } | 28 | case CSS_INTERNAL: |
28 | @@ -XXX,XX +XXX,XX @@ static void icc_ctlr_el3_write(CPUARMState *env, const ARMCPRegInfo *ri, | 29 | @@ -XXX,XX +XXX,XX @@ static uint16_t read_tcnt(RTMRState *tmr, unsigned size, int ch) |
29 | cs->icc_ctlr_el1[GICV3_NS] |= ICC_CTLR_EL1_CBPR; | 30 | case CSS_EXTERNAL: /* QEMU doesn't implement this */ |
30 | } | 31 | tcnt[0] = tmr->tcnt[0]; |
31 | 32 | break; | |
32 | - cs->icc_ctlr_el1[GICV3_S] &= (ICC_CTLR_EL1_CBPR | ICC_CTLR_EL1_EOIMODE); | 33 | + default: |
33 | + cs->icc_ctlr_el1[GICV3_S] &= ~(ICC_CTLR_EL1_CBPR | ICC_CTLR_EL1_EOIMODE); | 34 | + g_assert_not_reached(); |
34 | if (value & ICC_CTLR_EL3_EOIMODE_EL1S) { | 35 | } |
35 | cs->icc_ctlr_el1[GICV3_S] |= ICC_CTLR_EL1_EOIMODE; | 36 | } else { |
36 | } | 37 | tcnt[0] = tmr->tcnt[0]; |
37 | -- | 38 | -- |
38 | 2.20.1 | 39 | 2.20.1 |
39 | 40 | ||
40 | 41 | diff view generated by jsdifflib |
Deleted patch | |||
---|---|---|---|
1 | From: Philippe Mathieu-Daudé <philmd@redhat.com> | ||
2 | 1 | ||
3 | Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> | ||
4 | Reviewed-by: Alistair Francis <alistair.francis@wdc.com> | ||
5 | Message-id: 20190520214342.13709-2-philmd@redhat.com | ||
6 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | ||
7 | --- | ||
8 | hw/arm/exynos4_boards.c | 24 ------------------------ | ||
9 | 1 file changed, 24 deletions(-) | ||
10 | |||
11 | diff --git a/hw/arm/exynos4_boards.c b/hw/arm/exynos4_boards.c | ||
12 | index XXXXXXX..XXXXXXX 100644 | ||
13 | --- a/hw/arm/exynos4_boards.c | ||
14 | +++ b/hw/arm/exynos4_boards.c | ||
15 | @@ -XXX,XX +XXX,XX @@ | ||
16 | #include "hw/net/lan9118.h" | ||
17 | #include "hw/boards.h" | ||
18 | |||
19 | -#undef DEBUG | ||
20 | - | ||
21 | -//#define DEBUG | ||
22 | - | ||
23 | -#ifdef DEBUG | ||
24 | - #undef PRINT_DEBUG | ||
25 | - #define PRINT_DEBUG(fmt, args...) \ | ||
26 | - do { \ | ||
27 | - fprintf(stderr, " [%s:%d] "fmt, __func__, __LINE__, ##args); \ | ||
28 | - } while (0) | ||
29 | -#else | ||
30 | - #define PRINT_DEBUG(fmt, args...) do {} while (0) | ||
31 | -#endif | ||
32 | - | ||
33 | #define SMDK_LAN9118_BASE_ADDR 0x05000000 | ||
34 | |||
35 | typedef enum Exynos4BoardType { | ||
36 | @@ -XXX,XX +XXX,XX @@ exynos4_boards_init_common(MachineState *machine, | ||
37 | exynos4_board_binfo.gic_cpu_if_addr = | ||
38 | EXYNOS4210_SMP_PRIVATE_BASE_ADDR + 0x100; | ||
39 | |||
40 | - PRINT_DEBUG("\n ram_size: %luMiB [0x%08lx]\n" | ||
41 | - " kernel_filename: %s\n" | ||
42 | - " kernel_cmdline: %s\n" | ||
43 | - " initrd_filename: %s\n", | ||
44 | - exynos4_board_ram_size[board_type] / 1048576, | ||
45 | - exynos4_board_ram_size[board_type], | ||
46 | - machine->kernel_filename, | ||
47 | - machine->kernel_cmdline, | ||
48 | - machine->initrd_filename); | ||
49 | - | ||
50 | exynos4_boards_init_ram(s, get_system_memory(), | ||
51 | exynos4_board_ram_size[board_type]); | ||
52 | |||
53 | -- | ||
54 | 2.20.1 | ||
55 | |||
56 | diff view generated by jsdifflib |