1 | Not very much here, but several people have fallen over | 1 | Nothing too exciting, but does include the last bits of v8.1M support work. |
---|---|---|---|
2 | the vector operation segfault bug, so let's get the fix | ||
3 | into master. | ||
4 | 2 | ||
5 | thanks | ||
6 | -- PMM | 3 | -- PMM |
7 | 4 | ||
8 | The following changes since commit d418238dca7b4e0b124135827ead3076233052b1: | 5 | The following changes since commit e79de63ab1bd1f6550e7b915e433bec1ad1a870a: |
9 | 6 | ||
10 | Merge remote-tracking branch 'remotes/rth/tags/pull-rng-20190522' into staging (2019-05-23 12:57:17 +0100) | 7 | Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20210107' into staging (2021-01-07 20:34:05 +0000) |
11 | 8 | ||
12 | are available in the Git repository at: | 9 | are available in the Git repository at: |
13 | 10 | ||
14 | https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20190523 | 11 | https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20210108 |
15 | 12 | ||
16 | for you to fetch changes up to 98e4f4fdb8ea05d840f51f47125924c2bb9df2df: | 13 | for you to fetch changes up to c9f8511ea8d2b80723af0fea1f716d752c1b5208: |
17 | 14 | ||
18 | hw/arm/exynos4210: QOM'ify the Exynos4210 SoC (2019-05-23 14:47:44 +0100) | 15 | docs/system: arm: Add sabrelite board description (2021-01-08 15:13:39 +0000) |
19 | 16 | ||
20 | ---------------------------------------------------------------- | 17 | ---------------------------------------------------------------- |
21 | target-arm queue: | 18 | target-arm queue: |
22 | * exynos4210: QOM'ify the Exynos4210 SoC | 19 | * intc/arm_gic: Fix gic_irq_signaling_enabled() for vCPUs |
23 | * exynos4210: Add DMA support for the Exynos4210 | 20 | * target/arm: Fix MTE0_ACTIVE |
24 | * arm_gicv3: Fix writes to ICC_CTLR_EL3 | 21 | * target/arm: Implement v8.1M and Cortex-M55 model |
25 | * arm_gicv3: Fix write of ICH_VMCR_EL2.{VBPR0, VBPR1} | 22 | * hw/arm/highbank: Drop dead KVM support code |
26 | * target/arm: Fix vector operation segfault | 23 | * util/qemu-timer: Make timer_free() imply timer_del() |
27 | * target/arm: Minor improvements to BFXIL, EXTR | 24 | * various devices: Use ptimer_free() in finalize function |
25 | * docs/system: arm: Add sabrelite board description | ||
26 | * sabrelite: Minor fixes to allow booting U-Boot | ||
28 | 27 | ||
29 | ---------------------------------------------------------------- | 28 | ---------------------------------------------------------------- |
30 | Alistair Francis (1): | 29 | Andrew Jones (1): |
31 | target/arm: Fix vector operation segfault | 30 | hw/arm/virt: Remove virt machine state 'smp_cpus' |
32 | 31 | ||
33 | Guenter Roeck (1): | 32 | Bin Meng (4): |
34 | hw/arm/exynos4210: Add DMA support for the Exynos4210 | 33 | hw/misc: imx6_ccm: Update PMU_MISC0 reset value |
34 | hw/msic: imx6_ccm: Correct register value for silicon type | ||
35 | hw/arm: sabrelite: Connect the Ethernet PHY at address 6 | ||
36 | docs/system: arm: Add sabrelite board description | ||
35 | 37 | ||
36 | Peter Maydell (5): | 38 | Edgar E. Iglesias (1): |
37 | arm: Move system_clock_scale to armv7m_systick.h | 39 | intc/arm_gic: Fix gic_irq_signaling_enabled() for vCPUs |
38 | arm: Remove unnecessary includes of hw/arm/arm.h | ||
39 | arm: Rename hw/arm/arm.h to hw/arm/boot.h | ||
40 | hw/intc/arm_gicv3: Fix write of ICH_VMCR_EL2.{VBPR0, VBPR1} | ||
41 | hw/intc/arm_gicv3: Fix writes to ICC_CTLR_EL3 | ||
42 | 40 | ||
43 | Philippe Mathieu-Daudé (3): | 41 | Gan Qixin (7): |
44 | hw/arm/exynos4: Remove unuseful debug code | 42 | digic-timer: Use ptimer_free() in the finalize function to avoid memleaks |
45 | hw/arm/exynos4: Use the IEC binary prefix definitions | 43 | allwinner-a10-pit: Use ptimer_free() in the finalize function to avoid memleaks |
46 | hw/arm/exynos4210: QOM'ify the Exynos4210 SoC | 44 | exynos4210_rtc: Use ptimer_free() in the finalize function to avoid memleaks |
45 | exynos4210_pwm: Use ptimer_free() in the finalize function to avoid memleaks | ||
46 | mss-timer: Use ptimer_free() in the finalize function to avoid memleaks | ||
47 | musicpal: Use ptimer_free() in the finalize function to avoid memleaks | ||
48 | exynos4210_mct: Use ptimer_free() in the finalize function to avoid memleaks | ||
47 | 49 | ||
48 | Richard Henderson (2): | 50 | Peter Maydell (9): |
49 | target/arm: Use extract2 for EXTR | 51 | hw/intc/armv7m_nvic: Correct handling of CCR.BFHFNMIGN |
50 | target/arm: Simplify BFXIL expansion | 52 | target/arm: Correct store of FPSCR value via FPCXT_S |
53 | target/arm: Implement FPCXT_NS fp system register | ||
54 | target/arm: Implement Cortex-M55 model | ||
55 | hw/arm/highbank: Drop dead KVM support code | ||
56 | util/qemu-timer: Make timer_free() imply timer_del() | ||
57 | scripts/coccinelle: New script to remove unnecessary timer_del() calls | ||
58 | Remove superfluous timer_del() calls | ||
59 | target/arm: Remove timer_del()/timer_deinit() before timer_free() | ||
51 | 60 | ||
52 | include/hw/arm/allwinner-a10.h | 2 +- | 61 | Richard Henderson (1): |
53 | include/hw/arm/aspeed_soc.h | 1 - | 62 | target/arm: Fix MTE0_ACTIVE |
54 | include/hw/arm/bcm2836.h | 1 - | ||
55 | include/hw/arm/{arm.h => boot.h} | 12 +++------ | ||
56 | include/hw/arm/exynos4210.h | 9 +++++-- | ||
57 | include/hw/arm/fsl-imx25.h | 2 +- | ||
58 | include/hw/arm/fsl-imx31.h | 2 +- | ||
59 | include/hw/arm/fsl-imx6.h | 2 +- | ||
60 | include/hw/arm/fsl-imx6ul.h | 2 +- | ||
61 | include/hw/arm/fsl-imx7.h | 2 +- | ||
62 | include/hw/arm/virt.h | 2 +- | ||
63 | include/hw/arm/xlnx-versal.h | 2 +- | ||
64 | include/hw/arm/xlnx-zynqmp.h | 2 +- | ||
65 | include/hw/timer/armv7m_systick.h | 22 ++++++++++++++++ | ||
66 | hw/arm/armsse.c | 2 +- | ||
67 | hw/arm/armv7m.c | 2 +- | ||
68 | hw/arm/aspeed.c | 2 +- | ||
69 | hw/arm/boot.c | 2 +- | ||
70 | hw/arm/collie.c | 2 +- | ||
71 | hw/arm/exynos4210.c | 54 ++++++++++++++++++++++++++++++++++++--- | ||
72 | hw/arm/exynos4_boards.c | 40 ++++++++--------------------- | ||
73 | hw/arm/highbank.c | 2 +- | ||
74 | hw/arm/integratorcp.c | 2 +- | ||
75 | hw/arm/mainstone.c | 2 +- | ||
76 | hw/arm/microbit.c | 2 +- | ||
77 | hw/arm/mps2-tz.c | 2 +- | ||
78 | hw/arm/mps2.c | 2 +- | ||
79 | hw/arm/msf2-soc.c | 1 - | ||
80 | hw/arm/msf2-som.c | 2 +- | ||
81 | hw/arm/musca.c | 2 +- | ||
82 | hw/arm/musicpal.c | 2 +- | ||
83 | hw/arm/netduino2.c | 2 +- | ||
84 | hw/arm/nrf51_soc.c | 2 +- | ||
85 | hw/arm/nseries.c | 2 +- | ||
86 | hw/arm/omap1.c | 2 +- | ||
87 | hw/arm/omap2.c | 2 +- | ||
88 | hw/arm/omap_sx1.c | 2 +- | ||
89 | hw/arm/palm.c | 2 +- | ||
90 | hw/arm/raspi.c | 2 +- | ||
91 | hw/arm/realview.c | 2 +- | ||
92 | hw/arm/spitz.c | 2 +- | ||
93 | hw/arm/stellaris.c | 2 +- | ||
94 | hw/arm/stm32f205_soc.c | 2 +- | ||
95 | hw/arm/strongarm.c | 2 +- | ||
96 | hw/arm/tosa.c | 2 +- | ||
97 | hw/arm/versatilepb.c | 2 +- | ||
98 | hw/arm/vexpress.c | 2 +- | ||
99 | hw/arm/virt.c | 2 +- | ||
100 | hw/arm/xilinx_zynq.c | 2 +- | ||
101 | hw/arm/xlnx-versal.c | 2 +- | ||
102 | hw/arm/z2.c | 2 +- | ||
103 | hw/intc/arm_gicv3_cpuif.c | 6 ++--- | ||
104 | hw/intc/armv7m_nvic.c | 1 - | ||
105 | target/arm/arm-semi.c | 1 - | ||
106 | target/arm/cpu.c | 1 - | ||
107 | target/arm/cpu64.c | 1 - | ||
108 | target/arm/kvm.c | 1 - | ||
109 | target/arm/kvm32.c | 1 - | ||
110 | target/arm/kvm64.c | 1 - | ||
111 | target/arm/translate-a64.c | 44 ++++++++++++++++--------------- | ||
112 | target/arm/translate.c | 4 +-- | ||
113 | 61 files changed, 164 insertions(+), 123 deletions(-) | ||
114 | rename include/hw/arm/{arm.h => boot.h} (96%) | ||
115 | 63 | ||
64 | docs/system/arm/sabrelite.rst | 119 ++++++++++++++++++++++++++ | ||
65 | docs/system/target-arm.rst | 1 + | ||
66 | scripts/coccinelle/timer-del-timer-free.cocci | 18 ++++ | ||
67 | include/hw/arm/virt.h | 3 +- | ||
68 | include/qemu/timer.h | 24 +++--- | ||
69 | block/iscsi.c | 2 - | ||
70 | block/nbd.c | 1 - | ||
71 | block/qcow2.c | 1 - | ||
72 | hw/arm/highbank.c | 14 +-- | ||
73 | hw/arm/musicpal.c | 12 +++ | ||
74 | hw/arm/sabrelite.c | 4 + | ||
75 | hw/arm/virt-acpi-build.c | 9 +- | ||
76 | hw/arm/virt.c | 21 +++-- | ||
77 | hw/block/nvme.c | 2 - | ||
78 | hw/char/serial.c | 2 - | ||
79 | hw/char/virtio-serial-bus.c | 2 - | ||
80 | hw/ide/core.c | 1 - | ||
81 | hw/input/hid.c | 1 - | ||
82 | hw/intc/apic.c | 1 - | ||
83 | hw/intc/arm_gic.c | 4 +- | ||
84 | hw/intc/armv7m_nvic.c | 15 ++++ | ||
85 | hw/intc/ioapic.c | 1 - | ||
86 | hw/ipmi/ipmi_bmc_extern.c | 1 - | ||
87 | hw/misc/imx6_ccm.c | 4 +- | ||
88 | hw/net/e1000.c | 3 - | ||
89 | hw/net/e1000e_core.c | 8 -- | ||
90 | hw/net/pcnet-pci.c | 1 - | ||
91 | hw/net/rtl8139.c | 1 - | ||
92 | hw/net/spapr_llan.c | 1 - | ||
93 | hw/net/virtio-net.c | 2 - | ||
94 | hw/rtc/exynos4210_rtc.c | 9 ++ | ||
95 | hw/s390x/s390-pci-inst.c | 1 - | ||
96 | hw/sd/sd.c | 1 - | ||
97 | hw/sd/sdhci.c | 2 - | ||
98 | hw/timer/allwinner-a10-pit.c | 11 +++ | ||
99 | hw/timer/digic-timer.c | 8 ++ | ||
100 | hw/timer/exynos4210_mct.c | 14 +++ | ||
101 | hw/timer/exynos4210_pwm.c | 11 +++ | ||
102 | hw/timer/mss-timer.c | 13 +++ | ||
103 | hw/usb/dev-hub.c | 1 - | ||
104 | hw/usb/hcd-ehci.c | 1 - | ||
105 | hw/usb/hcd-ohci-pci.c | 1 - | ||
106 | hw/usb/hcd-uhci.c | 1 - | ||
107 | hw/usb/hcd-xhci.c | 1 - | ||
108 | hw/usb/redirect.c | 1 - | ||
109 | hw/vfio/display.c | 1 - | ||
110 | hw/virtio/vhost-vsock-common.c | 1 - | ||
111 | hw/virtio/virtio-balloon.c | 1 - | ||
112 | hw/virtio/virtio-rng.c | 1 - | ||
113 | hw/watchdog/wdt_diag288.c | 1 - | ||
114 | hw/watchdog/wdt_i6300esb.c | 1 - | ||
115 | migration/colo.c | 1 - | ||
116 | monitor/hmp-cmds.c | 1 - | ||
117 | net/announce.c | 1 - | ||
118 | net/colo-compare.c | 1 - | ||
119 | net/slirp.c | 1 - | ||
120 | replay/replay-debugging.c | 1 - | ||
121 | target/arm/cpu.c | 2 - | ||
122 | target/arm/cpu_tcg.c | 42 +++++++++ | ||
123 | target/arm/helper.c | 2 +- | ||
124 | target/s390x/cpu.c | 2 - | ||
125 | ui/console.c | 1 - | ||
126 | ui/spice-core.c | 1 - | ||
127 | util/throttle.c | 1 - | ||
128 | target/arm/translate-vfp.c.inc | 114 ++++++++++++++++++++++-- | ||
129 | 65 files changed, 421 insertions(+), 111 deletions(-) | ||
130 | create mode 100644 docs/system/arm/sabrelite.rst | ||
131 | create mode 100644 scripts/coccinelle/timer-del-timer-free.cocci | ||
132 | diff view generated by jsdifflib |
1 | The ICC_CTLR_EL3 register includes some bits which are aliases | 1 | From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com> |
---|---|---|---|
2 | of bits in the ICC_CTLR_EL1(S) and (NS) registers. QEMU chooses | ||
3 | to keep those bits in the cs->icc_ctlr_el1[] struct fields. | ||
4 | Unfortunately a missing '~' in the code to update the bits | ||
5 | in those fields meant that writing to ICC_CTLR_EL3 would corrupt | ||
6 | the ICC_CLTR_EL1 register values. | ||
7 | 2 | ||
3 | Correct the indexing into s->cpu_ctlr for vCPUs. | ||
4 | |||
5 | Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> | ||
6 | Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> | ||
7 | Reviewed-by: Luc Michel <luc.michel@greensocs.com> | ||
8 | Message-id: 20201214222154.3480243-2-edgar.iglesias@gmail.com | ||
8 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | 9 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
9 | Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> | ||
10 | Message-id: 20190520162809.2677-5-peter.maydell@linaro.org | ||
11 | --- | 10 | --- |
12 | hw/intc/arm_gicv3_cpuif.c | 4 ++-- | 11 | hw/intc/arm_gic.c | 4 +++- |
13 | 1 file changed, 2 insertions(+), 2 deletions(-) | 12 | 1 file changed, 3 insertions(+), 1 deletion(-) |
14 | 13 | ||
15 | diff --git a/hw/intc/arm_gicv3_cpuif.c b/hw/intc/arm_gicv3_cpuif.c | 14 | diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c |
16 | index XXXXXXX..XXXXXXX 100644 | 15 | index XXXXXXX..XXXXXXX 100644 |
17 | --- a/hw/intc/arm_gicv3_cpuif.c | 16 | --- a/hw/intc/arm_gic.c |
18 | +++ b/hw/intc/arm_gicv3_cpuif.c | 17 | +++ b/hw/intc/arm_gic.c |
19 | @@ -XXX,XX +XXX,XX @@ static void icc_ctlr_el3_write(CPUARMState *env, const ARMCPRegInfo *ri, | 18 | @@ -XXX,XX +XXX,XX @@ static inline void gic_get_best_virq(GICState *s, int cpu, |
20 | trace_gicv3_icc_ctlr_el3_write(gicv3_redist_affid(cs), value); | 19 | static inline bool gic_irq_signaling_enabled(GICState *s, int cpu, bool virt, |
21 | 20 | int group_mask) | |
22 | /* *_EL1NS and *_EL1S bits are aliases into the ICC_CTLR_EL1 bits. */ | 21 | { |
23 | - cs->icc_ctlr_el1[GICV3_NS] &= (ICC_CTLR_EL1_CBPR | ICC_CTLR_EL1_EOIMODE); | 22 | + int cpu_iface = virt ? (cpu + GIC_NCPU) : cpu; |
24 | + cs->icc_ctlr_el1[GICV3_NS] &= ~(ICC_CTLR_EL1_CBPR | ICC_CTLR_EL1_EOIMODE); | 23 | + |
25 | if (value & ICC_CTLR_EL3_EOIMODE_EL1NS) { | 24 | if (!virt && !(s->ctlr & group_mask)) { |
26 | cs->icc_ctlr_el1[GICV3_NS] |= ICC_CTLR_EL1_EOIMODE; | 25 | return false; |
27 | } | 26 | } |
28 | @@ -XXX,XX +XXX,XX @@ static void icc_ctlr_el3_write(CPUARMState *env, const ARMCPRegInfo *ri, | 27 | @@ -XXX,XX +XXX,XX @@ static inline bool gic_irq_signaling_enabled(GICState *s, int cpu, bool virt, |
29 | cs->icc_ctlr_el1[GICV3_NS] |= ICC_CTLR_EL1_CBPR; | 28 | return false; |
30 | } | 29 | } |
31 | 30 | ||
32 | - cs->icc_ctlr_el1[GICV3_S] &= (ICC_CTLR_EL1_CBPR | ICC_CTLR_EL1_EOIMODE); | 31 | - if (!(s->cpu_ctlr[cpu] & group_mask)) { |
33 | + cs->icc_ctlr_el1[GICV3_S] &= ~(ICC_CTLR_EL1_CBPR | ICC_CTLR_EL1_EOIMODE); | 32 | + if (!(s->cpu_ctlr[cpu_iface] & group_mask)) { |
34 | if (value & ICC_CTLR_EL3_EOIMODE_EL1S) { | 33 | return false; |
35 | cs->icc_ctlr_el1[GICV3_S] |= ICC_CTLR_EL1_EOIMODE; | ||
36 | } | 34 | } |
35 | |||
37 | -- | 36 | -- |
38 | 2.20.1 | 37 | 2.20.1 |
39 | 38 | ||
40 | 39 | diff view generated by jsdifflib |
1 | From: Richard Henderson <richard.henderson@linaro.org> | 1 | From: Andrew Jones <drjones@redhat.com> |
---|---|---|---|
2 | 2 | ||
3 | The mask implied by the extract is redundant with the one | 3 | virt machine's 'smp_cpus' and machine->smp.cpus must always have the |
4 | implied by the deposit. Also, fix spelling of BFXIL. | 4 | same value. And, anywhere we have virt machine state we have machine |
5 | state. So let's remove the redundancy. Also, to make it easier to see | ||
6 | that machine->smp is the true source for "smp_cpus" and "max_cpus", | ||
7 | avoid passing them in function parameters, preferring instead to get | ||
8 | them from the state. | ||
5 | 9 | ||
6 | Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> | 10 | No functional change intended. |
7 | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> | 11 | |
8 | Message-id: 20190514011129.11330-3-richard.henderson@linaro.org | 12 | Signed-off-by: Andrew Jones <drjones@redhat.com> |
13 | Reviewed-by: David Edmondson <david.edmondson@oracle.com> | ||
14 | Reviewed-by: Ying Fang <fangying1@huawei.com> | ||
15 | Message-id: 20201215174815.51520-1-drjones@redhat.com | ||
16 | [PMM: minor formatting tweak to smp_cpus variable declaration] | ||
9 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | 17 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
10 | --- | 18 | --- |
11 | target/arm/translate-a64.c | 6 +++--- | 19 | include/hw/arm/virt.h | 3 +-- |
12 | 1 file changed, 3 insertions(+), 3 deletions(-) | 20 | hw/arm/virt-acpi-build.c | 9 +++++---- |
21 | hw/arm/virt.c | 21 ++++++++++----------- | ||
22 | 3 files changed, 16 insertions(+), 17 deletions(-) | ||
13 | 23 | ||
14 | diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c | 24 | diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h |
15 | index XXXXXXX..XXXXXXX 100644 | 25 | index XXXXXXX..XXXXXXX 100644 |
16 | --- a/target/arm/translate-a64.c | 26 | --- a/include/hw/arm/virt.h |
17 | +++ b/target/arm/translate-a64.c | 27 | +++ b/include/hw/arm/virt.h |
18 | @@ -XXX,XX +XXX,XX @@ static void disas_bitfield(DisasContext *s, uint32_t insn) | 28 | @@ -XXX,XX +XXX,XX @@ struct VirtMachineState { |
19 | tcg_gen_extract_i64(tcg_rd, tcg_tmp, ri, len); | 29 | MemMapEntry *memmap; |
20 | return; | 30 | char *pciehb_nodename; |
31 | const int *irqmap; | ||
32 | - int smp_cpus; | ||
33 | void *fdt; | ||
34 | int fdt_size; | ||
35 | uint32_t clock_phandle; | ||
36 | @@ -XXX,XX +XXX,XX @@ static inline int virt_gicv3_redist_region_count(VirtMachineState *vms) | ||
37 | |||
38 | assert(vms->gic_version == VIRT_GIC_VERSION_3); | ||
39 | |||
40 | - return vms->smp_cpus > redist0_capacity ? 2 : 1; | ||
41 | + return MACHINE(vms)->smp.cpus > redist0_capacity ? 2 : 1; | ||
42 | } | ||
43 | |||
44 | #endif /* QEMU_ARM_VIRT_H */ | ||
45 | diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c | ||
46 | index XXXXXXX..XXXXXXX 100644 | ||
47 | --- a/hw/arm/virt-acpi-build.c | ||
48 | +++ b/hw/arm/virt-acpi-build.c | ||
49 | @@ -XXX,XX +XXX,XX @@ | ||
50 | |||
51 | #define ACPI_BUILD_TABLE_SIZE 0x20000 | ||
52 | |||
53 | -static void acpi_dsdt_add_cpus(Aml *scope, int smp_cpus) | ||
54 | +static void acpi_dsdt_add_cpus(Aml *scope, VirtMachineState *vms) | ||
55 | { | ||
56 | + MachineState *ms = MACHINE(vms); | ||
57 | uint16_t i; | ||
58 | |||
59 | - for (i = 0; i < smp_cpus; i++) { | ||
60 | + for (i = 0; i < ms->smp.cpus; i++) { | ||
61 | Aml *dev = aml_device("C%.03X", i); | ||
62 | aml_append(dev, aml_name_decl("_HID", aml_string("ACPI0007"))); | ||
63 | aml_append(dev, aml_name_decl("_UID", aml_int(i))); | ||
64 | @@ -XXX,XX +XXX,XX @@ build_madt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) | ||
65 | gicd->base_address = cpu_to_le64(memmap[VIRT_GIC_DIST].base); | ||
66 | gicd->version = vms->gic_version; | ||
67 | |||
68 | - for (i = 0; i < vms->smp_cpus; i++) { | ||
69 | + for (i = 0; i < MACHINE(vms)->smp.cpus; i++) { | ||
70 | AcpiMadtGenericCpuInterface *gicc = acpi_data_push(table_data, | ||
71 | sizeof(*gicc)); | ||
72 | ARMCPU *armcpu = ARM_CPU(qemu_get_cpu(i)); | ||
73 | @@ -XXX,XX +XXX,XX @@ build_dsdt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) | ||
74 | * the RTC ACPI device at all when using UEFI. | ||
75 | */ | ||
76 | scope = aml_scope("\\_SB"); | ||
77 | - acpi_dsdt_add_cpus(scope, vms->smp_cpus); | ||
78 | + acpi_dsdt_add_cpus(scope, vms); | ||
79 | acpi_dsdt_add_uart(scope, &memmap[VIRT_UART], | ||
80 | (irqmap[VIRT_UART] + ARM_SPI_BASE)); | ||
81 | if (vmc->acpi_expose_flash) { | ||
82 | diff --git a/hw/arm/virt.c b/hw/arm/virt.c | ||
83 | index XXXXXXX..XXXXXXX 100644 | ||
84 | --- a/hw/arm/virt.c | ||
85 | +++ b/hw/arm/virt.c | ||
86 | @@ -XXX,XX +XXX,XX @@ static void fdt_add_timer_nodes(const VirtMachineState *vms) | ||
87 | if (vms->gic_version == VIRT_GIC_VERSION_2) { | ||
88 | irqflags = deposit32(irqflags, GIC_FDT_IRQ_PPI_CPU_START, | ||
89 | GIC_FDT_IRQ_PPI_CPU_WIDTH, | ||
90 | - (1 << vms->smp_cpus) - 1); | ||
91 | + (1 << MACHINE(vms)->smp.cpus) - 1); | ||
92 | } | ||
93 | |||
94 | qemu_fdt_add_subnode(vms->fdt, "/timer"); | ||
95 | @@ -XXX,XX +XXX,XX @@ static void fdt_add_cpu_nodes(const VirtMachineState *vms) | ||
96 | int cpu; | ||
97 | int addr_cells = 1; | ||
98 | const MachineState *ms = MACHINE(vms); | ||
99 | + int smp_cpus = ms->smp.cpus; | ||
100 | |||
101 | /* | ||
102 | * From Documentation/devicetree/bindings/arm/cpus.txt | ||
103 | @@ -XXX,XX +XXX,XX @@ static void fdt_add_cpu_nodes(const VirtMachineState *vms) | ||
104 | * The simplest way to go is to examine affinity IDs of all our CPUs. If | ||
105 | * at least one of them has Aff3 populated, we set #address-cells to 2. | ||
106 | */ | ||
107 | - for (cpu = 0; cpu < vms->smp_cpus; cpu++) { | ||
108 | + for (cpu = 0; cpu < smp_cpus; cpu++) { | ||
109 | ARMCPU *armcpu = ARM_CPU(qemu_get_cpu(cpu)); | ||
110 | |||
111 | if (armcpu->mp_affinity & ARM_AFF3_MASK) { | ||
112 | @@ -XXX,XX +XXX,XX @@ static void fdt_add_cpu_nodes(const VirtMachineState *vms) | ||
113 | qemu_fdt_setprop_cell(vms->fdt, "/cpus", "#address-cells", addr_cells); | ||
114 | qemu_fdt_setprop_cell(vms->fdt, "/cpus", "#size-cells", 0x0); | ||
115 | |||
116 | - for (cpu = vms->smp_cpus - 1; cpu >= 0; cpu--) { | ||
117 | + for (cpu = smp_cpus - 1; cpu >= 0; cpu--) { | ||
118 | char *nodename = g_strdup_printf("/cpus/cpu@%d", cpu); | ||
119 | ARMCPU *armcpu = ARM_CPU(qemu_get_cpu(cpu)); | ||
120 | CPUState *cs = CPU(armcpu); | ||
121 | @@ -XXX,XX +XXX,XX @@ static void fdt_add_cpu_nodes(const VirtMachineState *vms) | ||
122 | qemu_fdt_setprop_string(vms->fdt, nodename, "compatible", | ||
123 | armcpu->dtb_compatible); | ||
124 | |||
125 | - if (vms->psci_conduit != QEMU_PSCI_CONDUIT_DISABLED | ||
126 | - && vms->smp_cpus > 1) { | ||
127 | + if (vms->psci_conduit != QEMU_PSCI_CONDUIT_DISABLED && smp_cpus > 1) { | ||
128 | qemu_fdt_setprop_string(vms->fdt, nodename, | ||
129 | "enable-method", "psci"); | ||
21 | } | 130 | } |
22 | - /* opc == 1, BXFIL fall through to deposit */ | 131 | @@ -XXX,XX +XXX,XX @@ static void fdt_add_pmu_nodes(const VirtMachineState *vms) |
23 | - tcg_gen_extract_i64(tcg_tmp, tcg_tmp, ri, len); | 132 | if (vms->gic_version == VIRT_GIC_VERSION_2) { |
24 | + /* opc == 1, BFXIL fall through to deposit */ | 133 | irqflags = deposit32(irqflags, GIC_FDT_IRQ_PPI_CPU_START, |
25 | + tcg_gen_shri_i64(tcg_tmp, tcg_tmp, ri); | 134 | GIC_FDT_IRQ_PPI_CPU_WIDTH, |
26 | pos = 0; | 135 | - (1 << vms->smp_cpus) - 1); |
27 | } else { | 136 | + (1 << MACHINE(vms)->smp.cpus) - 1); |
28 | /* Handle the ri > si case with a deposit | ||
29 | @@ -XXX,XX +XXX,XX @@ static void disas_bitfield(DisasContext *s, uint32_t insn) | ||
30 | len = ri; | ||
31 | } | 137 | } |
32 | 138 | ||
33 | - if (opc == 1) { /* BFM, BXFIL */ | 139 | qemu_fdt_add_subnode(vms->fdt, "/pmu"); |
34 | + if (opc == 1) { /* BFM, BFXIL */ | 140 | @@ -XXX,XX +XXX,XX @@ static void finalize_gic_version(VirtMachineState *vms) |
35 | tcg_gen_deposit_i64(tcg_rd, tcg_rd, tcg_tmp, pos, len); | 141 | * virt_cpu_post_init() must be called after the CPUs have |
36 | } else { | 142 | * been realized and the GIC has been created. |
37 | /* SBFM or UBFM: We start with zero, and we haven't modified | 143 | */ |
144 | -static void virt_cpu_post_init(VirtMachineState *vms, int max_cpus, | ||
145 | - MemoryRegion *sysmem) | ||
146 | +static void virt_cpu_post_init(VirtMachineState *vms, MemoryRegion *sysmem) | ||
147 | { | ||
148 | + int max_cpus = MACHINE(vms)->smp.max_cpus; | ||
149 | bool aarch64, pmu, steal_time; | ||
150 | CPUState *cpu; | ||
151 | |||
152 | @@ -XXX,XX +XXX,XX @@ static void machvirt_init(MachineState *machine) | ||
153 | exit(1); | ||
154 | } | ||
155 | |||
156 | - vms->smp_cpus = smp_cpus; | ||
157 | - | ||
158 | if (vms->virt && kvm_enabled()) { | ||
159 | error_report("mach-virt: KVM does not support providing " | ||
160 | "Virtualization extensions to the guest CPU"); | ||
161 | @@ -XXX,XX +XXX,XX @@ static void machvirt_init(MachineState *machine) | ||
162 | create_fdt(vms); | ||
163 | |||
164 | possible_cpus = mc->possible_cpu_arch_ids(machine); | ||
165 | + assert(possible_cpus->len == max_cpus); | ||
166 | for (n = 0; n < possible_cpus->len; n++) { | ||
167 | Object *cpuobj; | ||
168 | CPUState *cs; | ||
169 | @@ -XXX,XX +XXX,XX @@ static void machvirt_init(MachineState *machine) | ||
170 | |||
171 | create_gic(vms); | ||
172 | |||
173 | - virt_cpu_post_init(vms, possible_cpus->len, sysmem); | ||
174 | + virt_cpu_post_init(vms, sysmem); | ||
175 | |||
176 | fdt_add_pmu_nodes(vms); | ||
177 | |||
38 | -- | 178 | -- |
39 | 2.20.1 | 179 | 2.20.1 |
40 | 180 | ||
41 | 181 | diff view generated by jsdifflib |
1 | From: Richard Henderson <richard.henderson@linaro.org> | 1 | From: Richard Henderson <richard.henderson@linaro.org> |
---|---|---|---|
2 | 2 | ||
3 | This is, after all, how we implement extract2 in tcg/aarch64. | 3 | In 50244cc76abc we updated mte_check_fail to match the ARM |
4 | pseudocode, using the correct EL to select the TCF field. | ||
5 | But we failed to update MTE0_ACTIVE the same way, which led | ||
6 | to g_assert_not_reached(). | ||
4 | 7 | ||
8 | Cc: qemu-stable@nongnu.org | ||
9 | Buglink: https://bugs.launchpad.net/bugs/1907137 | ||
10 | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> | ||
11 | Message-id: 20201221204426.88514-1-richard.henderson@linaro.org | ||
5 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> | 12 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> |
6 | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> | ||
7 | Message-id: 20190514011129.11330-2-richard.henderson@linaro.org | ||
8 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | 13 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
9 | --- | 14 | --- |
10 | target/arm/translate-a64.c | 38 ++++++++++++++++++++------------------ | 15 | target/arm/helper.c | 2 +- |
11 | 1 file changed, 20 insertions(+), 18 deletions(-) | 16 | 1 file changed, 1 insertion(+), 1 deletion(-) |
12 | 17 | ||
13 | diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c | 18 | diff --git a/target/arm/helper.c b/target/arm/helper.c |
14 | index XXXXXXX..XXXXXXX 100644 | 19 | index XXXXXXX..XXXXXXX 100644 |
15 | --- a/target/arm/translate-a64.c | 20 | --- a/target/arm/helper.c |
16 | +++ b/target/arm/translate-a64.c | 21 | +++ b/target/arm/helper.c |
17 | @@ -XXX,XX +XXX,XX @@ static void disas_extract(DisasContext *s, uint32_t insn) | 22 | @@ -XXX,XX +XXX,XX @@ static uint32_t rebuild_hflags_a64(CPUARMState *env, int el, int fp_el, |
18 | } else { | 23 | if (FIELD_EX32(flags, TBFLAG_A64, UNPRIV) |
19 | tcg_gen_ext32u_i64(tcg_rd, cpu_reg(s, rm)); | 24 | && tbid |
20 | } | 25 | && !(env->pstate & PSTATE_TCO) |
21 | - } else if (rm == rn) { /* ROR */ | 26 | - && (sctlr & SCTLR_TCF0) |
22 | - tcg_rm = cpu_reg(s, rm); | 27 | + && (sctlr & SCTLR_TCF) |
23 | - if (sf) { | 28 | && allocation_tag_access_enabled(env, 0, sctlr)) { |
24 | - tcg_gen_rotri_i64(tcg_rd, tcg_rm, imm); | 29 | flags = FIELD_DP32(flags, TBFLAG_A64, MTE0_ACTIVE, 1); |
25 | - } else { | ||
26 | - TCGv_i32 tmp = tcg_temp_new_i32(); | ||
27 | - tcg_gen_extrl_i64_i32(tmp, tcg_rm); | ||
28 | - tcg_gen_rotri_i32(tmp, tmp, imm); | ||
29 | - tcg_gen_extu_i32_i64(tcg_rd, tmp); | ||
30 | - tcg_temp_free_i32(tmp); | ||
31 | - } | ||
32 | } else { | ||
33 | - tcg_rm = read_cpu_reg(s, rm, sf); | ||
34 | - tcg_rn = read_cpu_reg(s, rn, sf); | ||
35 | - tcg_gen_shri_i64(tcg_rm, tcg_rm, imm); | ||
36 | - tcg_gen_shli_i64(tcg_rn, tcg_rn, bitsize - imm); | ||
37 | - tcg_gen_or_i64(tcg_rd, tcg_rm, tcg_rn); | ||
38 | - if (!sf) { | ||
39 | - tcg_gen_ext32u_i64(tcg_rd, tcg_rd); | ||
40 | + tcg_rm = cpu_reg(s, rm); | ||
41 | + tcg_rn = cpu_reg(s, rn); | ||
42 | + | ||
43 | + if (sf) { | ||
44 | + /* Specialization to ROR happens in EXTRACT2. */ | ||
45 | + tcg_gen_extract2_i64(tcg_rd, tcg_rm, tcg_rn, imm); | ||
46 | + } else { | ||
47 | + TCGv_i32 t0 = tcg_temp_new_i32(); | ||
48 | + | ||
49 | + tcg_gen_extrl_i64_i32(t0, tcg_rm); | ||
50 | + if (rm == rn) { | ||
51 | + tcg_gen_rotri_i32(t0, t0, imm); | ||
52 | + } else { | ||
53 | + TCGv_i32 t1 = tcg_temp_new_i32(); | ||
54 | + tcg_gen_extrl_i64_i32(t1, tcg_rn); | ||
55 | + tcg_gen_extract2_i32(t0, t0, t1, imm); | ||
56 | + tcg_temp_free_i32(t1); | ||
57 | + } | ||
58 | + tcg_gen_extu_i32_i64(tcg_rd, t0); | ||
59 | + tcg_temp_free_i32(t0); | ||
60 | } | ||
61 | } | 30 | } |
62 | } | ||
63 | -- | 31 | -- |
64 | 2.20.1 | 32 | 2.20.1 |
65 | 33 | ||
66 | 34 | diff view generated by jsdifflib |
1 | The hw/arm/arm.h header now only includes declarations relating | 1 | The CCR is a register most of whose bits are banked between security |
---|---|---|---|
2 | to boot.c code, so it is only needed by Arm board or SoC code. | 2 | states but where BFHFNMIGN is not, and we keep it in the non-secure |
3 | Remove some unnecessary inclusions of it from target/arm files | 3 | entry of the v7m.ccr[] array. The logic which tries to handle this |
4 | and from hw/intc/armv7m_nvic.c. | 4 | bit fails to implement the "RAZ/WI from Nonsecure if AIRCR.BFHFNMINS |
5 | is zero" requirement; correct the omission. | ||
5 | 6 | ||
6 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | 7 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
7 | Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> | 8 | Reviewed-by: Richard Henderson <richard.henderson@linaro.org> |
8 | Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> | 9 | Message-id: 20201210201433.26262-2-peter.maydell@linaro.org |
9 | Message-id: 20190516163857.6430-3-peter.maydell@linaro.org | ||
10 | --- | 10 | --- |
11 | hw/intc/armv7m_nvic.c | 1 - | 11 | hw/intc/armv7m_nvic.c | 15 +++++++++++++++ |
12 | target/arm/arm-semi.c | 1 - | 12 | 1 file changed, 15 insertions(+) |
13 | target/arm/cpu.c | 1 - | ||
14 | target/arm/cpu64.c | 1 - | ||
15 | target/arm/kvm.c | 1 - | ||
16 | target/arm/kvm32.c | 1 - | ||
17 | target/arm/kvm64.c | 1 - | ||
18 | 7 files changed, 7 deletions(-) | ||
19 | 13 | ||
20 | diff --git a/hw/intc/armv7m_nvic.c b/hw/intc/armv7m_nvic.c | 14 | diff --git a/hw/intc/armv7m_nvic.c b/hw/intc/armv7m_nvic.c |
21 | index XXXXXXX..XXXXXXX 100644 | 15 | index XXXXXXX..XXXXXXX 100644 |
22 | --- a/hw/intc/armv7m_nvic.c | 16 | --- a/hw/intc/armv7m_nvic.c |
23 | +++ b/hw/intc/armv7m_nvic.c | 17 | +++ b/hw/intc/armv7m_nvic.c |
24 | @@ -XXX,XX +XXX,XX @@ | 18 | @@ -XXX,XX +XXX,XX @@ static uint32_t nvic_readl(NVICState *s, uint32_t offset, MemTxAttrs attrs) |
25 | #include "cpu.h" | 19 | */ |
26 | #include "hw/sysbus.h" | 20 | val = cpu->env.v7m.ccr[attrs.secure]; |
27 | #include "qemu/timer.h" | 21 | val |= cpu->env.v7m.ccr[M_REG_NS] & R_V7M_CCR_BFHFNMIGN_MASK; |
28 | -#include "hw/arm/arm.h" | 22 | + /* BFHFNMIGN is RAZ/WI from NS if AIRCR.BFHFNMINS is 0 */ |
29 | #include "hw/intc/armv7m_nvic.h" | 23 | + if (!attrs.secure) { |
30 | #include "target/arm/cpu.h" | 24 | + if (!(cpu->env.v7m.aircr & R_V7M_AIRCR_BFHFNMINS_MASK)) { |
31 | #include "exec/exec-all.h" | 25 | + val &= ~R_V7M_CCR_BFHFNMIGN_MASK; |
32 | diff --git a/target/arm/arm-semi.c b/target/arm/arm-semi.c | 26 | + } |
33 | index XXXXXXX..XXXXXXX 100644 | 27 | + } |
34 | --- a/target/arm/arm-semi.c | 28 | return val; |
35 | +++ b/target/arm/arm-semi.c | 29 | case 0xd24: /* System Handler Control and State (SHCSR) */ |
36 | @@ -XXX,XX +XXX,XX @@ | 30 | if (!arm_feature(&cpu->env, ARM_FEATURE_V7)) { |
37 | #else | 31 | @@ -XXX,XX +XXX,XX @@ static void nvic_writel(NVICState *s, uint32_t offset, uint32_t value, |
38 | #include "qemu-common.h" | 32 | (cpu->env.v7m.ccr[M_REG_NS] & ~R_V7M_CCR_BFHFNMIGN_MASK) |
39 | #include "exec/gdbstub.h" | 33 | | (value & R_V7M_CCR_BFHFNMIGN_MASK); |
40 | -#include "hw/arm/arm.h" | 34 | value &= ~R_V7M_CCR_BFHFNMIGN_MASK; |
41 | #include "qemu/cutils.h" | 35 | + } else { |
42 | #endif | 36 | + /* |
43 | 37 | + * BFHFNMIGN is RAZ/WI from NS if AIRCR.BFHFNMINS is 0, so | |
44 | diff --git a/target/arm/cpu.c b/target/arm/cpu.c | 38 | + * preserve the state currently in the NS element of the array |
45 | index XXXXXXX..XXXXXXX 100644 | 39 | + */ |
46 | --- a/target/arm/cpu.c | 40 | + if (!(cpu->env.v7m.aircr & R_V7M_AIRCR_BFHFNMINS_MASK)) { |
47 | +++ b/target/arm/cpu.c | 41 | + value &= ~R_V7M_CCR_BFHFNMIGN_MASK; |
48 | @@ -XXX,XX +XXX,XX @@ | 42 | + value |= cpu->env.v7m.ccr[M_REG_NS] & R_V7M_CCR_BFHFNMIGN_MASK; |
49 | #if !defined(CONFIG_USER_ONLY) | 43 | + } |
50 | #include "hw/loader.h" | 44 | } |
51 | #endif | 45 | |
52 | -#include "hw/arm/arm.h" | 46 | cpu->env.v7m.ccr[attrs.secure] = value; |
53 | #include "sysemu/sysemu.h" | ||
54 | #include "sysemu/hw_accel.h" | ||
55 | #include "kvm_arm.h" | ||
56 | diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c | ||
57 | index XXXXXXX..XXXXXXX 100644 | ||
58 | --- a/target/arm/cpu64.c | ||
59 | +++ b/target/arm/cpu64.c | ||
60 | @@ -XXX,XX +XXX,XX @@ | ||
61 | #if !defined(CONFIG_USER_ONLY) | ||
62 | #include "hw/loader.h" | ||
63 | #endif | ||
64 | -#include "hw/arm/arm.h" | ||
65 | #include "sysemu/sysemu.h" | ||
66 | #include "sysemu/kvm.h" | ||
67 | #include "kvm_arm.h" | ||
68 | diff --git a/target/arm/kvm.c b/target/arm/kvm.c | ||
69 | index XXXXXXX..XXXXXXX 100644 | ||
70 | --- a/target/arm/kvm.c | ||
71 | +++ b/target/arm/kvm.c | ||
72 | @@ -XXX,XX +XXX,XX @@ | ||
73 | #include "cpu.h" | ||
74 | #include "trace.h" | ||
75 | #include "internals.h" | ||
76 | -#include "hw/arm/arm.h" | ||
77 | #include "hw/pci/pci.h" | ||
78 | #include "exec/memattrs.h" | ||
79 | #include "exec/address-spaces.h" | ||
80 | diff --git a/target/arm/kvm32.c b/target/arm/kvm32.c | ||
81 | index XXXXXXX..XXXXXXX 100644 | ||
82 | --- a/target/arm/kvm32.c | ||
83 | +++ b/target/arm/kvm32.c | ||
84 | @@ -XXX,XX +XXX,XX @@ | ||
85 | #include "sysemu/kvm.h" | ||
86 | #include "kvm_arm.h" | ||
87 | #include "internals.h" | ||
88 | -#include "hw/arm/arm.h" | ||
89 | #include "qemu/log.h" | ||
90 | |||
91 | static inline void set_feature(uint64_t *features, int feature) | ||
92 | diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c | ||
93 | index XXXXXXX..XXXXXXX 100644 | ||
94 | --- a/target/arm/kvm64.c | ||
95 | +++ b/target/arm/kvm64.c | ||
96 | @@ -XXX,XX +XXX,XX @@ | ||
97 | #include "sysemu/kvm.h" | ||
98 | #include "kvm_arm.h" | ||
99 | #include "internals.h" | ||
100 | -#include "hw/arm/arm.h" | ||
101 | |||
102 | static bool have_guest_debug; | ||
103 | |||
104 | -- | 47 | -- |
105 | 2.20.1 | 48 | 2.20.1 |
106 | 49 | ||
107 | 50 | diff view generated by jsdifflib |
New patch | |||
---|---|---|---|
1 | In commit 64f863baeedc8659 we implemented the v8.1M FPCXT_S register, | ||
2 | but we got the write behaviour wrong. On read, this register reads | ||
3 | bits [27:0] of FPSCR plus the CONTROL.SFPA bit. On write, it doesn't | ||
4 | just write back those bits -- it writes a value to the whole FPSCR, | ||
5 | whose upper 4 bits are zeroes. | ||
1 | 6 | ||
7 | We also incorrectly implemented the write-to-FPSCR as a simple store | ||
8 | to vfp.xregs; this skips the "update the softfloat flags" part of | ||
9 | the vfp_set_fpscr helper so the value would read back correctly but | ||
10 | not actually take effect. | ||
11 | |||
12 | Fix both of these things by doing a complete write to the FPSCR | ||
13 | using the helper function. | ||
14 | |||
15 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | ||
16 | Reviewed-by: Richard Henderson <richard.henderson@linaro.org> | ||
17 | Message-id: 20201210201433.26262-3-peter.maydell@linaro.org | ||
18 | --- | ||
19 | target/arm/translate-vfp.c.inc | 12 ++++++------ | ||
20 | 1 file changed, 6 insertions(+), 6 deletions(-) | ||
21 | |||
22 | diff --git a/target/arm/translate-vfp.c.inc b/target/arm/translate-vfp.c.inc | ||
23 | index XXXXXXX..XXXXXXX 100644 | ||
24 | --- a/target/arm/translate-vfp.c.inc | ||
25 | +++ b/target/arm/translate-vfp.c.inc | ||
26 | @@ -XXX,XX +XXX,XX @@ static bool gen_M_fp_sysreg_write(DisasContext *s, int regno, | ||
27 | } | ||
28 | case ARM_VFP_FPCXT_S: | ||
29 | { | ||
30 | - TCGv_i32 sfpa, control, fpscr; | ||
31 | - /* Set FPSCR[27:0] and CONTROL.SFPA from value */ | ||
32 | + TCGv_i32 sfpa, control; | ||
33 | + /* | ||
34 | + * Set FPSCR and CONTROL.SFPA from value; the new FPSCR takes | ||
35 | + * bits [27:0] from value and zeroes bits [31:28]. | ||
36 | + */ | ||
37 | tmp = loadfn(s, opaque); | ||
38 | sfpa = tcg_temp_new_i32(); | ||
39 | tcg_gen_shri_i32(sfpa, tmp, 31); | ||
40 | @@ -XXX,XX +XXX,XX @@ static bool gen_M_fp_sysreg_write(DisasContext *s, int regno, | ||
41 | tcg_gen_deposit_i32(control, control, sfpa, | ||
42 | R_V7M_CONTROL_SFPA_SHIFT, 1); | ||
43 | store_cpu_field(control, v7m.control[M_REG_S]); | ||
44 | - fpscr = load_cpu_field(vfp.xregs[ARM_VFP_FPSCR]); | ||
45 | - tcg_gen_andi_i32(fpscr, fpscr, FPCR_NZCV_MASK); | ||
46 | tcg_gen_andi_i32(tmp, tmp, ~FPCR_NZCV_MASK); | ||
47 | - tcg_gen_or_i32(fpscr, fpscr, tmp); | ||
48 | - store_cpu_field(fpscr, vfp.xregs[ARM_VFP_FPSCR]); | ||
49 | + gen_helper_vfp_set_fpscr(cpu_env, tmp); | ||
50 | tcg_temp_free_i32(tmp); | ||
51 | tcg_temp_free_i32(sfpa); | ||
52 | break; | ||
53 | -- | ||
54 | 2.20.1 | ||
55 | |||
56 | diff view generated by jsdifflib |
New patch | |||
---|---|---|---|
1 | Implement the v8.1M FPCXT_NS floating-point system register. This is | ||
2 | a little more complicated than FPCXT_S, because it has specific | ||
3 | handling for "current FP state is inactive", and it only wants to do | ||
4 | PreserveFPState(), not the full set of actions done by | ||
5 | ExecuteFPCheck() which vfp_access_check() implements. | ||
1 | 6 | ||
7 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | ||
8 | Reviewed-by: Richard Henderson <richard.henderson@linaro.org> | ||
9 | Message-id: 20201210201433.26262-4-peter.maydell@linaro.org | ||
10 | --- | ||
11 | target/arm/translate-vfp.c.inc | 102 ++++++++++++++++++++++++++++++++- | ||
12 | 1 file changed, 99 insertions(+), 3 deletions(-) | ||
13 | |||
14 | diff --git a/target/arm/translate-vfp.c.inc b/target/arm/translate-vfp.c.inc | ||
15 | index XXXXXXX..XXXXXXX 100644 | ||
16 | --- a/target/arm/translate-vfp.c.inc | ||
17 | +++ b/target/arm/translate-vfp.c.inc | ||
18 | @@ -XXX,XX +XXX,XX @@ static FPSysRegCheckResult fp_sysreg_checks(DisasContext *s, int regno) | ||
19 | } | ||
20 | break; | ||
21 | case ARM_VFP_FPCXT_S: | ||
22 | + case ARM_VFP_FPCXT_NS: | ||
23 | if (!arm_dc_feature(s, ARM_FEATURE_V8_1M)) { | ||
24 | return false; | ||
25 | } | ||
26 | @@ -XXX,XX +XXX,XX @@ static FPSysRegCheckResult fp_sysreg_checks(DisasContext *s, int regno) | ||
27 | return FPSysRegCheckFailed; | ||
28 | } | ||
29 | |||
30 | - if (!vfp_access_check(s)) { | ||
31 | + /* | ||
32 | + * FPCXT_NS is a special case: it has specific handling for | ||
33 | + * "current FP state is inactive", and must do the PreserveFPState() | ||
34 | + * but not the usual full set of actions done by ExecuteFPCheck(). | ||
35 | + * So we don't call vfp_access_check() and the callers must handle this. | ||
36 | + */ | ||
37 | + if (regno != ARM_VFP_FPCXT_NS && !vfp_access_check(s)) { | ||
38 | return FPSysRegCheckDone; | ||
39 | } | ||
40 | - | ||
41 | return FPSysRegCheckContinue; | ||
42 | } | ||
43 | |||
44 | +static void gen_branch_fpInactive(DisasContext *s, TCGCond cond, | ||
45 | + TCGLabel *label) | ||
46 | +{ | ||
47 | + /* | ||
48 | + * FPCXT_NS is a special case: it has specific handling for | ||
49 | + * "current FP state is inactive", and must do the PreserveFPState() | ||
50 | + * but not the usual full set of actions done by ExecuteFPCheck(). | ||
51 | + * We don't have a TB flag that matches the fpInactive check, so we | ||
52 | + * do it at runtime as we don't expect FPCXT_NS accesses to be frequent. | ||
53 | + * | ||
54 | + * Emit code that checks fpInactive and does a conditional | ||
55 | + * branch to label based on it: | ||
56 | + * if cond is TCG_COND_NE then branch if fpInactive != 0 (ie if inactive) | ||
57 | + * if cond is TCG_COND_EQ then branch if fpInactive == 0 (ie if active) | ||
58 | + */ | ||
59 | + assert(cond == TCG_COND_EQ || cond == TCG_COND_NE); | ||
60 | + | ||
61 | + /* fpInactive = FPCCR_NS.ASPEN == 1 && CONTROL.FPCA == 0 */ | ||
62 | + TCGv_i32 aspen, fpca; | ||
63 | + aspen = load_cpu_field(v7m.fpccr[M_REG_NS]); | ||
64 | + fpca = load_cpu_field(v7m.control[M_REG_S]); | ||
65 | + tcg_gen_andi_i32(aspen, aspen, R_V7M_FPCCR_ASPEN_MASK); | ||
66 | + tcg_gen_xori_i32(aspen, aspen, R_V7M_FPCCR_ASPEN_MASK); | ||
67 | + tcg_gen_andi_i32(fpca, fpca, R_V7M_CONTROL_FPCA_MASK); | ||
68 | + tcg_gen_or_i32(fpca, fpca, aspen); | ||
69 | + tcg_gen_brcondi_i32(tcg_invert_cond(cond), fpca, 0, label); | ||
70 | + tcg_temp_free_i32(aspen); | ||
71 | + tcg_temp_free_i32(fpca); | ||
72 | +} | ||
73 | + | ||
74 | static bool gen_M_fp_sysreg_write(DisasContext *s, int regno, | ||
75 | |||
76 | fp_sysreg_loadfn *loadfn, | ||
77 | @@ -XXX,XX +XXX,XX @@ static bool gen_M_fp_sysreg_write(DisasContext *s, int regno, | ||
78 | { | ||
79 | /* Do a write to an M-profile floating point system register */ | ||
80 | TCGv_i32 tmp; | ||
81 | + TCGLabel *lab_end = NULL; | ||
82 | |||
83 | switch (fp_sysreg_checks(s, regno)) { | ||
84 | case FPSysRegCheckFailed: | ||
85 | @@ -XXX,XX +XXX,XX @@ static bool gen_M_fp_sysreg_write(DisasContext *s, int regno, | ||
86 | tcg_temp_free_i32(tmp); | ||
87 | break; | ||
88 | } | ||
89 | + case ARM_VFP_FPCXT_NS: | ||
90 | + lab_end = gen_new_label(); | ||
91 | + /* fpInactive case: write is a NOP, so branch to end */ | ||
92 | + gen_branch_fpInactive(s, TCG_COND_NE, lab_end); | ||
93 | + /* !fpInactive: PreserveFPState(), and reads same as FPCXT_S */ | ||
94 | + gen_preserve_fp_state(s); | ||
95 | + /* fall through */ | ||
96 | case ARM_VFP_FPCXT_S: | ||
97 | { | ||
98 | TCGv_i32 sfpa, control; | ||
99 | @@ -XXX,XX +XXX,XX @@ static bool gen_M_fp_sysreg_write(DisasContext *s, int regno, | ||
100 | default: | ||
101 | g_assert_not_reached(); | ||
102 | } | ||
103 | + if (lab_end) { | ||
104 | + gen_set_label(lab_end); | ||
105 | + } | ||
106 | return true; | ||
107 | } | ||
108 | |||
109 | @@ -XXX,XX +XXX,XX @@ static bool gen_M_fp_sysreg_read(DisasContext *s, int regno, | ||
110 | { | ||
111 | /* Do a read from an M-profile floating point system register */ | ||
112 | TCGv_i32 tmp; | ||
113 | + TCGLabel *lab_end = NULL; | ||
114 | + bool lookup_tb = false; | ||
115 | |||
116 | switch (fp_sysreg_checks(s, regno)) { | ||
117 | case FPSysRegCheckFailed: | ||
118 | @@ -XXX,XX +XXX,XX @@ static bool gen_M_fp_sysreg_read(DisasContext *s, int regno, | ||
119 | fpscr = load_cpu_field(v7m.fpdscr[M_REG_NS]); | ||
120 | gen_helper_vfp_set_fpscr(cpu_env, fpscr); | ||
121 | tcg_temp_free_i32(fpscr); | ||
122 | - gen_lookup_tb(s); | ||
123 | + lookup_tb = true; | ||
124 | + break; | ||
125 | + } | ||
126 | + case ARM_VFP_FPCXT_NS: | ||
127 | + { | ||
128 | + TCGv_i32 control, sfpa, fpscr, fpdscr, zero; | ||
129 | + TCGLabel *lab_active = gen_new_label(); | ||
130 | + | ||
131 | + lookup_tb = true; | ||
132 | + | ||
133 | + gen_branch_fpInactive(s, TCG_COND_EQ, lab_active); | ||
134 | + /* fpInactive case: reads as FPDSCR_NS */ | ||
135 | + TCGv_i32 tmp = load_cpu_field(v7m.fpdscr[M_REG_NS]); | ||
136 | + storefn(s, opaque, tmp); | ||
137 | + lab_end = gen_new_label(); | ||
138 | + tcg_gen_br(lab_end); | ||
139 | + | ||
140 | + gen_set_label(lab_active); | ||
141 | + /* !fpInactive: Reads the same as FPCXT_S, but side effects differ */ | ||
142 | + gen_preserve_fp_state(s); | ||
143 | + tmp = tcg_temp_new_i32(); | ||
144 | + sfpa = tcg_temp_new_i32(); | ||
145 | + fpscr = tcg_temp_new_i32(); | ||
146 | + gen_helper_vfp_get_fpscr(fpscr, cpu_env); | ||
147 | + tcg_gen_andi_i32(tmp, fpscr, ~FPCR_NZCV_MASK); | ||
148 | + control = load_cpu_field(v7m.control[M_REG_S]); | ||
149 | + tcg_gen_andi_i32(sfpa, control, R_V7M_CONTROL_SFPA_MASK); | ||
150 | + tcg_gen_shli_i32(sfpa, sfpa, 31 - R_V7M_CONTROL_SFPA_SHIFT); | ||
151 | + tcg_gen_or_i32(tmp, tmp, sfpa); | ||
152 | + tcg_temp_free_i32(control); | ||
153 | + /* Store result before updating FPSCR, in case it faults */ | ||
154 | + storefn(s, opaque, tmp); | ||
155 | + /* If SFPA is zero then set FPSCR from FPDSCR_NS */ | ||
156 | + fpdscr = load_cpu_field(v7m.fpdscr[M_REG_NS]); | ||
157 | + zero = tcg_const_i32(0); | ||
158 | + tcg_gen_movcond_i32(TCG_COND_EQ, fpscr, sfpa, zero, fpdscr, fpscr); | ||
159 | + gen_helper_vfp_set_fpscr(cpu_env, fpscr); | ||
160 | + tcg_temp_free_i32(zero); | ||
161 | + tcg_temp_free_i32(sfpa); | ||
162 | + tcg_temp_free_i32(fpdscr); | ||
163 | + tcg_temp_free_i32(fpscr); | ||
164 | break; | ||
165 | } | ||
166 | default: | ||
167 | g_assert_not_reached(); | ||
168 | } | ||
169 | + | ||
170 | + if (lab_end) { | ||
171 | + gen_set_label(lab_end); | ||
172 | + } | ||
173 | + if (lookup_tb) { | ||
174 | + gen_lookup_tb(s); | ||
175 | + } | ||
176 | return true; | ||
177 | } | ||
178 | |||
179 | -- | ||
180 | 2.20.1 | ||
181 | |||
182 | diff view generated by jsdifflib |
New patch | |||
---|---|---|---|
1 | Now that we have implemented all the features needed by the v8.1M | ||
2 | architecture, we can add the model of the Cortex-M55. This is the | ||
3 | configuration without MVE support; we'll add MVE later. | ||
1 | 4 | ||
5 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | ||
6 | Reviewed-by: Richard Henderson <richard.henderson@linaro.org> | ||
7 | Message-id: 20201210201433.26262-5-peter.maydell@linaro.org | ||
8 | --- | ||
9 | target/arm/cpu_tcg.c | 42 ++++++++++++++++++++++++++++++++++++++++++ | ||
10 | 1 file changed, 42 insertions(+) | ||
11 | |||
12 | diff --git a/target/arm/cpu_tcg.c b/target/arm/cpu_tcg.c | ||
13 | index XXXXXXX..XXXXXXX 100644 | ||
14 | --- a/target/arm/cpu_tcg.c | ||
15 | +++ b/target/arm/cpu_tcg.c | ||
16 | @@ -XXX,XX +XXX,XX @@ static void cortex_m33_initfn(Object *obj) | ||
17 | cpu->ctr = 0x8000c000; | ||
18 | } | ||
19 | |||
20 | +static void cortex_m55_initfn(Object *obj) | ||
21 | +{ | ||
22 | + ARMCPU *cpu = ARM_CPU(obj); | ||
23 | + | ||
24 | + set_feature(&cpu->env, ARM_FEATURE_V8); | ||
25 | + set_feature(&cpu->env, ARM_FEATURE_V8_1M); | ||
26 | + set_feature(&cpu->env, ARM_FEATURE_M); | ||
27 | + set_feature(&cpu->env, ARM_FEATURE_M_MAIN); | ||
28 | + set_feature(&cpu->env, ARM_FEATURE_M_SECURITY); | ||
29 | + set_feature(&cpu->env, ARM_FEATURE_THUMB_DSP); | ||
30 | + cpu->midr = 0x410fd221; /* r0p1 */ | ||
31 | + cpu->revidr = 0; | ||
32 | + cpu->pmsav7_dregion = 16; | ||
33 | + cpu->sau_sregion = 8; | ||
34 | + /* | ||
35 | + * These are the MVFR* values for the FPU, no MVE configuration; | ||
36 | + * we will update them later when we implement MVE | ||
37 | + */ | ||
38 | + cpu->isar.mvfr0 = 0x10110221; | ||
39 | + cpu->isar.mvfr1 = 0x12100011; | ||
40 | + cpu->isar.mvfr2 = 0x00000040; | ||
41 | + cpu->isar.id_pfr0 = 0x20000030; | ||
42 | + cpu->isar.id_pfr1 = 0x00000230; | ||
43 | + cpu->isar.id_dfr0 = 0x10200000; | ||
44 | + cpu->id_afr0 = 0x00000000; | ||
45 | + cpu->isar.id_mmfr0 = 0x00111040; | ||
46 | + cpu->isar.id_mmfr1 = 0x00000000; | ||
47 | + cpu->isar.id_mmfr2 = 0x01000000; | ||
48 | + cpu->isar.id_mmfr3 = 0x00000011; | ||
49 | + cpu->isar.id_isar0 = 0x01103110; | ||
50 | + cpu->isar.id_isar1 = 0x02212000; | ||
51 | + cpu->isar.id_isar2 = 0x20232232; | ||
52 | + cpu->isar.id_isar3 = 0x01111131; | ||
53 | + cpu->isar.id_isar4 = 0x01310132; | ||
54 | + cpu->isar.id_isar5 = 0x00000000; | ||
55 | + cpu->isar.id_isar6 = 0x00000000; | ||
56 | + cpu->clidr = 0x00000000; /* caches not implemented */ | ||
57 | + cpu->ctr = 0x8303c003; | ||
58 | +} | ||
59 | + | ||
60 | static const ARMCPRegInfo cortexr5_cp_reginfo[] = { | ||
61 | /* Dummy the TCM region regs for the moment */ | ||
62 | { .name = "ATCM", .cp = 15, .opc1 = 0, .crn = 9, .crm = 1, .opc2 = 0, | ||
63 | @@ -XXX,XX +XXX,XX @@ static const ARMCPUInfo arm_tcg_cpus[] = { | ||
64 | .class_init = arm_v7m_class_init }, | ||
65 | { .name = "cortex-m33", .initfn = cortex_m33_initfn, | ||
66 | .class_init = arm_v7m_class_init }, | ||
67 | + { .name = "cortex-m55", .initfn = cortex_m55_initfn, | ||
68 | + .class_init = arm_v7m_class_init }, | ||
69 | { .name = "cortex-r5", .initfn = cortex_r5_initfn }, | ||
70 | { .name = "cortex-r5f", .initfn = cortex_r5f_initfn }, | ||
71 | { .name = "ti925t", .initfn = ti925t_initfn }, | ||
72 | -- | ||
73 | 2.20.1 | ||
74 | |||
75 | diff view generated by jsdifflib |
1 | The header file hw/arm/arm.h now includes only declarations | 1 | Support for running KVM on 32-bit Arm hosts was removed in commit |
---|---|---|---|
2 | relating to hw/arm/boot.c functionality. Rename it accordingly, | 2 | 82bf7ae84ce739e. You can still run a 32-bit guest on a 64-bit Arm |
3 | and adjust its header comment. | 3 | host CPU, but because Arm KVM requires the host and guest CPU types |
4 | 4 | to match, it is not possible to run a guest that requires a Cortex-A9 | |
5 | The bulk of this commit was created via | 5 | or Cortex-A15 CPU there. That means that the code in the |
6 | perl -pi -e 's|hw/arm/arm.h|hw/arm/boot.h|' hw/arm/*.c include/hw/arm/*.h | 6 | highbank/midway board models to support KVM is no longer used, and we |
7 | 7 | can delete it. | |
8 | In a few cases we can just delete the #include: | ||
9 | hw/arm/msf2-soc.c, include/hw/arm/aspeed_soc.h and | ||
10 | include/hw/arm/bcm2836.h did not require it. | ||
11 | 8 | ||
12 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | 9 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
13 | Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> | 10 | Reviewed-by: Richard Henderson <richard.henderson@linaro.org> |
14 | Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> | 11 | Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> |
15 | Message-id: 20190516163857.6430-4-peter.maydell@linaro.org | 12 | Message-id: 20201215144215.28482-1-peter.maydell@linaro.org |
16 | --- | 13 | --- |
17 | include/hw/arm/allwinner-a10.h | 2 +- | 14 | hw/arm/highbank.c | 14 ++++---------- |
18 | include/hw/arm/aspeed_soc.h | 1 - | 15 | 1 file changed, 4 insertions(+), 10 deletions(-) |
19 | include/hw/arm/bcm2836.h | 1 - | ||
20 | include/hw/arm/{arm.h => boot.h} | 8 ++++---- | ||
21 | include/hw/arm/fsl-imx25.h | 2 +- | ||
22 | include/hw/arm/fsl-imx31.h | 2 +- | ||
23 | include/hw/arm/fsl-imx6.h | 2 +- | ||
24 | include/hw/arm/fsl-imx6ul.h | 2 +- | ||
25 | include/hw/arm/fsl-imx7.h | 2 +- | ||
26 | include/hw/arm/virt.h | 2 +- | ||
27 | include/hw/arm/xlnx-versal.h | 2 +- | ||
28 | include/hw/arm/xlnx-zynqmp.h | 2 +- | ||
29 | hw/arm/armsse.c | 2 +- | ||
30 | hw/arm/armv7m.c | 2 +- | ||
31 | hw/arm/aspeed.c | 2 +- | ||
32 | hw/arm/boot.c | 2 +- | ||
33 | hw/arm/collie.c | 2 +- | ||
34 | hw/arm/exynos4210.c | 2 +- | ||
35 | hw/arm/exynos4_boards.c | 2 +- | ||
36 | hw/arm/highbank.c | 2 +- | ||
37 | hw/arm/integratorcp.c | 2 +- | ||
38 | hw/arm/mainstone.c | 2 +- | ||
39 | hw/arm/microbit.c | 2 +- | ||
40 | hw/arm/mps2-tz.c | 2 +- | ||
41 | hw/arm/mps2.c | 2 +- | ||
42 | hw/arm/msf2-soc.c | 1 - | ||
43 | hw/arm/msf2-som.c | 2 +- | ||
44 | hw/arm/musca.c | 2 +- | ||
45 | hw/arm/musicpal.c | 2 +- | ||
46 | hw/arm/netduino2.c | 2 +- | ||
47 | hw/arm/nrf51_soc.c | 2 +- | ||
48 | hw/arm/nseries.c | 2 +- | ||
49 | hw/arm/omap1.c | 2 +- | ||
50 | hw/arm/omap2.c | 2 +- | ||
51 | hw/arm/omap_sx1.c | 2 +- | ||
52 | hw/arm/palm.c | 2 +- | ||
53 | hw/arm/raspi.c | 2 +- | ||
54 | hw/arm/realview.c | 2 +- | ||
55 | hw/arm/spitz.c | 2 +- | ||
56 | hw/arm/stellaris.c | 2 +- | ||
57 | hw/arm/stm32f205_soc.c | 2 +- | ||
58 | hw/arm/strongarm.c | 2 +- | ||
59 | hw/arm/tosa.c | 2 +- | ||
60 | hw/arm/versatilepb.c | 2 +- | ||
61 | hw/arm/vexpress.c | 2 +- | ||
62 | hw/arm/virt.c | 2 +- | ||
63 | hw/arm/xilinx_zynq.c | 2 +- | ||
64 | hw/arm/xlnx-versal.c | 2 +- | ||
65 | hw/arm/z2.c | 2 +- | ||
66 | 49 files changed, 49 insertions(+), 52 deletions(-) | ||
67 | rename include/hw/arm/{arm.h => boot.h} (98%) | ||
68 | 16 | ||
69 | diff --git a/include/hw/arm/allwinner-a10.h b/include/hw/arm/allwinner-a10.h | ||
70 | index XXXXXXX..XXXXXXX 100644 | ||
71 | --- a/include/hw/arm/allwinner-a10.h | ||
72 | +++ b/include/hw/arm/allwinner-a10.h | ||
73 | @@ -XXX,XX +XXX,XX @@ | ||
74 | #include "qemu-common.h" | ||
75 | #include "qemu/error-report.h" | ||
76 | #include "hw/char/serial.h" | ||
77 | -#include "hw/arm/arm.h" | ||
78 | +#include "hw/arm/boot.h" | ||
79 | #include "hw/timer/allwinner-a10-pit.h" | ||
80 | #include "hw/intc/allwinner-a10-pic.h" | ||
81 | #include "hw/net/allwinner_emac.h" | ||
82 | diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h | ||
83 | index XXXXXXX..XXXXXXX 100644 | ||
84 | --- a/include/hw/arm/aspeed_soc.h | ||
85 | +++ b/include/hw/arm/aspeed_soc.h | ||
86 | @@ -XXX,XX +XXX,XX @@ | ||
87 | #ifndef ASPEED_SOC_H | ||
88 | #define ASPEED_SOC_H | ||
89 | |||
90 | -#include "hw/arm/arm.h" | ||
91 | #include "hw/intc/aspeed_vic.h" | ||
92 | #include "hw/misc/aspeed_scu.h" | ||
93 | #include "hw/misc/aspeed_sdmc.h" | ||
94 | diff --git a/include/hw/arm/bcm2836.h b/include/hw/arm/bcm2836.h | ||
95 | index XXXXXXX..XXXXXXX 100644 | ||
96 | --- a/include/hw/arm/bcm2836.h | ||
97 | +++ b/include/hw/arm/bcm2836.h | ||
98 | @@ -XXX,XX +XXX,XX @@ | ||
99 | #ifndef BCM2836_H | ||
100 | #define BCM2836_H | ||
101 | |||
102 | -#include "hw/arm/arm.h" | ||
103 | #include "hw/arm/bcm2835_peripherals.h" | ||
104 | #include "hw/intc/bcm2836_control.h" | ||
105 | |||
106 | diff --git a/include/hw/arm/arm.h b/include/hw/arm/boot.h | ||
107 | similarity index 98% | ||
108 | rename from include/hw/arm/arm.h | ||
109 | rename to include/hw/arm/boot.h | ||
110 | index XXXXXXX..XXXXXXX 100644 | ||
111 | --- a/include/hw/arm/arm.h | ||
112 | +++ b/include/hw/arm/boot.h | ||
113 | @@ -XXX,XX +XXX,XX @@ | ||
114 | /* | ||
115 | - * Misc ARM declarations | ||
116 | + * ARM kernel loader. | ||
117 | * | ||
118 | * Copyright (c) 2006 CodeSourcery. | ||
119 | * Written by Paul Brook | ||
120 | @@ -XXX,XX +XXX,XX @@ | ||
121 | * | ||
122 | */ | ||
123 | |||
124 | -#ifndef HW_ARM_H | ||
125 | -#define HW_ARM_H | ||
126 | +#ifndef HW_ARM_BOOT_H | ||
127 | +#define HW_ARM_BOOT_H | ||
128 | |||
129 | #include "exec/memory.h" | ||
130 | #include "target/arm/cpu-qom.h" | ||
131 | @@ -XXX,XX +XXX,XX @@ void arm_write_secure_board_setup_dummy_smc(ARMCPU *cpu, | ||
132 | const struct arm_boot_info *info, | ||
133 | hwaddr mvbar_addr); | ||
134 | |||
135 | -#endif /* HW_ARM_H */ | ||
136 | +#endif /* HW_ARM_BOOT_H */ | ||
137 | diff --git a/include/hw/arm/fsl-imx25.h b/include/hw/arm/fsl-imx25.h | ||
138 | index XXXXXXX..XXXXXXX 100644 | ||
139 | --- a/include/hw/arm/fsl-imx25.h | ||
140 | +++ b/include/hw/arm/fsl-imx25.h | ||
141 | @@ -XXX,XX +XXX,XX @@ | ||
142 | #ifndef FSL_IMX25_H | ||
143 | #define FSL_IMX25_H | ||
144 | |||
145 | -#include "hw/arm/arm.h" | ||
146 | +#include "hw/arm/boot.h" | ||
147 | #include "hw/intc/imx_avic.h" | ||
148 | #include "hw/misc/imx25_ccm.h" | ||
149 | #include "hw/char/imx_serial.h" | ||
150 | diff --git a/include/hw/arm/fsl-imx31.h b/include/hw/arm/fsl-imx31.h | ||
151 | index XXXXXXX..XXXXXXX 100644 | ||
152 | --- a/include/hw/arm/fsl-imx31.h | ||
153 | +++ b/include/hw/arm/fsl-imx31.h | ||
154 | @@ -XXX,XX +XXX,XX @@ | ||
155 | #ifndef FSL_IMX31_H | ||
156 | #define FSL_IMX31_H | ||
157 | |||
158 | -#include "hw/arm/arm.h" | ||
159 | +#include "hw/arm/boot.h" | ||
160 | #include "hw/intc/imx_avic.h" | ||
161 | #include "hw/misc/imx31_ccm.h" | ||
162 | #include "hw/char/imx_serial.h" | ||
163 | diff --git a/include/hw/arm/fsl-imx6.h b/include/hw/arm/fsl-imx6.h | ||
164 | index XXXXXXX..XXXXXXX 100644 | ||
165 | --- a/include/hw/arm/fsl-imx6.h | ||
166 | +++ b/include/hw/arm/fsl-imx6.h | ||
167 | @@ -XXX,XX +XXX,XX @@ | ||
168 | #ifndef FSL_IMX6_H | ||
169 | #define FSL_IMX6_H | ||
170 | |||
171 | -#include "hw/arm/arm.h" | ||
172 | +#include "hw/arm/boot.h" | ||
173 | #include "hw/cpu/a9mpcore.h" | ||
174 | #include "hw/misc/imx6_ccm.h" | ||
175 | #include "hw/misc/imx6_src.h" | ||
176 | diff --git a/include/hw/arm/fsl-imx6ul.h b/include/hw/arm/fsl-imx6ul.h | ||
177 | index XXXXXXX..XXXXXXX 100644 | ||
178 | --- a/include/hw/arm/fsl-imx6ul.h | ||
179 | +++ b/include/hw/arm/fsl-imx6ul.h | ||
180 | @@ -XXX,XX +XXX,XX @@ | ||
181 | #ifndef FSL_IMX6UL_H | ||
182 | #define FSL_IMX6UL_H | ||
183 | |||
184 | -#include "hw/arm/arm.h" | ||
185 | +#include "hw/arm/boot.h" | ||
186 | #include "hw/cpu/a15mpcore.h" | ||
187 | #include "hw/misc/imx6ul_ccm.h" | ||
188 | #include "hw/misc/imx6_src.h" | ||
189 | diff --git a/include/hw/arm/fsl-imx7.h b/include/hw/arm/fsl-imx7.h | ||
190 | index XXXXXXX..XXXXXXX 100644 | ||
191 | --- a/include/hw/arm/fsl-imx7.h | ||
192 | +++ b/include/hw/arm/fsl-imx7.h | ||
193 | @@ -XXX,XX +XXX,XX @@ | ||
194 | #ifndef FSL_IMX7_H | ||
195 | #define FSL_IMX7_H | ||
196 | |||
197 | -#include "hw/arm/arm.h" | ||
198 | +#include "hw/arm/boot.h" | ||
199 | #include "hw/cpu/a15mpcore.h" | ||
200 | #include "hw/intc/imx_gpcv2.h" | ||
201 | #include "hw/misc/imx7_ccm.h" | ||
202 | diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h | ||
203 | index XXXXXXX..XXXXXXX 100644 | ||
204 | --- a/include/hw/arm/virt.h | ||
205 | +++ b/include/hw/arm/virt.h | ||
206 | @@ -XXX,XX +XXX,XX @@ | ||
207 | #include "exec/hwaddr.h" | ||
208 | #include "qemu/notify.h" | ||
209 | #include "hw/boards.h" | ||
210 | -#include "hw/arm/arm.h" | ||
211 | +#include "hw/arm/boot.h" | ||
212 | #include "hw/block/flash.h" | ||
213 | #include "sysemu/kvm.h" | ||
214 | #include "hw/intc/arm_gicv3_common.h" | ||
215 | diff --git a/include/hw/arm/xlnx-versal.h b/include/hw/arm/xlnx-versal.h | ||
216 | index XXXXXXX..XXXXXXX 100644 | ||
217 | --- a/include/hw/arm/xlnx-versal.h | ||
218 | +++ b/include/hw/arm/xlnx-versal.h | ||
219 | @@ -XXX,XX +XXX,XX @@ | ||
220 | #define XLNX_VERSAL_H | ||
221 | |||
222 | #include "hw/sysbus.h" | ||
223 | -#include "hw/arm/arm.h" | ||
224 | +#include "hw/arm/boot.h" | ||
225 | #include "hw/intc/arm_gicv3.h" | ||
226 | |||
227 | #define TYPE_XLNX_VERSAL "xlnx-versal" | ||
228 | diff --git a/include/hw/arm/xlnx-zynqmp.h b/include/hw/arm/xlnx-zynqmp.h | ||
229 | index XXXXXXX..XXXXXXX 100644 | ||
230 | --- a/include/hw/arm/xlnx-zynqmp.h | ||
231 | +++ b/include/hw/arm/xlnx-zynqmp.h | ||
232 | @@ -XXX,XX +XXX,XX @@ | ||
233 | #ifndef XLNX_ZYNQMP_H | ||
234 | |||
235 | #include "qemu-common.h" | ||
236 | -#include "hw/arm/arm.h" | ||
237 | +#include "hw/arm/boot.h" | ||
238 | #include "hw/intc/arm_gic.h" | ||
239 | #include "hw/net/cadence_gem.h" | ||
240 | #include "hw/char/cadence_uart.h" | ||
241 | diff --git a/hw/arm/armsse.c b/hw/arm/armsse.c | ||
242 | index XXXXXXX..XXXXXXX 100644 | ||
243 | --- a/hw/arm/armsse.c | ||
244 | +++ b/hw/arm/armsse.c | ||
245 | @@ -XXX,XX +XXX,XX @@ | ||
246 | #include "hw/sysbus.h" | ||
247 | #include "hw/registerfields.h" | ||
248 | #include "hw/arm/armsse.h" | ||
249 | -#include "hw/arm/arm.h" | ||
250 | +#include "hw/arm/boot.h" | ||
251 | |||
252 | /* Format of the System Information block SYS_CONFIG register */ | ||
253 | typedef enum SysConfigFormat { | ||
254 | diff --git a/hw/arm/armv7m.c b/hw/arm/armv7m.c | ||
255 | index XXXXXXX..XXXXXXX 100644 | ||
256 | --- a/hw/arm/armv7m.c | ||
257 | +++ b/hw/arm/armv7m.c | ||
258 | @@ -XXX,XX +XXX,XX @@ | ||
259 | #include "qemu-common.h" | ||
260 | #include "cpu.h" | ||
261 | #include "hw/sysbus.h" | ||
262 | -#include "hw/arm/arm.h" | ||
263 | +#include "hw/arm/boot.h" | ||
264 | #include "hw/loader.h" | ||
265 | #include "elf.h" | ||
266 | #include "sysemu/qtest.h" | ||
267 | diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c | ||
268 | index XXXXXXX..XXXXXXX 100644 | ||
269 | --- a/hw/arm/aspeed.c | ||
270 | +++ b/hw/arm/aspeed.c | ||
271 | @@ -XXX,XX +XXX,XX @@ | ||
272 | #include "qemu-common.h" | ||
273 | #include "cpu.h" | ||
274 | #include "exec/address-spaces.h" | ||
275 | -#include "hw/arm/arm.h" | ||
276 | +#include "hw/arm/boot.h" | ||
277 | #include "hw/arm/aspeed.h" | ||
278 | #include "hw/arm/aspeed_soc.h" | ||
279 | #include "hw/boards.h" | ||
280 | diff --git a/hw/arm/boot.c b/hw/arm/boot.c | ||
281 | index XXXXXXX..XXXXXXX 100644 | ||
282 | --- a/hw/arm/boot.c | ||
283 | +++ b/hw/arm/boot.c | ||
284 | @@ -XXX,XX +XXX,XX @@ | ||
285 | #include "qapi/error.h" | ||
286 | #include <libfdt.h> | ||
287 | #include "hw/hw.h" | ||
288 | -#include "hw/arm/arm.h" | ||
289 | +#include "hw/arm/boot.h" | ||
290 | #include "hw/arm/linux-boot-if.h" | ||
291 | #include "sysemu/kvm.h" | ||
292 | #include "sysemu/sysemu.h" | ||
293 | diff --git a/hw/arm/collie.c b/hw/arm/collie.c | ||
294 | index XXXXXXX..XXXXXXX 100644 | ||
295 | --- a/hw/arm/collie.c | ||
296 | +++ b/hw/arm/collie.c | ||
297 | @@ -XXX,XX +XXX,XX @@ | ||
298 | #include "hw/sysbus.h" | ||
299 | #include "hw/boards.h" | ||
300 | #include "strongarm.h" | ||
301 | -#include "hw/arm/arm.h" | ||
302 | +#include "hw/arm/boot.h" | ||
303 | #include "hw/block/flash.h" | ||
304 | #include "exec/address-spaces.h" | ||
305 | #include "cpu.h" | ||
306 | diff --git a/hw/arm/exynos4210.c b/hw/arm/exynos4210.c | ||
307 | index XXXXXXX..XXXXXXX 100644 | ||
308 | --- a/hw/arm/exynos4210.c | ||
309 | +++ b/hw/arm/exynos4210.c | ||
310 | @@ -XXX,XX +XXX,XX @@ | ||
311 | #include "hw/boards.h" | ||
312 | #include "sysemu/sysemu.h" | ||
313 | #include "hw/sysbus.h" | ||
314 | -#include "hw/arm/arm.h" | ||
315 | +#include "hw/arm/boot.h" | ||
316 | #include "hw/loader.h" | ||
317 | #include "hw/arm/exynos4210.h" | ||
318 | #include "hw/sd/sdhci.h" | ||
319 | diff --git a/hw/arm/exynos4_boards.c b/hw/arm/exynos4_boards.c | ||
320 | index XXXXXXX..XXXXXXX 100644 | ||
321 | --- a/hw/arm/exynos4_boards.c | ||
322 | +++ b/hw/arm/exynos4_boards.c | ||
323 | @@ -XXX,XX +XXX,XX @@ | ||
324 | #include "sysemu/sysemu.h" | ||
325 | #include "hw/sysbus.h" | ||
326 | #include "net/net.h" | ||
327 | -#include "hw/arm/arm.h" | ||
328 | +#include "hw/arm/boot.h" | ||
329 | #include "exec/address-spaces.h" | ||
330 | #include "hw/arm/exynos4210.h" | ||
331 | #include "hw/net/lan9118.h" | ||
332 | diff --git a/hw/arm/highbank.c b/hw/arm/highbank.c | 17 | diff --git a/hw/arm/highbank.c b/hw/arm/highbank.c |
333 | index XXXXXXX..XXXXXXX 100644 | 18 | index XXXXXXX..XXXXXXX 100644 |
334 | --- a/hw/arm/highbank.c | 19 | --- a/hw/arm/highbank.c |
335 | +++ b/hw/arm/highbank.c | 20 | +++ b/hw/arm/highbank.c |
336 | @@ -XXX,XX +XXX,XX @@ | 21 | @@ -XXX,XX +XXX,XX @@ |
337 | #include "qemu/osdep.h" | 22 | #include "hw/arm/boot.h" |
338 | #include "qapi/error.h" | ||
339 | #include "hw/sysbus.h" | ||
340 | -#include "hw/arm/arm.h" | ||
341 | +#include "hw/arm/boot.h" | ||
342 | #include "hw/loader.h" | 23 | #include "hw/loader.h" |
343 | #include "net/net.h" | 24 | #include "net/net.h" |
344 | #include "sysemu/kvm.h" | 25 | -#include "sysemu/kvm.h" |
345 | diff --git a/hw/arm/integratorcp.c b/hw/arm/integratorcp.c | 26 | #include "sysemu/runstate.h" |
346 | index XXXXXXX..XXXXXXX 100644 | ||
347 | --- a/hw/arm/integratorcp.c | ||
348 | +++ b/hw/arm/integratorcp.c | ||
349 | @@ -XXX,XX +XXX,XX @@ | ||
350 | #include "cpu.h" | ||
351 | #include "hw/sysbus.h" | ||
352 | #include "hw/boards.h" | ||
353 | -#include "hw/arm/arm.h" | ||
354 | +#include "hw/arm/boot.h" | ||
355 | #include "hw/misc/arm_integrator_debug.h" | ||
356 | #include "hw/net/smc91c111.h" | ||
357 | #include "net/net.h" | ||
358 | diff --git a/hw/arm/mainstone.c b/hw/arm/mainstone.c | ||
359 | index XXXXXXX..XXXXXXX 100644 | ||
360 | --- a/hw/arm/mainstone.c | ||
361 | +++ b/hw/arm/mainstone.c | ||
362 | @@ -XXX,XX +XXX,XX @@ | ||
363 | #include "qapi/error.h" | ||
364 | #include "hw/hw.h" | ||
365 | #include "hw/arm/pxa.h" | ||
366 | -#include "hw/arm/arm.h" | ||
367 | +#include "hw/arm/boot.h" | ||
368 | #include "net/net.h" | ||
369 | #include "hw/net/smc91c111.h" | ||
370 | #include "hw/boards.h" | ||
371 | diff --git a/hw/arm/microbit.c b/hw/arm/microbit.c | ||
372 | index XXXXXXX..XXXXXXX 100644 | ||
373 | --- a/hw/arm/microbit.c | ||
374 | +++ b/hw/arm/microbit.c | ||
375 | @@ -XXX,XX +XXX,XX @@ | ||
376 | #include "qemu/osdep.h" | ||
377 | #include "qapi/error.h" | ||
378 | #include "hw/boards.h" | ||
379 | -#include "hw/arm/arm.h" | ||
380 | +#include "hw/arm/boot.h" | ||
381 | #include "sysemu/sysemu.h" | ||
382 | #include "exec/address-spaces.h" | ||
383 | |||
384 | diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c | ||
385 | index XXXXXXX..XXXXXXX 100644 | ||
386 | --- a/hw/arm/mps2-tz.c | ||
387 | +++ b/hw/arm/mps2-tz.c | ||
388 | @@ -XXX,XX +XXX,XX @@ | ||
389 | #include "qemu/osdep.h" | ||
390 | #include "qapi/error.h" | ||
391 | #include "qemu/error-report.h" | ||
392 | -#include "hw/arm/arm.h" | ||
393 | +#include "hw/arm/boot.h" | ||
394 | #include "hw/arm/armv7m.h" | ||
395 | #include "hw/or-irq.h" | ||
396 | #include "hw/boards.h" | ||
397 | diff --git a/hw/arm/mps2.c b/hw/arm/mps2.c | ||
398 | index XXXXXXX..XXXXXXX 100644 | ||
399 | --- a/hw/arm/mps2.c | ||
400 | +++ b/hw/arm/mps2.c | ||
401 | @@ -XXX,XX +XXX,XX @@ | ||
402 | #include "qemu/osdep.h" | ||
403 | #include "qapi/error.h" | ||
404 | #include "qemu/error-report.h" | ||
405 | -#include "hw/arm/arm.h" | ||
406 | +#include "hw/arm/boot.h" | ||
407 | #include "hw/arm/armv7m.h" | ||
408 | #include "hw/or-irq.h" | ||
409 | #include "hw/boards.h" | ||
410 | diff --git a/hw/arm/msf2-soc.c b/hw/arm/msf2-soc.c | ||
411 | index XXXXXXX..XXXXXXX 100644 | ||
412 | --- a/hw/arm/msf2-soc.c | ||
413 | +++ b/hw/arm/msf2-soc.c | ||
414 | @@ -XXX,XX +XXX,XX @@ | ||
415 | #include "qemu/units.h" | ||
416 | #include "qapi/error.h" | ||
417 | #include "qemu-common.h" | ||
418 | -#include "hw/arm/arm.h" | ||
419 | #include "exec/address-spaces.h" | ||
420 | #include "hw/char/serial.h" | ||
421 | #include "hw/boards.h" | ||
422 | diff --git a/hw/arm/msf2-som.c b/hw/arm/msf2-som.c | ||
423 | index XXXXXXX..XXXXXXX 100644 | ||
424 | --- a/hw/arm/msf2-som.c | ||
425 | +++ b/hw/arm/msf2-som.c | ||
426 | @@ -XXX,XX +XXX,XX @@ | ||
427 | #include "qapi/error.h" | ||
428 | #include "qemu/error-report.h" | ||
429 | #include "hw/boards.h" | ||
430 | -#include "hw/arm/arm.h" | ||
431 | +#include "hw/arm/boot.h" | ||
432 | #include "exec/address-spaces.h" | ||
433 | #include "hw/arm/msf2-soc.h" | ||
434 | #include "cpu.h" | ||
435 | diff --git a/hw/arm/musca.c b/hw/arm/musca.c | ||
436 | index XXXXXXX..XXXXXXX 100644 | ||
437 | --- a/hw/arm/musca.c | ||
438 | +++ b/hw/arm/musca.c | ||
439 | @@ -XXX,XX +XXX,XX @@ | ||
440 | #include "qapi/error.h" | ||
441 | #include "exec/address-spaces.h" | ||
442 | #include "sysemu/sysemu.h" | ||
443 | -#include "hw/arm/arm.h" | ||
444 | +#include "hw/arm/boot.h" | ||
445 | #include "hw/arm/armsse.h" | ||
446 | #include "hw/boards.h" | ||
447 | #include "hw/char/pl011.h" | ||
448 | diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c | ||
449 | index XXXXXXX..XXXXXXX 100644 | ||
450 | --- a/hw/arm/musicpal.c | ||
451 | +++ b/hw/arm/musicpal.c | ||
452 | @@ -XXX,XX +XXX,XX @@ | ||
453 | #include "qemu-common.h" | ||
454 | #include "cpu.h" | ||
455 | #include "hw/sysbus.h" | ||
456 | -#include "hw/arm/arm.h" | ||
457 | +#include "hw/arm/boot.h" | ||
458 | #include "net/net.h" | ||
459 | #include "sysemu/sysemu.h" | 27 | #include "sysemu/sysemu.h" |
460 | #include "hw/boards.h" | 28 | #include "hw/boards.h" |
461 | diff --git a/hw/arm/netduino2.c b/hw/arm/netduino2.c | ||
462 | index XXXXXXX..XXXXXXX 100644 | ||
463 | --- a/hw/arm/netduino2.c | ||
464 | +++ b/hw/arm/netduino2.c | ||
465 | @@ -XXX,XX +XXX,XX @@ | 29 | @@ -XXX,XX +XXX,XX @@ |
466 | #include "hw/boards.h" | 30 | #include "hw/cpu/a15mpcore.h" |
467 | #include "qemu/error-report.h" | 31 | #include "qemu/log.h" |
468 | #include "hw/arm/stm32f205_soc.h" | 32 | #include "qom/object.h" |
469 | -#include "hw/arm/arm.h" | 33 | +#include "cpu.h" |
470 | +#include "hw/arm/boot.h" | 34 | |
471 | 35 | #define SMP_BOOT_ADDR 0x100 | |
472 | static void netduino2_init(MachineState *machine) | 36 | #define SMP_BOOT_REG 0x40 |
473 | { | 37 | @@ -XXX,XX +XXX,XX @@ static void calxeda_init(MachineState *machine, enum cxmachines machine_id) |
474 | diff --git a/hw/arm/nrf51_soc.c b/hw/arm/nrf51_soc.c | 38 | highbank_binfo.loader_start = 0; |
475 | index XXXXXXX..XXXXXXX 100644 | 39 | highbank_binfo.write_secondary_boot = hb_write_secondary; |
476 | --- a/hw/arm/nrf51_soc.c | 40 | highbank_binfo.secondary_cpu_reset_hook = hb_reset_secondary; |
477 | +++ b/hw/arm/nrf51_soc.c | 41 | - if (!kvm_enabled()) { |
478 | @@ -XXX,XX +XXX,XX @@ | 42 | - highbank_binfo.board_setup_addr = BOARD_SETUP_ADDR; |
479 | #include "qemu/osdep.h" | 43 | - highbank_binfo.write_board_setup = hb_write_board_setup; |
480 | #include "qapi/error.h" | 44 | - highbank_binfo.secure_board_setup = true; |
481 | #include "qemu-common.h" | 45 | - } else { |
482 | -#include "hw/arm/arm.h" | 46 | - warn_report("cannot load built-in Monitor support " |
483 | +#include "hw/arm/boot.h" | 47 | - "if KVM is enabled. Some guests (such as Linux) " |
484 | #include "hw/sysbus.h" | 48 | - "may not boot."); |
485 | #include "hw/boards.h" | 49 | - } |
486 | #include "hw/misc/unimp.h" | 50 | + highbank_binfo.board_setup_addr = BOARD_SETUP_ADDR; |
487 | diff --git a/hw/arm/nseries.c b/hw/arm/nseries.c | 51 | + highbank_binfo.write_board_setup = hb_write_board_setup; |
488 | index XXXXXXX..XXXXXXX 100644 | 52 | + highbank_binfo.secure_board_setup = true; |
489 | --- a/hw/arm/nseries.c | 53 | |
490 | +++ b/hw/arm/nseries.c | 54 | arm_load_kernel(ARM_CPU(first_cpu), machine, &highbank_binfo); |
491 | @@ -XXX,XX +XXX,XX @@ | 55 | } |
492 | #include "qemu/bswap.h" | ||
493 | #include "sysemu/sysemu.h" | ||
494 | #include "hw/arm/omap.h" | ||
495 | -#include "hw/arm/arm.h" | ||
496 | +#include "hw/arm/boot.h" | ||
497 | #include "hw/irq.h" | ||
498 | #include "ui/console.h" | ||
499 | #include "hw/boards.h" | ||
500 | diff --git a/hw/arm/omap1.c b/hw/arm/omap1.c | ||
501 | index XXXXXXX..XXXXXXX 100644 | ||
502 | --- a/hw/arm/omap1.c | ||
503 | +++ b/hw/arm/omap1.c | ||
504 | @@ -XXX,XX +XXX,XX @@ | ||
505 | #include "cpu.h" | ||
506 | #include "hw/boards.h" | ||
507 | #include "hw/hw.h" | ||
508 | -#include "hw/arm/arm.h" | ||
509 | +#include "hw/arm/boot.h" | ||
510 | #include "hw/arm/omap.h" | ||
511 | #include "sysemu/sysemu.h" | ||
512 | #include "hw/arm/soc_dma.h" | ||
513 | diff --git a/hw/arm/omap2.c b/hw/arm/omap2.c | ||
514 | index XXXXXXX..XXXXXXX 100644 | ||
515 | --- a/hw/arm/omap2.c | ||
516 | +++ b/hw/arm/omap2.c | ||
517 | @@ -XXX,XX +XXX,XX @@ | ||
518 | #include "sysemu/qtest.h" | ||
519 | #include "hw/boards.h" | ||
520 | #include "hw/hw.h" | ||
521 | -#include "hw/arm/arm.h" | ||
522 | +#include "hw/arm/boot.h" | ||
523 | #include "hw/arm/omap.h" | ||
524 | #include "sysemu/sysemu.h" | ||
525 | #include "qemu/timer.h" | ||
526 | diff --git a/hw/arm/omap_sx1.c b/hw/arm/omap_sx1.c | ||
527 | index XXXXXXX..XXXXXXX 100644 | ||
528 | --- a/hw/arm/omap_sx1.c | ||
529 | +++ b/hw/arm/omap_sx1.c | ||
530 | @@ -XXX,XX +XXX,XX @@ | ||
531 | #include "ui/console.h" | ||
532 | #include "hw/arm/omap.h" | ||
533 | #include "hw/boards.h" | ||
534 | -#include "hw/arm/arm.h" | ||
535 | +#include "hw/arm/boot.h" | ||
536 | #include "hw/block/flash.h" | ||
537 | #include "sysemu/qtest.h" | ||
538 | #include "exec/address-spaces.h" | ||
539 | diff --git a/hw/arm/palm.c b/hw/arm/palm.c | ||
540 | index XXXXXXX..XXXXXXX 100644 | ||
541 | --- a/hw/arm/palm.c | ||
542 | +++ b/hw/arm/palm.c | ||
543 | @@ -XXX,XX +XXX,XX @@ | ||
544 | #include "ui/console.h" | ||
545 | #include "hw/arm/omap.h" | ||
546 | #include "hw/boards.h" | ||
547 | -#include "hw/arm/arm.h" | ||
548 | +#include "hw/arm/boot.h" | ||
549 | #include "hw/input/tsc2xxx.h" | ||
550 | #include "hw/loader.h" | ||
551 | #include "exec/address-spaces.h" | ||
552 | diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c | ||
553 | index XXXXXXX..XXXXXXX 100644 | ||
554 | --- a/hw/arm/raspi.c | ||
555 | +++ b/hw/arm/raspi.c | ||
556 | @@ -XXX,XX +XXX,XX @@ | ||
557 | #include "qemu/error-report.h" | ||
558 | #include "hw/boards.h" | ||
559 | #include "hw/loader.h" | ||
560 | -#include "hw/arm/arm.h" | ||
561 | +#include "hw/arm/boot.h" | ||
562 | #include "sysemu/sysemu.h" | ||
563 | |||
564 | #define SMPBOOT_ADDR 0x300 /* this should leave enough space for ATAGS */ | ||
565 | diff --git a/hw/arm/realview.c b/hw/arm/realview.c | ||
566 | index XXXXXXX..XXXXXXX 100644 | ||
567 | --- a/hw/arm/realview.c | ||
568 | +++ b/hw/arm/realview.c | ||
569 | @@ -XXX,XX +XXX,XX @@ | ||
570 | #include "qemu-common.h" | ||
571 | #include "cpu.h" | ||
572 | #include "hw/sysbus.h" | ||
573 | -#include "hw/arm/arm.h" | ||
574 | +#include "hw/arm/boot.h" | ||
575 | #include "hw/arm/primecell.h" | ||
576 | #include "hw/net/lan9118.h" | ||
577 | #include "hw/net/smc91c111.h" | ||
578 | diff --git a/hw/arm/spitz.c b/hw/arm/spitz.c | ||
579 | index XXXXXXX..XXXXXXX 100644 | ||
580 | --- a/hw/arm/spitz.c | ||
581 | +++ b/hw/arm/spitz.c | ||
582 | @@ -XXX,XX +XXX,XX @@ | ||
583 | #include "qapi/error.h" | ||
584 | #include "hw/hw.h" | ||
585 | #include "hw/arm/pxa.h" | ||
586 | -#include "hw/arm/arm.h" | ||
587 | +#include "hw/arm/boot.h" | ||
588 | #include "sysemu/sysemu.h" | ||
589 | #include "hw/pcmcia.h" | ||
590 | #include "hw/i2c/i2c.h" | ||
591 | diff --git a/hw/arm/stellaris.c b/hw/arm/stellaris.c | ||
592 | index XXXXXXX..XXXXXXX 100644 | ||
593 | --- a/hw/arm/stellaris.c | ||
594 | +++ b/hw/arm/stellaris.c | ||
595 | @@ -XXX,XX +XXX,XX @@ | ||
596 | #include "qapi/error.h" | ||
597 | #include "hw/sysbus.h" | ||
598 | #include "hw/ssi/ssi.h" | ||
599 | -#include "hw/arm/arm.h" | ||
600 | +#include "hw/arm/boot.h" | ||
601 | #include "qemu/timer.h" | ||
602 | #include "hw/i2c/i2c.h" | ||
603 | #include "net/net.h" | ||
604 | diff --git a/hw/arm/stm32f205_soc.c b/hw/arm/stm32f205_soc.c | ||
605 | index XXXXXXX..XXXXXXX 100644 | ||
606 | --- a/hw/arm/stm32f205_soc.c | ||
607 | +++ b/hw/arm/stm32f205_soc.c | ||
608 | @@ -XXX,XX +XXX,XX @@ | ||
609 | #include "qemu/osdep.h" | ||
610 | #include "qapi/error.h" | ||
611 | #include "qemu-common.h" | ||
612 | -#include "hw/arm/arm.h" | ||
613 | +#include "hw/arm/boot.h" | ||
614 | #include "exec/address-spaces.h" | ||
615 | #include "hw/arm/stm32f205_soc.h" | ||
616 | |||
617 | diff --git a/hw/arm/strongarm.c b/hw/arm/strongarm.c | ||
618 | index XXXXXXX..XXXXXXX 100644 | ||
619 | --- a/hw/arm/strongarm.c | ||
620 | +++ b/hw/arm/strongarm.c | ||
621 | @@ -XXX,XX +XXX,XX @@ | ||
622 | #include "hw/sysbus.h" | ||
623 | #include "strongarm.h" | ||
624 | #include "qemu/error-report.h" | ||
625 | -#include "hw/arm/arm.h" | ||
626 | +#include "hw/arm/boot.h" | ||
627 | #include "chardev/char-fe.h" | ||
628 | #include "chardev/char-serial.h" | ||
629 | #include "sysemu/sysemu.h" | ||
630 | diff --git a/hw/arm/tosa.c b/hw/arm/tosa.c | ||
631 | index XXXXXXX..XXXXXXX 100644 | ||
632 | --- a/hw/arm/tosa.c | ||
633 | +++ b/hw/arm/tosa.c | ||
634 | @@ -XXX,XX +XXX,XX @@ | ||
635 | #include "qapi/error.h" | ||
636 | #include "hw/hw.h" | ||
637 | #include "hw/arm/pxa.h" | ||
638 | -#include "hw/arm/arm.h" | ||
639 | +#include "hw/arm/boot.h" | ||
640 | #include "hw/arm/sharpsl.h" | ||
641 | #include "hw/pcmcia.h" | ||
642 | #include "hw/boards.h" | ||
643 | diff --git a/hw/arm/versatilepb.c b/hw/arm/versatilepb.c | ||
644 | index XXXXXXX..XXXXXXX 100644 | ||
645 | --- a/hw/arm/versatilepb.c | ||
646 | +++ b/hw/arm/versatilepb.c | ||
647 | @@ -XXX,XX +XXX,XX @@ | ||
648 | #include "qemu-common.h" | ||
649 | #include "cpu.h" | ||
650 | #include "hw/sysbus.h" | ||
651 | -#include "hw/arm/arm.h" | ||
652 | +#include "hw/arm/boot.h" | ||
653 | #include "hw/net/smc91c111.h" | ||
654 | #include "net/net.h" | ||
655 | #include "sysemu/sysemu.h" | ||
656 | diff --git a/hw/arm/vexpress.c b/hw/arm/vexpress.c | ||
657 | index XXXXXXX..XXXXXXX 100644 | ||
658 | --- a/hw/arm/vexpress.c | ||
659 | +++ b/hw/arm/vexpress.c | ||
660 | @@ -XXX,XX +XXX,XX @@ | ||
661 | #include "qemu-common.h" | ||
662 | #include "cpu.h" | ||
663 | #include "hw/sysbus.h" | ||
664 | -#include "hw/arm/arm.h" | ||
665 | +#include "hw/arm/boot.h" | ||
666 | #include "hw/arm/primecell.h" | ||
667 | #include "hw/net/lan9118.h" | ||
668 | #include "hw/i2c/i2c.h" | ||
669 | diff --git a/hw/arm/virt.c b/hw/arm/virt.c | ||
670 | index XXXXXXX..XXXXXXX 100644 | ||
671 | --- a/hw/arm/virt.c | ||
672 | +++ b/hw/arm/virt.c | ||
673 | @@ -XXX,XX +XXX,XX @@ | ||
674 | #include "qemu/option.h" | ||
675 | #include "qapi/error.h" | ||
676 | #include "hw/sysbus.h" | ||
677 | -#include "hw/arm/arm.h" | ||
678 | +#include "hw/arm/boot.h" | ||
679 | #include "hw/arm/primecell.h" | ||
680 | #include "hw/arm/virt.h" | ||
681 | #include "hw/block/flash.h" | ||
682 | diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c | ||
683 | index XXXXXXX..XXXXXXX 100644 | ||
684 | --- a/hw/arm/xilinx_zynq.c | ||
685 | +++ b/hw/arm/xilinx_zynq.c | ||
686 | @@ -XXX,XX +XXX,XX @@ | ||
687 | #include "qemu-common.h" | ||
688 | #include "cpu.h" | ||
689 | #include "hw/sysbus.h" | ||
690 | -#include "hw/arm/arm.h" | ||
691 | +#include "hw/arm/boot.h" | ||
692 | #include "net/net.h" | ||
693 | #include "exec/address-spaces.h" | ||
694 | #include "sysemu/sysemu.h" | ||
695 | diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c | ||
696 | index XXXXXXX..XXXXXXX 100644 | ||
697 | --- a/hw/arm/xlnx-versal.c | ||
698 | +++ b/hw/arm/xlnx-versal.c | ||
699 | @@ -XXX,XX +XXX,XX @@ | ||
700 | #include "net/net.h" | ||
701 | #include "sysemu/sysemu.h" | ||
702 | #include "sysemu/kvm.h" | ||
703 | -#include "hw/arm/arm.h" | ||
704 | +#include "hw/arm/boot.h" | ||
705 | #include "kvm_arm.h" | ||
706 | #include "hw/misc/unimp.h" | ||
707 | #include "hw/intc/arm_gicv3_common.h" | ||
708 | diff --git a/hw/arm/z2.c b/hw/arm/z2.c | ||
709 | index XXXXXXX..XXXXXXX 100644 | ||
710 | --- a/hw/arm/z2.c | ||
711 | +++ b/hw/arm/z2.c | ||
712 | @@ -XXX,XX +XXX,XX @@ | ||
713 | #include "qemu/osdep.h" | ||
714 | #include "hw/hw.h" | ||
715 | #include "hw/arm/pxa.h" | ||
716 | -#include "hw/arm/arm.h" | ||
717 | +#include "hw/arm/boot.h" | ||
718 | #include "hw/i2c/i2c.h" | ||
719 | #include "hw/ssi/ssi.h" | ||
720 | #include "hw/boards.h" | ||
721 | -- | 56 | -- |
722 | 2.20.1 | 57 | 2.20.1 |
723 | 58 | ||
724 | 59 | diff view generated by jsdifflib |
1 | In ich_vmcr_write() we enforce "writes of BPR fields to less than | 1 | Currently timer_free() is a simple wrapper for g_free(). This means |
---|---|---|---|
2 | their minimum sets them to the minimum" by doing a "read vbpr and | 2 | that the timer being freed must not be currently active, as otherwise |
3 | write it back" operation. A typo here meant that we weren't handling | 3 | QEMU might crash later when the active list is processed and still |
4 | writes to these fields correctly, because we were reading from VBPR0 | 4 | has a pointer to freed memory on it. As a result almost all calls to |
5 | but writing to VBPR1. | 5 | timer_free() are preceded by a timer_del() call, as can be seen in |
6 | the output of | ||
7 | git grep -B1 '\<timer_free\>' | ||
8 | |||
9 | This is unfortunate API design as it makes it easy to accidentally | ||
10 | misuse (by forgetting the timer_del()), and the correct use is | ||
11 | annoyingly verbose. | ||
12 | |||
13 | Make timer_free() imply a timer_del(). | ||
6 | 14 | ||
7 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | 15 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
8 | Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> | 16 | Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> |
9 | Message-id: 20190520162809.2677-4-peter.maydell@linaro.org | 17 | Reviewed-by: Richard Henderson <richard.henderson@linaro.org> |
18 | Message-id: 20201215154107.3255-2-peter.maydell@linaro.org | ||
10 | --- | 19 | --- |
11 | hw/intc/arm_gicv3_cpuif.c | 2 +- | 20 | include/qemu/timer.h | 24 +++++++++++++----------- |
12 | 1 file changed, 1 insertion(+), 1 deletion(-) | 21 | 1 file changed, 13 insertions(+), 11 deletions(-) |
13 | 22 | ||
14 | diff --git a/hw/intc/arm_gicv3_cpuif.c b/hw/intc/arm_gicv3_cpuif.c | 23 | diff --git a/include/qemu/timer.h b/include/qemu/timer.h |
15 | index XXXXXXX..XXXXXXX 100644 | 24 | index XXXXXXX..XXXXXXX 100644 |
16 | --- a/hw/intc/arm_gicv3_cpuif.c | 25 | --- a/include/qemu/timer.h |
17 | +++ b/hw/intc/arm_gicv3_cpuif.c | 26 | +++ b/include/qemu/timer.h |
18 | @@ -XXX,XX +XXX,XX @@ static void ich_vmcr_write(CPUARMState *env, const ARMCPRegInfo *ri, | 27 | @@ -XXX,XX +XXX,XX @@ static inline QEMUTimer *timer_new_ms(QEMUClockType type, QEMUTimerCB *cb, |
19 | /* Enforce "writing BPRs to less than minimum sets them to the minimum" | 28 | */ |
20 | * by reading and writing back the fields. | 29 | void timer_deinit(QEMUTimer *ts); |
21 | */ | 30 | |
22 | - write_vbpr(cs, GICV3_G1, read_vbpr(cs, GICV3_G0)); | 31 | -/** |
23 | + write_vbpr(cs, GICV3_G0, read_vbpr(cs, GICV3_G0)); | 32 | - * timer_free: |
24 | write_vbpr(cs, GICV3_G1, read_vbpr(cs, GICV3_G1)); | 33 | - * @ts: the timer |
25 | 34 | - * | |
26 | gicv3_cpuif_virt_update(cs); | 35 | - * Free a timer (it must not be on the active list) |
36 | - */ | ||
37 | -static inline void timer_free(QEMUTimer *ts) | ||
38 | -{ | ||
39 | - g_free(ts); | ||
40 | -} | ||
41 | - | ||
42 | /** | ||
43 | * timer_del: | ||
44 | * @ts: the timer | ||
45 | @@ -XXX,XX +XXX,XX @@ static inline void timer_free(QEMUTimer *ts) | ||
46 | */ | ||
47 | void timer_del(QEMUTimer *ts); | ||
48 | |||
49 | +/** | ||
50 | + * timer_free: | ||
51 | + * @ts: the timer | ||
52 | + * | ||
53 | + * Free a timer. This will call timer_del() for you to remove | ||
54 | + * the timer from the active list if it was still active. | ||
55 | + */ | ||
56 | +static inline void timer_free(QEMUTimer *ts) | ||
57 | +{ | ||
58 | + timer_del(ts); | ||
59 | + g_free(ts); | ||
60 | +} | ||
61 | + | ||
62 | /** | ||
63 | * timer_mod_ns: | ||
64 | * @ts: the timer | ||
27 | -- | 65 | -- |
28 | 2.20.1 | 66 | 2.20.1 |
29 | 67 | ||
30 | 68 | diff view generated by jsdifflib |
New patch | |||
---|---|---|---|
1 | Now that timer_free() implicitly calls timer_del(), sequences | ||
2 | timer_del(mytimer); | ||
3 | timer_free(mytimer); | ||
1 | 4 | ||
5 | can be simplified to just | ||
6 | timer_free(mytimer); | ||
7 | |||
8 | Add a Coccinelle script to do this transformation. | ||
9 | |||
10 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | ||
11 | Acked-by: Paolo Bonzini <pbonzini@redhat.com> | ||
12 | Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> | ||
13 | Reviewed-by: Richard Henderson <richard.henderson@linaro.org> | ||
14 | Message-id: 20201215154107.3255-3-peter.maydell@linaro.org | ||
15 | --- | ||
16 | scripts/coccinelle/timer-del-timer-free.cocci | 18 ++++++++++++++++++ | ||
17 | 1 file changed, 18 insertions(+) | ||
18 | create mode 100644 scripts/coccinelle/timer-del-timer-free.cocci | ||
19 | |||
20 | diff --git a/scripts/coccinelle/timer-del-timer-free.cocci b/scripts/coccinelle/timer-del-timer-free.cocci | ||
21 | new file mode 100644 | ||
22 | index XXXXXXX..XXXXXXX | ||
23 | --- /dev/null | ||
24 | +++ b/scripts/coccinelle/timer-del-timer-free.cocci | ||
25 | @@ -XXX,XX +XXX,XX @@ | ||
26 | +// Remove superfluous timer_del() calls | ||
27 | +// | ||
28 | +// Copyright Linaro Limited 2020 | ||
29 | +// This work is licensed under the terms of the GNU GPLv2 or later. | ||
30 | +// | ||
31 | +// spatch --macro-file scripts/cocci-macro-file.h \ | ||
32 | +// --sp-file scripts/coccinelle/timer-del-timer-free.cocci \ | ||
33 | +// --in-place --dir . | ||
34 | +// | ||
35 | +// The timer_free() function now implicitly calls timer_del() | ||
36 | +// for you, so calls to timer_del() immediately before the | ||
37 | +// timer_free() of the same timer can be deleted. | ||
38 | + | ||
39 | +@@ | ||
40 | +expression T; | ||
41 | +@@ | ||
42 | +-timer_del(T); | ||
43 | + timer_free(T); | ||
44 | -- | ||
45 | 2.20.1 | ||
46 | |||
47 | diff view generated by jsdifflib |
New patch | |||
---|---|---|---|
1 | This commit is the result of running the timer-del-timer-free.cocci | ||
2 | script on the whole source tree. | ||
1 | 3 | ||
4 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | ||
5 | Acked-by: Corey Minyard <cminyard@mvista.com> | ||
6 | Acked-by: Paolo Bonzini <pbonzini@redhat.com> | ||
7 | Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> | ||
8 | Reviewed-by: Richard Henderson <richard.henderson@linaro.org> | ||
9 | Message-id: 20201215154107.3255-4-peter.maydell@linaro.org | ||
10 | --- | ||
11 | block/iscsi.c | 2 -- | ||
12 | block/nbd.c | 1 - | ||
13 | block/qcow2.c | 1 - | ||
14 | hw/block/nvme.c | 2 -- | ||
15 | hw/char/serial.c | 2 -- | ||
16 | hw/char/virtio-serial-bus.c | 2 -- | ||
17 | hw/ide/core.c | 1 - | ||
18 | hw/input/hid.c | 1 - | ||
19 | hw/intc/apic.c | 1 - | ||
20 | hw/intc/ioapic.c | 1 - | ||
21 | hw/ipmi/ipmi_bmc_extern.c | 1 - | ||
22 | hw/net/e1000.c | 3 --- | ||
23 | hw/net/e1000e_core.c | 8 -------- | ||
24 | hw/net/pcnet-pci.c | 1 - | ||
25 | hw/net/rtl8139.c | 1 - | ||
26 | hw/net/spapr_llan.c | 1 - | ||
27 | hw/net/virtio-net.c | 2 -- | ||
28 | hw/s390x/s390-pci-inst.c | 1 - | ||
29 | hw/sd/sd.c | 1 - | ||
30 | hw/sd/sdhci.c | 2 -- | ||
31 | hw/usb/dev-hub.c | 1 - | ||
32 | hw/usb/hcd-ehci.c | 1 - | ||
33 | hw/usb/hcd-ohci-pci.c | 1 - | ||
34 | hw/usb/hcd-uhci.c | 1 - | ||
35 | hw/usb/hcd-xhci.c | 1 - | ||
36 | hw/usb/redirect.c | 1 - | ||
37 | hw/vfio/display.c | 1 - | ||
38 | hw/virtio/vhost-vsock-common.c | 1 - | ||
39 | hw/virtio/virtio-balloon.c | 1 - | ||
40 | hw/virtio/virtio-rng.c | 1 - | ||
41 | hw/watchdog/wdt_diag288.c | 1 - | ||
42 | hw/watchdog/wdt_i6300esb.c | 1 - | ||
43 | migration/colo.c | 1 - | ||
44 | monitor/hmp-cmds.c | 1 - | ||
45 | net/announce.c | 1 - | ||
46 | net/colo-compare.c | 1 - | ||
47 | net/slirp.c | 1 - | ||
48 | replay/replay-debugging.c | 1 - | ||
49 | target/s390x/cpu.c | 2 -- | ||
50 | ui/console.c | 1 - | ||
51 | ui/spice-core.c | 1 - | ||
52 | util/throttle.c | 1 - | ||
53 | 42 files changed, 58 deletions(-) | ||
54 | |||
55 | diff --git a/block/iscsi.c b/block/iscsi.c | ||
56 | index XXXXXXX..XXXXXXX 100644 | ||
57 | --- a/block/iscsi.c | ||
58 | +++ b/block/iscsi.c | ||
59 | @@ -XXX,XX +XXX,XX @@ static void iscsi_detach_aio_context(BlockDriverState *bs) | ||
60 | iscsilun->events = 0; | ||
61 | |||
62 | if (iscsilun->nop_timer) { | ||
63 | - timer_del(iscsilun->nop_timer); | ||
64 | timer_free(iscsilun->nop_timer); | ||
65 | iscsilun->nop_timer = NULL; | ||
66 | } | ||
67 | if (iscsilun->event_timer) { | ||
68 | - timer_del(iscsilun->event_timer); | ||
69 | timer_free(iscsilun->event_timer); | ||
70 | iscsilun->event_timer = NULL; | ||
71 | } | ||
72 | diff --git a/block/nbd.c b/block/nbd.c | ||
73 | index XXXXXXX..XXXXXXX 100644 | ||
74 | --- a/block/nbd.c | ||
75 | +++ b/block/nbd.c | ||
76 | @@ -XXX,XX +XXX,XX @@ static void nbd_recv_coroutines_wake_all(BDRVNBDState *s) | ||
77 | static void reconnect_delay_timer_del(BDRVNBDState *s) | ||
78 | { | ||
79 | if (s->reconnect_delay_timer) { | ||
80 | - timer_del(s->reconnect_delay_timer); | ||
81 | timer_free(s->reconnect_delay_timer); | ||
82 | s->reconnect_delay_timer = NULL; | ||
83 | } | ||
84 | diff --git a/block/qcow2.c b/block/qcow2.c | ||
85 | index XXXXXXX..XXXXXXX 100644 | ||
86 | --- a/block/qcow2.c | ||
87 | +++ b/block/qcow2.c | ||
88 | @@ -XXX,XX +XXX,XX @@ static void cache_clean_timer_del(BlockDriverState *bs) | ||
89 | { | ||
90 | BDRVQcow2State *s = bs->opaque; | ||
91 | if (s->cache_clean_timer) { | ||
92 | - timer_del(s->cache_clean_timer); | ||
93 | timer_free(s->cache_clean_timer); | ||
94 | s->cache_clean_timer = NULL; | ||
95 | } | ||
96 | diff --git a/hw/block/nvme.c b/hw/block/nvme.c | ||
97 | index XXXXXXX..XXXXXXX 100644 | ||
98 | --- a/hw/block/nvme.c | ||
99 | +++ b/hw/block/nvme.c | ||
100 | @@ -XXX,XX +XXX,XX @@ static uint16_t nvme_io_cmd(NvmeCtrl *n, NvmeRequest *req) | ||
101 | static void nvme_free_sq(NvmeSQueue *sq, NvmeCtrl *n) | ||
102 | { | ||
103 | n->sq[sq->sqid] = NULL; | ||
104 | - timer_del(sq->timer); | ||
105 | timer_free(sq->timer); | ||
106 | g_free(sq->io_req); | ||
107 | if (sq->sqid) { | ||
108 | @@ -XXX,XX +XXX,XX @@ static uint16_t nvme_get_log(NvmeCtrl *n, NvmeRequest *req) | ||
109 | static void nvme_free_cq(NvmeCQueue *cq, NvmeCtrl *n) | ||
110 | { | ||
111 | n->cq[cq->cqid] = NULL; | ||
112 | - timer_del(cq->timer); | ||
113 | timer_free(cq->timer); | ||
114 | msix_vector_unuse(&n->parent_obj, cq->vector); | ||
115 | if (cq->cqid) { | ||
116 | diff --git a/hw/char/serial.c b/hw/char/serial.c | ||
117 | index XXXXXXX..XXXXXXX 100644 | ||
118 | --- a/hw/char/serial.c | ||
119 | +++ b/hw/char/serial.c | ||
120 | @@ -XXX,XX +XXX,XX @@ static void serial_unrealize(DeviceState *dev) | ||
121 | |||
122 | qemu_chr_fe_deinit(&s->chr, false); | ||
123 | |||
124 | - timer_del(s->modem_status_poll); | ||
125 | timer_free(s->modem_status_poll); | ||
126 | |||
127 | - timer_del(s->fifo_timeout_timer); | ||
128 | timer_free(s->fifo_timeout_timer); | ||
129 | |||
130 | fifo8_destroy(&s->recv_fifo); | ||
131 | diff --git a/hw/char/virtio-serial-bus.c b/hw/char/virtio-serial-bus.c | ||
132 | index XXXXXXX..XXXXXXX 100644 | ||
133 | --- a/hw/char/virtio-serial-bus.c | ||
134 | +++ b/hw/char/virtio-serial-bus.c | ||
135 | @@ -XXX,XX +XXX,XX @@ static void virtio_serial_post_load_timer_cb(void *opaque) | ||
136 | } | ||
137 | } | ||
138 | g_free(s->post_load->connected); | ||
139 | - timer_del(s->post_load->timer); | ||
140 | timer_free(s->post_load->timer); | ||
141 | g_free(s->post_load); | ||
142 | s->post_load = NULL; | ||
143 | @@ -XXX,XX +XXX,XX @@ static void virtio_serial_device_unrealize(DeviceState *dev) | ||
144 | g_free(vser->ports_map); | ||
145 | if (vser->post_load) { | ||
146 | g_free(vser->post_load->connected); | ||
147 | - timer_del(vser->post_load->timer); | ||
148 | timer_free(vser->post_load->timer); | ||
149 | g_free(vser->post_load); | ||
150 | } | ||
151 | diff --git a/hw/ide/core.c b/hw/ide/core.c | ||
152 | index XXXXXXX..XXXXXXX 100644 | ||
153 | --- a/hw/ide/core.c | ||
154 | +++ b/hw/ide/core.c | ||
155 | @@ -XXX,XX +XXX,XX @@ void ide_init2(IDEBus *bus, qemu_irq irq) | ||
156 | |||
157 | void ide_exit(IDEState *s) | ||
158 | { | ||
159 | - timer_del(s->sector_write_timer); | ||
160 | timer_free(s->sector_write_timer); | ||
161 | qemu_vfree(s->smart_selftest_data); | ||
162 | qemu_vfree(s->io_buffer); | ||
163 | diff --git a/hw/input/hid.c b/hw/input/hid.c | ||
164 | index XXXXXXX..XXXXXXX 100644 | ||
165 | --- a/hw/input/hid.c | ||
166 | +++ b/hw/input/hid.c | ||
167 | @@ -XXX,XX +XXX,XX @@ static void hid_idle_timer(void *opaque) | ||
168 | static void hid_del_idle_timer(HIDState *hs) | ||
169 | { | ||
170 | if (hs->idle_timer) { | ||
171 | - timer_del(hs->idle_timer); | ||
172 | timer_free(hs->idle_timer); | ||
173 | hs->idle_timer = NULL; | ||
174 | } | ||
175 | diff --git a/hw/intc/apic.c b/hw/intc/apic.c | ||
176 | index XXXXXXX..XXXXXXX 100644 | ||
177 | --- a/hw/intc/apic.c | ||
178 | +++ b/hw/intc/apic.c | ||
179 | @@ -XXX,XX +XXX,XX @@ static void apic_unrealize(DeviceState *dev) | ||
180 | { | ||
181 | APICCommonState *s = APIC(dev); | ||
182 | |||
183 | - timer_del(s->timer); | ||
184 | timer_free(s->timer); | ||
185 | local_apics[s->id] = NULL; | ||
186 | } | ||
187 | diff --git a/hw/intc/ioapic.c b/hw/intc/ioapic.c | ||
188 | index XXXXXXX..XXXXXXX 100644 | ||
189 | --- a/hw/intc/ioapic.c | ||
190 | +++ b/hw/intc/ioapic.c | ||
191 | @@ -XXX,XX +XXX,XX @@ static void ioapic_unrealize(DeviceState *dev) | ||
192 | { | ||
193 | IOAPICCommonState *s = IOAPIC_COMMON(dev); | ||
194 | |||
195 | - timer_del(s->delayed_ioapic_service_timer); | ||
196 | timer_free(s->delayed_ioapic_service_timer); | ||
197 | } | ||
198 | |||
199 | diff --git a/hw/ipmi/ipmi_bmc_extern.c b/hw/ipmi/ipmi_bmc_extern.c | ||
200 | index XXXXXXX..XXXXXXX 100644 | ||
201 | --- a/hw/ipmi/ipmi_bmc_extern.c | ||
202 | +++ b/hw/ipmi/ipmi_bmc_extern.c | ||
203 | @@ -XXX,XX +XXX,XX @@ static void ipmi_bmc_extern_finalize(Object *obj) | ||
204 | { | ||
205 | IPMIBmcExtern *ibe = IPMI_BMC_EXTERN(obj); | ||
206 | |||
207 | - timer_del(ibe->extern_timer); | ||
208 | timer_free(ibe->extern_timer); | ||
209 | } | ||
210 | |||
211 | diff --git a/hw/net/e1000.c b/hw/net/e1000.c | ||
212 | index XXXXXXX..XXXXXXX 100644 | ||
213 | --- a/hw/net/e1000.c | ||
214 | +++ b/hw/net/e1000.c | ||
215 | @@ -XXX,XX +XXX,XX @@ pci_e1000_uninit(PCIDevice *dev) | ||
216 | { | ||
217 | E1000State *d = E1000(dev); | ||
218 | |||
219 | - timer_del(d->autoneg_timer); | ||
220 | timer_free(d->autoneg_timer); | ||
221 | - timer_del(d->mit_timer); | ||
222 | timer_free(d->mit_timer); | ||
223 | - timer_del(d->flush_queue_timer); | ||
224 | timer_free(d->flush_queue_timer); | ||
225 | qemu_del_nic(d->nic); | ||
226 | } | ||
227 | diff --git a/hw/net/e1000e_core.c b/hw/net/e1000e_core.c | ||
228 | index XXXXXXX..XXXXXXX 100644 | ||
229 | --- a/hw/net/e1000e_core.c | ||
230 | +++ b/hw/net/e1000e_core.c | ||
231 | @@ -XXX,XX +XXX,XX @@ e1000e_intrmgr_pci_unint(E1000ECore *core) | ||
232 | { | ||
233 | int i; | ||
234 | |||
235 | - timer_del(core->radv.timer); | ||
236 | timer_free(core->radv.timer); | ||
237 | - timer_del(core->rdtr.timer); | ||
238 | timer_free(core->rdtr.timer); | ||
239 | - timer_del(core->raid.timer); | ||
240 | timer_free(core->raid.timer); | ||
241 | |||
242 | - timer_del(core->tadv.timer); | ||
243 | timer_free(core->tadv.timer); | ||
244 | - timer_del(core->tidv.timer); | ||
245 | timer_free(core->tidv.timer); | ||
246 | |||
247 | - timer_del(core->itr.timer); | ||
248 | timer_free(core->itr.timer); | ||
249 | |||
250 | for (i = 0; i < E1000E_MSIX_VEC_NUM; i++) { | ||
251 | - timer_del(core->eitr[i].timer); | ||
252 | timer_free(core->eitr[i].timer); | ||
253 | } | ||
254 | } | ||
255 | @@ -XXX,XX +XXX,XX @@ e1000e_core_pci_uninit(E1000ECore *core) | ||
256 | { | ||
257 | int i; | ||
258 | |||
259 | - timer_del(core->autoneg_timer); | ||
260 | timer_free(core->autoneg_timer); | ||
261 | |||
262 | e1000e_intrmgr_pci_unint(core); | ||
263 | diff --git a/hw/net/pcnet-pci.c b/hw/net/pcnet-pci.c | ||
264 | index XXXXXXX..XXXXXXX 100644 | ||
265 | --- a/hw/net/pcnet-pci.c | ||
266 | +++ b/hw/net/pcnet-pci.c | ||
267 | @@ -XXX,XX +XXX,XX @@ static void pci_pcnet_uninit(PCIDevice *dev) | ||
268 | PCIPCNetState *d = PCI_PCNET(dev); | ||
269 | |||
270 | qemu_free_irq(d->state.irq); | ||
271 | - timer_del(d->state.poll_timer); | ||
272 | timer_free(d->state.poll_timer); | ||
273 | qemu_del_nic(d->state.nic); | ||
274 | } | ||
275 | diff --git a/hw/net/rtl8139.c b/hw/net/rtl8139.c | ||
276 | index XXXXXXX..XXXXXXX 100644 | ||
277 | --- a/hw/net/rtl8139.c | ||
278 | +++ b/hw/net/rtl8139.c | ||
279 | @@ -XXX,XX +XXX,XX @@ static void pci_rtl8139_uninit(PCIDevice *dev) | ||
280 | |||
281 | g_free(s->cplus_txbuffer); | ||
282 | s->cplus_txbuffer = NULL; | ||
283 | - timer_del(s->timer); | ||
284 | timer_free(s->timer); | ||
285 | qemu_del_nic(s->nic); | ||
286 | } | ||
287 | diff --git a/hw/net/spapr_llan.c b/hw/net/spapr_llan.c | ||
288 | index XXXXXXX..XXXXXXX 100644 | ||
289 | --- a/hw/net/spapr_llan.c | ||
290 | +++ b/hw/net/spapr_llan.c | ||
291 | @@ -XXX,XX +XXX,XX @@ static void spapr_vlan_instance_finalize(Object *obj) | ||
292 | } | ||
293 | |||
294 | if (dev->rxp_timer) { | ||
295 | - timer_del(dev->rxp_timer); | ||
296 | timer_free(dev->rxp_timer); | ||
297 | } | ||
298 | } | ||
299 | diff --git a/hw/net/virtio-net.c b/hw/net/virtio-net.c | ||
300 | index XXXXXXX..XXXXXXX 100644 | ||
301 | --- a/hw/net/virtio-net.c | ||
302 | +++ b/hw/net/virtio-net.c | ||
303 | @@ -XXX,XX +XXX,XX @@ static void virtio_net_rsc_cleanup(VirtIONet *n) | ||
304 | g_free(seg); | ||
305 | } | ||
306 | |||
307 | - timer_del(chain->drain_timer); | ||
308 | timer_free(chain->drain_timer); | ||
309 | QTAILQ_REMOVE(&n->rsc_chains, chain, next); | ||
310 | g_free(chain); | ||
311 | @@ -XXX,XX +XXX,XX @@ static void virtio_net_del_queue(VirtIONet *n, int index) | ||
312 | |||
313 | virtio_del_queue(vdev, index * 2); | ||
314 | if (q->tx_timer) { | ||
315 | - timer_del(q->tx_timer); | ||
316 | timer_free(q->tx_timer); | ||
317 | q->tx_timer = NULL; | ||
318 | } else { | ||
319 | diff --git a/hw/s390x/s390-pci-inst.c b/hw/s390x/s390-pci-inst.c | ||
320 | index XXXXXXX..XXXXXXX 100644 | ||
321 | --- a/hw/s390x/s390-pci-inst.c | ||
322 | +++ b/hw/s390x/s390-pci-inst.c | ||
323 | @@ -XXX,XX +XXX,XX @@ void pci_dereg_ioat(S390PCIIOMMU *iommu) | ||
324 | void fmb_timer_free(S390PCIBusDevice *pbdev) | ||
325 | { | ||
326 | if (pbdev->fmb_timer) { | ||
327 | - timer_del(pbdev->fmb_timer); | ||
328 | timer_free(pbdev->fmb_timer); | ||
329 | pbdev->fmb_timer = NULL; | ||
330 | } | ||
331 | diff --git a/hw/sd/sd.c b/hw/sd/sd.c | ||
332 | index XXXXXXX..XXXXXXX 100644 | ||
333 | --- a/hw/sd/sd.c | ||
334 | +++ b/hw/sd/sd.c | ||
335 | @@ -XXX,XX +XXX,XX @@ static void sd_instance_finalize(Object *obj) | ||
336 | { | ||
337 | SDState *sd = SD_CARD(obj); | ||
338 | |||
339 | - timer_del(sd->ocr_power_timer); | ||
340 | timer_free(sd->ocr_power_timer); | ||
341 | } | ||
342 | |||
343 | diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c | ||
344 | index XXXXXXX..XXXXXXX 100644 | ||
345 | --- a/hw/sd/sdhci.c | ||
346 | +++ b/hw/sd/sdhci.c | ||
347 | @@ -XXX,XX +XXX,XX @@ void sdhci_initfn(SDHCIState *s) | ||
348 | |||
349 | void sdhci_uninitfn(SDHCIState *s) | ||
350 | { | ||
351 | - timer_del(s->insert_timer); | ||
352 | timer_free(s->insert_timer); | ||
353 | - timer_del(s->transfer_timer); | ||
354 | timer_free(s->transfer_timer); | ||
355 | |||
356 | g_free(s->fifo_buffer); | ||
357 | diff --git a/hw/usb/dev-hub.c b/hw/usb/dev-hub.c | ||
358 | index XXXXXXX..XXXXXXX 100644 | ||
359 | --- a/hw/usb/dev-hub.c | ||
360 | +++ b/hw/usb/dev-hub.c | ||
361 | @@ -XXX,XX +XXX,XX @@ static void usb_hub_unrealize(USBDevice *dev) | ||
362 | &s->ports[i].port); | ||
363 | } | ||
364 | |||
365 | - timer_del(s->port_timer); | ||
366 | timer_free(s->port_timer); | ||
367 | } | ||
368 | |||
369 | diff --git a/hw/usb/hcd-ehci.c b/hw/usb/hcd-ehci.c | ||
370 | index XXXXXXX..XXXXXXX 100644 | ||
371 | --- a/hw/usb/hcd-ehci.c | ||
372 | +++ b/hw/usb/hcd-ehci.c | ||
373 | @@ -XXX,XX +XXX,XX @@ void usb_ehci_unrealize(EHCIState *s, DeviceState *dev) | ||
374 | trace_usb_ehci_unrealize(); | ||
375 | |||
376 | if (s->frame_timer) { | ||
377 | - timer_del(s->frame_timer); | ||
378 | timer_free(s->frame_timer); | ||
379 | s->frame_timer = NULL; | ||
380 | } | ||
381 | diff --git a/hw/usb/hcd-ohci-pci.c b/hw/usb/hcd-ohci-pci.c | ||
382 | index XXXXXXX..XXXXXXX 100644 | ||
383 | --- a/hw/usb/hcd-ohci-pci.c | ||
384 | +++ b/hw/usb/hcd-ohci-pci.c | ||
385 | @@ -XXX,XX +XXX,XX @@ static void usb_ohci_exit(PCIDevice *dev) | ||
386 | usb_bus_release(&s->bus); | ||
387 | } | ||
388 | |||
389 | - timer_del(s->eof_timer); | ||
390 | timer_free(s->eof_timer); | ||
391 | } | ||
392 | |||
393 | diff --git a/hw/usb/hcd-uhci.c b/hw/usb/hcd-uhci.c | ||
394 | index XXXXXXX..XXXXXXX 100644 | ||
395 | --- a/hw/usb/hcd-uhci.c | ||
396 | +++ b/hw/usb/hcd-uhci.c | ||
397 | @@ -XXX,XX +XXX,XX @@ static void usb_uhci_exit(PCIDevice *dev) | ||
398 | trace_usb_uhci_exit(); | ||
399 | |||
400 | if (s->frame_timer) { | ||
401 | - timer_del(s->frame_timer); | ||
402 | timer_free(s->frame_timer); | ||
403 | s->frame_timer = NULL; | ||
404 | } | ||
405 | diff --git a/hw/usb/hcd-xhci.c b/hw/usb/hcd-xhci.c | ||
406 | index XXXXXXX..XXXXXXX 100644 | ||
407 | --- a/hw/usb/hcd-xhci.c | ||
408 | +++ b/hw/usb/hcd-xhci.c | ||
409 | @@ -XXX,XX +XXX,XX @@ static void usb_xhci_unrealize(DeviceState *dev) | ||
410 | } | ||
411 | |||
412 | if (xhci->mfwrap_timer) { | ||
413 | - timer_del(xhci->mfwrap_timer); | ||
414 | timer_free(xhci->mfwrap_timer); | ||
415 | xhci->mfwrap_timer = NULL; | ||
416 | } | ||
417 | diff --git a/hw/usb/redirect.c b/hw/usb/redirect.c | ||
418 | index XXXXXXX..XXXXXXX 100644 | ||
419 | --- a/hw/usb/redirect.c | ||
420 | +++ b/hw/usb/redirect.c | ||
421 | @@ -XXX,XX +XXX,XX @@ static void usbredir_unrealize(USBDevice *udev) | ||
422 | qemu_bh_delete(dev->chardev_close_bh); | ||
423 | qemu_bh_delete(dev->device_reject_bh); | ||
424 | |||
425 | - timer_del(dev->attach_timer); | ||
426 | timer_free(dev->attach_timer); | ||
427 | |||
428 | usbredir_cleanup_device_queues(dev); | ||
429 | diff --git a/hw/vfio/display.c b/hw/vfio/display.c | ||
430 | index XXXXXXX..XXXXXXX 100644 | ||
431 | --- a/hw/vfio/display.c | ||
432 | +++ b/hw/vfio/display.c | ||
433 | @@ -XXX,XX +XXX,XX @@ static void vfio_display_edid_exit(VFIODisplay *dpy) | ||
434 | |||
435 | g_free(dpy->edid_regs); | ||
436 | g_free(dpy->edid_blob); | ||
437 | - timer_del(dpy->edid_link_timer); | ||
438 | timer_free(dpy->edid_link_timer); | ||
439 | } | ||
440 | |||
441 | diff --git a/hw/virtio/vhost-vsock-common.c b/hw/virtio/vhost-vsock-common.c | ||
442 | index XXXXXXX..XXXXXXX 100644 | ||
443 | --- a/hw/virtio/vhost-vsock-common.c | ||
444 | +++ b/hw/virtio/vhost-vsock-common.c | ||
445 | @@ -XXX,XX +XXX,XX @@ static void vhost_vsock_common_post_load_timer_cleanup(VHostVSockCommon *vvc) | ||
446 | return; | ||
447 | } | ||
448 | |||
449 | - timer_del(vvc->post_load_timer); | ||
450 | timer_free(vvc->post_load_timer); | ||
451 | vvc->post_load_timer = NULL; | ||
452 | } | ||
453 | diff --git a/hw/virtio/virtio-balloon.c b/hw/virtio/virtio-balloon.c | ||
454 | index XXXXXXX..XXXXXXX 100644 | ||
455 | --- a/hw/virtio/virtio-balloon.c | ||
456 | +++ b/hw/virtio/virtio-balloon.c | ||
457 | @@ -XXX,XX +XXX,XX @@ static bool balloon_stats_enabled(const VirtIOBalloon *s) | ||
458 | static void balloon_stats_destroy_timer(VirtIOBalloon *s) | ||
459 | { | ||
460 | if (balloon_stats_enabled(s)) { | ||
461 | - timer_del(s->stats_timer); | ||
462 | timer_free(s->stats_timer); | ||
463 | s->stats_timer = NULL; | ||
464 | s->stats_poll_interval = 0; | ||
465 | diff --git a/hw/virtio/virtio-rng.c b/hw/virtio/virtio-rng.c | ||
466 | index XXXXXXX..XXXXXXX 100644 | ||
467 | --- a/hw/virtio/virtio-rng.c | ||
468 | +++ b/hw/virtio/virtio-rng.c | ||
469 | @@ -XXX,XX +XXX,XX @@ static void virtio_rng_device_unrealize(DeviceState *dev) | ||
470 | VirtIORNG *vrng = VIRTIO_RNG(dev); | ||
471 | |||
472 | qemu_del_vm_change_state_handler(vrng->vmstate); | ||
473 | - timer_del(vrng->rate_limit_timer); | ||
474 | timer_free(vrng->rate_limit_timer); | ||
475 | virtio_del_queue(vdev, 0); | ||
476 | virtio_cleanup(vdev); | ||
477 | diff --git a/hw/watchdog/wdt_diag288.c b/hw/watchdog/wdt_diag288.c | ||
478 | index XXXXXXX..XXXXXXX 100644 | ||
479 | --- a/hw/watchdog/wdt_diag288.c | ||
480 | +++ b/hw/watchdog/wdt_diag288.c | ||
481 | @@ -XXX,XX +XXX,XX @@ static void wdt_diag288_unrealize(DeviceState *dev) | ||
482 | { | ||
483 | DIAG288State *diag288 = DIAG288(dev); | ||
484 | |||
485 | - timer_del(diag288->timer); | ||
486 | timer_free(diag288->timer); | ||
487 | } | ||
488 | |||
489 | diff --git a/hw/watchdog/wdt_i6300esb.c b/hw/watchdog/wdt_i6300esb.c | ||
490 | index XXXXXXX..XXXXXXX 100644 | ||
491 | --- a/hw/watchdog/wdt_i6300esb.c | ||
492 | +++ b/hw/watchdog/wdt_i6300esb.c | ||
493 | @@ -XXX,XX +XXX,XX @@ static void i6300esb_exit(PCIDevice *dev) | ||
494 | { | ||
495 | I6300State *d = WATCHDOG_I6300ESB_DEVICE(dev); | ||
496 | |||
497 | - timer_del(d->timer); | ||
498 | timer_free(d->timer); | ||
499 | } | ||
500 | |||
501 | diff --git a/migration/colo.c b/migration/colo.c | ||
502 | index XXXXXXX..XXXXXXX 100644 | ||
503 | --- a/migration/colo.c | ||
504 | +++ b/migration/colo.c | ||
505 | @@ -XXX,XX +XXX,XX @@ out: | ||
506 | * error. | ||
507 | */ | ||
508 | colo_compare_unregister_notifier(&packets_compare_notifier); | ||
509 | - timer_del(s->colo_delay_timer); | ||
510 | timer_free(s->colo_delay_timer); | ||
511 | qemu_event_destroy(&s->colo_checkpoint_event); | ||
512 | |||
513 | diff --git a/monitor/hmp-cmds.c b/monitor/hmp-cmds.c | ||
514 | index XXXXXXX..XXXXXXX 100644 | ||
515 | --- a/monitor/hmp-cmds.c | ||
516 | +++ b/monitor/hmp-cmds.c | ||
517 | @@ -XXX,XX +XXX,XX @@ static void hmp_migrate_status_cb(void *opaque) | ||
518 | error_report("%s", info->error_desc); | ||
519 | } | ||
520 | monitor_resume(status->mon); | ||
521 | - timer_del(status->timer); | ||
522 | timer_free(status->timer); | ||
523 | g_free(status); | ||
524 | } | ||
525 | diff --git a/net/announce.c b/net/announce.c | ||
526 | index XXXXXXX..XXXXXXX 100644 | ||
527 | --- a/net/announce.c | ||
528 | +++ b/net/announce.c | ||
529 | @@ -XXX,XX +XXX,XX @@ void qemu_announce_timer_del(AnnounceTimer *timer, bool free_named) | ||
530 | { | ||
531 | bool free_timer = false; | ||
532 | if (timer->tm) { | ||
533 | - timer_del(timer->tm); | ||
534 | timer_free(timer->tm); | ||
535 | timer->tm = NULL; | ||
536 | } | ||
537 | diff --git a/net/colo-compare.c b/net/colo-compare.c | ||
538 | index XXXXXXX..XXXXXXX 100644 | ||
539 | --- a/net/colo-compare.c | ||
540 | +++ b/net/colo-compare.c | ||
541 | @@ -XXX,XX +XXX,XX @@ static void colo_compare_timer_init(CompareState *s) | ||
542 | static void colo_compare_timer_del(CompareState *s) | ||
543 | { | ||
544 | if (s->packet_check_timer) { | ||
545 | - timer_del(s->packet_check_timer); | ||
546 | timer_free(s->packet_check_timer); | ||
547 | s->packet_check_timer = NULL; | ||
548 | } | ||
549 | diff --git a/net/slirp.c b/net/slirp.c | ||
550 | index XXXXXXX..XXXXXXX 100644 | ||
551 | --- a/net/slirp.c | ||
552 | +++ b/net/slirp.c | ||
553 | @@ -XXX,XX +XXX,XX @@ static void *net_slirp_timer_new(SlirpTimerCb cb, | ||
554 | |||
555 | static void net_slirp_timer_free(void *timer, void *opaque) | ||
556 | { | ||
557 | - timer_del(timer); | ||
558 | timer_free(timer); | ||
559 | } | ||
560 | |||
561 | diff --git a/replay/replay-debugging.c b/replay/replay-debugging.c | ||
562 | index XXXXXXX..XXXXXXX 100644 | ||
563 | --- a/replay/replay-debugging.c | ||
564 | +++ b/replay/replay-debugging.c | ||
565 | @@ -XXX,XX +XXX,XX @@ static void replay_delete_break(void) | ||
566 | assert(replay_mutex_locked()); | ||
567 | |||
568 | if (replay_break_timer) { | ||
569 | - timer_del(replay_break_timer); | ||
570 | timer_free(replay_break_timer); | ||
571 | replay_break_timer = NULL; | ||
572 | } | ||
573 | diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c | ||
574 | index XXXXXXX..XXXXXXX 100644 | ||
575 | --- a/target/s390x/cpu.c | ||
576 | +++ b/target/s390x/cpu.c | ||
577 | @@ -XXX,XX +XXX,XX @@ static void s390_cpu_finalize(Object *obj) | ||
578 | #if !defined(CONFIG_USER_ONLY) | ||
579 | S390CPU *cpu = S390_CPU(obj); | ||
580 | |||
581 | - timer_del(cpu->env.tod_timer); | ||
582 | timer_free(cpu->env.tod_timer); | ||
583 | - timer_del(cpu->env.cpu_timer); | ||
584 | timer_free(cpu->env.cpu_timer); | ||
585 | |||
586 | qemu_unregister_reset(s390_cpu_machine_reset_cb, cpu); | ||
587 | diff --git a/ui/console.c b/ui/console.c | ||
588 | index XXXXXXX..XXXXXXX 100644 | ||
589 | --- a/ui/console.c | ||
590 | +++ b/ui/console.c | ||
591 | @@ -XXX,XX +XXX,XX @@ static void gui_setup_refresh(DisplayState *ds) | ||
592 | timer_mod(ds->gui_timer, qemu_clock_get_ms(QEMU_CLOCK_REALTIME)); | ||
593 | } | ||
594 | if (!need_timer && ds->gui_timer != NULL) { | ||
595 | - timer_del(ds->gui_timer); | ||
596 | timer_free(ds->gui_timer); | ||
597 | ds->gui_timer = NULL; | ||
598 | } | ||
599 | diff --git a/ui/spice-core.c b/ui/spice-core.c | ||
600 | index XXXXXXX..XXXXXXX 100644 | ||
601 | --- a/ui/spice-core.c | ||
602 | +++ b/ui/spice-core.c | ||
603 | @@ -XXX,XX +XXX,XX @@ static void timer_cancel(SpiceTimer *timer) | ||
604 | |||
605 | static void timer_remove(SpiceTimer *timer) | ||
606 | { | ||
607 | - timer_del(timer->timer); | ||
608 | timer_free(timer->timer); | ||
609 | g_free(timer); | ||
610 | } | ||
611 | diff --git a/util/throttle.c b/util/throttle.c | ||
612 | index XXXXXXX..XXXXXXX 100644 | ||
613 | --- a/util/throttle.c | ||
614 | +++ b/util/throttle.c | ||
615 | @@ -XXX,XX +XXX,XX @@ static void throttle_timer_destroy(QEMUTimer **timer) | ||
616 | { | ||
617 | assert(*timer != NULL); | ||
618 | |||
619 | - timer_del(*timer); | ||
620 | timer_free(*timer); | ||
621 | *timer = NULL; | ||
622 | } | ||
623 | -- | ||
624 | 2.20.1 | ||
625 | |||
626 | diff view generated by jsdifflib |
1 | The system_clock_scale global is used only by the armv7m systick | 1 | The Arm CPU finalize function uses a sequence of timer_del(), timer_deinit(), |
---|---|---|---|
2 | device; move the extern declaration to the armv7m_systick.h header, | 2 | timer_free() to free the timer. The timer_deinit() step in this was always |
3 | and expand the comment to explain what it is and that it should | 3 | unnecessary, and now the timer_del() is implied by timer_free(), so we can |
4 | ideally be replaced with a different approach. | 4 | collapse this down to simply calling timer_free(). |
5 | 5 | ||
6 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | 6 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
7 | Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> | 7 | Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> |
8 | Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> | 8 | Reviewed-by: Richard Henderson <richard.henderson@linaro.org> |
9 | Message-id: 20190516163857.6430-2-peter.maydell@linaro.org | 9 | Message-id: 20201215154107.3255-5-peter.maydell@linaro.org |
10 | --- | 10 | --- |
11 | include/hw/arm/arm.h | 4 ---- | 11 | target/arm/cpu.c | 2 -- |
12 | include/hw/timer/armv7m_systick.h | 22 ++++++++++++++++++++++ | 12 | 1 file changed, 2 deletions(-) |
13 | 2 files changed, 22 insertions(+), 4 deletions(-) | ||
14 | 13 | ||
15 | diff --git a/include/hw/arm/arm.h b/include/hw/arm/arm.h | 14 | diff --git a/target/arm/cpu.c b/target/arm/cpu.c |
16 | index XXXXXXX..XXXXXXX 100644 | 15 | index XXXXXXX..XXXXXXX 100644 |
17 | --- a/include/hw/arm/arm.h | 16 | --- a/target/arm/cpu.c |
18 | +++ b/include/hw/arm/arm.h | 17 | +++ b/target/arm/cpu.c |
19 | @@ -XXX,XX +XXX,XX @@ void arm_write_secure_board_setup_dummy_smc(ARMCPU *cpu, | 18 | @@ -XXX,XX +XXX,XX @@ static void arm_cpu_finalizefn(Object *obj) |
20 | const struct arm_boot_info *info, | 19 | } |
21 | hwaddr mvbar_addr); | 20 | #ifndef CONFIG_USER_ONLY |
22 | 21 | if (cpu->pmu_timer) { | |
23 | -/* Multiplication factor to convert from system clock ticks to qemu timer | 22 | - timer_del(cpu->pmu_timer); |
24 | - ticks. */ | 23 | - timer_deinit(cpu->pmu_timer); |
25 | -extern int system_clock_scale; | 24 | timer_free(cpu->pmu_timer); |
26 | - | 25 | } |
27 | #endif /* HW_ARM_H */ | ||
28 | diff --git a/include/hw/timer/armv7m_systick.h b/include/hw/timer/armv7m_systick.h | ||
29 | index XXXXXXX..XXXXXXX 100644 | ||
30 | --- a/include/hw/timer/armv7m_systick.h | ||
31 | +++ b/include/hw/timer/armv7m_systick.h | ||
32 | @@ -XXX,XX +XXX,XX @@ typedef struct SysTickState { | ||
33 | qemu_irq irq; | ||
34 | } SysTickState; | ||
35 | |||
36 | +/* | ||
37 | + * Multiplication factor to convert from system clock ticks to qemu timer | ||
38 | + * ticks. This should be set (by board code, usually) to a value | ||
39 | + * equal to NANOSECONDS_PER_SECOND / frq, where frq is the clock frequency | ||
40 | + * in Hz of the CPU. | ||
41 | + * | ||
42 | + * This value is used by the systick device when it is running in | ||
43 | + * its "use the CPU clock" mode (ie when SYST_CSR.CLKSOURCE == 1) to | ||
44 | + * set how fast the timer should tick. | ||
45 | + * | ||
46 | + * TODO: we should refactor this so that rather than using a global | ||
47 | + * we use a device property or something similar. This is complicated | ||
48 | + * because (a) the property would need to be plumbed through from the | ||
49 | + * board code down through various layers to the systick device | ||
50 | + * and (b) the property needs to be modifiable after realize, because | ||
51 | + * the stellaris board uses this to implement the behaviour where the | ||
52 | + * guest can reprogram the PLL registers to downclock the CPU, and the | ||
53 | + * systick device needs to react accordingly. Possibly this should | ||
54 | + * be deferred until we have a good API for modelling clock trees. | ||
55 | + */ | ||
56 | +extern int system_clock_scale; | ||
57 | + | ||
58 | #endif | 26 | #endif |
59 | -- | 27 | -- |
60 | 2.20.1 | 28 | 2.20.1 |
61 | 29 | ||
62 | 30 | diff view generated by jsdifflib |
New patch | |||
---|---|---|---|
1 | From: Gan Qixin <ganqixin@huawei.com> | ||
1 | 2 | ||
3 | When running device-introspect-test, a memory leak occurred in the | ||
4 | digic_timer_init function, so use ptimer_free() in the finalize function to | ||
5 | avoid it. | ||
6 | |||
7 | ASAN shows memory leak stack: | ||
8 | |||
9 | Indirect leak of 288 byte(s) in 3 object(s) allocated from: | ||
10 | #0 0xffffab97e1f0 in __interceptor_calloc (/lib64/libasan.so.5+0xee1f0) | ||
11 | #1 0xffffab256800 in g_malloc0 (/lib64/libglib-2.0.so.0+0x56800) | ||
12 | #2 0xaaabf555db78 in ptimer_init /qemu/hw/core/ptimer.c:432 | ||
13 | #3 0xaaabf5b04084 in digic_timer_init /qemu/hw/timer/digic-timer.c:142 | ||
14 | #4 0xaaabf6339f6c in object_initialize_with_type /qemu/qom/object.c:515 | ||
15 | #5 0xaaabf633ca04 in object_initialize_child_with_propsv /qemu/qom/object.c:564 | ||
16 | #6 0xaaabf633cc08 in object_initialize_child_with_props /qemu/qom/object.c:547 | ||
17 | #7 0xaaabf5b40e84 in digic_init /qemu/hw/arm/digic.c:46 | ||
18 | #8 0xaaabf6339f6c in object_initialize_with_type /qemu/qom/object.c:515 | ||
19 | #9 0xaaabf633a1e0 in object_new_with_type /qemu/qom/object.c:729 | ||
20 | #10 0xaaabf6375e40 in qmp_device_list_properties /qemu/qom/qom-qmp-cmds.c:153 | ||
21 | #11 0xaaabf653d8ec in qmp_marshal_device_list_properties /qemu/qapi/qapi-commands-qdev.c:59 | ||
22 | #12 0xaaabf6587d08 in do_qmp_dispatch_bh /qemu/qapi/qmp-dispatch.c:110 | ||
23 | |||
24 | Reported-by: Euler Robot <euler.robot@huawei.com> | ||
25 | Signed-off-by: Gan Qixin <ganqixin@huawei.com> | ||
26 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> | ||
27 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | ||
28 | --- | ||
29 | hw/timer/digic-timer.c | 8 ++++++++ | ||
30 | 1 file changed, 8 insertions(+) | ||
31 | |||
32 | diff --git a/hw/timer/digic-timer.c b/hw/timer/digic-timer.c | ||
33 | index XXXXXXX..XXXXXXX 100644 | ||
34 | --- a/hw/timer/digic-timer.c | ||
35 | +++ b/hw/timer/digic-timer.c | ||
36 | @@ -XXX,XX +XXX,XX @@ static void digic_timer_init(Object *obj) | ||
37 | sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->iomem); | ||
38 | } | ||
39 | |||
40 | +static void digic_timer_finalize(Object *obj) | ||
41 | +{ | ||
42 | + DigicTimerState *s = DIGIC_TIMER(obj); | ||
43 | + | ||
44 | + ptimer_free(s->ptimer); | ||
45 | +} | ||
46 | + | ||
47 | static void digic_timer_class_init(ObjectClass *klass, void *class_data) | ||
48 | { | ||
49 | DeviceClass *dc = DEVICE_CLASS(klass); | ||
50 | @@ -XXX,XX +XXX,XX @@ static const TypeInfo digic_timer_info = { | ||
51 | .parent = TYPE_SYS_BUS_DEVICE, | ||
52 | .instance_size = sizeof(DigicTimerState), | ||
53 | .instance_init = digic_timer_init, | ||
54 | + .instance_finalize = digic_timer_finalize, | ||
55 | .class_init = digic_timer_class_init, | ||
56 | }; | ||
57 | |||
58 | -- | ||
59 | 2.20.1 | ||
60 | |||
61 | diff view generated by jsdifflib |
New patch | |||
---|---|---|---|
1 | From: Gan Qixin <ganqixin@huawei.com> | ||
1 | 2 | ||
3 | When running device-introspect-test, a memory leak occurred in the a10_pit_init | ||
4 | function, so use ptimer_free() in the finalize function to avoid it. | ||
5 | |||
6 | ASAN shows memory leak stack: | ||
7 | |||
8 | Indirect leak of 288 byte(s) in 6 object(s) allocated from: | ||
9 | #0 0xffffab97e1f0 in __interceptor_calloc (/lib64/libasan.so.5+0xee1f0) | ||
10 | #1 0xffffab256800 in g_malloc0 (/lib64/libglib-2.0.so.0+0x56800) | ||
11 | #2 0xaaabf555db84 in timer_new_full /qemu/include/qemu/timer.h:523 | ||
12 | #3 0xaaabf555db84 in timer_new /qemu/include/qemu/timer.h:544 | ||
13 | #4 0xaaabf555db84 in timer_new_ns /qemu/include/qemu/timer.h:562 | ||
14 | #5 0xaaabf555db84 in ptimer_init /qemu/hw/core/ptimer.c:433 | ||
15 | #6 0xaaabf57415e8 in a10_pit_init /qemu/hw/timer/allwinner-a10-pit.c:278 | ||
16 | #7 0xaaabf6339f6c in object_initialize_with_type /qemu/qom/object.c:515 | ||
17 | #8 0xaaabf633ca04 in object_initialize_child_with_propsv /qemu/qom/object.c:564 | ||
18 | #9 0xaaabf633cc08 in object_initialize_child_with_props /qemu/qom/object.c:547 | ||
19 | #10 0xaaabf5b94680 in aw_a10_init /qemu/hw/arm/allwinner-a10.c:49 | ||
20 | #11 0xaaabf6339f6c in object_initialize_with_type /qemu/qom/object.c:515 | ||
21 | #12 0xaaabf633a1e0 in object_new_with_type /qemu/qom/object.c:729 | ||
22 | |||
23 | Reported-by: Euler Robot <euler.robot@huawei.com> | ||
24 | Signed-off-by: Gan Qixin <ganqixin@huawei.com> | ||
25 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> | ||
26 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | ||
27 | --- | ||
28 | hw/timer/allwinner-a10-pit.c | 11 +++++++++++ | ||
29 | 1 file changed, 11 insertions(+) | ||
30 | |||
31 | diff --git a/hw/timer/allwinner-a10-pit.c b/hw/timer/allwinner-a10-pit.c | ||
32 | index XXXXXXX..XXXXXXX 100644 | ||
33 | --- a/hw/timer/allwinner-a10-pit.c | ||
34 | +++ b/hw/timer/allwinner-a10-pit.c | ||
35 | @@ -XXX,XX +XXX,XX @@ static void a10_pit_init(Object *obj) | ||
36 | } | ||
37 | } | ||
38 | |||
39 | +static void a10_pit_finalize(Object *obj) | ||
40 | +{ | ||
41 | + AwA10PITState *s = AW_A10_PIT(obj); | ||
42 | + int i; | ||
43 | + | ||
44 | + for (i = 0; i < AW_A10_PIT_TIMER_NR; i++) { | ||
45 | + ptimer_free(s->timer[i]); | ||
46 | + } | ||
47 | +} | ||
48 | + | ||
49 | static void a10_pit_class_init(ObjectClass *klass, void *data) | ||
50 | { | ||
51 | DeviceClass *dc = DEVICE_CLASS(klass); | ||
52 | @@ -XXX,XX +XXX,XX @@ static const TypeInfo a10_pit_info = { | ||
53 | .parent = TYPE_SYS_BUS_DEVICE, | ||
54 | .instance_size = sizeof(AwA10PITState), | ||
55 | .instance_init = a10_pit_init, | ||
56 | + .instance_finalize = a10_pit_finalize, | ||
57 | .class_init = a10_pit_class_init, | ||
58 | }; | ||
59 | |||
60 | -- | ||
61 | 2.20.1 | ||
62 | |||
63 | diff view generated by jsdifflib |
New patch | |||
---|---|---|---|
1 | From: Gan Qixin <ganqixin@huawei.com> | ||
1 | 2 | ||
3 | When running device-introspect-test, a memory leak occurred in the | ||
4 | exynos4210_rtc_init function, so use ptimer_free() in the finalize function to | ||
5 | avoid it. | ||
6 | |||
7 | ASAN shows memory leak stack: | ||
8 | |||
9 | Indirect leak of 96 byte(s) in 1 object(s) allocated from: | ||
10 | #0 0xffffab97e1f0 in __interceptor_calloc (/lib64/libasan.so.5+0xee1f0) | ||
11 | #1 0xffffab256800 in g_malloc0 (/lib64/libglib-2.0.so.0+0x56800) | ||
12 | #2 0xaaabf555db78 in ptimer_init /qemu/hw/core/ptimer.c:432 | ||
13 | #3 0xaaabf57b3934 in exynos4210_rtc_init /qemu/hw/rtc/exynos4210_rtc.c:567 | ||
14 | #4 0xaaabf6339f6c in object_initialize_with_type /qemu/qom/object.c:515 | ||
15 | #5 0xaaabf633a1e0 in object_new_with_type /qemu/qom/object.c:729 | ||
16 | #6 0xaaabf6375e40 in qmp_device_list_properties /qemu/qom/qom-qmp-cmds.c:153 | ||
17 | #7 0xaaabf653d8ec in qmp_marshal_device_list_properties /qemu/qapi/qapi-commands-qdev.c:59 | ||
18 | #8 0xaaabf6587d08 in do_qmp_dispatch_bh /qemu/qapi/qmp-dispatch.c:110 | ||
19 | #9 0xaaabf6552708 in aio_bh_call /qemu/util/async.c:136 | ||
20 | #10 0xaaabf6552708 in aio_bh_poll /qemu/util/async.c:164 | ||
21 | #11 0xaaabf655f19c in aio_dispatch /qemu/util/aio-posix.c:381 | ||
22 | #12 0xaaabf65523f4 in aio_ctx_dispatch /qemu/util/async.c:306 | ||
23 | |||
24 | Reported-by: Euler Robot <euler.robot@huawei.com> | ||
25 | Signed-off-by: Gan Qixin <ganqixin@huawei.com> | ||
26 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> | ||
27 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | ||
28 | --- | ||
29 | hw/rtc/exynos4210_rtc.c | 9 +++++++++ | ||
30 | 1 file changed, 9 insertions(+) | ||
31 | |||
32 | diff --git a/hw/rtc/exynos4210_rtc.c b/hw/rtc/exynos4210_rtc.c | ||
33 | index XXXXXXX..XXXXXXX 100644 | ||
34 | --- a/hw/rtc/exynos4210_rtc.c | ||
35 | +++ b/hw/rtc/exynos4210_rtc.c | ||
36 | @@ -XXX,XX +XXX,XX @@ static void exynos4210_rtc_init(Object *obj) | ||
37 | sysbus_init_mmio(dev, &s->iomem); | ||
38 | } | ||
39 | |||
40 | +static void exynos4210_rtc_finalize(Object *obj) | ||
41 | +{ | ||
42 | + Exynos4210RTCState *s = EXYNOS4210_RTC(obj); | ||
43 | + | ||
44 | + ptimer_free(s->ptimer); | ||
45 | + ptimer_free(s->ptimer_1Hz); | ||
46 | +} | ||
47 | + | ||
48 | static void exynos4210_rtc_class_init(ObjectClass *klass, void *data) | ||
49 | { | ||
50 | DeviceClass *dc = DEVICE_CLASS(klass); | ||
51 | @@ -XXX,XX +XXX,XX @@ static const TypeInfo exynos4210_rtc_info = { | ||
52 | .parent = TYPE_SYS_BUS_DEVICE, | ||
53 | .instance_size = sizeof(Exynos4210RTCState), | ||
54 | .instance_init = exynos4210_rtc_init, | ||
55 | + .instance_finalize = exynos4210_rtc_finalize, | ||
56 | .class_init = exynos4210_rtc_class_init, | ||
57 | }; | ||
58 | |||
59 | -- | ||
60 | 2.20.1 | ||
61 | |||
62 | diff view generated by jsdifflib |
New patch | |||
---|---|---|---|
1 | From: Gan Qixin <ganqixin@huawei.com> | ||
1 | 2 | ||
3 | When running device-introspect-test, a memory leak occurred in the | ||
4 | exynos4210_pwm_init function, so use ptimer_free() in the finalize function to | ||
5 | avoid it. | ||
6 | |||
7 | ASAN shows memory leak stack: | ||
8 | |||
9 | Indirect leak of 240 byte(s) in 5 object(s) allocated from: | ||
10 | #0 0xffffab97e1f0 in __interceptor_calloc (/lib64/libasan.so.5+0xee1f0) | ||
11 | #1 0xffffab256800 in g_malloc0 (/lib64/libglib-2.0.so.0+0x56800) | ||
12 | #2 0xaaabf555db84 in timer_new_full /qemu/include/qemu/timer.h:523 | ||
13 | #3 0xaaabf555db84 in timer_new /qemu/include/qemu/timer.h:544 | ||
14 | #4 0xaaabf555db84 in timer_new_ns /qemu/include/qemu/timer.h:562 | ||
15 | #5 0xaaabf555db84 in ptimer_init /qemu/hw/core/ptimer.c:433 | ||
16 | #6 0xaaabf56a36cc in exynos4210_pwm_init /qemu/hw/timer/exynos4210_pwm.c:401 | ||
17 | #7 0xaaabf6339f6c in object_initialize_with_type /qemu/qom/object.c:515 | ||
18 | #8 0xaaabf633a1e0 in object_new_with_type /qemu/qom/object.c:729 | ||
19 | #9 0xaaabf6375e40 in qmp_device_list_properties /qemu/qom/qom-qmp-cmds.c:153 | ||
20 | #10 0xaaabf653d8ec in qmp_marshal_device_list_properties /qemu/qapi/qapi-commands-qdev.c:59 | ||
21 | #11 0xaaabf6587d08 in do_qmp_dispatch_bh /qemu/qapi/qmp-dispatch.c:110 | ||
22 | #12 0xaaabf6552708 in aio_bh_call /qemu/util/async.c:136 | ||
23 | |||
24 | Reported-by: Euler Robot <euler.robot@huawei.com> | ||
25 | Signed-off-by: Gan Qixin <ganqixin@huawei.com> | ||
26 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> | ||
27 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | ||
28 | --- | ||
29 | hw/timer/exynos4210_pwm.c | 11 +++++++++++ | ||
30 | 1 file changed, 11 insertions(+) | ||
31 | |||
32 | diff --git a/hw/timer/exynos4210_pwm.c b/hw/timer/exynos4210_pwm.c | ||
33 | index XXXXXXX..XXXXXXX 100644 | ||
34 | --- a/hw/timer/exynos4210_pwm.c | ||
35 | +++ b/hw/timer/exynos4210_pwm.c | ||
36 | @@ -XXX,XX +XXX,XX @@ static void exynos4210_pwm_init(Object *obj) | ||
37 | sysbus_init_mmio(dev, &s->iomem); | ||
38 | } | ||
39 | |||
40 | +static void exynos4210_pwm_finalize(Object *obj) | ||
41 | +{ | ||
42 | + Exynos4210PWMState *s = EXYNOS4210_PWM(obj); | ||
43 | + int i; | ||
44 | + | ||
45 | + for (i = 0; i < EXYNOS4210_PWM_TIMERS_NUM; i++) { | ||
46 | + ptimer_free(s->timer[i].ptimer); | ||
47 | + } | ||
48 | +} | ||
49 | + | ||
50 | static void exynos4210_pwm_class_init(ObjectClass *klass, void *data) | ||
51 | { | ||
52 | DeviceClass *dc = DEVICE_CLASS(klass); | ||
53 | @@ -XXX,XX +XXX,XX @@ static const TypeInfo exynos4210_pwm_info = { | ||
54 | .parent = TYPE_SYS_BUS_DEVICE, | ||
55 | .instance_size = sizeof(Exynos4210PWMState), | ||
56 | .instance_init = exynos4210_pwm_init, | ||
57 | + .instance_finalize = exynos4210_pwm_finalize, | ||
58 | .class_init = exynos4210_pwm_class_init, | ||
59 | }; | ||
60 | |||
61 | -- | ||
62 | 2.20.1 | ||
63 | |||
64 | diff view generated by jsdifflib |
1 | From: Philippe Mathieu-Daudé <philmd@redhat.com> | 1 | From: Gan Qixin <ganqixin@huawei.com> |
---|---|---|---|
2 | 2 | ||
3 | Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> | 3 | When running device-introspect-test, a memory leak occurred in the |
4 | Reviewed-by: Alistair Francis <alistair.francis@wdc.com> | 4 | mss_timer_init function, so use ptimer_free() in the finalize function to avoid |
5 | Message-id: 20190520214342.13709-5-philmd@redhat.com | 5 | it. |
6 | |||
7 | ASAN shows memory leak stack: | ||
8 | |||
9 | Indirect leak of 192 byte(s) in 2 object(s) allocated from: | ||
10 | #0 0xffffab97e1f0 in __interceptor_calloc (/lib64/libasan.so.5+0xee1f0) | ||
11 | #1 0xffffab256800 in g_malloc0 (/lib64/libglib-2.0.so.0+0x56800) | ||
12 | #2 0xaaabf555db78 in ptimer_init /qemu/hw/core/ptimer.c:432 | ||
13 | #3 0xaaabf58a0010 in mss_timer_init /qemu/hw/timer/mss-timer.c:235 | ||
14 | #4 0xaaabf6339f6c in object_initialize_with_type /qemu/qom/object.c:515 | ||
15 | #5 0xaaabf633ca04 in object_initialize_child_with_propsv /qemu/qom/object.c:564 | ||
16 | #6 0xaaabf633cc08 in object_initialize_child_with_props /qemu/qom/object.c:547 | ||
17 | #7 0xaaabf5b8316c in m2sxxx_soc_initfn /qemu/hw/arm/msf2-soc.c:70 | ||
18 | #8 0xaaabf6339f6c in object_initialize_with_type /qemu/qom/object.c:515 | ||
19 | #9 0xaaabf633a1e0 in object_new_with_type /qemu/qom/object.c:729 | ||
20 | #10 0xaaabf6375e40 in qmp_device_list_properties /qemu/qom/qom-qmp-cmds.c:153 | ||
21 | #11 0xaaabf653d8ec in qmp_marshal_device_list_properties /qemu/qapi/qapi-commands-qdev.c:59 | ||
22 | #12 0xaaabf6587d08 in do_qmp_dispatch_bh /qemu/qapi/qmp-dispatch.c:110 | ||
23 | |||
24 | Reported-by: Euler Robot <euler.robot@huawei.com> | ||
25 | Signed-off-by: Gan Qixin <ganqixin@huawei.com> | ||
26 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> | ||
6 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | 27 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
7 | --- | 28 | --- |
8 | include/hw/arm/exynos4210.h | 9 +++++++-- | 29 | hw/timer/mss-timer.c | 13 +++++++++++++ |
9 | hw/arm/exynos4210.c | 28 ++++++++++++++++++++++++---- | 30 | 1 file changed, 13 insertions(+) |
10 | hw/arm/exynos4_boards.c | 9 ++++++--- | ||
11 | 3 files changed, 37 insertions(+), 9 deletions(-) | ||
12 | 31 | ||
13 | diff --git a/include/hw/arm/exynos4210.h b/include/hw/arm/exynos4210.h | 32 | diff --git a/hw/timer/mss-timer.c b/hw/timer/mss-timer.c |
14 | index XXXXXXX..XXXXXXX 100644 | 33 | index XXXXXXX..XXXXXXX 100644 |
15 | --- a/include/hw/arm/exynos4210.h | 34 | --- a/hw/timer/mss-timer.c |
16 | +++ b/include/hw/arm/exynos4210.h | 35 | +++ b/hw/timer/mss-timer.c |
17 | @@ -XXX,XX +XXX,XX @@ typedef struct Exynos4210Irq { | 36 | @@ -XXX,XX +XXX,XX @@ static void mss_timer_init(Object *obj) |
18 | } Exynos4210Irq; | 37 | sysbus_init_mmio(SYS_BUS_DEVICE(obj), &t->mmio); |
19 | 38 | } | |
20 | typedef struct Exynos4210State { | 39 | |
21 | + /*< private >*/ | 40 | +static void mss_timer_finalize(Object *obj) |
22 | + SysBusDevice parent_obj; | 41 | +{ |
23 | + /*< public >*/ | 42 | + MSSTimerState *t = MSS_TIMER(obj); |
24 | ARMCPU *cpu[EXYNOS4210_NCPUS]; | 43 | + int i; |
25 | Exynos4210Irq irqs; | ||
26 | qemu_irq *irq_table; | ||
27 | @@ -XXX,XX +XXX,XX @@ typedef struct Exynos4210State { | ||
28 | I2CBus *i2c_if[EXYNOS4210_I2C_NUMBER]; | ||
29 | } Exynos4210State; | ||
30 | |||
31 | +#define TYPE_EXYNOS4210_SOC "exynos4210" | ||
32 | +#define EXYNOS4210_SOC(obj) \ | ||
33 | + OBJECT_CHECK(Exynos4210State, obj, TYPE_EXYNOS4210_SOC) | ||
34 | + | 44 | + |
35 | void exynos4210_write_secondary(ARMCPU *cpu, | 45 | + for (i = 0; i < NUM_TIMERS; i++) { |
36 | const struct arm_boot_info *info); | 46 | + struct Msf2Timer *st = &t->timers[i]; |
37 | |||
38 | -Exynos4210State *exynos4210_init(MemoryRegion *system_mem); | ||
39 | - | ||
40 | /* Initialize exynos4210 IRQ subsystem stub */ | ||
41 | qemu_irq *exynos4210_init_irq(Exynos4210Irq *env); | ||
42 | |||
43 | diff --git a/hw/arm/exynos4210.c b/hw/arm/exynos4210.c | ||
44 | index XXXXXXX..XXXXXXX 100644 | ||
45 | --- a/hw/arm/exynos4210.c | ||
46 | +++ b/hw/arm/exynos4210.c | ||
47 | @@ -XXX,XX +XXX,XX @@ static void pl330_create(uint32_t base, qemu_irq irq, int nreq) | ||
48 | sysbus_connect_irq(busdev, 0, irq); | ||
49 | } | ||
50 | |||
51 | -Exynos4210State *exynos4210_init(MemoryRegion *system_mem) | ||
52 | +static void exynos4210_realize(DeviceState *socdev, Error **errp) | ||
53 | { | ||
54 | - Exynos4210State *s = g_new0(Exynos4210State, 1); | ||
55 | + Exynos4210State *s = EXYNOS4210_SOC(socdev); | ||
56 | + MemoryRegion *system_mem = get_system_memory(); | ||
57 | qemu_irq gate_irq[EXYNOS4210_NCPUS][EXYNOS4210_IRQ_GATE_NINPUTS]; | ||
58 | SysBusDevice *busdev; | ||
59 | DeviceState *dev; | ||
60 | @@ -XXX,XX +XXX,XX @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem) | ||
61 | qemu_irq_invert(s->irq_table[exynos4210_get_irq(36, 1)]), 32); | ||
62 | pl330_create(EXYNOS4210_PL330_BASE2_ADDR, | ||
63 | qemu_irq_invert(s->irq_table[exynos4210_get_irq(34, 1)]), 1); | ||
64 | - | ||
65 | - return s; | ||
66 | } | ||
67 | + | 47 | + |
68 | +static void exynos4210_class_init(ObjectClass *klass, void *data) | 48 | + ptimer_free(st->ptimer); |
69 | +{ | 49 | + } |
70 | + DeviceClass *dc = DEVICE_CLASS(klass); | ||
71 | + | ||
72 | + dc->realize = exynos4210_realize; | ||
73 | +} | 50 | +} |
74 | + | 51 | + |
75 | +static const TypeInfo exynos4210_info = { | 52 | static const VMStateDescription vmstate_timers = { |
76 | + .name = TYPE_EXYNOS4210_SOC, | 53 | .name = "mss-timer-block", |
77 | + .parent = TYPE_SYS_BUS_DEVICE, | 54 | .version_id = 1, |
78 | + .instance_size = sizeof(Exynos4210State), | 55 | @@ -XXX,XX +XXX,XX @@ static const TypeInfo mss_timer_info = { |
79 | + .class_init = exynos4210_class_init, | 56 | .parent = TYPE_SYS_BUS_DEVICE, |
80 | +}; | 57 | .instance_size = sizeof(MSSTimerState), |
81 | + | 58 | .instance_init = mss_timer_init, |
82 | +static void exynos4210_register_types(void) | 59 | + .instance_finalize = mss_timer_finalize, |
83 | +{ | 60 | .class_init = mss_timer_class_init, |
84 | + type_register_static(&exynos4210_info); | 61 | }; |
85 | +} | ||
86 | + | ||
87 | +type_init(exynos4210_register_types) | ||
88 | diff --git a/hw/arm/exynos4_boards.c b/hw/arm/exynos4_boards.c | ||
89 | index XXXXXXX..XXXXXXX 100644 | ||
90 | --- a/hw/arm/exynos4_boards.c | ||
91 | +++ b/hw/arm/exynos4_boards.c | ||
92 | @@ -XXX,XX +XXX,XX @@ typedef enum Exynos4BoardType { | ||
93 | } Exynos4BoardType; | ||
94 | |||
95 | typedef struct Exynos4BoardState { | ||
96 | - Exynos4210State *soc; | ||
97 | + Exynos4210State soc; | ||
98 | MemoryRegion dram0_mem; | ||
99 | MemoryRegion dram1_mem; | ||
100 | } Exynos4BoardState; | ||
101 | @@ -XXX,XX +XXX,XX @@ exynos4_boards_init_common(MachineState *machine, | ||
102 | exynos4_boards_init_ram(s, get_system_memory(), | ||
103 | exynos4_board_ram_size[board_type]); | ||
104 | |||
105 | - s->soc = exynos4210_init(get_system_memory()); | ||
106 | + object_initialize(&s->soc, sizeof(s->soc), TYPE_EXYNOS4210_SOC); | ||
107 | + qdev_set_parent_bus(DEVICE(&s->soc), sysbus_get_default()); | ||
108 | + object_property_set_bool(OBJECT(&s->soc), true, "realized", | ||
109 | + &error_fatal); | ||
110 | |||
111 | return s; | ||
112 | } | ||
113 | @@ -XXX,XX +XXX,XX @@ static void smdkc210_init(MachineState *machine) | ||
114 | EXYNOS4_BOARD_SMDKC210); | ||
115 | |||
116 | lan9215_init(SMDK_LAN9118_BASE_ADDR, | ||
117 | - qemu_irq_invert(s->soc->irq_table[exynos4210_get_irq(37, 1)])); | ||
118 | + qemu_irq_invert(s->soc.irq_table[exynos4210_get_irq(37, 1)])); | ||
119 | arm_load_kernel(ARM_CPU(first_cpu), &exynos4_board_binfo); | ||
120 | } | ||
121 | 62 | ||
122 | -- | 63 | -- |
123 | 2.20.1 | 64 | 2.20.1 |
124 | 65 | ||
125 | 66 | diff view generated by jsdifflib |
1 | From: Guenter Roeck <linux@roeck-us.net> | 1 | From: Gan Qixin <ganqixin@huawei.com> |
---|---|---|---|
2 | 2 | ||
3 | QEMU already supports pl330. Instantiate it for Exynos4210. | 3 | When running device-introspect-test, a memory leak occurred in the |
4 | mv88w8618_pit_init function, so use ptimer_free() in the finalize function to | ||
5 | avoid it. | ||
4 | 6 | ||
5 | Relevant part of Linux arch/arm/boot/dts/exynos4.dtsi: | 7 | ASAN shows memory leak stack: |
6 | 8 | ||
7 | / { | 9 | Indirect leak of 192 byte(s) in 4 object(s) allocated from: |
8 | soc: soc { | 10 | #0 0xffffab97e1f0 in __interceptor_calloc (/lib64/libasan.so.5+0xee1f0) |
9 | amba { | 11 | #1 0xffffab256800 in g_malloc0 (/lib64/libglib-2.0.so.0+0x56800) |
10 | pdma0: pdma@12680000 { | 12 | #2 0xaaabf555db84 in timer_new_full /qemu/include/qemu/timer.h:523 |
11 | compatible = "arm,pl330", "arm,primecell"; | 13 | #3 0xaaabf555db84 in timer_new /qemu/include/qemu/timer.h:544 |
12 | reg = <0x12680000 0x1000>; | 14 | #4 0xaaabf555db84 in timer_new_ns /qemu/include/qemu/timer.h:562 |
13 | interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; | 15 | #5 0xaaabf555db84 in ptimer_init /qemu/hw/core/ptimer.c:433 |
14 | clocks = <&clock CLK_PDMA0>; | 16 | #6 0xaaabf5bb2290 in mv88w8618_timer_init /qemu/hw/arm/musicpal.c:862 |
15 | clock-names = "apb_pclk"; | 17 | #7 0xaaabf5bb2290 in mv88w8618_pit_init /qemu/hw/arm/musicpal.c:954 |
16 | #dma-cells = <1>; | 18 | #8 0xaaabf6339f6c in object_initialize_with_type /qemu/qom/object.c:515 |
17 | #dma-channels = <8>; | 19 | #9 0xaaabf633a1e0 in object_new_with_type /qemu/qom/object.c:729 |
18 | #dma-requests = <32>; | 20 | #10 0xaaabf6375e40 in qmp_device_list_properties /qemu/qom/qom-qmp-cmds.c:153 |
19 | }; | 21 | #11 0xaaabf5a95540 in qdev_device_help /qemu/softmmu/qdev-monitor.c:283 |
20 | pdma1: pdma@12690000 { | 22 | #12 0xaaabf5a96940 in qmp_device_add /qemu/softmmu/qdev-monitor.c:801 |
21 | compatible = "arm,pl330", "arm,primecell"; | ||
22 | reg = <0x12690000 0x1000>; | ||
23 | interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; | ||
24 | clocks = <&clock CLK_PDMA1>; | ||
25 | clock-names = "apb_pclk"; | ||
26 | #dma-cells = <1>; | ||
27 | #dma-channels = <8>; | ||
28 | #dma-requests = <32>; | ||
29 | }; | ||
30 | mdma1: mdma@12850000 { | ||
31 | compatible = "arm,pl330", "arm,primecell"; | ||
32 | reg = <0x12850000 0x1000>; | ||
33 | interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; | ||
34 | clocks = <&clock CLK_MDMA>; | ||
35 | clock-names = "apb_pclk"; | ||
36 | #dma-cells = <1>; | ||
37 | #dma-channels = <8>; | ||
38 | #dma-requests = <1>; | ||
39 | }; | ||
40 | }; | ||
41 | }; | ||
42 | }; | ||
43 | 23 | ||
44 | Signed-off-by: Guenter Roeck <linux@roeck-us.net> | 24 | Reported-by: Euler Robot <euler.robot@huawei.com> |
45 | Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> | 25 | Signed-off-by: Gan Qixin <ganqixin@huawei.com> |
46 | Reviewed-by: Alistair Francis <alistair.francis@wdc.com> | ||
47 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> | ||
48 | Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> | ||
49 | Message-id: 20190520214342.13709-4-philmd@redhat.com | ||
50 | [PMD: Do not set default qdev properties, create the controllers in the SoC | ||
51 | rather than the board (Peter Maydell), add dtsi in commit message] | ||
52 | Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> | ||
53 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> | 26 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> |
54 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | 27 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
55 | --- | 28 | --- |
56 | hw/arm/exynos4210.c | 26 ++++++++++++++++++++++++++ | 29 | hw/arm/musicpal.c | 12 ++++++++++++ |
57 | 1 file changed, 26 insertions(+) | 30 | 1 file changed, 12 insertions(+) |
58 | 31 | ||
59 | diff --git a/hw/arm/exynos4210.c b/hw/arm/exynos4210.c | 32 | diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c |
60 | index XXXXXXX..XXXXXXX 100644 | 33 | index XXXXXXX..XXXXXXX 100644 |
61 | --- a/hw/arm/exynos4210.c | 34 | --- a/hw/arm/musicpal.c |
62 | +++ b/hw/arm/exynos4210.c | 35 | +++ b/hw/arm/musicpal.c |
63 | @@ -XXX,XX +XXX,XX @@ | 36 | @@ -XXX,XX +XXX,XX @@ static void mv88w8618_pit_init(Object *obj) |
64 | /* EHCI */ | 37 | sysbus_init_mmio(dev, &s->iomem); |
65 | #define EXYNOS4210_EHCI_BASE_ADDR 0x12580000 | 38 | } |
66 | 39 | ||
67 | +/* DMA */ | 40 | +static void mv88w8618_pit_finalize(Object *obj) |
68 | +#define EXYNOS4210_PL330_BASE0_ADDR 0x12680000 | 41 | +{ |
69 | +#define EXYNOS4210_PL330_BASE1_ADDR 0x12690000 | 42 | + SysBusDevice *dev = SYS_BUS_DEVICE(obj); |
70 | +#define EXYNOS4210_PL330_BASE2_ADDR 0x12850000 | 43 | + mv88w8618_pit_state *s = MV88W8618_PIT(dev); |
44 | + int i; | ||
71 | + | 45 | + |
72 | static uint8_t chipid_and_omr[] = { 0x11, 0x02, 0x21, 0x43, | 46 | + for (i = 0; i < 4; i++) { |
73 | 0x09, 0x00, 0x00, 0x00 }; | 47 | + ptimer_free(s->timer[i].ptimer); |
74 | 48 | + } | |
75 | @@ -XXX,XX +XXX,XX @@ static uint64_t exynos4210_calc_affinity(int cpu) | ||
76 | return (0x9 << ARM_AFF1_SHIFT) | cpu; | ||
77 | } | ||
78 | |||
79 | +static void pl330_create(uint32_t base, qemu_irq irq, int nreq) | ||
80 | +{ | ||
81 | + SysBusDevice *busdev; | ||
82 | + DeviceState *dev; | ||
83 | + | ||
84 | + dev = qdev_create(NULL, "pl330"); | ||
85 | + qdev_prop_set_uint8(dev, "num_periph_req", nreq); | ||
86 | + qdev_init_nofail(dev); | ||
87 | + busdev = SYS_BUS_DEVICE(dev); | ||
88 | + sysbus_mmio_map(busdev, 0, base); | ||
89 | + sysbus_connect_irq(busdev, 0, irq); | ||
90 | +} | 49 | +} |
91 | + | 50 | + |
92 | Exynos4210State *exynos4210_init(MemoryRegion *system_mem) | 51 | static const VMStateDescription mv88w8618_timer_vmsd = { |
93 | { | 52 | .name = "timer", |
94 | Exynos4210State *s = g_new0(Exynos4210State, 1); | 53 | .version_id = 1, |
95 | @@ -XXX,XX +XXX,XX @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem) | 54 | @@ -XXX,XX +XXX,XX @@ static const TypeInfo mv88w8618_pit_info = { |
96 | sysbus_create_simple(TYPE_EXYNOS4210_EHCI, EXYNOS4210_EHCI_BASE_ADDR, | 55 | .parent = TYPE_SYS_BUS_DEVICE, |
97 | s->irq_table[exynos4210_get_irq(28, 3)]); | 56 | .instance_size = sizeof(mv88w8618_pit_state), |
98 | 57 | .instance_init = mv88w8618_pit_init, | |
99 | + /*** DMA controllers ***/ | 58 | + .instance_finalize = mv88w8618_pit_finalize, |
100 | + pl330_create(EXYNOS4210_PL330_BASE0_ADDR, | 59 | .class_init = mv88w8618_pit_class_init, |
101 | + qemu_irq_invert(s->irq_table[exynos4210_get_irq(35, 1)]), 32); | 60 | }; |
102 | + pl330_create(EXYNOS4210_PL330_BASE1_ADDR, | 61 | |
103 | + qemu_irq_invert(s->irq_table[exynos4210_get_irq(36, 1)]), 32); | ||
104 | + pl330_create(EXYNOS4210_PL330_BASE2_ADDR, | ||
105 | + qemu_irq_invert(s->irq_table[exynos4210_get_irq(34, 1)]), 1); | ||
106 | + | ||
107 | return s; | ||
108 | } | ||
109 | -- | 62 | -- |
110 | 2.20.1 | 63 | 2.20.1 |
111 | 64 | ||
112 | 65 | diff view generated by jsdifflib |
1 | From: Philippe Mathieu-Daudé <philmd@redhat.com> | 1 | From: Gan Qixin <ganqixin@huawei.com> |
---|---|---|---|
2 | 2 | ||
3 | It eases code review, unit is explicit. | 3 | When running device-introspect-test, a memory leak occurred in the |
4 | exynos4210_mct_init function, so use ptimer_free() in the finalize function to | ||
5 | avoid it. | ||
4 | 6 | ||
5 | Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> | 7 | ASAN shows memory leak stack: |
6 | Reviewed-by: Alistair Francis <alistair.francis@wdc.com> | 8 | |
7 | Message-id: 20190520214342.13709-3-philmd@redhat.com | 9 | Indirect leak of 96 byte(s) in 1 object(s) allocated from: |
10 | #0 0xffffab97e1f0 in __interceptor_calloc (/lib64/libasan.so.5+0xee1f0) | ||
11 | #1 0xffffab256800 in g_malloc0 (/lib64/libglib-2.0.so.0+0x56800) | ||
12 | #2 0xaaabf555db78 in ptimer_init /qemu/hw/core/ptimer.c:432 | ||
13 | #3 0xaaabf56b01a0 in exynos4210_mct_init /qemu/hw/timer/exynos4210_mct.c:1505 | ||
14 | #4 0xaaabf6339f6c in object_initialize_with_type /qemu/qom/object.c:515 | ||
15 | #5 0xaaabf633a1e0 in object_new_with_type /qemu/qom/object.c:729 | ||
16 | #6 0xaaabf6375e40 in qmp_device_list_properties /qemu/qom/qom-qmp-cmds.c:153 | ||
17 | #7 0xaaabf653d8ec in qmp_marshal_device_list_properties /qemu/qapi/qapi-commands-qdev.c:59 | ||
18 | #8 0xaaabf6587d08 in do_qmp_dispatch_bh /qemu/qapi/qmp-dispatch.c:110 | ||
19 | #9 0xaaabf6552708 in aio_bh_call /qemu/util/async.c:136 | ||
20 | #10 0xaaabf6552708 in aio_bh_poll /qemu/util/async.c:164 | ||
21 | #11 0xaaabf655f19c in aio_dispatch /qemu/util/aio-posix.c:381 | ||
22 | #12 0xaaabf65523f4 in aio_ctx_dispatch /qemu/util/async.c:306 | ||
23 | |||
24 | Reported-by: Euler Robot <euler.robot@huawei.com> | ||
25 | Signed-off-by: Gan Qixin <ganqixin@huawei.com> | ||
26 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> | ||
8 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | 27 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
9 | --- | 28 | --- |
10 | hw/arm/exynos4_boards.c | 5 +++-- | 29 | hw/timer/exynos4210_mct.c | 14 ++++++++++++++ |
11 | 1 file changed, 3 insertions(+), 2 deletions(-) | 30 | 1 file changed, 14 insertions(+) |
12 | 31 | ||
13 | diff --git a/hw/arm/exynos4_boards.c b/hw/arm/exynos4_boards.c | 32 | diff --git a/hw/timer/exynos4210_mct.c b/hw/timer/exynos4210_mct.c |
14 | index XXXXXXX..XXXXXXX 100644 | 33 | index XXXXXXX..XXXXXXX 100644 |
15 | --- a/hw/arm/exynos4_boards.c | 34 | --- a/hw/timer/exynos4210_mct.c |
16 | +++ b/hw/arm/exynos4_boards.c | 35 | +++ b/hw/timer/exynos4210_mct.c |
17 | @@ -XXX,XX +XXX,XX @@ | 36 | @@ -XXX,XX +XXX,XX @@ static void exynos4210_mct_init(Object *obj) |
18 | */ | 37 | sysbus_init_mmio(dev, &s->iomem); |
19 | 38 | } | |
20 | #include "qemu/osdep.h" | 39 | |
21 | +#include "qemu/units.h" | 40 | +static void exynos4210_mct_finalize(Object *obj) |
22 | #include "qapi/error.h" | 41 | +{ |
23 | #include "qemu/error-report.h" | 42 | + int i; |
24 | #include "qemu-common.h" | 43 | + Exynos4210MCTState *s = EXYNOS4210_MCT(obj); |
25 | @@ -XXX,XX +XXX,XX @@ static int exynos4_board_smp_bootreg_addr[EXYNOS4_NUM_OF_BOARDS] = { | 44 | + |
45 | + ptimer_free(s->g_timer.ptimer_frc); | ||
46 | + | ||
47 | + for (i = 0; i < 2; i++) { | ||
48 | + ptimer_free(s->l_timer[i].tick_timer.ptimer_tick); | ||
49 | + ptimer_free(s->l_timer[i].ptimer_frc); | ||
50 | + } | ||
51 | +} | ||
52 | + | ||
53 | static void exynos4210_mct_class_init(ObjectClass *klass, void *data) | ||
54 | { | ||
55 | DeviceClass *dc = DEVICE_CLASS(klass); | ||
56 | @@ -XXX,XX +XXX,XX @@ static const TypeInfo exynos4210_mct_info = { | ||
57 | .parent = TYPE_SYS_BUS_DEVICE, | ||
58 | .instance_size = sizeof(Exynos4210MCTState), | ||
59 | .instance_init = exynos4210_mct_init, | ||
60 | + .instance_finalize = exynos4210_mct_finalize, | ||
61 | .class_init = exynos4210_mct_class_init, | ||
26 | }; | 62 | }; |
27 | 63 | ||
28 | static unsigned long exynos4_board_ram_size[EXYNOS4_NUM_OF_BOARDS] = { | ||
29 | - [EXYNOS4_BOARD_NURI] = 0x40000000, | ||
30 | - [EXYNOS4_BOARD_SMDKC210] = 0x40000000, | ||
31 | + [EXYNOS4_BOARD_NURI] = 1 * GiB, | ||
32 | + [EXYNOS4_BOARD_SMDKC210] = 1 * GiB, | ||
33 | }; | ||
34 | |||
35 | static struct arm_boot_info exynos4_board_binfo = { | ||
36 | -- | 64 | -- |
37 | 2.20.1 | 65 | 2.20.1 |
38 | 66 | ||
39 | 67 | diff view generated by jsdifflib |
1 | From: Philippe Mathieu-Daudé <philmd@redhat.com> | 1 | From: Bin Meng <bin.meng@windriver.com> |
---|---|---|---|
2 | 2 | ||
3 | Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> | 3 | U-Boot expects PMU_MISC0 register bit 7 is set (see init_bandgap() |
4 | Reviewed-by: Alistair Francis <alistair.francis@wdc.com> | 4 | in arch/arm/mach-imx/mx6/soc.c) during boot. This bit indicates the |
5 | Message-id: 20190520214342.13709-2-philmd@redhat.com | 5 | bandgap has stabilized. |
6 | |||
7 | With this change, the latest upstream U-Boot (v2021.01-rc3) for imx6 | ||
8 | sabrelite board (mx6qsabrelite_defconfig), with a slight change made | ||
9 | by switching CONFIG_OF_SEPARATE to CONFIG_OF_EMBED, boots to U-Boot | ||
10 | shell on QEMU with the following command: | ||
11 | |||
12 | $ qemu-system-arm -M sabrelite -smp 4 -m 1G -kernel u-boot \ | ||
13 | -display none -serial null -serial stdio | ||
14 | |||
15 | Boot log below: | ||
16 | |||
17 | U-Boot 2021.01-rc3 (Dec 12 2020 - 17:40:02 +0800) | ||
18 | |||
19 | CPU: Freescale i.MX?? rev1.0 at 792 MHz | ||
20 | Reset cause: POR | ||
21 | Model: Freescale i.MX6 Quad SABRE Lite Board | ||
22 | Board: SABRE Lite | ||
23 | I2C: ready | ||
24 | DRAM: 1 GiB | ||
25 | force_idle_bus: sda=0 scl=0 sda.gp=0x5c scl.gp=0x55 | ||
26 | force_idle_bus: failed to clear bus, sda=0 scl=0 | ||
27 | force_idle_bus: sda=0 scl=0 sda.gp=0x6d scl.gp=0x6c | ||
28 | force_idle_bus: failed to clear bus, sda=0 scl=0 | ||
29 | force_idle_bus: sda=0 scl=0 sda.gp=0xcb scl.gp=0x5 | ||
30 | force_idle_bus: failed to clear bus, sda=0 scl=0 | ||
31 | MMC: FSL_SDHC: 0, FSL_SDHC: 1 | ||
32 | Loading Environment from MMC... *** Warning - No block device, using default environment | ||
33 | |||
34 | In: serial | ||
35 | Out: serial | ||
36 | Err: serial | ||
37 | Net: Board Net Initialization Failed | ||
38 | No ethernet found. | ||
39 | starting USB... | ||
40 | Bus usb@2184000: usb dr_mode not found | ||
41 | USB EHCI 1.00 | ||
42 | Bus usb@2184200: USB EHCI 1.00 | ||
43 | scanning bus usb@2184000 for devices... 1 USB Device(s) found | ||
44 | scanning bus usb@2184200 for devices... 1 USB Device(s) found | ||
45 | scanning usb for storage devices... 0 Storage Device(s) found | ||
46 | scanning usb for ethernet devices... 0 Ethernet Device(s) found | ||
47 | Hit any key to stop autoboot: 0 | ||
48 | => | ||
49 | |||
50 | Signed-off-by: Bin Meng <bin.meng@windriver.com> | ||
51 | Reviewed-by: Alex Bennée <alex.bennee@linaro.org> | ||
52 | Message-id: 20210106063504.10841-2-bmeng.cn@gmail.com | ||
6 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | 53 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
7 | --- | 54 | --- |
8 | hw/arm/exynos4_boards.c | 24 ------------------------ | 55 | hw/misc/imx6_ccm.c | 2 +- |
9 | 1 file changed, 24 deletions(-) | 56 | 1 file changed, 1 insertion(+), 1 deletion(-) |
10 | 57 | ||
11 | diff --git a/hw/arm/exynos4_boards.c b/hw/arm/exynos4_boards.c | 58 | diff --git a/hw/misc/imx6_ccm.c b/hw/misc/imx6_ccm.c |
12 | index XXXXXXX..XXXXXXX 100644 | 59 | index XXXXXXX..XXXXXXX 100644 |
13 | --- a/hw/arm/exynos4_boards.c | 60 | --- a/hw/misc/imx6_ccm.c |
14 | +++ b/hw/arm/exynos4_boards.c | 61 | +++ b/hw/misc/imx6_ccm.c |
15 | @@ -XXX,XX +XXX,XX @@ | 62 | @@ -XXX,XX +XXX,XX @@ static void imx6_ccm_reset(DeviceState *dev) |
16 | #include "hw/net/lan9118.h" | 63 | s->analog[PMU_REG_3P0] = 0x00000F74; |
17 | #include "hw/boards.h" | 64 | s->analog[PMU_REG_2P5] = 0x00005071; |
18 | 65 | s->analog[PMU_REG_CORE] = 0x00402010; | |
19 | -#undef DEBUG | 66 | - s->analog[PMU_MISC0] = 0x04000000; |
20 | - | 67 | + s->analog[PMU_MISC0] = 0x04000080; |
21 | -//#define DEBUG | 68 | s->analog[PMU_MISC1] = 0x00000000; |
22 | - | 69 | s->analog[PMU_MISC2] = 0x00272727; |
23 | -#ifdef DEBUG | ||
24 | - #undef PRINT_DEBUG | ||
25 | - #define PRINT_DEBUG(fmt, args...) \ | ||
26 | - do { \ | ||
27 | - fprintf(stderr, " [%s:%d] "fmt, __func__, __LINE__, ##args); \ | ||
28 | - } while (0) | ||
29 | -#else | ||
30 | - #define PRINT_DEBUG(fmt, args...) do {} while (0) | ||
31 | -#endif | ||
32 | - | ||
33 | #define SMDK_LAN9118_BASE_ADDR 0x05000000 | ||
34 | |||
35 | typedef enum Exynos4BoardType { | ||
36 | @@ -XXX,XX +XXX,XX @@ exynos4_boards_init_common(MachineState *machine, | ||
37 | exynos4_board_binfo.gic_cpu_if_addr = | ||
38 | EXYNOS4210_SMP_PRIVATE_BASE_ADDR + 0x100; | ||
39 | |||
40 | - PRINT_DEBUG("\n ram_size: %luMiB [0x%08lx]\n" | ||
41 | - " kernel_filename: %s\n" | ||
42 | - " kernel_cmdline: %s\n" | ||
43 | - " initrd_filename: %s\n", | ||
44 | - exynos4_board_ram_size[board_type] / 1048576, | ||
45 | - exynos4_board_ram_size[board_type], | ||
46 | - machine->kernel_filename, | ||
47 | - machine->kernel_cmdline, | ||
48 | - machine->initrd_filename); | ||
49 | - | ||
50 | exynos4_boards_init_ram(s, get_system_memory(), | ||
51 | exynos4_board_ram_size[board_type]); | ||
52 | 70 | ||
53 | -- | 71 | -- |
54 | 2.20.1 | 72 | 2.20.1 |
55 | 73 | ||
56 | 74 | diff view generated by jsdifflib |
New patch | |||
---|---|---|---|
1 | From: Bin Meng <bin.meng@windriver.com> | ||
1 | 2 | ||
3 | Currently when U-Boot boots, it prints "??" for i.MX processor: | ||
4 | |||
5 | CPU: Freescale i.MX?? rev1.0 at 792 MHz | ||
6 | |||
7 | The register that was used to determine the silicon type is | ||
8 | undocumented in the latest IMX6DQRM (Rev. 6, 05/2020), but we | ||
9 | can refer to get_cpu_rev() in arch/arm/mach-imx/mx6/soc.c in | ||
10 | the U-Boot source codes that USB_ANALOG_DIGPROG is used. | ||
11 | |||
12 | Update its reset value to indicate i.MX6Q. | ||
13 | |||
14 | Signed-off-by: Bin Meng <bin.meng@windriver.com> | ||
15 | Reviewed-by: Alex Bennée <alex.bennee@linaro.org> | ||
16 | Message-id: 20210106063504.10841-3-bmeng.cn@gmail.com | ||
17 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | ||
18 | --- | ||
19 | hw/misc/imx6_ccm.c | 2 +- | ||
20 | 1 file changed, 1 insertion(+), 1 deletion(-) | ||
21 | |||
22 | diff --git a/hw/misc/imx6_ccm.c b/hw/misc/imx6_ccm.c | ||
23 | index XXXXXXX..XXXXXXX 100644 | ||
24 | --- a/hw/misc/imx6_ccm.c | ||
25 | +++ b/hw/misc/imx6_ccm.c | ||
26 | @@ -XXX,XX +XXX,XX @@ static void imx6_ccm_reset(DeviceState *dev) | ||
27 | s->analog[USB_ANALOG_USB2_VBUS_DETECT] = 0x00000004; | ||
28 | s->analog[USB_ANALOG_USB2_CHRG_DETECT] = 0x00000000; | ||
29 | s->analog[USB_ANALOG_USB2_MISC] = 0x00000002; | ||
30 | - s->analog[USB_ANALOG_DIGPROG] = 0x00000000; | ||
31 | + s->analog[USB_ANALOG_DIGPROG] = 0x00630000; | ||
32 | |||
33 | /* all PLLs need to be locked */ | ||
34 | s->analog[CCM_ANALOG_PLL_ARM] |= CCM_ANALOG_PLL_LOCK; | ||
35 | -- | ||
36 | 2.20.1 | ||
37 | |||
38 | diff view generated by jsdifflib |
New patch | |||
---|---|---|---|
1 | From: Bin Meng <bin.meng@windriver.com> | ||
1 | 2 | ||
3 | At present, when booting U-Boot on QEMU sabrelite, we see: | ||
4 | |||
5 | Net: Board Net Initialization Failed | ||
6 | No ethernet found. | ||
7 | |||
8 | U-Boot scans PHY at address 4/5/6/7 (see board_eth_init() in the | ||
9 | U-Boot source: board/boundary/nitrogen6x/nitrogen6x.c). On the real | ||
10 | board, the Ethernet PHY is at address 6. Adjust this by updating the | ||
11 | "fec-phy-num" property of the fsl_imx6 SoC object. | ||
12 | |||
13 | With this change, U-Boot sees the PHY but complains MAC address: | ||
14 | |||
15 | Net: using phy at 6 | ||
16 | FEC [PRIME] | ||
17 | Error: FEC address not set. | ||
18 | |||
19 | This is due to U-Boot tries to read the MAC address from the fuse, | ||
20 | which QEMU does not have any valid content filled in. However this | ||
21 | does not prevent the Ethernet from working in QEMU. We just need to | ||
22 | set up the MAC address later in the U-Boot command shell, by: | ||
23 | |||
24 | => setenv ethaddr 00:11:22:33:44:55 | ||
25 | |||
26 | Signed-off-by: Bin Meng <bin.meng@windriver.com> | ||
27 | Reviewed-by: Alex Bennée <alex.bennee@linaro.org> | ||
28 | Message-id: 20210106063504.10841-4-bmeng.cn@gmail.com | ||
29 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | ||
30 | --- | ||
31 | hw/arm/sabrelite.c | 4 ++++ | ||
32 | 1 file changed, 4 insertions(+) | ||
33 | |||
34 | diff --git a/hw/arm/sabrelite.c b/hw/arm/sabrelite.c | ||
35 | index XXXXXXX..XXXXXXX 100644 | ||
36 | --- a/hw/arm/sabrelite.c | ||
37 | +++ b/hw/arm/sabrelite.c | ||
38 | @@ -XXX,XX +XXX,XX @@ static void sabrelite_init(MachineState *machine) | ||
39 | |||
40 | s = FSL_IMX6(object_new(TYPE_FSL_IMX6)); | ||
41 | object_property_add_child(OBJECT(machine), "soc", OBJECT(s)); | ||
42 | + | ||
43 | + /* Ethernet PHY address is 6 */ | ||
44 | + object_property_set_int(OBJECT(s), "fec-phy-num", 6, &error_fatal); | ||
45 | + | ||
46 | qdev_realize(DEVICE(s), NULL, &error_fatal); | ||
47 | |||
48 | memory_region_add_subregion(get_system_memory(), FSL_IMX6_MMDC_ADDR, | ||
49 | -- | ||
50 | 2.20.1 | ||
51 | |||
52 | diff view generated by jsdifflib |
1 | From: Alistair Francis <alistair.francis@wdc.com> | 1 | From: Bin Meng <bin.meng@windriver.com> |
---|---|---|---|
2 | 2 | ||
3 | Commit 89e68b575 "target/arm: Use vector operations for saturation" | 3 | This adds the target guide for SABRE Lite board, and documents how |
4 | causes this abort() when booting QEMU ARM with a Cortex-A15: | 4 | to boot a Linux kernel and U-Boot bootloader. |
5 | 5 | ||
6 | 0 0x00007ffff4c2382f in raise () at /usr/lib/libc.so.6 | 6 | Signed-off-by: Bin Meng <bin.meng@windriver.com> |
7 | 1 0x00007ffff4c0e672 in abort () at /usr/lib/libc.so.6 | ||
8 | 2 0x00005555559c1839 in disas_neon_data_insn (insn=<optimized out>, s=<optimized out>) at ./target/arm/translate.c:6673 | ||
9 | 3 0x00005555559c1839 in disas_neon_data_insn (s=<optimized out>, insn=<optimized out>) at ./target/arm/translate.c:6386 | ||
10 | 4 0x00005555559cd8a4 in disas_arm_insn (insn=4081107068, s=0x7fffe59a9510) at ./target/arm/translate.c:9289 | ||
11 | 5 0x00005555559cd8a4 in arm_tr_translate_insn (dcbase=0x7fffe59a9510, cpu=<optimized out>) at ./target/arm/translate.c:13612 | ||
12 | 6 0x00005555558d1d39 in translator_loop (ops=0x5555561cc580 <arm_translator_ops>, db=0x7fffe59a9510, cpu=0x55555686a2f0, tb=<optimized out>, max_insns=<optimized out>) at ./accel/tcg/translator.c:96 | ||
13 | 7 0x00005555559d10d4 in gen_intermediate_code (cpu=cpu@entry=0x55555686a2f0, tb=tb@entry=0x7fffd7840080 <code_gen_buffer+126091347>, max_insns=max_insns@entry=512) at ./target/arm/translate.c:13901 | ||
14 | 8 0x00005555558d06b9 in tb_gen_code (cpu=cpu@entry=0x55555686a2f0, pc=3067096216, cs_base=0, flags=192, cflags=-16252928, cflags@entry=524288) at ./accel/tcg/translate-all.c:1736 | ||
15 | 9 0x00005555558ce467 in tb_find (cf_mask=524288, tb_exit=1, last_tb=0x7fffd783e640 <code_gen_buffer+126084627>, cpu=0x1) at ./accel/tcg/cpu-exec.c:407 | ||
16 | 10 0x00005555558ce467 in cpu_exec (cpu=cpu@entry=0x55555686a2f0) at ./accel/tcg/cpu-exec.c:728 | ||
17 | 11 0x000055555588b0cf in tcg_cpu_exec (cpu=0x55555686a2f0) at ./cpus.c:1431 | ||
18 | 12 0x000055555588d223 in qemu_tcg_cpu_thread_fn (arg=0x55555686a2f0) at ./cpus.c:1735 | ||
19 | 13 0x000055555588d223 in qemu_tcg_cpu_thread_fn (arg=arg@entry=0x55555686a2f0) at ./cpus.c:1709 | ||
20 | 14 0x0000555555d2629a in qemu_thread_start (args=<optimized out>) at ./util/qemu-thread-posix.c:502 | ||
21 | 15 0x00007ffff4db8a92 in start_thread () at /usr/lib/libpthread. | ||
22 | |||
23 | This patch ensures that we don't hit the abort() in the second switch | ||
24 | case in disas_neon_data_insn() as we will return from the first case. | ||
25 | |||
26 | Signed-off-by: Alistair Francis <alistair.francis@wdc.com> | ||
27 | Reviewed-by: Richard Henderson <richard.henderson@linaro.org> | ||
28 | Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> | ||
29 | Reviewed-by: Alex Bennée <alex.bennee@linaro.org> | 7 | Reviewed-by: Alex Bennée <alex.bennee@linaro.org> |
30 | Tested-by: Alex Bennée <alex.bennee@linaro.org> | 8 | Message-id: 20210106063504.10841-5-bmeng.cn@gmail.com |
31 | Message-id: ad91b397f360b2fc7f4087e476f7df5b04d42ddb.1558021877.git.alistair.francis@wdc.com | ||
32 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | 9 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
33 | --- | 10 | --- |
34 | target/arm/translate.c | 4 ++-- | 11 | docs/system/arm/sabrelite.rst | 119 ++++++++++++++++++++++++++++++++++ |
35 | 1 file changed, 2 insertions(+), 2 deletions(-) | 12 | docs/system/target-arm.rst | 1 + |
13 | 2 files changed, 120 insertions(+) | ||
14 | create mode 100644 docs/system/arm/sabrelite.rst | ||
36 | 15 | ||
37 | diff --git a/target/arm/translate.c b/target/arm/translate.c | 16 | diff --git a/docs/system/arm/sabrelite.rst b/docs/system/arm/sabrelite.rst |
17 | new file mode 100644 | ||
18 | index XXXXXXX..XXXXXXX | ||
19 | --- /dev/null | ||
20 | +++ b/docs/system/arm/sabrelite.rst | ||
21 | @@ -XXX,XX +XXX,XX @@ | ||
22 | +Boundary Devices SABRE Lite (``sabrelite``) | ||
23 | +=========================================== | ||
24 | + | ||
25 | +Boundary Devices SABRE Lite i.MX6 Development Board is a low-cost development | ||
26 | +platform featuring the powerful Freescale / NXP Semiconductor's i.MX 6 Quad | ||
27 | +Applications Processor. | ||
28 | + | ||
29 | +Supported devices | ||
30 | +----------------- | ||
31 | + | ||
32 | +The SABRE Lite machine supports the following devices: | ||
33 | + | ||
34 | + * Up to 4 Cortex A9 cores | ||
35 | + * Generic Interrupt Controller | ||
36 | + * 1 Clock Controller Module | ||
37 | + * 1 System Reset Controller | ||
38 | + * 5 UARTs | ||
39 | + * 2 EPIC timers | ||
40 | + * 1 GPT timer | ||
41 | + * 2 Watchdog timers | ||
42 | + * 1 FEC Ethernet controller | ||
43 | + * 3 I2C controllers | ||
44 | + * 7 GPIO controllers | ||
45 | + * 4 SDHC storage controllers | ||
46 | + * 4 USB 2.0 host controllers | ||
47 | + * 5 ECSPI controllers | ||
48 | + * 1 SST 25VF016B flash | ||
49 | + | ||
50 | +Please note above list is a complete superset the QEMU SABRE Lite machine can | ||
51 | +support. For a normal use case, a device tree blob that represents a real world | ||
52 | +SABRE Lite board, only exposes a subset of devices to the guest software. | ||
53 | + | ||
54 | +Boot options | ||
55 | +------------ | ||
56 | + | ||
57 | +The SABRE Lite machine can start using the standard -kernel functionality | ||
58 | +for loading a Linux kernel, U-Boot bootloader or ELF executable. | ||
59 | + | ||
60 | +Running Linux kernel | ||
61 | +-------------------- | ||
62 | + | ||
63 | +Linux mainline v5.10 release is tested at the time of writing. To build a Linux | ||
64 | +mainline kernel that can be booted by the SABRE Lite machine, simply configure | ||
65 | +the kernel using the imx_v6_v7_defconfig configuration: | ||
66 | + | ||
67 | +.. code-block:: bash | ||
68 | + | ||
69 | + $ export ARCH=arm | ||
70 | + $ export CROSS_COMPILE=arm-linux-gnueabihf- | ||
71 | + $ make imx_v6_v7_defconfig | ||
72 | + $ make | ||
73 | + | ||
74 | +To boot the newly built Linux kernel in QEMU with the SABRE Lite machine, use: | ||
75 | + | ||
76 | +.. code-block:: bash | ||
77 | + | ||
78 | + $ qemu-system-arm -M sabrelite -smp 4 -m 1G \ | ||
79 | + -display none -serial null -serial stdio \ | ||
80 | + -kernel arch/arm/boot/zImage \ | ||
81 | + -dtb arch/arm/boot/dts/imx6q-sabrelite.dtb \ | ||
82 | + -initrd /path/to/rootfs.ext4 \ | ||
83 | + -append "root=/dev/ram" | ||
84 | + | ||
85 | +Running U-Boot | ||
86 | +-------------- | ||
87 | + | ||
88 | +U-Boot mainline v2020.10 release is tested at the time of writing. To build a | ||
89 | +U-Boot mainline bootloader that can be booted by the SABRE Lite machine, use | ||
90 | +the mx6qsabrelite_defconfig with similar commands as described above for Linux: | ||
91 | + | ||
92 | +.. code-block:: bash | ||
93 | + | ||
94 | + $ export CROSS_COMPILE=arm-linux-gnueabihf- | ||
95 | + $ make mx6qsabrelite_defconfig | ||
96 | + | ||
97 | +Note we need to adjust settings by: | ||
98 | + | ||
99 | +.. code-block:: bash | ||
100 | + | ||
101 | + $ make menuconfig | ||
102 | + | ||
103 | +then manually select the following configuration in U-Boot: | ||
104 | + | ||
105 | + Device Tree Control > Provider of DTB for DT Control > Embedded DTB | ||
106 | + | ||
107 | +To start U-Boot using the SABRE Lite machine, provide the u-boot binary to | ||
108 | +the -kernel argument, along with an SD card image with rootfs: | ||
109 | + | ||
110 | +.. code-block:: bash | ||
111 | + | ||
112 | + $ qemu-system-arm -M sabrelite -smp 4 -m 1G \ | ||
113 | + -display none -serial null -serial stdio \ | ||
114 | + -kernel u-boot | ||
115 | + | ||
116 | +The following example shows booting Linux kernel from dhcp, and uses the | ||
117 | +rootfs on an SD card. This requires some additional command line parameters | ||
118 | +for QEMU: | ||
119 | + | ||
120 | +.. code-block:: none | ||
121 | + | ||
122 | + -nic user,tftp=/path/to/kernel/zImage \ | ||
123 | + -drive file=sdcard.img,id=rootfs -device sd-card,drive=rootfs | ||
124 | + | ||
125 | +The directory for the built-in TFTP server should also contain the device tree | ||
126 | +blob of the SABRE Lite board. The sample SD card image was populated with the | ||
127 | +root file system with one single partition. You may adjust the kernel "root=" | ||
128 | +boot parameter accordingly. | ||
129 | + | ||
130 | +After U-Boot boots, type the following commands in the U-Boot command shell to | ||
131 | +boot the Linux kernel: | ||
132 | + | ||
133 | +.. code-block:: none | ||
134 | + | ||
135 | + => setenv ethaddr 00:11:22:33:44:55 | ||
136 | + => setenv bootfile zImage | ||
137 | + => dhcp | ||
138 | + => tftpboot 14000000 imx6q-sabrelite.dtb | ||
139 | + => setenv bootargs root=/dev/mmcblk3p1 | ||
140 | + => bootz 12000000 - 14000000 | ||
141 | diff --git a/docs/system/target-arm.rst b/docs/system/target-arm.rst | ||
38 | index XXXXXXX..XXXXXXX 100644 | 142 | index XXXXXXX..XXXXXXX 100644 |
39 | --- a/target/arm/translate.c | 143 | --- a/docs/system/target-arm.rst |
40 | +++ b/target/arm/translate.c | 144 | +++ b/docs/system/target-arm.rst |
41 | @@ -XXX,XX +XXX,XX @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn) | 145 | @@ -XXX,XX +XXX,XX @@ undocumented; you can get a complete list by running |
42 | tcg_gen_gvec_4(rd_ofs, offsetof(CPUARMState, vfp.qc), | 146 | arm/versatile |
43 | rn_ofs, rm_ofs, vec_size, vec_size, | 147 | arm/vexpress |
44 | (u ? uqadd_op : sqadd_op) + size); | 148 | arm/aspeed |
45 | - break; | 149 | + arm/sabrelite |
46 | + return 0; | 150 | arm/digic |
47 | 151 | arm/musicpal | |
48 | case NEON_3R_VQSUB: | 152 | arm/gumstix |
49 | tcg_gen_gvec_4(rd_ofs, offsetof(CPUARMState, vfp.qc), | ||
50 | rn_ofs, rm_ofs, vec_size, vec_size, | ||
51 | (u ? uqsub_op : sqsub_op) + size); | ||
52 | - break; | ||
53 | + return 0; | ||
54 | |||
55 | case NEON_3R_VMUL: /* VMUL */ | ||
56 | if (u) { | ||
57 | -- | 153 | -- |
58 | 2.20.1 | 154 | 2.20.1 |
59 | 155 | ||
60 | 156 | diff view generated by jsdifflib |