Series comparison

-[Qemu-devel] [PULL 00/12] target-arm queue
+[PULL 00/25] target-arm queue
-Not very much here, but several people have fallen over
+Last lot of target-arm changes to squeeze in before rc1:
-the vector operation segfault bug, so let's get the fix
+ * various minor Arm bug fixes
-into master.
+ * David Carlier's Haiku build portability fixes
  * Wentong Wu's fixes for icount handling in the nios2 target
-thanks
+The following changes since commit 00ce6c36b35e0eb8cc5d68a28f288a6335848813:
 -- PMM
-The following changes since commit d418238dca7b4e0b124135827ead3076233052b1:
+  Merge remote-tracking branch 'remotes/huth-gitlab/tags/pull-request-2020-07-13' into staging (2020-07-13 13:01:30 +0100)
   Merge remote-tracking branch 'remotes/rth/tags/pull-rng-20190522' into staging (2019-05-23 12:57:17 +0100)
 are available in the Git repository at:
-  https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20190523
+  https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20200713
-for you to fetch changes up to 98e4f4fdb8ea05d840f51f47125924c2bb9df2df:
+for you to fetch changes up to 756f739b1682bf131994ec96dad7fbdf8b54493a:
-  hw/arm/exynos4210: QOM'ify the Exynos4210 SoC (2019-05-23 14:47:44 +0100)
+  hw/arm/aspeed: Do not create and attach empty SD cards by default (2020-07-13 14:36:12 +0100)
 ----------------------------------------------------------------
 target-arm queue:
- * exynos4210: QOM'ify the Exynos4210 SoC
+ * hw/arm/bcm2836: Remove unused 'cpu_type' field
- * exynos4210: Add DMA support for the Exynos4210
+ * target/arm: Fix mtedesc for do_mem_zpz
- * arm_gicv3: Fix writes to ICC_CTLR_EL3
+ * Add the ability to change the FEC PHY MDIO device number on i.MX25/i.MX6/i.MX7
- * arm_gicv3: Fix write of ICH_VMCR_EL2.{VBPR0, VBPR1}
+ * target/arm: Don't do raw writes for PMINTENCLR
- * target/arm: Fix vector operation segfault
+ * virtio-iommu: Fix coverity issue in virtio_iommu_handle_command()
- * target/arm: Minor improvements to BFXIL, EXTR
+ * build: Fix various issues with building on Haiku
  * target/nios2: fix wrctl behaviour when using icount
  * hw/arm/tosa: Encapsulate misc GPIO handling in a device
  * hw/arm/palm.c: Encapsulate misc GPIO handling in a device
  * hw/arm/aspeed: Do not create and attach empty SD cards by default
 ----------------------------------------------------------------
-Alistair Francis (1):
+Aaron Lindsay (1):
-      target/arm: Fix vector operation segfault
+      target/arm: Don't do raw writes for PMINTENCLR
-Guenter Roeck (1):
+David CARLIER (8):
-      hw/arm/exynos4210: Add DMA support for the Exynos4210
+      build: Enable BSD symbols for Haiku
       util/qemu-openpty.c: Don't assume pty.h is glibc-only
       build: Check that mlockall() exists
       osdep.h: Always include <sys/signal.h> if it exists
       osdep.h: For Haiku, define SIGIO as equivalent to SIGPOLL
       bswap.h: Include <endian.h> on Haiku for bswap operations
       util/compatfd.c: Only include <sys/syscall.h> if CONFIG_SIGNALFD
       util/oslib-posix.c: Implement qemu_init_exec_dir() for Haiku
-Peter Maydell (5):
+Eric Auger (1):
-      arm: Move system_clock_scale to armv7m_systick.h
+      virtio-iommu: Fix coverity issue in virtio_iommu_handle_command()
       arm: Remove unnecessary includes of hw/arm/arm.h
       arm: Rename hw/arm/arm.h to hw/arm/boot.h
       hw/intc/arm_gicv3: Fix write of ICH_VMCR_EL2.{VBPR0, VBPR1}
       hw/intc/arm_gicv3: Fix writes to ICC_CTLR_EL3
-Philippe Mathieu-Daudé (3):
+Gerd Hoffmann (1):
-      hw/arm/exynos4: Remove unuseful debug code
+      util/drm: make portable by avoiding struct dirent d_type
       hw/arm/exynos4: Use the IEC binary prefix definitions
       hw/arm/exynos4210: QOM'ify the Exynos4210 SoC
-Richard Henderson (2):
+Jean-Christophe Dubois (3):
-      target/arm: Use extract2 for EXTR
+      Add the ability to change the FEC PHY MDIO device number on i.MX25 processor
-      target/arm: Simplify BFXIL expansion
+      Add the ability to change the FEC PHY MDIO device number on i.MX6 processor
       Add the ability to change the FEC PHY MDIO devices numbers on i.MX7 processor
- include/hw/arm/allwinner-a10.h    |  2 +-
+Peter Maydell (4):
- include/hw/arm/aspeed_soc.h       |  1 -
+      hw/arm/tosa.c: Detabify
- include/hw/arm/bcm2836.h          |  1 -
+      hw/arm/tosa: Encapsulate misc GPIO handling in a device
- include/hw/arm/{arm.h => boot.h}  | 12 +++------
+      hw/arm/palm.c: Detabify
- include/hw/arm/exynos4210.h       |  9 +++++--
+      hw/arm/palm.c: Encapsulate misc GPIO handling in a device
  include/hw/arm/fsl-imx25.h        |  2 +-
  include/hw/arm/fsl-imx31.h        |  2 +-
  include/hw/arm/fsl-imx6.h         |  2 +-
  include/hw/arm/fsl-imx6ul.h       |  2 +-
  include/hw/arm/fsl-imx7.h         |  2 +-
  include/hw/arm/virt.h             |  2 +-
  include/hw/arm/xlnx-versal.h      |  2 +-
  include/hw/arm/xlnx-zynqmp.h      |  2 +-
  include/hw/timer/armv7m_systick.h | 22 ++++++++++++++++
  hw/arm/armsse.c                   |  2 +-
  hw/arm/armv7m.c                   |  2 +-
  hw/arm/aspeed.c                   |  2 +-
  hw/arm/boot.c                     |  2 +-
  hw/arm/collie.c                   |  2 +-
  hw/arm/exynos4210.c               | 54 ++++++++++++++++++++++++++++++++++++---
  hw/arm/exynos4_boards.c           | 40 ++++++++---------------------
  hw/arm/highbank.c                 |  2 +-
  hw/arm/integratorcp.c             |  2 +-
  hw/arm/mainstone.c                |  2 +-
  hw/arm/microbit.c                 |  2 +-
  hw/arm/mps2-tz.c                  |  2 +-
  hw/arm/mps2.c                     |  2 +-
  hw/arm/msf2-soc.c                 |  1 -
  hw/arm/msf2-som.c                 |  2 +-
  hw/arm/musca.c                    |  2 +-
  hw/arm/musicpal.c                 |  2 +-
  hw/arm/netduino2.c                |  2 +-
  hw/arm/nrf51_soc.c                |  2 +-
  hw/arm/nseries.c                  |  2 +-
  hw/arm/omap1.c                    |  2 +-
  hw/arm/omap2.c                    |  2 +-
  hw/arm/omap_sx1.c                 |  2 +-
  hw/arm/palm.c                     |  2 +-
  hw/arm/raspi.c                    |  2 +-
  hw/arm/realview.c                 |  2 +-
  hw/arm/spitz.c                    |  2 +-
  hw/arm/stellaris.c                |  2 +-
  hw/arm/stm32f205_soc.c            |  2 +-
  hw/arm/strongarm.c                |  2 +-
  hw/arm/tosa.c                     |  2 +-
  hw/arm/versatilepb.c              |  2 +-
  hw/arm/vexpress.c                 |  2 +-
  hw/arm/virt.c                     |  2 +-
  hw/arm/xilinx_zynq.c              |  2 +-
  hw/arm/xlnx-versal.c              |  2 +-
  hw/arm/z2.c                       |  2 +-
  hw/intc/arm_gicv3_cpuif.c         |  6 ++---
  hw/intc/armv7m_nvic.c             |  1 -
  target/arm/arm-semi.c             |  1 -
  target/arm/cpu.c                  |  1 -
  target/arm/cpu64.c                |  1 -
  target/arm/kvm.c                  |  1 -
  target/arm/kvm32.c                |  1 -
  target/arm/kvm64.c                |  1 -
  target/arm/translate-a64.c        | 44 ++++++++++++++++---------------
  target/arm/translate.c            |  4 +--
 files changed, 164 insertions(+), 123 deletions(-)
  rename include/hw/arm/{arm.h => boot.h} (96%)
+Philippe Mathieu-Daudé (2):
+      hw/arm/bcm2836: Remove unused 'cpu_type' field
+      hw/arm/aspeed: Do not create and attach empty SD cards by default
+Richard Henderson (1):
+      target/arm: Fix mtedesc for do_mem_zpz
+Wentong Wu (4):
+      target/nios2: add DISAS_NORETURN case for nothing more to generate
+      target/nios2: in line the semantics of DISAS_UPDATE with other targets
+      target/nios2: Use gen_io_start around wrctl instruction
+      hw/nios2: exit to main CPU loop only when unmasking interrupts
+ configure                   |  38 ++++++++++++-
+ include/hw/arm/bcm2836.h    |   1 -
+ include/hw/arm/fsl-imx25.h  |   1 +
+ include/hw/arm/fsl-imx6.h   |   1 +
+ include/hw/arm/fsl-imx7.h   |   1 +
+ include/qemu/bswap.h        |   2 +
+ include/qemu/osdep.h        |   6 +-
+ hw/arm/aspeed.c             |   9 +--
+ hw/arm/fsl-imx25.c          |   7 +++
+ hw/arm/fsl-imx6.c           |   7 +++
+ hw/arm/fsl-imx7.c           |   9 +++
+ hw/arm/palm.c               | 111 +++++++++++++++++++++++++------------
+ hw/arm/tosa.c               | 132 +++++++++++++++++++++++++++++---------------
+ hw/nios2/cpu_pic.c          |   3 +-
+ hw/virtio/virtio-iommu.c    |   1 +
+ hw/xen/xen-legacy-backend.c |   1 -
+ os-posix.c                  |   4 ++
+ target/arm/helper.c         |   4 +-
+ target/arm/translate-sve.c  |   2 +-
+ target/nios2/translate.c    |  12 +++-
+ util/compatfd.c             |   2 +
+ util/drm.c                  |  19 +++++--
+ util/oslib-posix.c          |  20 ++++++-
+ util/qemu-openpty.c         |   2 +-
+files changed, 292 insertions(+), 103 deletions(-)

-New patch
+[PULL 01/25] hw/arm/bcm2836: Remove unused 'cpu_type' field
+From: Philippe Mathieu-Daudé <f4bug@amsat.org>
+The 'cpu_type' has been moved from BCM283XState to BCM283XClass
+in commit 210f47840d, but we forgot to remove the old variable.
+Do it now.
+Fixes: 210f47840d ("hw/arm/bcm2836: Hardcode correct CPU type")
+Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
+Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
+Message-id: 20200703200459.23294-1-f4bug@amsat.org
+Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
+---
+ include/hw/arm/bcm2836.h | 1 -
+file changed, 1 deletion(-)
+diff --git a/include/hw/arm/bcm2836.h b/include/hw/arm/bcm2836.h
+index XXXXXXX..XXXXXXX 100644
+--- a/include/hw/arm/bcm2836.h
++++ b/include/hw/arm/bcm2836.h
+@@ -XXX,XX +XXX,XX @@ typedef struct BCM283XState {
+     DeviceState parent_obj;
+     /*< public >*/
+-    char *cpu_type;
+     uint32_t enabled_cpus;
+     struct {
+--
+.20.1

-[Qemu-devel] [PULL 02/12] target/arm: Simplify BFXIL expansion
+[PULL 02/25] target/arm: Fix mtedesc for do_mem_zpz
 From: Richard Henderson <richard.henderson@linaro.org>
-The mask implied by the extract is redundant with the one
+The mtedesc that was constructed was not actually passed in.
-implied by the deposit.  Also, fix spelling of BFXIL.
+Found by Coverity (CID 1429996).
+Fixes: d28d12f008e
+Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
-Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
+Message-id: 20200706202345.193676-1-richard.henderson@linaro.org
 Message-id: 20190514011129.11330-3-richard.henderson@linaro.org
 Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 ---
- target/arm/translate-a64.c | 6 +++---
+ target/arm/translate-sve.c | 2 +-
-file changed, 3 insertions(+), 3 deletions(-)
+file changed, 1 insertion(+), 1 deletion(-)
-diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
+diff --git a/target/arm/translate-sve.c b/target/arm/translate-sve.c
 index XXXXXXX..XXXXXXX 100644
---- a/target/arm/translate-a64.c
+--- a/target/arm/translate-sve.c
-+++ b/target/arm/translate-a64.c
++++ b/target/arm/translate-sve.c
-@@ -XXX,XX +XXX,XX @@ static void disas_bitfield(DisasContext *s, uint32_t insn)
+@@ -XXX,XX +XXX,XX @@ static void do_mem_zpz(DisasContext *s, int zt, int pg, int zm,
-             tcg_gen_extract_i64(tcg_rd, tcg_tmp, ri, len);
+         desc = FIELD_DP32(desc, MTEDESC, ESIZE, 1 << msz);
-             return;
+         desc <<= SVE_MTEDESC_SHIFT;
          }
 -        /* opc == 1, BXFIL fall through to deposit */
 -        tcg_gen_extract_i64(tcg_tmp, tcg_tmp, ri, len);
 +        /* opc == 1, BFXIL fall through to deposit */
 +        tcg_gen_shri_i64(tcg_tmp, tcg_tmp, ri);
          pos = 0;
      } else {
          /* Handle the ri > si case with a deposit
@@ -XXX,XX +XXX,XX @@ static void disas_bitfield(DisasContext *s, uint32_t insn)
          len = ri;
      }
+-    desc = simd_desc(vsz, vsz, scale);
--    if (opc == 1) { /* BFM, BXFIL */
++    desc = simd_desc(vsz, vsz, desc | scale);
-+    if (opc == 1) { /* BFM, BFXIL */
+     t_desc = tcg_const_i32(desc);
-         tcg_gen_deposit_i64(tcg_rd, tcg_rd, tcg_tmp, pos, len);
-     } else {
+     tcg_gen_addi_ptr(t_pg, cpu_env, pred_full_reg_offset(s, pg));
          /* SBFM or UBFM: We start with zero, and we haven't modified
 --
 .20.1

-New patch
+[PULL 03/25] Add the ability to change the FEC PHY MDIO device number on i.MX25 processor
+From: Jean-Christophe Dubois <jcd@tribudubois.net>
+Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net>
+Message-id: 9f8923ecd974160ae8f634c275b1100c2cbe66d7.1593806826.git.jcd@tribudubois.net
+Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
+[PMM: updated for object_property_set_uint() argument reordering]
+Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
+---
+ include/hw/arm/fsl-imx25.h | 1 +
+ hw/arm/fsl-imx25.c         | 7 +++++++
+files changed, 8 insertions(+)
+diff --git a/include/hw/arm/fsl-imx25.h b/include/hw/arm/fsl-imx25.h
+index XXXXXXX..XXXXXXX 100644
+--- a/include/hw/arm/fsl-imx25.h
++++ b/include/hw/arm/fsl-imx25.h
+@@ -XXX,XX +XXX,XX @@ typedef struct FslIMX25State {
+     MemoryRegion   rom[2];
+     MemoryRegion   iram;
+     MemoryRegion   iram_alias;
++    uint32_t       phy_num;
+ } FslIMX25State;
+ /**
+diff --git a/hw/arm/fsl-imx25.c b/hw/arm/fsl-imx25.c
+index XXXXXXX..XXXXXXX 100644
+--- a/hw/arm/fsl-imx25.c
++++ b/hw/arm/fsl-imx25.c
+@@ -XXX,XX +XXX,XX @@ static void fsl_imx25_realize(DeviceState *dev, Error **errp)
+                                             epit_table[i].irq));
+     }
++    object_property_set_uint(OBJECT(&s->fec), "phy-num", s->phy_num, &err);
+     qdev_set_nic_properties(DEVICE(&s->fec), &nd_table[0]);
+     if (!sysbus_realize(SYS_BUS_DEVICE(&s->fec), errp)) {
+@@ -XXX,XX +XXX,XX @@ static void fsl_imx25_realize(DeviceState *dev, Error **errp)
+                                 &s->iram_alias);
+ }
++static Property fsl_imx25_properties[] = {
++    DEFINE_PROP_UINT32("fec-phy-num", FslIMX25State, phy_num, 0),
++    DEFINE_PROP_END_OF_LIST(),
++};
++
+ static void fsl_imx25_class_init(ObjectClass *oc, void *data)
+ {
+     DeviceClass *dc = DEVICE_CLASS(oc);
++    device_class_set_props(dc, fsl_imx25_properties);
+     dc->realize = fsl_imx25_realize;
+     dc->desc = "i.MX25 SOC";
+     /*
+--
+.20.1

-New patch
+[PULL 04/25] Add the ability to change the FEC PHY MDIO device number on i.MX6 processor
+From: Jean-Christophe Dubois <jcd@tribudubois.net>
+Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net>
+Message-id: 05a64e83eb1c0c865ac077b22c599425c024c02c.1593806826.git.jcd@tribudubois.net
+Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
+[PMM: updated for object_property_set_uint() argument reordering]
+Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
+---
+ include/hw/arm/fsl-imx6.h | 1 +
+ hw/arm/fsl-imx6.c         | 7 +++++++
+files changed, 8 insertions(+)
+diff --git a/include/hw/arm/fsl-imx6.h b/include/hw/arm/fsl-imx6.h
+index XXXXXXX..XXXXXXX 100644
+--- a/include/hw/arm/fsl-imx6.h
++++ b/include/hw/arm/fsl-imx6.h
+@@ -XXX,XX +XXX,XX @@ typedef struct FslIMX6State {
+     MemoryRegion   caam;
+     MemoryRegion   ocram;
+     MemoryRegion   ocram_alias;
++    uint32_t       phy_num;
+ } FslIMX6State;
+diff --git a/hw/arm/fsl-imx6.c b/hw/arm/fsl-imx6.c
+index XXXXXXX..XXXXXXX 100644
+--- a/hw/arm/fsl-imx6.c
++++ b/hw/arm/fsl-imx6.c
+@@ -XXX,XX +XXX,XX @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp)
+                                             spi_table[i].irq));
+     }
++    object_property_set_uint(OBJECT(&s->eth), "phy-num", s->phy_num, &err);
+     qdev_set_nic_properties(DEVICE(&s->eth), &nd_table[0]);
+     if (!sysbus_realize(SYS_BUS_DEVICE(&s->eth), errp)) {
+         return;
+@@ -XXX,XX +XXX,XX @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp)
+                                 &s->ocram_alias);
+ }
++static Property fsl_imx6_properties[] = {
++    DEFINE_PROP_UINT32("fec-phy-num", FslIMX6State, phy_num, 0),
++    DEFINE_PROP_END_OF_LIST(),
++};
++
+ static void fsl_imx6_class_init(ObjectClass *oc, void *data)
+ {
+     DeviceClass *dc = DEVICE_CLASS(oc);
++    device_class_set_props(dc, fsl_imx6_properties);
+     dc->realize = fsl_imx6_realize;
+     dc->desc = "i.MX6 SOC";
+     /* Reason: Uses serial_hd() in the realize() function */
+--
+.20.1

-New patch
+[PULL 05/25] Add the ability to change the FEC PHY MDIO devices numbers on i.MX7 processor
+From: Jean-Christophe Dubois <jcd@tribudubois.net>
+Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net>
+Message-id: c850187322be9930e47c8b234c385a7d0da245cb.1593806826.git.jcd@tribudubois.net
+Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
+[PMM: updated for object_property_set_uint() argument reordering]
+Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
+---
+ include/hw/arm/fsl-imx7.h | 1 +
+ hw/arm/fsl-imx7.c         | 9 +++++++++
+files changed, 10 insertions(+)
+diff --git a/include/hw/arm/fsl-imx7.h b/include/hw/arm/fsl-imx7.h
+index XXXXXXX..XXXXXXX 100644
+--- a/include/hw/arm/fsl-imx7.h
++++ b/include/hw/arm/fsl-imx7.h
+@@ -XXX,XX +XXX,XX @@ typedef struct FslIMX7State {
+     IMX7GPRState       gpr;
+     ChipideaState      usb[FSL_IMX7_NUM_USBS];
+     DesignwarePCIEHost pcie;
++    uint32_t           phy_num[FSL_IMX7_NUM_ETHS];
+ } FslIMX7State;
+ enum FslIMX7MemoryMap {
+diff --git a/hw/arm/fsl-imx7.c b/hw/arm/fsl-imx7.c
+index XXXXXXX..XXXXXXX 100644
+--- a/hw/arm/fsl-imx7.c
++++ b/hw/arm/fsl-imx7.c
+@@ -XXX,XX +XXX,XX @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp)
+             FSL_IMX7_ENET2_ADDR,
+         };
++        object_property_set_uint(OBJECT(&s->eth[i]), "phy-num",
++                                 s->phy_num[i], &error_abort);
+         object_property_set_uint(OBJECT(&s->eth[i]), "tx-ring-num",
+                                  FSL_IMX7_ETH_NUM_TX_RINGS, &error_abort);
+         qdev_set_nic_properties(DEVICE(&s->eth[i]), &nd_table[i]);
+@@ -XXX,XX +XXX,XX @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp)
+                                 FSL_IMX7_PCIE_PHY_SIZE);
+ }
++static Property fsl_imx7_properties[] = {
++    DEFINE_PROP_UINT32("fec1-phy-num", FslIMX7State, phy_num[0], 0),
++    DEFINE_PROP_UINT32("fec2-phy-num", FslIMX7State, phy_num[1], 1),
++    DEFINE_PROP_END_OF_LIST(),
++};
++
+ static void fsl_imx7_class_init(ObjectClass *oc, void *data)
+ {
+     DeviceClass *dc = DEVICE_CLASS(oc);
++    device_class_set_props(dc, fsl_imx7_properties);
+     dc->realize = fsl_imx7_realize;
+     /* Reason: Uses serial_hds and nd_table in realize() directly */
+--
+.20.1

-New patch
+[PULL 06/25] target/arm: Don't do raw writes for PMINTENCLR
+From: Aaron Lindsay <aaron@os.amperecomputing.com>
+Raw writes to this register when in KVM mode can cause interrupts to be
+raised (even when the PMU is disabled). Because the underlying state is
+already aliased to PMINTENSET (which already provides raw write
+functions), we can safely disable raw accesses to PMINTENCLR entirely.
+Signed-off-by: Aaron Lindsay <aaron@os.amperecomputing.com>
+Message-id: 20200707152616.1917154-1-aaron@os.amperecomputing.com
+Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
+Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
+---
+ target/arm/helper.c | 4 ++--
+file changed, 2 insertions(+), 2 deletions(-)
+diff --git a/target/arm/helper.c b/target/arm/helper.c
+index XXXXXXX..XXXXXXX 100644
+--- a/target/arm/helper.c
++++ b/target/arm/helper.c
+@@ -XXX,XX +XXX,XX @@ static const ARMCPRegInfo v7_cp_reginfo[] = {
+       .resetvalue = 0x0 },
+     { .name = "PMINTENCLR", .cp = 15, .crn = 9, .crm = 14, .opc1 = 0, .opc2 = 2,
+       .access = PL1_RW, .accessfn = access_tpm,
+-      .type = ARM_CP_ALIAS | ARM_CP_IO,
++      .type = ARM_CP_ALIAS | ARM_CP_IO | ARM_CP_NO_RAW,
+       .fieldoffset = offsetof(CPUARMState, cp15.c9_pminten),
+       .writefn = pmintenclr_write, },
+     { .name = "PMINTENCLR_EL1", .state = ARM_CP_STATE_AA64,
+       .opc0 = 3, .opc1 = 0, .crn = 9, .crm = 14, .opc2 = 2,
+       .access = PL1_RW, .accessfn = access_tpm,
+-      .type = ARM_CP_ALIAS | ARM_CP_IO,
++      .type = ARM_CP_ALIAS | ARM_CP_IO | ARM_CP_NO_RAW,
+       .fieldoffset = offsetof(CPUARMState, cp15.c9_pminten),
+       .writefn = pmintenclr_write },
+     { .name = "CCSIDR", .state = ARM_CP_STATE_BOTH,
+--
+.20.1

-New patch
+[PULL 07/25] virtio-iommu: Fix coverity issue in virtio_iommu_handle_command()
+From: Eric Auger <eric.auger@redhat.com>
+Coverity points out (CID 1430180) that the new case is missing
+break or a /* fallthrough */ comment. Break is the right thing to
+do as in that case, tail is not used.
+Fixes 1733eebb9e ("virtio-iommu: Implement RESV_MEM probe request")
+Signed-off-by: Eric Auger <eric.auger@redhat.com>
+Reported-by: Peter Maydell <peter.maydell@linaro.org>
+Message-id: 20200708160147.18426-1-eric.auger@redhat.com
+Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
+Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
+---
+ hw/virtio/virtio-iommu.c | 1 +
+file changed, 1 insertion(+)
+diff --git a/hw/virtio/virtio-iommu.c b/hw/virtio/virtio-iommu.c
+index XXXXXXX..XXXXXXX 100644
+--- a/hw/virtio/virtio-iommu.c
++++ b/hw/virtio/virtio-iommu.c
+@@ -XXX,XX +XXX,XX @@ static void virtio_iommu_handle_command(VirtIODevice *vdev, VirtQueue *vq)
+             ptail = (struct virtio_iommu_req_tail *)
+                         (buf + s->config.probe_size);
+             ptail->status = virtio_iommu_handle_probe(s, iov, iov_cnt, buf);
++            break;
+         }
+         default:
+             tail.status = VIRTIO_IOMMU_S_UNSUPP;
+--
+.20.1

-[Qemu-devel] [PULL 03/12] target/arm: Fix vector operation segfault
+[PULL 08/25] build: Enable BSD symbols for Haiku
-From: Alistair Francis <alistair.francis@wdc.com>
+From: David CARLIER <devnexen@gmail.com>
-Commit 89e68b575 "target/arm: Use vector operations for saturation"
+Tell Haiku to provide various BSD functions by setting BSD_SOURCE
-causes this abort() when booting QEMU ARM with a Cortex-A15:
+and linking libbsd.
-0x00007ffff4c2382f in raise () at /usr/lib/libc.so.6
+Signed-off-by: David Carlier <devnexen@gmail.com>
-0x00007ffff4c0e672 in abort () at /usr/lib/libc.so.6
+Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
-0x00005555559c1839 in disas_neon_data_insn (insn=<optimized out>, s=<optimized out>) at ./target/arm/translate.c:6673
+Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-0x00005555559c1839 in disas_neon_data_insn (s=<optimized out>, insn=<optimized out>) at ./target/arm/translate.c:6386
+Message-id: 20200703145614.16684-2-peter.maydell@linaro.org
-0x00005555559cd8a4 in disas_arm_insn (insn=4081107068, s=0x7fffe59a9510) at ./target/arm/translate.c:9289
+[PMM: expanded commit message]
-0x00005555559cd8a4 in arm_tr_translate_insn (dcbase=0x7fffe59a9510, cpu=<optimized out>) at ./target/arm/translate.c:13612
+Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
 0x00005555558d1d39 in translator_loop (ops=0x5555561cc580 <arm_translator_ops>, db=0x7fffe59a9510, cpu=0x55555686a2f0, tb=<optimized out>, max_insns=<optimized out>) at ./accel/tcg/translator.c:96
 0x00005555559d10d4 in gen_intermediate_code (cpu=cpu@entry=0x55555686a2f0, tb=tb@entry=0x7fffd7840080 <code_gen_buffer+126091347>, max_insns=max_insns@entry=512) at ./target/arm/translate.c:13901
 0x00005555558d06b9 in tb_gen_code (cpu=cpu@entry=0x55555686a2f0, pc=3067096216, cs_base=0, flags=192, cflags=-16252928, cflags@entry=524288) at ./accel/tcg/translate-all.c:1736
 0x00005555558ce467 in tb_find (cf_mask=524288, tb_exit=1, last_tb=0x7fffd783e640 <code_gen_buffer+126084627>, cpu=0x1) at ./accel/tcg/cpu-exec.c:407
 0x00005555558ce467 in cpu_exec (cpu=cpu@entry=0x55555686a2f0) at ./accel/tcg/cpu-exec.c:728
 0x000055555588b0cf in tcg_cpu_exec (cpu=0x55555686a2f0) at ./cpus.c:1431
 0x000055555588d223 in qemu_tcg_cpu_thread_fn (arg=0x55555686a2f0) at ./cpus.c:1735
 0x000055555588d223 in qemu_tcg_cpu_thread_fn (arg=arg@entry=0x55555686a2f0) at ./cpus.c:1709
 0x0000555555d2629a in qemu_thread_start (args=<optimized out>) at ./util/qemu-thread-posix.c:502
 0x00007ffff4db8a92 in start_thread () at /usr/lib/libpthread.
 This patch ensures that we don't hit the abort() in the second switch
 case in disas_neon_data_insn() as we will return from the first case.
 Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
 Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
 Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
 Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
 Tested-by: Alex Bennée <alex.bennee@linaro.org>
 Message-id: ad91b397f360b2fc7f4087e476f7df5b04d42ddb.1558021877.git.alistair.francis@wdc.com
 Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 ---
- target/arm/translate.c | 4 ++--
+ configure | 4 ++--
 file changed, 2 insertions(+), 2 deletions(-)
-diff --git a/target/arm/translate.c b/target/arm/translate.c
+diff --git a/configure b/configure
-index XXXXXXX..XXXXXXX 100644
+index XXXXXXX..XXXXXXX 100755
---- a/target/arm/translate.c
+--- a/configure
-+++ b/target/arm/translate.c
++++ b/configure
-@@ -XXX,XX +XXX,XX @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn)
+@@ -XXX,XX +XXX,XX @@ SunOS)
-             tcg_gen_gvec_4(rd_ofs, offsetof(CPUARMState, vfp.qc),
+ ;;
-                            rn_ofs, rm_ofs, vec_size, vec_size,
+ Haiku)
-                            (u ? uqadd_op : sqadd_op) + size);
+   haiku="yes"
--            break;
+-  QEMU_CFLAGS="-DB_USE_POSITIVE_POSIX_ERRORS $QEMU_CFLAGS"
-+            return 0;
+-  LIBS="-lposix_error_mapper -lnetwork $LIBS"
++  QEMU_CFLAGS="-DB_USE_POSITIVE_POSIX_ERRORS -DBSD_SOURCE $QEMU_CFLAGS"
-         case NEON_3R_VQSUB:
++  LIBS="-lposix_error_mapper -lnetwork -lbsd $LIBS"
-             tcg_gen_gvec_4(rd_ofs, offsetof(CPUARMState, vfp.qc),
+ ;;
-                            rn_ofs, rm_ofs, vec_size, vec_size,
+ Linux)
-                            (u ? uqsub_op : sqsub_op) + size);
+   audio_drv_list="try-pa oss"
 -            break;
 +            return 0;
          case NEON_3R_VMUL: /* VMUL */
              if (u) {
 --
 .20.1

-New patch
+[PULL 09/25] util/qemu-openpty.c: Don't assume pty.h is glibc-only
+From: David CARLIER <devnexen@gmail.com>
+Instead of using an OS-specific ifdef test to select the "openpty()
+is in pty.h" codepath, make configure check for the existence of
+the header and use the new CONFIG_PTY instead.
+This is necessary to build on Haiku, which also provides openpty()
+via pty.h.
+Signed-off-by: David Carlier <devnexen@gmail.com>
+Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
+Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
+Message-id: 20200703145614.16684-3-peter.maydell@linaro.org
+[PMM: Expanded commit message; rename to HAVE_PTY_H]
+Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
+Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
+---
+ configure           | 9 +++++++++
+ util/qemu-openpty.c | 2 +-
+files changed, 10 insertions(+), 1 deletion(-)
+diff --git a/configure b/configure
+index XXXXXXX..XXXXXXX 100755
+--- a/configure
++++ b/configure
+@@ -XXX,XX +XXX,XX @@ else
+   l2tpv3=no
+ fi
++if check_include "pty.h" ; then
++  pty_h=yes
++else
++  pty_h=no
++fi
++
+ #########################################
+ # vhost interdependencies and host support
+@@ -XXX,XX +XXX,XX @@ fi
+ if test "$sheepdog" = "yes" ; then
+   echo "CONFIG_SHEEPDOG=y" >> $config_host_mak
+ fi
++if test "$pty_h" = "yes" ; then
++  echo "HAVE_PTY_H=y" >> $config_host_mak
++fi
+ if test "$fuzzing" = "yes" ; then
+   if test "$have_fuzzer" = "yes"; then
+     FUZZ_LDFLAGS=" -fsanitize=address,fuzzer"
+diff --git a/util/qemu-openpty.c b/util/qemu-openpty.c
+index XXXXXXX..XXXXXXX 100644
+--- a/util/qemu-openpty.c
++++ b/util/qemu-openpty.c
+@@ -XXX,XX +XXX,XX @@
+ #include "qemu/osdep.h"
+ #include "qemu-common.h"
+-#if defined(__GLIBC__)
++#if defined HAVE_PTY_H
+ # include <pty.h>
+ #elif defined CONFIG_BSD
+ # include <termios.h>
+--
+.20.1

-New patch
+[PULL 10/25] build: Check that mlockall() exists
+From: David CARLIER <devnexen@gmail.com>
+Instead of assuming that all POSIX platforms provide mlockall(),
+test for it in configure. If the host doesn't provide this platform
+then os_mlock() will fail -ENOSYS, as it does already on Windows.
+This is necessary for Haiku, which does not have mlockall().
+Signed-off-by: David Carlier <devnexen@gmail.com>
+Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
+Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
+Message-id: 20200703145614.16684-4-peter.maydell@linaro.org
+[PMM: Expanded commit message; rename to HAVE_MLOCKALL]
+Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
+Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
+---
+ configure  | 15 +++++++++++++++
+ os-posix.c |  4 ++++
+files changed, 19 insertions(+)
+diff --git a/configure b/configure
+index XXXXXXX..XXXXXXX 100755
+--- a/configure
++++ b/configure
+@@ -XXX,XX +XXX,XX @@ else
+   pty_h=no
+ fi
++cat > $TMPC <<EOF
++#include <sys/mman.h>
++int main(int argc, char *argv[]) {
++    return mlockall(MCL_FUTURE);
++}
++EOF
++if compile_prog "" "" ; then
++  have_mlockall=yes
++else
++  have_mlockall=no
++fi
++
+ #########################################
+ # vhost interdependencies and host support
+@@ -XXX,XX +XXX,XX @@ fi
+ if test "$pty_h" = "yes" ; then
+   echo "HAVE_PTY_H=y" >> $config_host_mak
+ fi
++if test "$have_mlockall" = "yes" ; then
++  echo "HAVE_MLOCKALL=y" >> $config_host_mak
++fi
+ if test "$fuzzing" = "yes" ; then
+   if test "$have_fuzzer" = "yes"; then
+     FUZZ_LDFLAGS=" -fsanitize=address,fuzzer"
+diff --git a/os-posix.c b/os-posix.c
+index XXXXXXX..XXXXXXX 100644
+--- a/os-posix.c
++++ b/os-posix.c
+@@ -XXX,XX +XXX,XX @@ bool is_daemonized(void)
+ int os_mlock(void)
+ {
++#ifdef HAVE_MLOCKALL
+     int ret = 0;
+     ret = mlockall(MCL_CURRENT | MCL_FUTURE);
+@@ -XXX,XX +XXX,XX @@ int os_mlock(void)
+     }
+     return ret;
++#else
++    return -ENOSYS;
++#endif
+ }
+--
+.20.1

-[Qemu-devel] [PULL 10/12] hw/arm/exynos4: Use the IEC binary prefix definitions
+[PULL 11/25] osdep.h: Always include <sys/signal.h> if it exists
-From: Philippe Mathieu-Daudé <philmd@redhat.com>
+From: David CARLIER <devnexen@gmail.com>
-It eases code review, unit is explicit.
+Regularize our handling of <sys/signal.h>: currently we include it in
 osdep.h, but only for OpenBSD, and we include it without an ifdef
 guard in a couple of C files.  This causes problems for Haiku, which
 doesn't have that header.
-Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
+Instead, check in configure whether sys/signal.h exists, and if it
-Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
+does then always include it from osdep.h.
-Message-id: 20190520214342.13709-3-philmd@redhat.com
 Signed-off-by: David Carlier <devnexen@gmail.com>
 Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
 Reviewed-by: Thomas Huth <thuth@redhat.com>
 Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
 Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 Message-id: 20200703145614.16684-5-peter.maydell@linaro.org
 [PMM: Expanded commit message; rename to HAVE_SYS_SIGNAL_H]
 Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
 Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 ---
- hw/arm/exynos4_boards.c | 5 +++--
+ configure                   | 10 ++++++++++
-file changed, 3 insertions(+), 2 deletions(-)
+ include/qemu/osdep.h        |  2 +-
  hw/xen/xen-legacy-backend.c |  1 -
  util/oslib-posix.c          |  1 -
 files changed, 11 insertions(+), 3 deletions(-)
-diff --git a/hw/arm/exynos4_boards.c b/hw/arm/exynos4_boards.c
+diff --git a/configure b/configure
 index XXXXXXX..XXXXXXX 100755
 --- a/configure
 +++ b/configure
@@ -XXX,XX +XXX,XX @@ if check_include "libdrm/drm.h" ; then
      have_drm_h=yes
  fi
 +#########################################
 +# sys/signal.h check
 +have_sys_signal_h=no
 +if check_include "sys/signal.h" ; then
 +  have_sys_signal_h=yes
 +fi
 +
  ##########################################
  # VTE probe
@@ -XXX,XX +XXX,XX @@ fi
  if test "$have_openpty" = "yes" ; then
      echo "HAVE_OPENPTY=y" >> $config_host_mak
  fi
 +if test "$have_sys_signal_h" = "yes" ; then
 +    echo "HAVE_SYS_SIGNAL_H=y" >> $config_host_mak
 +fi
  # Work around a system header bug with some kernel/XFS header
  # versions where they both try to define 'struct fsxattr':
 diff --git a/include/qemu/osdep.h b/include/qemu/osdep.h
 index XXXXXXX..XXXXXXX 100644
---- a/hw/arm/exynos4_boards.c
+--- a/include/qemu/osdep.h
-+++ b/hw/arm/exynos4_boards.c
++++ b/include/qemu/osdep.h
@@ -XXX,XX +XXX,XX @@ extern int daemon(int, int);
  #include <setjmp.h>
  #include <signal.h>
 -#ifdef __OpenBSD__
 +#ifdef HAVE_SYS_SIGNAL_H
  #include <sys/signal.h>
  #endif
 diff --git a/hw/xen/xen-legacy-backend.c b/hw/xen/xen-legacy-backend.c
 index XXXXXXX..XXXXXXX 100644
 --- a/hw/xen/xen-legacy-backend.c
 +++ b/hw/xen/xen-legacy-backend.c
 @@ -XXX,XX +XXX,XX @@
   */
  #include "qemu/osdep.h"
-+#include "qemu/units.h"
+-#include <sys/signal.h>
- #include "qapi/error.h"
- #include "qemu/error-report.h"
+ #include "hw/sysbus.h"
- #include "qemu-common.h"
+ #include "hw/boards.h"
-@@ -XXX,XX +XXX,XX @@ static int exynos4_board_smp_bootreg_addr[EXYNOS4_NUM_OF_BOARDS] = {
+diff --git a/util/oslib-posix.c b/util/oslib-posix.c
- };
+index XXXXXXX..XXXXXXX 100644
+--- a/util/oslib-posix.c
- static unsigned long exynos4_board_ram_size[EXYNOS4_NUM_OF_BOARDS] = {
++++ b/util/oslib-posix.c
--    [EXYNOS4_BOARD_NURI]     = 0x40000000,
+@@ -XXX,XX +XXX,XX @@
--    [EXYNOS4_BOARD_SMDKC210] = 0x40000000,
+ #include "qemu/sockets.h"
-+    [EXYNOS4_BOARD_NURI]     = 1 * GiB,
+ #include "qemu/thread.h"
-+    [EXYNOS4_BOARD_SMDKC210] = 1 * GiB,
+ #include <libgen.h>
- };
+-#include <sys/signal.h>
+ #include "qemu/cutils.h"
- static struct arm_boot_info exynos4_board_binfo = {
  #ifdef CONFIG_LINUX
 --
 .20.1

-New patch
+[PULL 12/25] osdep.h: For Haiku, define SIGIO as equivalent to SIGPOLL
+From: David CARLIER <devnexen@gmail.com>
+Haiku doesn't provide SIGIO; fix this up in osdep.h by defining it as
+equal to SIGPOLL.
+Signed-off-by: David Carlier <devnexen@gmail.com>
+Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
+Reviewed-by: Thomas Huth <thuth@redhat.com>
+Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
+Message-id: 20200703145614.16684-6-peter.maydell@linaro.org
+[PMM: Expanded commit message]
+Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
+Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
+---
+ include/qemu/osdep.h | 4 ++++
+file changed, 4 insertions(+)
+diff --git a/include/qemu/osdep.h b/include/qemu/osdep.h
+index XXXXXXX..XXXXXXX 100644
+--- a/include/qemu/osdep.h
++++ b/include/qemu/osdep.h
+@@ -XXX,XX +XXX,XX @@ void qemu_anon_ram_free(void *ptr, size_t size);
+ #define HAVE_CHARDEV_PARPORT 1
+ #endif
++#if defined(__HAIKU__)
++#define SIGIO SIGPOLL
++#endif
++
+ #if defined(CONFIG_LINUX)
+ #ifndef BUS_MCEERR_AR
+ #define BUS_MCEERR_AR 4
+--
+.20.1

-[Qemu-devel] [PULL 09/12] hw/arm/exynos4: Remove unuseful debug code
+[PULL 13/25] bswap.h: Include <endian.h> on Haiku for bswap operations
-From: Philippe Mathieu-Daudé <philmd@redhat.com>
+From: David CARLIER <devnexen@gmail.com>
-Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
+Haiku puts the bswap* functions in <endian.h>; pull in that
-Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
+include file on that platform.
-Message-id: 20190520214342.13709-2-philmd@redhat.com
 Signed-off-by: David Carlier <devnexen@gmail.com>
 Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
 Reviewed-by: Thomas Huth <thuth@redhat.com>
 Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
 Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 Message-id: 20200703145614.16684-7-peter.maydell@linaro.org
 [PMM: Expanded commit message]
 Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
 Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 ---
- hw/arm/exynos4_boards.c | 24 ------------------------
+ include/qemu/bswap.h | 2 ++
-file changed, 24 deletions(-)
+file changed, 2 insertions(+)
-diff --git a/hw/arm/exynos4_boards.c b/hw/arm/exynos4_boards.c
+diff --git a/include/qemu/bswap.h b/include/qemu/bswap.h
 index XXXXXXX..XXXXXXX 100644
---- a/hw/arm/exynos4_boards.c
+--- a/include/qemu/bswap.h
-+++ b/hw/arm/exynos4_boards.c
++++ b/include/qemu/bswap.h
 @@ -XXX,XX +XXX,XX @@
- #include "hw/net/lan9118.h"
+ # include <machine/bswap.h>
- #include "hw/boards.h"
+ #elif defined(__FreeBSD__)
+ # include <sys/endian.h>
--#undef DEBUG
++#elif defined(__HAIKU__)
--
++# include <endian.h>
--//#define DEBUG
+ #elif defined(CONFIG_BYTESWAP_H)
--
+ # include <byteswap.h>
 -#ifdef DEBUG
 -    #undef PRINT_DEBUG
 -    #define  PRINT_DEBUG(fmt, args...) \
 -        do { \
 -            fprintf(stderr, "  [%s:%d]   "fmt, __func__, __LINE__, ##args); \
 -        } while (0)
 -#else
 -    #define  PRINT_DEBUG(fmt, args...)  do {} while (0)
 -#endif
 -
  #define SMDK_LAN9118_BASE_ADDR      0x05000000
  typedef enum Exynos4BoardType {
@@ -XXX,XX +XXX,XX @@ exynos4_boards_init_common(MachineState *machine,
      exynos4_board_binfo.gic_cpu_if_addr =
              EXYNOS4210_SMP_PRIVATE_BASE_ADDR + 0x100;
 -    PRINT_DEBUG("\n ram_size: %luMiB [0x%08lx]\n"
 -            " kernel_filename: %s\n"
 -            " kernel_cmdline: %s\n"
 -            " initrd_filename: %s\n",
 -            exynos4_board_ram_size[board_type] / 1048576,
 -            exynos4_board_ram_size[board_type],
 -            machine->kernel_filename,
 -            machine->kernel_cmdline,
 -            machine->initrd_filename);
 -
      exynos4_boards_init_ram(s, get_system_memory(),
                              exynos4_board_ram_size[board_type]);
 --
 .20.1

-New patch
+[PULL 14/25] util/compatfd.c: Only include <sys/syscall.h> if CONFIG_SIGNALFD
+From: David CARLIER <devnexen@gmail.com>
+util/compatfd.c includes <sys/syscall.h> so that the CONFIG_SIGNALFD
+code can use SYS_signalfd. Guard the #include with CONFIG_SIGNALFD
+to avoid portability issues on hosts like Haiku which do not
+provide that header file.
+Signed-off-by: David Carlier <devnexen@gmail.com>
+Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
+Reviewed-by: Thomas Huth <thuth@redhat.com>
+Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
+Message-id: 20200703145614.16684-8-peter.maydell@linaro.org
+[PMM: Expanded commit message]
+Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
+Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
+---
+ util/compatfd.c | 2 ++
+file changed, 2 insertions(+)
+diff --git a/util/compatfd.c b/util/compatfd.c
+index XXXXXXX..XXXXXXX 100644
+--- a/util/compatfd.c
++++ b/util/compatfd.c
+@@ -XXX,XX +XXX,XX @@
+ #include "qemu/osdep.h"
+ #include "qemu/thread.h"
++#if defined(CONFIG_SIGNALFD)
+ #include <sys/syscall.h>
++#endif
+ struct sigfd_compat_info
+ {
+--
+.20.1

-[Qemu-devel] [PULL 01/12] target/arm: Use extract2 for EXTR
+[PULL 15/25] util/oslib-posix.c: Implement qemu_init_exec_dir() for Haiku
-From: Richard Henderson <richard.henderson@linaro.org>
+From: David CARLIER <devnexen@gmail.com>
-This is, after all, how we implement extract2 in tcg/aarch64.
+The qemu_init_exec_dir() function is inherently non-portable;
 provide an implementation for Haiku hosts.
+Signed-off-by: David Carlier <devnexen@gmail.com>
 Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
-Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
+Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-Message-id: 20190514011129.11330-2-richard.henderson@linaro.org
+Message-id: 20200703145614.16684-9-peter.maydell@linaro.org
 [PMM: Expanded commit message]
 Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
 Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 ---
- target/arm/translate-a64.c | 38 ++++++++++++++++++++------------------
+ util/oslib-posix.c | 19 +++++++++++++++++++
-file changed, 20 insertions(+), 18 deletions(-)
+file changed, 19 insertions(+)
-diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
+diff --git a/util/oslib-posix.c b/util/oslib-posix.c
 index XXXXXXX..XXXXXXX 100644
---- a/target/arm/translate-a64.c
+--- a/util/oslib-posix.c
-+++ b/target/arm/translate-a64.c
++++ b/util/oslib-posix.c
-@@ -XXX,XX +XXX,XX @@ static void disas_extract(DisasContext *s, uint32_t insn)
+@@ -XXX,XX +XXX,XX @@
-             } else {
+ #include <mach-o/dyld.h>
-                 tcg_gen_ext32u_i64(tcg_rd, cpu_reg(s, rm));
+ #endif
-             }
--        } else if (rm == rn) { /* ROR */
++#ifdef __HAIKU__
--            tcg_rm = cpu_reg(s, rm);
++#include <kernel/image.h>
--            if (sf) {
++#endif
 -                tcg_gen_rotri_i64(tcg_rd, tcg_rm, imm);
 -            } else {
 -                TCGv_i32 tmp = tcg_temp_new_i32();
 -                tcg_gen_extrl_i64_i32(tmp, tcg_rm);
 -                tcg_gen_rotri_i32(tmp, tmp, imm);
 -                tcg_gen_extu_i32_i64(tcg_rd, tmp);
 -                tcg_temp_free_i32(tmp);
 -            }
          } else {
 -            tcg_rm = read_cpu_reg(s, rm, sf);
 -            tcg_rn = read_cpu_reg(s, rn, sf);
 -            tcg_gen_shri_i64(tcg_rm, tcg_rm, imm);
 -            tcg_gen_shli_i64(tcg_rn, tcg_rn, bitsize - imm);
 -            tcg_gen_or_i64(tcg_rd, tcg_rm, tcg_rn);
 -            if (!sf) {
 -                tcg_gen_ext32u_i64(tcg_rd, tcg_rd);
 +            tcg_rm = cpu_reg(s, rm);
 +            tcg_rn = cpu_reg(s, rn);
 +
-+            if (sf) {
+ #include "qemu/mmap-alloc.h"
-+                /* Specialization to ROR happens in EXTRACT2.  */
-+                tcg_gen_extract2_i64(tcg_rd, tcg_rm, tcg_rn, imm);
+ #ifdef CONFIG_DEBUG_STACK_USAGE
-+            } else {
+@@ -XXX,XX +XXX,XX @@ void qemu_init_exec_dir(const char *argv0)
 +                TCGv_i32 t0 = tcg_temp_new_i32();
 +
 +                tcg_gen_extrl_i64_i32(t0, tcg_rm);
 +                if (rm == rn) {
 +                    tcg_gen_rotri_i32(t0, t0, imm);
 +                } else {
 +                    TCGv_i32 t1 = tcg_temp_new_i32();
 +                    tcg_gen_extrl_i64_i32(t1, tcg_rn);
 +                    tcg_gen_extract2_i32(t0, t0, t1, imm);
 +                    tcg_temp_free_i32(t1);
 +                }
 +                tcg_gen_extu_i32_i64(tcg_rd, t0);
 +                tcg_temp_free_i32(t0);
              }
          }
      }
++#elif defined(__HAIKU__)
++    {
++        image_info ii;
++        int32_t c = 0;
++
++        *buf = '\0';
++        while (get_next_image_info(0, &c, &ii) == B_OK) {
++            if (ii.type == B_APP_IMAGE) {
++                strncpy(buf, ii.name, sizeof(buf));
++                buf[sizeof(buf) - 1] = 0;
++                p = buf;
++                break;
++            }
++        }
++    }
+ #endif
+     /* If we don't have any way of figuring out the actual executable
+        location then try argv[0].  */
 --
 .20.1

-New patch
+[PULL 16/25] util/drm: make portable by avoiding struct dirent d_type
+From: Gerd Hoffmann <kraxel@redhat.com>
+Given this isn't perforance critical at all lets avoid the non-portable
+d_type and use fstat instead to check whenever the file is a chardev.
+Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
+Reported-by: David Carlier <devnexen@gmail.com>
+Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
+Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
+Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
+Message-id: 20200703145614.16684-10-peter.maydell@linaro.org
+Message-id: 20200701180302.14821-1-kraxel@redhat.com
+[PMM: fixed comment style; tweaked subject line]
+Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
+Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
+---
+ util/drm.c | 19 ++++++++++++++-----
+file changed, 14 insertions(+), 5 deletions(-)
+diff --git a/util/drm.c b/util/drm.c
+index XXXXXXX..XXXXXXX 100644
+--- a/util/drm.c
++++ b/util/drm.c
+@@ -XXX,XX +XXX,XX @@ int qemu_drm_rendernode_open(const char *rendernode)
+ {
+     DIR *dir;
+     struct dirent *e;
+-    int r, fd;
++    struct stat st;
++    int r, fd, ret;
+     char *p;
+     if (rendernode) {
+@@ -XXX,XX +XXX,XX @@ int qemu_drm_rendernode_open(const char *rendernode)
+     fd = -1;
+     while ((e = readdir(dir))) {
+-        if (e->d_type != DT_CHR) {
+-            continue;
+-        }
+-
+         if (strncmp(e->d_name, "renderD", 7)) {
+             continue;
+         }
+@@ -XXX,XX +XXX,XX @@ int qemu_drm_rendernode_open(const char *rendernode)
+             g_free(p);
+             continue;
+         }
++
++        /*
++         * prefer fstat() over checking e->d_type == DT_CHR for
++         * portability reasons
++         */
++        ret = fstat(r, &st);
++        if (ret < 0 || (st.st_mode & S_IFMT) != S_IFCHR) {
++            close(r);
++            g_free(p);
++            continue;
++        }
++
+         fd = r;
+         g_free(p);
+         break;
+--
+.20.1

-New patch
+[PULL 17/25] target/nios2: add DISAS_NORETURN case for nothing more to generate
+From: Wentong Wu <wentong.wu@intel.com>
+Add DISAS_NORETURN case for nothing more to generate because at runtime
+execution will never return from some helper call. And at the same time
+replace DISAS_UPDATE in t_gen_helper_raise_exception and gen_exception
+with the newly added DISAS_NORETURN.
+Signed-off-by: Wentong Wu <wentong.wu@intel.com>
+Message-id: 20200710233433.19729-1-wentong.wu@intel.com
+Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
+Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
+---
+ target/nios2/translate.c | 5 +++--
+file changed, 3 insertions(+), 2 deletions(-)
+diff --git a/target/nios2/translate.c b/target/nios2/translate.c
+index XXXXXXX..XXXXXXX 100644
+--- a/target/nios2/translate.c
++++ b/target/nios2/translate.c
+@@ -XXX,XX +XXX,XX @@ static void t_gen_helper_raise_exception(DisasContext *dc,
+     tcg_gen_movi_tl(dc->cpu_R[R_PC], dc->pc);
+     gen_helper_raise_exception(dc->cpu_env, tmp);
+     tcg_temp_free_i32(tmp);
+-    dc->is_jmp = DISAS_UPDATE;
++    dc->is_jmp = DISAS_NORETURN;
+ }
+ static bool use_goto_tb(DisasContext *dc, uint32_t dest)
+@@ -XXX,XX +XXX,XX @@ static void gen_exception(DisasContext *dc, uint32_t excp)
+     tcg_gen_movi_tl(cpu_R[R_PC], dc->pc);
+     gen_helper_raise_exception(cpu_env, tmp);
+     tcg_temp_free_i32(tmp);
+-    dc->is_jmp = DISAS_UPDATE;
++    dc->is_jmp = DISAS_NORETURN;
+ }
+ /* generate intermediate code for basic block 'tb'.  */
+@@ -XXX,XX +XXX,XX @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns)
+         tcg_gen_exit_tb(NULL, 0);
+         break;
++    case DISAS_NORETURN:
+     case DISAS_TB_JUMP:
+         /* nothing more to generate */
+         break;
+--
+.20.1

-[Qemu-devel] [PULL 07/12] hw/intc/arm_gicv3: Fix write of ICH_VMCR_EL2.{VBPR0, VBPR1}
+[PULL 18/25] target/nios2: in line the semantics of DISAS_UPDATE with other targets
-In ich_vmcr_write() we enforce "writes of BPR fields to less than
+From: Wentong Wu <wentong.wu@intel.com>
 their minimum sets them to the minimum" by doing a "read vbpr and
 write it back" operation.  A typo here meant that we weren't handling
 writes to these fields correctly, because we were reading from VBPR0
 but writing to VBPR1.
+In line the semantics of DISAS_UPDATE on nios2 target with other targets
+which is to explicitly write the PC back into the cpu state before doing
+a tcg_gen_exit_tb().
+Signed-off-by: Wentong Wu <wentong.wu@intel.com>
+Message-id: 20200710233433.19729-2-wentong.wu@intel.com
+Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
 Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
-Message-id: 20190520162809.2677-4-peter.maydell@linaro.org
 ---
- hw/intc/arm_gicv3_cpuif.c | 2 +-
+ target/nios2/translate.c | 2 +-
 file changed, 1 insertion(+), 1 deletion(-)
-diff --git a/hw/intc/arm_gicv3_cpuif.c b/hw/intc/arm_gicv3_cpuif.c
+diff --git a/target/nios2/translate.c b/target/nios2/translate.c
 index XXXXXXX..XXXXXXX 100644
---- a/hw/intc/arm_gicv3_cpuif.c
+--- a/target/nios2/translate.c
-+++ b/hw/intc/arm_gicv3_cpuif.c
++++ b/target/nios2/translate.c
-@@ -XXX,XX +XXX,XX @@ static void ich_vmcr_write(CPUARMState *env, const ARMCPRegInfo *ri,
+@@ -XXX,XX +XXX,XX @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns)
-     /* Enforce "writing BPRs to less than minimum sets them to the minimum"
+     /* Indicate where the next block should start */
-      * by reading and writing back the fields.
+     switch (dc->is_jmp) {
-      */
+     case DISAS_NEXT:
--    write_vbpr(cs, GICV3_G1, read_vbpr(cs, GICV3_G0));
++    case DISAS_UPDATE:
-+    write_vbpr(cs, GICV3_G0, read_vbpr(cs, GICV3_G0));
+         /* Save the current PC back into the CPU register */
-     write_vbpr(cs, GICV3_G1, read_vbpr(cs, GICV3_G1));
+         tcg_gen_movi_tl(cpu_R[R_PC], dc->pc);
+         tcg_gen_exit_tb(NULL, 0);
-     gicv3_cpuif_virt_update(cs);
+@@ -XXX,XX +XXX,XX @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns)
      default:
      case DISAS_JUMP:
 -    case DISAS_UPDATE:
          /* The jump will already have updated the PC register */
          tcg_gen_exit_tb(NULL, 0);
          break;
 --
 .20.1

-[Qemu-devel] [PULL 11/12] hw/arm/exynos4210: Add DMA support for the Exynos4210
+[PULL 19/25] target/nios2: Use gen_io_start around wrctl instruction
-From: Guenter Roeck <linux@roeck-us.net>
+From: Wentong Wu <wentong.wu@intel.com>
-QEMU already supports pl330. Instantiate it for Exynos4210.
+wrctl instruction on nios2 target will cause checking cpu
 interrupt but tcg_handle_interrupt() will call cpu_abort()
 if the CPU gets an interrupt while it's not in 'can do IO'
 state, so add gen_io_start around wrctl instruction. Also
 at the same time, end the onging TB with DISAS_UPDATE.
-Relevant part of Linux arch/arm/boot/dts/exynos4.dtsi:
+Signed-off-by: Wentong Wu <wentong.wu@intel.com>
+Message-id: 20200710233433.19729-3-wentong.wu@intel.com
 / {
     soc: soc {
         amba {
             pdma0: pdma@12680000 {
                 compatible = "arm,pl330", "arm,primecell";
                 reg = <0x12680000 0x1000>;
                 interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&clock CLK_PDMA0>;
                 clock-names = "apb_pclk";
                 #dma-cells = <1>;
                 #dma-channels = <8>;
                 #dma-requests = <32>;
             };
             pdma1: pdma@12690000 {
                 compatible = "arm,pl330", "arm,primecell";
                 reg = <0x12690000 0x1000>;
                 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&clock CLK_PDMA1>;
                 clock-names = "apb_pclk";
                 #dma-cells = <1>;
                 #dma-channels = <8>;
                 #dma-requests = <32>;
             };
             mdma1: mdma@12850000 {
                 compatible = "arm,pl330", "arm,primecell";
                 reg = <0x12850000 0x1000>;
                 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&clock CLK_MDMA>;
                 clock-names = "apb_pclk";
                 #dma-cells = <1>;
                 #dma-channels = <8>;
                 #dma-requests = <1>;
             };
         };
     };
 };
 Signed-off-by: Guenter Roeck <linux@roeck-us.net>
 Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
 Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
 Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
 Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
 Message-id: 20190520214342.13709-4-philmd@redhat.com
 [PMD: Do not set default qdev properties, create the controllers in the SoC
       rather than the board (Peter Maydell), add dtsi in commit message]
 Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
 Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
 Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 ---
- hw/arm/exynos4210.c | 26 ++++++++++++++++++++++++++
+ target/nios2/translate.c | 5 +++++
-file changed, 26 insertions(+)
+file changed, 5 insertions(+)
-diff --git a/hw/arm/exynos4210.c b/hw/arm/exynos4210.c
+diff --git a/target/nios2/translate.c b/target/nios2/translate.c
 index XXXXXXX..XXXXXXX 100644
---- a/hw/arm/exynos4210.c
+--- a/target/nios2/translate.c
-+++ b/hw/arm/exynos4210.c
++++ b/target/nios2/translate.c
 @@ -XXX,XX +XXX,XX @@
- /* EHCI */
+ #include "exec/cpu_ldst.h"
- #define EXYNOS4210_EHCI_BASE_ADDR           0x12580000
+ #include "exec/translator.h"
+ #include "qemu/qemu-print.h"
-+/* DMA */
++#include "exec/gen-icount.h"
-+#define EXYNOS4210_PL330_BASE0_ADDR         0x12680000
-+#define EXYNOS4210_PL330_BASE1_ADDR         0x12690000
+ /* is_jmp field values */
-+#define EXYNOS4210_PL330_BASE2_ADDR         0x12850000
+ #define DISAS_JUMP    DISAS_TARGET_0 /* only pc was modified dynamically */
-+
+@@ -XXX,XX +XXX,XX @@ static void wrctl(DisasContext *dc, uint32_t code, uint32_t flags)
- static uint8_t chipid_and_omr[] = { 0x11, 0x02, 0x21, 0x43,
+     /* If interrupts were enabled using WRCTL, trigger them. */
-x09, 0x00, 0x00, 0x00 };
+ #if !defined(CONFIG_USER_ONLY)
+     if ((instr.imm5 + CR_BASE) == CR_STATUS) {
-@@ -XXX,XX +XXX,XX @@ static uint64_t exynos4210_calc_affinity(int cpu)
++        if (tb_cflags(dc->tb) & CF_USE_ICOUNT) {
-     return (0x9 << ARM_AFF1_SHIFT) | cpu;
++            gen_io_start();
- }
++        }
+         gen_helper_check_interrupts(dc->cpu_env);
-+static void pl330_create(uint32_t base, qemu_irq irq, int nreq)
++        dc->is_jmp = DISAS_UPDATE;
-+{
+     }
-+    SysBusDevice *busdev;
+ #endif
 +    DeviceState *dev;
 +
 +    dev = qdev_create(NULL, "pl330");
 +    qdev_prop_set_uint8(dev, "num_periph_req",  nreq);
 +    qdev_init_nofail(dev);
 +    busdev = SYS_BUS_DEVICE(dev);
 +    sysbus_mmio_map(busdev, 0, base);
 +    sysbus_connect_irq(busdev, 0, irq);
 +}
 +
  Exynos4210State *exynos4210_init(MemoryRegion *system_mem)
  {
      Exynos4210State *s = g_new0(Exynos4210State, 1);
@@ -XXX,XX +XXX,XX @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem)
      sysbus_create_simple(TYPE_EXYNOS4210_EHCI, EXYNOS4210_EHCI_BASE_ADDR,
              s->irq_table[exynos4210_get_irq(28, 3)]);
 +    /*** DMA controllers ***/
 +    pl330_create(EXYNOS4210_PL330_BASE0_ADDR,
 +                 qemu_irq_invert(s->irq_table[exynos4210_get_irq(35, 1)]), 32);
 +    pl330_create(EXYNOS4210_PL330_BASE1_ADDR,
 +                 qemu_irq_invert(s->irq_table[exynos4210_get_irq(36, 1)]), 32);
 +    pl330_create(EXYNOS4210_PL330_BASE2_ADDR,
 +                 qemu_irq_invert(s->irq_table[exynos4210_get_irq(34, 1)]), 1);
 +
      return s;
  }
 --
 .20.1

-[Qemu-devel] [PULL 08/12] hw/intc/arm_gicv3: Fix writes to ICC_CTLR_EL3
+[PULL 20/25] hw/nios2: exit to main CPU loop only when unmasking interrupts
-The ICC_CTLR_EL3 register includes some bits which are aliases
+From: Wentong Wu <wentong.wu@intel.com>
 of bits in the ICC_CTLR_EL1(S) and (NS) registers. QEMU chooses
 to keep those bits in the cs->icc_ctlr_el1[] struct fields.
 Unfortunately a missing '~' in the code to update the bits
 in those fields meant that writing to ICC_CTLR_EL3 would corrupt
 the ICC_CLTR_EL1 register values.
+Only when guest code is unmasking interrupts, terminate the excution
+of translated code and exit to the main CPU loop to handle previous
+pended interrupts because of the interrupts mask by guest code.
+Signed-off-by: Wentong Wu <wentong.wu@intel.com>
+Message-id: 20200710233433.19729-4-wentong.wu@intel.com
+Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
 Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
-Message-id: 20190520162809.2677-5-peter.maydell@linaro.org
 ---
- hw/intc/arm_gicv3_cpuif.c | 4 ++--
+ hw/nios2/cpu_pic.c | 3 ++-
-file changed, 2 insertions(+), 2 deletions(-)
+file changed, 2 insertions(+), 1 deletion(-)
-diff --git a/hw/intc/arm_gicv3_cpuif.c b/hw/intc/arm_gicv3_cpuif.c
+diff --git a/hw/nios2/cpu_pic.c b/hw/nios2/cpu_pic.c
 index XXXXXXX..XXXXXXX 100644
---- a/hw/intc/arm_gicv3_cpuif.c
+--- a/hw/nios2/cpu_pic.c
-+++ b/hw/intc/arm_gicv3_cpuif.c
++++ b/hw/nios2/cpu_pic.c
-@@ -XXX,XX +XXX,XX @@ static void icc_ctlr_el3_write(CPUARMState *env, const ARMCPRegInfo *ri,
+@@ -XXX,XX +XXX,XX @@ static void nios2_pic_cpu_handler(void *opaque, int irq, int level)
-     trace_gicv3_icc_ctlr_el3_write(gicv3_redist_affid(cs), value);
+ void nios2_check_interrupts(CPUNios2State *env)
-     /* *_EL1NS and *_EL1S bits are aliases into the ICC_CTLR_EL1 bits. */
+ {
--    cs->icc_ctlr_el1[GICV3_NS] &= (ICC_CTLR_EL1_CBPR | ICC_CTLR_EL1_EOIMODE);
+-    if (env->irq_pending) {
-+    cs->icc_ctlr_el1[GICV3_NS] &= ~(ICC_CTLR_EL1_CBPR | ICC_CTLR_EL1_EOIMODE);
++    if (env->irq_pending &&
-     if (value & ICC_CTLR_EL3_EOIMODE_EL1NS) {
++        (env->regs[CR_STATUS] & CR_STATUS_PIE)) {
-         cs->icc_ctlr_el1[GICV3_NS] |= ICC_CTLR_EL1_EOIMODE;
+         env->irq_pending = 0;
-     }
+         cpu_interrupt(env_cpu(env), CPU_INTERRUPT_HARD);
@@ -XXX,XX +XXX,XX @@ static void icc_ctlr_el3_write(CPUARMState *env, const ARMCPRegInfo *ri,
          cs->icc_ctlr_el1[GICV3_NS] |= ICC_CTLR_EL1_CBPR;
      }
 -    cs->icc_ctlr_el1[GICV3_S] &= (ICC_CTLR_EL1_CBPR | ICC_CTLR_EL1_EOIMODE);
 +    cs->icc_ctlr_el1[GICV3_S] &= ~(ICC_CTLR_EL1_CBPR | ICC_CTLR_EL1_EOIMODE);
      if (value & ICC_CTLR_EL3_EOIMODE_EL1S) {
          cs->icc_ctlr_el1[GICV3_S] |= ICC_CTLR_EL1_EOIMODE;
      }
 --
 .20.1

-[Qemu-devel] [PULL 06/12] arm: Rename hw/arm/arm.h to hw/arm/boot.h
+[PULL 21/25] hw/arm/tosa.c: Detabify
-The header file hw/arm/arm.h now includes only declarations
+Remove the hardcoded tabs from hw/arm/tosa.c. There aren't
-relating to hw/arm/boot.c functionality. Rename it accordingly,
+many, but since they're all in constant #defines they're not
-and adjust its header comment.
+going to go away with our usual "only when we touch a function"
+policy on reformatting.
 The bulk of this commit was created via
  perl -pi -e 's|hw/arm/arm.h|hw/arm/boot.h|' hw/arm/*.c include/hw/arm/*.h
 In a few cases we can just delete the #include:
 hw/arm/msf2-soc.c, include/hw/arm/aspeed_soc.h and
 include/hw/arm/bcm2836.h did not require it.
 Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
+Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
-Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
+Message-id: 20200628203748.14250-2-peter.maydell@linaro.org
 Message-id: 20190516163857.6430-4-peter.maydell@linaro.org
 ---
- include/hw/arm/allwinner-a10.h   | 2 +-
+ hw/arm/tosa.c | 44 ++++++++++++++++++++++----------------------
- include/hw/arm/aspeed_soc.h      | 1 -
+file changed, 22 insertions(+), 22 deletions(-)
  include/hw/arm/bcm2836.h         | 1 -
  include/hw/arm/{arm.h => boot.h} | 8 ++++----
  include/hw/arm/fsl-imx25.h       | 2 +-
  include/hw/arm/fsl-imx31.h       | 2 +-
  include/hw/arm/fsl-imx6.h        | 2 +-
  include/hw/arm/fsl-imx6ul.h      | 2 +-
  include/hw/arm/fsl-imx7.h        | 2 +-
  include/hw/arm/virt.h            | 2 +-
  include/hw/arm/xlnx-versal.h     | 2 +-
  include/hw/arm/xlnx-zynqmp.h     | 2 +-
  hw/arm/armsse.c                  | 2 +-
  hw/arm/armv7m.c                  | 2 +-
  hw/arm/aspeed.c                  | 2 +-
  hw/arm/boot.c                    | 2 +-
  hw/arm/collie.c                  | 2 +-
  hw/arm/exynos4210.c              | 2 +-
  hw/arm/exynos4_boards.c          | 2 +-
  hw/arm/highbank.c                | 2 +-
  hw/arm/integratorcp.c            | 2 +-
  hw/arm/mainstone.c               | 2 +-
  hw/arm/microbit.c                | 2 +-
  hw/arm/mps2-tz.c                 | 2 +-
  hw/arm/mps2.c                    | 2 +-
  hw/arm/msf2-soc.c                | 1 -
  hw/arm/msf2-som.c                | 2 +-
  hw/arm/musca.c                   | 2 +-
  hw/arm/musicpal.c                | 2 +-
  hw/arm/netduino2.c               | 2 +-
  hw/arm/nrf51_soc.c               | 2 +-
  hw/arm/nseries.c                 | 2 +-
  hw/arm/omap1.c                   | 2 +-
  hw/arm/omap2.c                   | 2 +-
  hw/arm/omap_sx1.c                | 2 +-
  hw/arm/palm.c                    | 2 +-
  hw/arm/raspi.c                   | 2 +-
  hw/arm/realview.c                | 2 +-
  hw/arm/spitz.c                   | 2 +-
  hw/arm/stellaris.c               | 2 +-
  hw/arm/stm32f205_soc.c           | 2 +-
  hw/arm/strongarm.c               | 2 +-
  hw/arm/tosa.c                    | 2 +-
  hw/arm/versatilepb.c             | 2 +-
  hw/arm/vexpress.c                | 2 +-
  hw/arm/virt.c                    | 2 +-
  hw/arm/xilinx_zynq.c             | 2 +-
  hw/arm/xlnx-versal.c             | 2 +-
  hw/arm/z2.c                      | 2 +-
 files changed, 49 insertions(+), 52 deletions(-)
  rename include/hw/arm/{arm.h => boot.h} (98%)
-diff --git a/include/hw/arm/allwinner-a10.h b/include/hw/arm/allwinner-a10.h
-index XXXXXXX..XXXXXXX 100644
---- a/include/hw/arm/allwinner-a10.h
-+++ b/include/hw/arm/allwinner-a10.h
-@@ -XXX,XX +XXX,XX @@
- #include "qemu-common.h"
- #include "qemu/error-report.h"
- #include "hw/char/serial.h"
--#include "hw/arm/arm.h"
-+#include "hw/arm/boot.h"
- #include "hw/timer/allwinner-a10-pit.h"
- #include "hw/intc/allwinner-a10-pic.h"
- #include "hw/net/allwinner_emac.h"
-diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h
-index XXXXXXX..XXXXXXX 100644
---- a/include/hw/arm/aspeed_soc.h
-+++ b/include/hw/arm/aspeed_soc.h
-@@ -XXX,XX +XXX,XX @@
- #ifndef ASPEED_SOC_H
- #define ASPEED_SOC_H
--#include "hw/arm/arm.h"
- #include "hw/intc/aspeed_vic.h"
- #include "hw/misc/aspeed_scu.h"
- #include "hw/misc/aspeed_sdmc.h"
-diff --git a/include/hw/arm/bcm2836.h b/include/hw/arm/bcm2836.h
-index XXXXXXX..XXXXXXX 100644
---- a/include/hw/arm/bcm2836.h
-+++ b/include/hw/arm/bcm2836.h
-@@ -XXX,XX +XXX,XX @@
- #ifndef BCM2836_H
- #define BCM2836_H
--#include "hw/arm/arm.h"
- #include "hw/arm/bcm2835_peripherals.h"
- #include "hw/intc/bcm2836_control.h"
-diff --git a/include/hw/arm/arm.h b/include/hw/arm/boot.h
-similarity index 98%
-rename from include/hw/arm/arm.h
-rename to include/hw/arm/boot.h
-index XXXXXXX..XXXXXXX 100644
---- a/include/hw/arm/arm.h
-+++ b/include/hw/arm/boot.h
-@@ -XXX,XX +XXX,XX @@
- /*
-- * Misc ARM declarations
-+ * ARM kernel loader.
-  *
-  * Copyright (c) 2006 CodeSourcery.
-  * Written by Paul Brook
-@@ -XXX,XX +XXX,XX @@
-  *
-  */
--#ifndef HW_ARM_H
--#define HW_ARM_H
-+#ifndef HW_ARM_BOOT_H
-+#define HW_ARM_BOOT_H
- #include "exec/memory.h"
- #include "target/arm/cpu-qom.h"
-@@ -XXX,XX +XXX,XX @@ void arm_write_secure_board_setup_dummy_smc(ARMCPU *cpu,
-                                             const struct arm_boot_info *info,
-                                             hwaddr mvbar_addr);
--#endif /* HW_ARM_H */
-+#endif /* HW_ARM_BOOT_H */
-diff --git a/include/hw/arm/fsl-imx25.h b/include/hw/arm/fsl-imx25.h
-index XXXXXXX..XXXXXXX 100644
---- a/include/hw/arm/fsl-imx25.h
-+++ b/include/hw/arm/fsl-imx25.h
-@@ -XXX,XX +XXX,XX @@
- #ifndef FSL_IMX25_H
- #define FSL_IMX25_H
--#include "hw/arm/arm.h"
-+#include "hw/arm/boot.h"
- #include "hw/intc/imx_avic.h"
- #include "hw/misc/imx25_ccm.h"
- #include "hw/char/imx_serial.h"
-diff --git a/include/hw/arm/fsl-imx31.h b/include/hw/arm/fsl-imx31.h
-index XXXXXXX..XXXXXXX 100644
---- a/include/hw/arm/fsl-imx31.h
-+++ b/include/hw/arm/fsl-imx31.h
-@@ -XXX,XX +XXX,XX @@
- #ifndef FSL_IMX31_H
- #define FSL_IMX31_H
--#include "hw/arm/arm.h"
-+#include "hw/arm/boot.h"
- #include "hw/intc/imx_avic.h"
- #include "hw/misc/imx31_ccm.h"
- #include "hw/char/imx_serial.h"
-diff --git a/include/hw/arm/fsl-imx6.h b/include/hw/arm/fsl-imx6.h
-index XXXXXXX..XXXXXXX 100644
---- a/include/hw/arm/fsl-imx6.h
-+++ b/include/hw/arm/fsl-imx6.h
-@@ -XXX,XX +XXX,XX @@
- #ifndef FSL_IMX6_H
- #define FSL_IMX6_H
--#include "hw/arm/arm.h"
-+#include "hw/arm/boot.h"
- #include "hw/cpu/a9mpcore.h"
- #include "hw/misc/imx6_ccm.h"
- #include "hw/misc/imx6_src.h"
-diff --git a/include/hw/arm/fsl-imx6ul.h b/include/hw/arm/fsl-imx6ul.h
-index XXXXXXX..XXXXXXX 100644
---- a/include/hw/arm/fsl-imx6ul.h
-+++ b/include/hw/arm/fsl-imx6ul.h
-@@ -XXX,XX +XXX,XX @@
- #ifndef FSL_IMX6UL_H
- #define FSL_IMX6UL_H
--#include "hw/arm/arm.h"
-+#include "hw/arm/boot.h"
- #include "hw/cpu/a15mpcore.h"
- #include "hw/misc/imx6ul_ccm.h"
- #include "hw/misc/imx6_src.h"
-diff --git a/include/hw/arm/fsl-imx7.h b/include/hw/arm/fsl-imx7.h
-index XXXXXXX..XXXXXXX 100644
---- a/include/hw/arm/fsl-imx7.h
-+++ b/include/hw/arm/fsl-imx7.h
-@@ -XXX,XX +XXX,XX @@
- #ifndef FSL_IMX7_H
- #define FSL_IMX7_H
--#include "hw/arm/arm.h"
-+#include "hw/arm/boot.h"
- #include "hw/cpu/a15mpcore.h"
- #include "hw/intc/imx_gpcv2.h"
- #include "hw/misc/imx7_ccm.h"
-diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
-index XXXXXXX..XXXXXXX 100644
---- a/include/hw/arm/virt.h
-+++ b/include/hw/arm/virt.h
-@@ -XXX,XX +XXX,XX @@
- #include "exec/hwaddr.h"
- #include "qemu/notify.h"
- #include "hw/boards.h"
--#include "hw/arm/arm.h"
-+#include "hw/arm/boot.h"
- #include "hw/block/flash.h"
- #include "sysemu/kvm.h"
- #include "hw/intc/arm_gicv3_common.h"
-diff --git a/include/hw/arm/xlnx-versal.h b/include/hw/arm/xlnx-versal.h
-index XXXXXXX..XXXXXXX 100644
---- a/include/hw/arm/xlnx-versal.h
-+++ b/include/hw/arm/xlnx-versal.h
-@@ -XXX,XX +XXX,XX @@
- #define XLNX_VERSAL_H
- #include "hw/sysbus.h"
--#include "hw/arm/arm.h"
-+#include "hw/arm/boot.h"
- #include "hw/intc/arm_gicv3.h"
- #define TYPE_XLNX_VERSAL "xlnx-versal"
-diff --git a/include/hw/arm/xlnx-zynqmp.h b/include/hw/arm/xlnx-zynqmp.h
-index XXXXXXX..XXXXXXX 100644
---- a/include/hw/arm/xlnx-zynqmp.h
-+++ b/include/hw/arm/xlnx-zynqmp.h
-@@ -XXX,XX +XXX,XX @@
- #ifndef XLNX_ZYNQMP_H
- #include "qemu-common.h"
--#include "hw/arm/arm.h"
-+#include "hw/arm/boot.h"
- #include "hw/intc/arm_gic.h"
- #include "hw/net/cadence_gem.h"
- #include "hw/char/cadence_uart.h"
-diff --git a/hw/arm/armsse.c b/hw/arm/armsse.c
-index XXXXXXX..XXXXXXX 100644
---- a/hw/arm/armsse.c
-+++ b/hw/arm/armsse.c
-@@ -XXX,XX +XXX,XX @@
- #include "hw/sysbus.h"
- #include "hw/registerfields.h"
- #include "hw/arm/armsse.h"
--#include "hw/arm/arm.h"
-+#include "hw/arm/boot.h"
- /* Format of the System Information block SYS_CONFIG register */
- typedef enum SysConfigFormat {
-diff --git a/hw/arm/armv7m.c b/hw/arm/armv7m.c
-index XXXXXXX..XXXXXXX 100644
---- a/hw/arm/armv7m.c
-+++ b/hw/arm/armv7m.c
-@@ -XXX,XX +XXX,XX @@
- #include "qemu-common.h"
- #include "cpu.h"
- #include "hw/sysbus.h"
--#include "hw/arm/arm.h"
-+#include "hw/arm/boot.h"
- #include "hw/loader.h"
- #include "elf.h"
- #include "sysemu/qtest.h"
-diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
-index XXXXXXX..XXXXXXX 100644
---- a/hw/arm/aspeed.c
-+++ b/hw/arm/aspeed.c
-@@ -XXX,XX +XXX,XX @@
- #include "qemu-common.h"
- #include "cpu.h"
- #include "exec/address-spaces.h"
--#include "hw/arm/arm.h"
-+#include "hw/arm/boot.h"
- #include "hw/arm/aspeed.h"
- #include "hw/arm/aspeed_soc.h"
- #include "hw/boards.h"
-diff --git a/hw/arm/boot.c b/hw/arm/boot.c
-index XXXXXXX..XXXXXXX 100644
---- a/hw/arm/boot.c
-+++ b/hw/arm/boot.c
-@@ -XXX,XX +XXX,XX @@
- #include "qapi/error.h"
- #include <libfdt.h>
- #include "hw/hw.h"
--#include "hw/arm/arm.h"
-+#include "hw/arm/boot.h"
- #include "hw/arm/linux-boot-if.h"
- #include "sysemu/kvm.h"
- #include "sysemu/sysemu.h"
-diff --git a/hw/arm/collie.c b/hw/arm/collie.c
-index XXXXXXX..XXXXXXX 100644
---- a/hw/arm/collie.c
-+++ b/hw/arm/collie.c
-@@ -XXX,XX +XXX,XX @@
- #include "hw/sysbus.h"
- #include "hw/boards.h"
- #include "strongarm.h"
--#include "hw/arm/arm.h"
-+#include "hw/arm/boot.h"
- #include "hw/block/flash.h"
- #include "exec/address-spaces.h"
- #include "cpu.h"
-diff --git a/hw/arm/exynos4210.c b/hw/arm/exynos4210.c
-index XXXXXXX..XXXXXXX 100644
---- a/hw/arm/exynos4210.c
-+++ b/hw/arm/exynos4210.c
-@@ -XXX,XX +XXX,XX @@
- #include "hw/boards.h"
- #include "sysemu/sysemu.h"
- #include "hw/sysbus.h"
--#include "hw/arm/arm.h"
-+#include "hw/arm/boot.h"
- #include "hw/loader.h"
- #include "hw/arm/exynos4210.h"
- #include "hw/sd/sdhci.h"
-diff --git a/hw/arm/exynos4_boards.c b/hw/arm/exynos4_boards.c
-index XXXXXXX..XXXXXXX 100644
---- a/hw/arm/exynos4_boards.c
-+++ b/hw/arm/exynos4_boards.c
-@@ -XXX,XX +XXX,XX @@
- #include "sysemu/sysemu.h"
- #include "hw/sysbus.h"
- #include "net/net.h"
--#include "hw/arm/arm.h"
-+#include "hw/arm/boot.h"
- #include "exec/address-spaces.h"
- #include "hw/arm/exynos4210.h"
- #include "hw/net/lan9118.h"
-diff --git a/hw/arm/highbank.c b/hw/arm/highbank.c
-index XXXXXXX..XXXXXXX 100644
---- a/hw/arm/highbank.c
-+++ b/hw/arm/highbank.c
-@@ -XXX,XX +XXX,XX @@
- #include "qemu/osdep.h"
- #include "qapi/error.h"
- #include "hw/sysbus.h"
--#include "hw/arm/arm.h"
-+#include "hw/arm/boot.h"
- #include "hw/loader.h"
- #include "net/net.h"
- #include "sysemu/kvm.h"
-diff --git a/hw/arm/integratorcp.c b/hw/arm/integratorcp.c
-index XXXXXXX..XXXXXXX 100644
---- a/hw/arm/integratorcp.c
-+++ b/hw/arm/integratorcp.c
-@@ -XXX,XX +XXX,XX @@
- #include "cpu.h"
- #include "hw/sysbus.h"
- #include "hw/boards.h"
--#include "hw/arm/arm.h"
-+#include "hw/arm/boot.h"
- #include "hw/misc/arm_integrator_debug.h"
- #include "hw/net/smc91c111.h"
- #include "net/net.h"
-diff --git a/hw/arm/mainstone.c b/hw/arm/mainstone.c
-index XXXXXXX..XXXXXXX 100644
---- a/hw/arm/mainstone.c
-+++ b/hw/arm/mainstone.c
-@@ -XXX,XX +XXX,XX @@
- #include "qapi/error.h"
- #include "hw/hw.h"
- #include "hw/arm/pxa.h"
--#include "hw/arm/arm.h"
-+#include "hw/arm/boot.h"
- #include "net/net.h"
- #include "hw/net/smc91c111.h"
- #include "hw/boards.h"
-diff --git a/hw/arm/microbit.c b/hw/arm/microbit.c
-index XXXXXXX..XXXXXXX 100644
---- a/hw/arm/microbit.c
-+++ b/hw/arm/microbit.c
-@@ -XXX,XX +XXX,XX @@
- #include "qemu/osdep.h"
- #include "qapi/error.h"
- #include "hw/boards.h"
--#include "hw/arm/arm.h"
-+#include "hw/arm/boot.h"
- #include "sysemu/sysemu.h"
- #include "exec/address-spaces.h"
-diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c
-index XXXXXXX..XXXXXXX 100644
---- a/hw/arm/mps2-tz.c
-+++ b/hw/arm/mps2-tz.c
-@@ -XXX,XX +XXX,XX @@
- #include "qemu/osdep.h"
- #include "qapi/error.h"
- #include "qemu/error-report.h"
--#include "hw/arm/arm.h"
-+#include "hw/arm/boot.h"
- #include "hw/arm/armv7m.h"
- #include "hw/or-irq.h"
- #include "hw/boards.h"
-diff --git a/hw/arm/mps2.c b/hw/arm/mps2.c
-index XXXXXXX..XXXXXXX 100644
---- a/hw/arm/mps2.c
-+++ b/hw/arm/mps2.c
-@@ -XXX,XX +XXX,XX @@
- #include "qemu/osdep.h"
- #include "qapi/error.h"
- #include "qemu/error-report.h"
--#include "hw/arm/arm.h"
-+#include "hw/arm/boot.h"
- #include "hw/arm/armv7m.h"
- #include "hw/or-irq.h"
- #include "hw/boards.h"
-diff --git a/hw/arm/msf2-soc.c b/hw/arm/msf2-soc.c
-index XXXXXXX..XXXXXXX 100644
---- a/hw/arm/msf2-soc.c
-+++ b/hw/arm/msf2-soc.c
-@@ -XXX,XX +XXX,XX @@
- #include "qemu/units.h"
- #include "qapi/error.h"
- #include "qemu-common.h"
--#include "hw/arm/arm.h"
- #include "exec/address-spaces.h"
- #include "hw/char/serial.h"
- #include "hw/boards.h"
-diff --git a/hw/arm/msf2-som.c b/hw/arm/msf2-som.c
-index XXXXXXX..XXXXXXX 100644
---- a/hw/arm/msf2-som.c
-+++ b/hw/arm/msf2-som.c
-@@ -XXX,XX +XXX,XX @@
- #include "qapi/error.h"
- #include "qemu/error-report.h"
- #include "hw/boards.h"
--#include "hw/arm/arm.h"
-+#include "hw/arm/boot.h"
- #include "exec/address-spaces.h"
- #include "hw/arm/msf2-soc.h"
- #include "cpu.h"
-diff --git a/hw/arm/musca.c b/hw/arm/musca.c
-index XXXXXXX..XXXXXXX 100644
---- a/hw/arm/musca.c
-+++ b/hw/arm/musca.c
-@@ -XXX,XX +XXX,XX @@
- #include "qapi/error.h"
- #include "exec/address-spaces.h"
- #include "sysemu/sysemu.h"
--#include "hw/arm/arm.h"
-+#include "hw/arm/boot.h"
- #include "hw/arm/armsse.h"
- #include "hw/boards.h"
- #include "hw/char/pl011.h"
-diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c
-index XXXXXXX..XXXXXXX 100644
---- a/hw/arm/musicpal.c
-+++ b/hw/arm/musicpal.c
-@@ -XXX,XX +XXX,XX @@
- #include "qemu-common.h"
- #include "cpu.h"
- #include "hw/sysbus.h"
--#include "hw/arm/arm.h"
-+#include "hw/arm/boot.h"
- #include "net/net.h"
- #include "sysemu/sysemu.h"
- #include "hw/boards.h"
-diff --git a/hw/arm/netduino2.c b/hw/arm/netduino2.c
-index XXXXXXX..XXXXXXX 100644
---- a/hw/arm/netduino2.c
-+++ b/hw/arm/netduino2.c
-@@ -XXX,XX +XXX,XX @@
- #include "hw/boards.h"
- #include "qemu/error-report.h"
- #include "hw/arm/stm32f205_soc.h"
--#include "hw/arm/arm.h"
-+#include "hw/arm/boot.h"
- static void netduino2_init(MachineState *machine)
- {
-diff --git a/hw/arm/nrf51_soc.c b/hw/arm/nrf51_soc.c
-index XXXXXXX..XXXXXXX 100644
---- a/hw/arm/nrf51_soc.c
-+++ b/hw/arm/nrf51_soc.c
-@@ -XXX,XX +XXX,XX @@
- #include "qemu/osdep.h"
- #include "qapi/error.h"
- #include "qemu-common.h"
--#include "hw/arm/arm.h"
-+#include "hw/arm/boot.h"
- #include "hw/sysbus.h"
- #include "hw/boards.h"
- #include "hw/misc/unimp.h"
-diff --git a/hw/arm/nseries.c b/hw/arm/nseries.c
-index XXXXXXX..XXXXXXX 100644
---- a/hw/arm/nseries.c
-+++ b/hw/arm/nseries.c
-@@ -XXX,XX +XXX,XX @@
- #include "qemu/bswap.h"
- #include "sysemu/sysemu.h"
- #include "hw/arm/omap.h"
--#include "hw/arm/arm.h"
-+#include "hw/arm/boot.h"
- #include "hw/irq.h"
- #include "ui/console.h"
- #include "hw/boards.h"
-diff --git a/hw/arm/omap1.c b/hw/arm/omap1.c
-index XXXXXXX..XXXXXXX 100644
---- a/hw/arm/omap1.c
-+++ b/hw/arm/omap1.c
-@@ -XXX,XX +XXX,XX @@
- #include "cpu.h"
- #include "hw/boards.h"
- #include "hw/hw.h"
--#include "hw/arm/arm.h"
-+#include "hw/arm/boot.h"
- #include "hw/arm/omap.h"
- #include "sysemu/sysemu.h"
- #include "hw/arm/soc_dma.h"
-diff --git a/hw/arm/omap2.c b/hw/arm/omap2.c
-index XXXXXXX..XXXXXXX 100644
---- a/hw/arm/omap2.c
-+++ b/hw/arm/omap2.c
-@@ -XXX,XX +XXX,XX @@
- #include "sysemu/qtest.h"
- #include "hw/boards.h"
- #include "hw/hw.h"
--#include "hw/arm/arm.h"
-+#include "hw/arm/boot.h"
- #include "hw/arm/omap.h"
- #include "sysemu/sysemu.h"
- #include "qemu/timer.h"
-diff --git a/hw/arm/omap_sx1.c b/hw/arm/omap_sx1.c
-index XXXXXXX..XXXXXXX 100644
---- a/hw/arm/omap_sx1.c
-+++ b/hw/arm/omap_sx1.c
-@@ -XXX,XX +XXX,XX @@
- #include "ui/console.h"
- #include "hw/arm/omap.h"
- #include "hw/boards.h"
--#include "hw/arm/arm.h"
-+#include "hw/arm/boot.h"
- #include "hw/block/flash.h"
- #include "sysemu/qtest.h"
- #include "exec/address-spaces.h"
-diff --git a/hw/arm/palm.c b/hw/arm/palm.c
-index XXXXXXX..XXXXXXX 100644
---- a/hw/arm/palm.c
-+++ b/hw/arm/palm.c
-@@ -XXX,XX +XXX,XX @@
- #include "ui/console.h"
- #include "hw/arm/omap.h"
- #include "hw/boards.h"
--#include "hw/arm/arm.h"
-+#include "hw/arm/boot.h"
- #include "hw/input/tsc2xxx.h"
- #include "hw/loader.h"
- #include "exec/address-spaces.h"
-diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c
-index XXXXXXX..XXXXXXX 100644
---- a/hw/arm/raspi.c
-+++ b/hw/arm/raspi.c
-@@ -XXX,XX +XXX,XX @@
- #include "qemu/error-report.h"
- #include "hw/boards.h"
- #include "hw/loader.h"
--#include "hw/arm/arm.h"
-+#include "hw/arm/boot.h"
- #include "sysemu/sysemu.h"
- #define SMPBOOT_ADDR    0x300 /* this should leave enough space for ATAGS */
-diff --git a/hw/arm/realview.c b/hw/arm/realview.c
-index XXXXXXX..XXXXXXX 100644
---- a/hw/arm/realview.c
-+++ b/hw/arm/realview.c
-@@ -XXX,XX +XXX,XX @@
- #include "qemu-common.h"
- #include "cpu.h"
- #include "hw/sysbus.h"
--#include "hw/arm/arm.h"
-+#include "hw/arm/boot.h"
- #include "hw/arm/primecell.h"
- #include "hw/net/lan9118.h"
- #include "hw/net/smc91c111.h"
-diff --git a/hw/arm/spitz.c b/hw/arm/spitz.c
-index XXXXXXX..XXXXXXX 100644
---- a/hw/arm/spitz.c
-+++ b/hw/arm/spitz.c
-@@ -XXX,XX +XXX,XX @@
- #include "qapi/error.h"
- #include "hw/hw.h"
- #include "hw/arm/pxa.h"
--#include "hw/arm/arm.h"
-+#include "hw/arm/boot.h"
- #include "sysemu/sysemu.h"
- #include "hw/pcmcia.h"
- #include "hw/i2c/i2c.h"
-diff --git a/hw/arm/stellaris.c b/hw/arm/stellaris.c
-index XXXXXXX..XXXXXXX 100644
---- a/hw/arm/stellaris.c
-+++ b/hw/arm/stellaris.c
-@@ -XXX,XX +XXX,XX @@
- #include "qapi/error.h"
- #include "hw/sysbus.h"
- #include "hw/ssi/ssi.h"
--#include "hw/arm/arm.h"
-+#include "hw/arm/boot.h"
- #include "qemu/timer.h"
- #include "hw/i2c/i2c.h"
- #include "net/net.h"
-diff --git a/hw/arm/stm32f205_soc.c b/hw/arm/stm32f205_soc.c
-index XXXXXXX..XXXXXXX 100644
---- a/hw/arm/stm32f205_soc.c
-+++ b/hw/arm/stm32f205_soc.c
-@@ -XXX,XX +XXX,XX @@
- #include "qemu/osdep.h"
- #include "qapi/error.h"
- #include "qemu-common.h"
--#include "hw/arm/arm.h"
-+#include "hw/arm/boot.h"
- #include "exec/address-spaces.h"
- #include "hw/arm/stm32f205_soc.h"
-diff --git a/hw/arm/strongarm.c b/hw/arm/strongarm.c
-index XXXXXXX..XXXXXXX 100644
---- a/hw/arm/strongarm.c
-+++ b/hw/arm/strongarm.c
-@@ -XXX,XX +XXX,XX @@
- #include "hw/sysbus.h"
- #include "strongarm.h"
- #include "qemu/error-report.h"
--#include "hw/arm/arm.h"
-+#include "hw/arm/boot.h"
- #include "chardev/char-fe.h"
- #include "chardev/char-serial.h"
- #include "sysemu/sysemu.h"
 diff --git a/hw/arm/tosa.c b/hw/arm/tosa.c
 index XXXXXXX..XXXXXXX 100644
 --- a/hw/arm/tosa.c
 +++ b/hw/arm/tosa.c
 @@ -XXX,XX +XXX,XX @@
- #include "qapi/error.h"
- #include "hw/hw.h"
- #include "hw/arm/pxa.h"
--#include "hw/arm/arm.h"
-+#include "hw/arm/boot.h"
- #include "hw/arm/sharpsl.h"
- #include "hw/pcmcia.h"
- #include "hw/boards.h"
-diff --git a/hw/arm/versatilepb.c b/hw/arm/versatilepb.c
-index XXXXXXX..XXXXXXX 100644
---- a/hw/arm/versatilepb.c
-+++ b/hw/arm/versatilepb.c
-@@ -XXX,XX +XXX,XX @@
- #include "qemu-common.h"
- #include "cpu.h"
  #include "hw/sysbus.h"
--#include "hw/arm/arm.h"
-+#include "hw/arm/boot.h"
- #include "hw/net/smc91c111.h"
- #include "net/net.h"
- #include "sysemu/sysemu.h"
-diff --git a/hw/arm/vexpress.c b/hw/arm/vexpress.c
-index XXXXXXX..XXXXXXX 100644
---- a/hw/arm/vexpress.c
-+++ b/hw/arm/vexpress.c
-@@ -XXX,XX +XXX,XX @@
- #include "qemu-common.h"
- #include "cpu.h"
- #include "hw/sysbus.h"
--#include "hw/arm/arm.h"
-+#include "hw/arm/boot.h"
- #include "hw/arm/primecell.h"
- #include "hw/net/lan9118.h"
- #include "hw/i2c/i2c.h"
-diff --git a/hw/arm/virt.c b/hw/arm/virt.c
-index XXXXXXX..XXXXXXX 100644
---- a/hw/arm/virt.c
-+++ b/hw/arm/virt.c
-@@ -XXX,XX +XXX,XX @@
- #include "qemu/option.h"
- #include "qapi/error.h"
- #include "hw/sysbus.h"
--#include "hw/arm/arm.h"
-+#include "hw/arm/boot.h"
- #include "hw/arm/primecell.h"
- #include "hw/arm/virt.h"
- #include "hw/block/flash.h"
-diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c
-index XXXXXXX..XXXXXXX 100644
---- a/hw/arm/xilinx_zynq.c
-+++ b/hw/arm/xilinx_zynq.c
-@@ -XXX,XX +XXX,XX @@
- #include "qemu-common.h"
- #include "cpu.h"
- #include "hw/sysbus.h"
--#include "hw/arm/arm.h"
-+#include "hw/arm/boot.h"
- #include "net/net.h"
  #include "exec/address-spaces.h"
- #include "sysemu/sysemu.h"
-diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c
+-#define TOSA_RAM    0x04000000
-index XXXXXXX..XXXXXXX 100644
+-#define TOSA_ROM    0x00800000
---- a/hw/arm/xlnx-versal.c
++#define TOSA_RAM 0x04000000
-+++ b/hw/arm/xlnx-versal.c
++#define TOSA_ROM 0x00800000
-@@ -XXX,XX +XXX,XX @@
- #include "net/net.h"
+-#define TOSA_GPIO_USB_IN        (5)
- #include "sysemu/sysemu.h"
+-#define TOSA_GPIO_nSD_DETECT    (9)
- #include "sysemu/kvm.h"
+-#define TOSA_GPIO_ON_RESET        (19)
--#include "hw/arm/arm.h"
+-#define TOSA_GPIO_CF_IRQ        (21)    /* CF slot0 Ready */
-+#include "hw/arm/boot.h"
+-#define TOSA_GPIO_CF_CD            (13)
- #include "kvm_arm.h"
+-#define TOSA_GPIO_TC6393XB_INT  (15)
- #include "hw/misc/unimp.h"
+-#define TOSA_GPIO_JC_CF_IRQ        (36)    /* CF slot1 Ready */
- #include "hw/intc/arm_gicv3_common.h"
++#define TOSA_GPIO_USB_IN                (5)
-diff --git a/hw/arm/z2.c b/hw/arm/z2.c
++#define TOSA_GPIO_nSD_DETECT            (9)
-index XXXXXXX..XXXXXXX 100644
++#define TOSA_GPIO_ON_RESET              (19)
---- a/hw/arm/z2.c
++#define TOSA_GPIO_CF_IRQ                (21)    /* CF slot0 Ready */
-+++ b/hw/arm/z2.c
++#define TOSA_GPIO_CF_CD                 (13)
-@@ -XXX,XX +XXX,XX @@
++#define TOSA_GPIO_TC6393XB_INT          (15)
- #include "qemu/osdep.h"
++#define TOSA_GPIO_JC_CF_IRQ             (36)    /* CF slot1 Ready */
- #include "hw/hw.h"
- #include "hw/arm/pxa.h"
+-#define TOSA_SCOOP_GPIO_BASE    1
--#include "hw/arm/arm.h"
+-#define TOSA_GPIO_IR_POWERDWN    (TOSA_SCOOP_GPIO_BASE + 2)
-+#include "hw/arm/boot.h"
+-#define TOSA_GPIO_SD_WP            (TOSA_SCOOP_GPIO_BASE + 3)
- #include "hw/i2c/i2c.h"
+-#define TOSA_GPIO_PWR_ON        (TOSA_SCOOP_GPIO_BASE + 4)
- #include "hw/ssi/ssi.h"
++#define TOSA_SCOOP_GPIO_BASE            1
- #include "hw/boards.h"
++#define TOSA_GPIO_IR_POWERDWN           (TOSA_SCOOP_GPIO_BASE + 2)
 +#define TOSA_GPIO_SD_WP                 (TOSA_SCOOP_GPIO_BASE + 3)
 +#define TOSA_GPIO_PWR_ON                (TOSA_SCOOP_GPIO_BASE + 4)
 -#define TOSA_SCOOP_JC_GPIO_BASE        1
 -#define TOSA_GPIO_BT_LED        (TOSA_SCOOP_JC_GPIO_BASE + 0)
 -#define TOSA_GPIO_NOTE_LED        (TOSA_SCOOP_JC_GPIO_BASE + 1)
 -#define TOSA_GPIO_CHRG_ERR_LED        (TOSA_SCOOP_JC_GPIO_BASE + 2)
 -#define TOSA_GPIO_TC6393XB_L3V_ON    (TOSA_SCOOP_JC_GPIO_BASE + 5)
 -#define TOSA_GPIO_WLAN_LED        (TOSA_SCOOP_JC_GPIO_BASE + 7)
 +#define TOSA_SCOOP_JC_GPIO_BASE         1
 +#define TOSA_GPIO_BT_LED                (TOSA_SCOOP_JC_GPIO_BASE + 0)
 +#define TOSA_GPIO_NOTE_LED              (TOSA_SCOOP_JC_GPIO_BASE + 1)
 +#define TOSA_GPIO_CHRG_ERR_LED          (TOSA_SCOOP_JC_GPIO_BASE + 2)
 +#define TOSA_GPIO_TC6393XB_L3V_ON       (TOSA_SCOOP_JC_GPIO_BASE + 5)
 +#define TOSA_GPIO_WLAN_LED              (TOSA_SCOOP_JC_GPIO_BASE + 7)
 -#define    DAC_BASE    0x4e
 -#define DAC_CH1        0
 -#define DAC_CH2        1
 +#define DAC_BASE 0x4e
 +#define DAC_CH1 0
 +#define DAC_CH2 1
  static void tosa_microdrive_attach(PXA2xxState *cpu)
  {
 --
 .20.1

-[Qemu-devel] [PULL 05/12] arm: Remove unnecessary includes of hw/arm/arm.h
+[PULL 22/25] hw/arm/tosa: Encapsulate misc GPIO handling in a device
-The hw/arm/arm.h header now only includes declarations relating
+Currently we have a free-floating set of IRQs and a function
-to boot.c code, so it is only needed by Arm board or SoC code.
+tosa_out_switch() which handle the GPIO lines on the tosa board which
-Remove some unnecessary inclusions of it from target/arm files
+connect to LEDs, and another free-floating IRQ and tosa_reset()
-and from hw/intc/armv7m_nvic.c.
+function to handle the GPIO line that resets the system.  Encapsulate
 this behaviour in a simple QOM device.
 This commit fixes Coverity issue CID 1421929 (which pointed out that
 the 'outsignals' in tosa_gpio_setup() were leaked), because it
 removes the use of the qemu_allocate_irqs() API from this code
 entirely.
 Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
+Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
-Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
+Message-id: 20200628203748.14250-3-peter.maydell@linaro.org
 Message-id: 20190516163857.6430-3-peter.maydell@linaro.org
 ---
- hw/intc/armv7m_nvic.c | 1 -
+ hw/arm/tosa.c | 88 +++++++++++++++++++++++++++++++++++++--------------
- target/arm/arm-semi.c | 1 -
+file changed, 64 insertions(+), 24 deletions(-)
  target/arm/cpu.c      | 1 -
  target/arm/cpu64.c    | 1 -
  target/arm/kvm.c      | 1 -
  target/arm/kvm32.c    | 1 -
  target/arm/kvm64.c    | 1 -
 files changed, 7 deletions(-)
-diff --git a/hw/intc/armv7m_nvic.c b/hw/intc/armv7m_nvic.c
+diff --git a/hw/arm/tosa.c b/hw/arm/tosa.c
 index XXXXXXX..XXXXXXX 100644
---- a/hw/intc/armv7m_nvic.c
+--- a/hw/arm/tosa.c
-+++ b/hw/intc/armv7m_nvic.c
++++ b/hw/arm/tosa.c
-@@ -XXX,XX +XXX,XX @@
+@@ -XXX,XX +XXX,XX @@ static void tosa_microdrive_attach(PXA2xxState *cpu)
- #include "cpu.h"
+     pxa2xx_pcmcia_attach(cpu->pcmcia[0], md);
- #include "hw/sysbus.h"
+ }
- #include "qemu/timer.h"
--#include "hw/arm/arm.h"
+-static void tosa_out_switch(void *opaque, int line, int level)
- #include "hw/intc/armv7m_nvic.h"
++/*
- #include "target/arm/cpu.h"
++ * Encapsulation of some GPIO line behaviour for the Tosa board
- #include "exec/exec-all.h"
++ *
-diff --git a/target/arm/arm-semi.c b/target/arm/arm-semi.c
++ * QEMU interface:
-index XXXXXXX..XXXXXXX 100644
++ *  + named GPIO inputs "leds[0..3]": assert to light LEDs
---- a/target/arm/arm-semi.c
++ *  + named GPIO input "reset": when asserted, resets the system
-+++ b/target/arm/arm-semi.c
++ */
-@@ -XXX,XX +XXX,XX @@
++
- #else
++#define TYPE_TOSA_MISC_GPIO "tosa-misc-gpio"
- #include "qemu-common.h"
++#define TOSA_MISC_GPIO(obj) \
- #include "exec/gdbstub.h"
++    OBJECT_CHECK(TosaMiscGPIOState, (obj), TYPE_TOSA_MISC_GPIO)
--#include "hw/arm/arm.h"
++
- #include "qemu/cutils.h"
++typedef struct TosaMiscGPIOState {
- #endif
++    SysBusDevice parent_obj;
++} TosaMiscGPIOState;
-diff --git a/target/arm/cpu.c b/target/arm/cpu.c
++
-index XXXXXXX..XXXXXXX 100644
++static void tosa_gpio_leds(void *opaque, int line, int level)
---- a/target/arm/cpu.c
+ {
-+++ b/target/arm/cpu.c
+     switch (line) {
-@@ -XXX,XX +XXX,XX @@
+-        case 0:
- #if !defined(CONFIG_USER_ONLY)
+-            fprintf(stderr, "blue LED %s.\n", level ? "on" : "off");
- #include "hw/loader.h"
+-            break;
- #endif
+-        case 1:
--#include "hw/arm/arm.h"
+-            fprintf(stderr, "green LED %s.\n", level ? "on" : "off");
- #include "sysemu/sysemu.h"
+-            break;
- #include "sysemu/hw_accel.h"
+-        case 2:
- #include "kvm_arm.h"
+-            fprintf(stderr, "amber LED %s.\n", level ? "on" : "off");
-diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c
+-            break;
-index XXXXXXX..XXXXXXX 100644
+-        case 3:
---- a/target/arm/cpu64.c
+-            fprintf(stderr, "wlan LED %s.\n", level ? "on" : "off");
-+++ b/target/arm/cpu64.c
+-            break;
-@@ -XXX,XX +XXX,XX @@
+-        default:
- #if !defined(CONFIG_USER_ONLY)
+-            fprintf(stderr, "Uhandled out event: %d = %d\n", line, level);
- #include "hw/loader.h"
+-            break;
- #endif
++    case 0:
--#include "hw/arm/arm.h"
++        fprintf(stderr, "blue LED %s.\n", level ? "on" : "off");
- #include "sysemu/sysemu.h"
++        break;
- #include "sysemu/kvm.h"
++    case 1:
- #include "kvm_arm.h"
++        fprintf(stderr, "green LED %s.\n", level ? "on" : "off");
-diff --git a/target/arm/kvm.c b/target/arm/kvm.c
++        break;
-index XXXXXXX..XXXXXXX 100644
++    case 2:
---- a/target/arm/kvm.c
++        fprintf(stderr, "amber LED %s.\n", level ? "on" : "off");
-+++ b/target/arm/kvm.c
++        break;
-@@ -XXX,XX +XXX,XX @@
++    case 3:
- #include "cpu.h"
++        fprintf(stderr, "wlan LED %s.\n", level ? "on" : "off");
- #include "trace.h"
++        break;
- #include "internals.h"
++    default:
--#include "hw/arm/arm.h"
++        g_assert_not_reached();
- #include "hw/pci/pci.h"
+     }
- #include "exec/memattrs.h"
+ }
- #include "exec/address-spaces.h"
-diff --git a/target/arm/kvm32.c b/target/arm/kvm32.c
+@@ -XXX,XX +XXX,XX @@ static void tosa_reset(void *opaque, int line, int level)
-index XXXXXXX..XXXXXXX 100644
+     }
---- a/target/arm/kvm32.c
+ }
-+++ b/target/arm/kvm32.c
-@@ -XXX,XX +XXX,XX @@
++static void tosa_misc_gpio_init(Object *obj)
- #include "sysemu/kvm.h"
++{
- #include "kvm_arm.h"
++    DeviceState *dev = DEVICE(obj);
- #include "internals.h"
++
--#include "hw/arm/arm.h"
++    qdev_init_gpio_in_named(dev, tosa_gpio_leds, "leds", 4);
- #include "qemu/log.h"
++    qdev_init_gpio_in_named(dev, tosa_reset, "reset", 1);
++}
- static inline void set_feature(uint64_t *features, int feature)
++
-diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c
+ static void tosa_gpio_setup(PXA2xxState *cpu,
-index XXXXXXX..XXXXXXX 100644
+                 DeviceState *scp0,
---- a/target/arm/kvm64.c
+                 DeviceState *scp1,
-+++ b/target/arm/kvm64.c
+                 TC6393xbState *tmio)
-@@ -XXX,XX +XXX,XX @@
+ {
- #include "sysemu/kvm.h"
+-    qemu_irq *outsignals = qemu_allocate_irqs(tosa_out_switch, cpu, 4);
- #include "kvm_arm.h"
+-    qemu_irq reset;
- #include "internals.h"
++    DeviceState *misc_gpio;
--#include "hw/arm/arm.h"
++
++    misc_gpio = sysbus_create_simple(TYPE_TOSA_MISC_GPIO, -1, NULL);
- static bool have_guest_debug;
+     /* MMC/SD host */
      pxa2xx_mmci_handlers(cpu->mmc,
@@ -XXX,XX +XXX,XX @@ static void tosa_gpio_setup(PXA2xxState *cpu,
                      qemu_irq_invert(qdev_get_gpio_in(cpu->gpio, TOSA_GPIO_nSD_DETECT)));
      /* Handle reset */
 -    reset = qemu_allocate_irq(tosa_reset, cpu, 0);
 -    qdev_connect_gpio_out(cpu->gpio, TOSA_GPIO_ON_RESET, reset);
 +    qdev_connect_gpio_out(cpu->gpio, TOSA_GPIO_ON_RESET,
 +                          qdev_get_gpio_in_named(misc_gpio, "reset", 0));
      /* PCMCIA signals: card's IRQ and Card-Detect */
      pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[0],
@@ -XXX,XX +XXX,XX @@ static void tosa_gpio_setup(PXA2xxState *cpu,
                          qdev_get_gpio_in(cpu->gpio, TOSA_GPIO_JC_CF_IRQ),
                          NULL);
 -    qdev_connect_gpio_out(scp1, TOSA_GPIO_BT_LED, outsignals[0]);
 -    qdev_connect_gpio_out(scp1, TOSA_GPIO_NOTE_LED, outsignals[1]);
 -    qdev_connect_gpio_out(scp1, TOSA_GPIO_CHRG_ERR_LED, outsignals[2]);
 -    qdev_connect_gpio_out(scp1, TOSA_GPIO_WLAN_LED, outsignals[3]);
 +    qdev_connect_gpio_out(scp1, TOSA_GPIO_BT_LED,
 +                          qdev_get_gpio_in_named(misc_gpio, "leds", 0));
 +    qdev_connect_gpio_out(scp1, TOSA_GPIO_NOTE_LED,
 +                          qdev_get_gpio_in_named(misc_gpio, "leds", 1));
 +    qdev_connect_gpio_out(scp1, TOSA_GPIO_CHRG_ERR_LED,
 +                          qdev_get_gpio_in_named(misc_gpio, "leds", 2));
 +    qdev_connect_gpio_out(scp1, TOSA_GPIO_WLAN_LED,
 +                          qdev_get_gpio_in_named(misc_gpio, "leds", 3));
      qdev_connect_gpio_out(scp1, TOSA_GPIO_TC6393XB_L3V_ON, tc6393xb_l3v_get(tmio));
@@ -XXX,XX +XXX,XX @@ static const TypeInfo tosa_ssp_info = {
      .class_init    = tosa_ssp_class_init,
  };
 +static const TypeInfo tosa_misc_gpio_info = {
 +    .name          = "tosa-misc-gpio",
 +    .parent        = TYPE_SYS_BUS_DEVICE,
 +    .instance_size = sizeof(TosaMiscGPIOState),
 +    .instance_init = tosa_misc_gpio_init,
 +    /*
 +     * No class init required: device has no internal state so does not
 +     * need to set up reset or vmstate, and has no realize method.
 +     */
 +};
 +
  static void tosa_register_types(void)
  {
      type_register_static(&tosa_dac_info);
      type_register_static(&tosa_ssp_info);
 +    type_register_static(&tosa_misc_gpio_info);
  }
  type_init(tosa_register_types)
 --
 .20.1

-[Qemu-devel] [PULL 04/12] arm: Move system_clock_scale to armv7m_systick.h
+[PULL 23/25] hw/arm/palm.c: Detabify
-The system_clock_scale global is used only by the armv7m systick
+Remove hard-tabs from palm.c.
 device; move the extern declaration to the armv7m_systick.h header,
 and expand the comment to explain what it is and that it should
 ideally be replaced with a different approach.
 Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
+Reviewed-by: Li Qiang <liq3ea@gmail.com>
-Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
+Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
-Message-id: 20190516163857.6430-2-peter.maydell@linaro.org
+Message-id: 20200628214230.2592-2-peter.maydell@linaro.org
 ---
- include/hw/arm/arm.h              |  4 ----
+ hw/arm/palm.c | 64 +++++++++++++++++++++++++--------------------------
- include/hw/timer/armv7m_systick.h | 22 ++++++++++++++++++++++
+file changed, 32 insertions(+), 32 deletions(-)
 files changed, 22 insertions(+), 4 deletions(-)
-diff --git a/include/hw/arm/arm.h b/include/hw/arm/arm.h
+diff --git a/hw/arm/palm.c b/hw/arm/palm.c
 index XXXXXXX..XXXXXXX 100644
---- a/include/hw/arm/arm.h
+--- a/hw/arm/palm.c
-+++ b/include/hw/arm/arm.h
++++ b/hw/arm/palm.c
-@@ -XXX,XX +XXX,XX @@ void arm_write_secure_board_setup_dummy_smc(ARMCPU *cpu,
+@@ -XXX,XX +XXX,XX @@ static const MemoryRegionOps static_ops = {
-                                             const struct arm_boot_info *info,
+ /* Palm Tunsgten|E support */
-                                             hwaddr mvbar_addr);
+ /* Shared GPIOs */
--/* Multiplication factor to convert from system clock ticks to qemu timer
+-#define PALMTE_USBDETECT_GPIO    0
--   ticks.  */
+-#define PALMTE_USB_OR_DC_GPIO    1
--extern int system_clock_scale;
+-#define PALMTE_TSC_GPIO        4
--
+-#define PALMTE_PINTDAV_GPIO    6
- #endif /* HW_ARM_H */
+-#define PALMTE_MMC_WP_GPIO    8
-diff --git a/include/hw/timer/armv7m_systick.h b/include/hw/timer/armv7m_systick.h
+-#define PALMTE_MMC_POWER_GPIO    9
-index XXXXXXX..XXXXXXX 100644
+-#define PALMTE_HDQ_GPIO        11
---- a/include/hw/timer/armv7m_systick.h
+-#define PALMTE_HEADPHONES_GPIO    14
-+++ b/include/hw/timer/armv7m_systick.h
+-#define PALMTE_SPEAKER_GPIO    15
-@@ -XXX,XX +XXX,XX @@ typedef struct SysTickState {
++#define PALMTE_USBDETECT_GPIO   0
-     qemu_irq irq;
++#define PALMTE_USB_OR_DC_GPIO   1
- } SysTickState;
++#define PALMTE_TSC_GPIO                 4
++#define PALMTE_PINTDAV_GPIO     6
-+/*
++#define PALMTE_MMC_WP_GPIO      8
-+ * Multiplication factor to convert from system clock ticks to qemu timer
++#define PALMTE_MMC_POWER_GPIO   9
-+ * ticks. This should be set (by board code, usually) to a value
++#define PALMTE_HDQ_GPIO                 11
-+ * equal to NANOSECONDS_PER_SECOND / frq, where frq is the clock frequency
++#define PALMTE_HEADPHONES_GPIO  14
-+ * in Hz of the CPU.
++#define PALMTE_SPEAKER_GPIO     15
-+ *
+ /* MPU private GPIOs */
-+ * This value is used by the systick device when it is running in
+-#define PALMTE_DC_GPIO        2
-+ * its "use the CPU clock" mode (ie when SYST_CSR.CLKSOURCE == 1) to
+-#define PALMTE_MMC_SWITCH_GPIO    4
-+ * set how fast the timer should tick.
+-#define PALMTE_MMC1_GPIO    6
-+ *
+-#define PALMTE_MMC2_GPIO    7
-+ * TODO: we should refactor this so that rather than using a global
+-#define PALMTE_MMC3_GPIO    11
-+ * we use a device property or something similar. This is complicated
++#define PALMTE_DC_GPIO          2
-+ * because (a) the property would need to be plumbed through from the
++#define PALMTE_MMC_SWITCH_GPIO  4
-+ * board code down through various layers to the systick device
++#define PALMTE_MMC1_GPIO        6
-+ * and (b) the property needs to be modifiable after realize, because
++#define PALMTE_MMC2_GPIO        7
-+ * the stellaris board uses this to implement the behaviour where the
++#define PALMTE_MMC3_GPIO        11
-+ * guest can reprogram the PLL registers to downclock the CPU, and the
-+ * systick device needs to react accordingly. Possibly this should
+ static MouseTransformInfo palmte_pointercal = {
-+ * be deferred until we have a good API for modelling clock trees.
+     .x = 320,
-+ */
+@@ -XXX,XX +XXX,XX @@ static struct {
-+extern int system_clock_scale;
+     int column;
-+
+ } palmte_keymap[0x80] = {
- #endif
+     [0 ... 0x7f] = { -1, -1 },
 -    [0x3b] = { 0, 0 },    /* F1    -> Calendar */
 -    [0x3c] = { 1, 0 },    /* F2    -> Contacts */
 -    [0x3d] = { 2, 0 },    /* F3    -> Tasks List */
 -    [0x3e] = { 3, 0 },    /* F4    -> Note Pad */
 -    [0x01] = { 4, 0 },    /* Esc    -> Power */
 -    [0x4b] = { 0, 1 },    /*        Left */
 -    [0x50] = { 1, 1 },    /*        Down */
 -    [0x48] = { 2, 1 },    /*       Up */
 -    [0x4d] = { 3, 1 },    /*       Right */
 -    [0x4c] = { 4, 1 },    /*        Centre */
 -    [0x39] = { 4, 1 },    /* Spc    -> Centre */
 +    [0x3b] = { 0, 0 },  /* F1   -> Calendar */
 +    [0x3c] = { 1, 0 },  /* F2   -> Contacts */
 +    [0x3d] = { 2, 0 },  /* F3   -> Tasks List */
 +    [0x3e] = { 3, 0 },  /* F4   -> Note Pad */
 +    [0x01] = { 4, 0 },  /* Esc  -> Power */
 +    [0x4b] = { 0, 1 },  /*         Left */
 +    [0x50] = { 1, 1 },  /*         Down */
 +    [0x48] = { 2, 1 },  /*         Up */
 +    [0x4d] = { 3, 1 },  /*         Right */
 +    [0x4c] = { 4, 1 },  /*         Centre */
 +    [0x39] = { 4, 1 },  /* Spc  -> Centre */
  };
  static void palmte_button_event(void *opaque, int keycode)
@@ -XXX,XX +XXX,XX @@ static void palmte_gpio_setup(struct omap_mpu_state_s *cpu)
                              [PALMTE_MMC_SWITCH_GPIO]));
      misc_gpio = qemu_allocate_irqs(palmte_onoff_gpios, cpu, 7);
 -    qdev_connect_gpio_out(cpu->gpio, PALMTE_MMC_POWER_GPIO,    misc_gpio[0]);
 -    qdev_connect_gpio_out(cpu->gpio, PALMTE_SPEAKER_GPIO,    misc_gpio[1]);
 -    qdev_connect_gpio_out(cpu->gpio, 11,            misc_gpio[2]);
 -    qdev_connect_gpio_out(cpu->gpio, 12,            misc_gpio[3]);
 -    qdev_connect_gpio_out(cpu->gpio, 13,            misc_gpio[4]);
 -    omap_mpuio_out_set(cpu->mpuio, 1,                misc_gpio[5]);
 -    omap_mpuio_out_set(cpu->mpuio, 3,                misc_gpio[6]);
 +    qdev_connect_gpio_out(cpu->gpio, PALMTE_MMC_POWER_GPIO,     misc_gpio[0]);
 +    qdev_connect_gpio_out(cpu->gpio, PALMTE_SPEAKER_GPIO,       misc_gpio[1]);
 +    qdev_connect_gpio_out(cpu->gpio, 11,                        misc_gpio[2]);
 +    qdev_connect_gpio_out(cpu->gpio, 12,                        misc_gpio[3]);
 +    qdev_connect_gpio_out(cpu->gpio, 13,                        misc_gpio[4]);
 +    omap_mpuio_out_set(cpu->mpuio, 1,                           misc_gpio[5]);
 +    omap_mpuio_out_set(cpu->mpuio, 3,                           misc_gpio[6]);
      /* Reset some inputs to initial state.  */
      qemu_irq_lower(qdev_get_gpio_in(cpu->gpio, PALMTE_USBDETECT_GPIO));
 --
 .20.1

-[Qemu-devel] [PULL 12/12] hw/arm/exynos4210: QOM'ify the Exynos4210 SoC
+[PULL 24/25] hw/arm/palm.c: Encapsulate misc GPIO handling in a device
-From: Philippe Mathieu-Daudé <philmd@redhat.com>
+Replace the free-floating set of IRQs and palmte_onoff_gpios()
 function with a simple QOM device that encapsulates this
 behaviour.
-Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
+This fixes Coverity issue CID 1421944, which points out that
-Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
+the memory returned by qemu_allocate_irqs() is leaked.
-Message-id: 20190520214342.13709-5-philmd@redhat.com
 Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
+Reviewed-by: Li Qiang <liq3ea@gmail.com>
+Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
+Message-id: 20200628214230.2592-3-peter.maydell@linaro.org
 ---
- include/hw/arm/exynos4210.h |  9 +++++++--
+ hw/arm/palm.c | 61 +++++++++++++++++++++++++++++++++++++++++++--------
- hw/arm/exynos4210.c         | 28 ++++++++++++++++++++++++----
+file changed, 52 insertions(+), 9 deletions(-)
  hw/arm/exynos4_boards.c     |  9 ++++++---
 files changed, 37 insertions(+), 9 deletions(-)
-diff --git a/include/hw/arm/exynos4210.h b/include/hw/arm/exynos4210.h
+diff --git a/hw/arm/palm.c b/hw/arm/palm.c
 index XXXXXXX..XXXXXXX 100644
---- a/include/hw/arm/exynos4210.h
+--- a/hw/arm/palm.c
-+++ b/include/hw/arm/exynos4210.h
++++ b/hw/arm/palm.c
-@@ -XXX,XX +XXX,XX @@ typedef struct Exynos4210Irq {
+@@ -XXX,XX +XXX,XX @@ static void palmte_button_event(void *opaque, int keycode)
- } Exynos4210Irq;
+                         !(keycode & 0x80));
+ }
- typedef struct Exynos4210State {
-+    /*< private >*/
++/*
 + * Encapsulation of some GPIO line behaviour for the Palm board
 + *
 + * QEMU interface:
 + *  + unnamed GPIO inputs 0..6: for the various miscellaneous input lines
 + */
 +
 +#define TYPE_PALM_MISC_GPIO "palm-misc-gpio"
 +#define PALM_MISC_GPIO(obj) \
 +    OBJECT_CHECK(PalmMiscGPIOState, (obj), TYPE_PALM_MISC_GPIO)
 +
 +typedef struct PalmMiscGPIOState {
 +    SysBusDevice parent_obj;
-+    /*< public >*/
++} PalmMiscGPIOState;
      ARMCPU *cpu[EXYNOS4210_NCPUS];
      Exynos4210Irq irqs;
      qemu_irq *irq_table;
@@ -XXX,XX +XXX,XX @@ typedef struct Exynos4210State {
      I2CBus *i2c_if[EXYNOS4210_I2C_NUMBER];
  } Exynos4210State;
 +#define TYPE_EXYNOS4210_SOC "exynos4210"
 +#define EXYNOS4210_SOC(obj) \
 +    OBJECT_CHECK(Exynos4210State, obj, TYPE_EXYNOS4210_SOC)
 +
- void exynos4210_write_secondary(ARMCPU *cpu,
+ static void palmte_onoff_gpios(void *opaque, int line, int level)
-         const struct arm_boot_info *info);
+ {
+     switch (line) {
--Exynos4210State *exynos4210_init(MemoryRegion *system_mem);
+@@ -XXX,XX +XXX,XX @@ static void palmte_onoff_gpios(void *opaque, int line, int level)
--
+     }
  /* Initialize exynos4210 IRQ subsystem stub */
  qemu_irq *exynos4210_init_irq(Exynos4210Irq *env);
 diff --git a/hw/arm/exynos4210.c b/hw/arm/exynos4210.c
 index XXXXXXX..XXXXXXX 100644
 --- a/hw/arm/exynos4210.c
 +++ b/hw/arm/exynos4210.c
@@ -XXX,XX +XXX,XX @@ static void pl330_create(uint32_t base, qemu_irq irq, int nreq)
      sysbus_connect_irq(busdev, 0, irq);
  }
--Exynos4210State *exynos4210_init(MemoryRegion *system_mem)
++static void palm_misc_gpio_init(Object *obj)
-+static void exynos4210_realize(DeviceState *socdev, Error **errp)
++{
- {
++    DeviceState *dev = DEVICE(obj);
 -    Exynos4210State *s = g_new0(Exynos4210State, 1);
 +    Exynos4210State *s = EXYNOS4210_SOC(socdev);
 +    MemoryRegion *system_mem = get_system_memory();
      qemu_irq gate_irq[EXYNOS4210_NCPUS][EXYNOS4210_IRQ_GATE_NINPUTS];
      SysBusDevice *busdev;
      DeviceState *dev;
@@ -XXX,XX +XXX,XX @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem)
                   qemu_irq_invert(s->irq_table[exynos4210_get_irq(36, 1)]), 32);
      pl330_create(EXYNOS4210_PL330_BASE2_ADDR,
                   qemu_irq_invert(s->irq_table[exynos4210_get_irq(34, 1)]), 1);
 -
 -    return s;
  }
 +
-+static void exynos4210_class_init(ObjectClass *klass, void *data)
++    qdev_init_gpio_in(dev, palmte_onoff_gpios, 7);
 +{
 +    DeviceClass *dc = DEVICE_CLASS(klass);
 +
 +    dc->realize = exynos4210_realize;
 +}
 +
-+static const TypeInfo exynos4210_info = {
++static const TypeInfo palm_misc_gpio_info = {
-+    .name = TYPE_EXYNOS4210_SOC,
++    .name = TYPE_PALM_MISC_GPIO,
 +    .parent = TYPE_SYS_BUS_DEVICE,
-+    .instance_size = sizeof(Exynos4210State),
++    .instance_size = sizeof(PalmMiscGPIOState),
-+    .class_init = exynos4210_class_init,
++    .instance_init = palm_misc_gpio_init,
 +    /*
 +     * No class init required: device has no internal state so does not
 +     * need to set up reset or vmstate, and has no realize method.
 +     */
 +};
 +
-+static void exynos4210_register_types(void)
+ static void palmte_gpio_setup(struct omap_mpu_state_s *cpu)
  {
 -    qemu_irq *misc_gpio;
 +    DeviceState *misc_gpio;
 +
 +    misc_gpio = sysbus_create_simple(TYPE_PALM_MISC_GPIO, -1, NULL);
      omap_mmc_handlers(cpu->mmc,
                      qdev_get_gpio_in(cpu->gpio, PALMTE_MMC_WP_GPIO),
                      qemu_irq_invert(omap_mpuio_in_get(cpu->mpuio)
                              [PALMTE_MMC_SWITCH_GPIO]));
 -    misc_gpio = qemu_allocate_irqs(palmte_onoff_gpios, cpu, 7);
 -    qdev_connect_gpio_out(cpu->gpio, PALMTE_MMC_POWER_GPIO,     misc_gpio[0]);
 -    qdev_connect_gpio_out(cpu->gpio, PALMTE_SPEAKER_GPIO,       misc_gpio[1]);
 -    qdev_connect_gpio_out(cpu->gpio, 11,                        misc_gpio[2]);
 -    qdev_connect_gpio_out(cpu->gpio, 12,                        misc_gpio[3]);
 -    qdev_connect_gpio_out(cpu->gpio, 13,                        misc_gpio[4]);
 -    omap_mpuio_out_set(cpu->mpuio, 1,                           misc_gpio[5]);
 -    omap_mpuio_out_set(cpu->mpuio, 3,                           misc_gpio[6]);
 +    qdev_connect_gpio_out(cpu->gpio, PALMTE_MMC_POWER_GPIO,
 +                          qdev_get_gpio_in(misc_gpio, 0));
 +    qdev_connect_gpio_out(cpu->gpio, PALMTE_SPEAKER_GPIO,
 +                          qdev_get_gpio_in(misc_gpio, 1));
 +    qdev_connect_gpio_out(cpu->gpio, 11, qdev_get_gpio_in(misc_gpio, 2));
 +    qdev_connect_gpio_out(cpu->gpio, 12, qdev_get_gpio_in(misc_gpio, 3));
 +    qdev_connect_gpio_out(cpu->gpio, 13, qdev_get_gpio_in(misc_gpio, 4));
 +    omap_mpuio_out_set(cpu->mpuio, 1, qdev_get_gpio_in(misc_gpio, 5));
 +    omap_mpuio_out_set(cpu->mpuio, 3, qdev_get_gpio_in(misc_gpio, 6));
      /* Reset some inputs to initial state.  */
      qemu_irq_lower(qdev_get_gpio_in(cpu->gpio, PALMTE_USBDETECT_GPIO));
@@ -XXX,XX +XXX,XX @@ static void palmte_machine_init(MachineClass *mc)
  }
  DEFINE_MACHINE("cheetah", palmte_machine_init)
 +
 +static void palm_register_types(void)
 +{
-+    type_register_static(&exynos4210_info);
++    type_register_static(&palm_misc_gpio_info);
 +}
 +
-+type_init(exynos4210_register_types)
++type_init(palm_register_types)
 diff --git a/hw/arm/exynos4_boards.c b/hw/arm/exynos4_boards.c
 index XXXXXXX..XXXXXXX 100644
 --- a/hw/arm/exynos4_boards.c
 +++ b/hw/arm/exynos4_boards.c
@@ -XXX,XX +XXX,XX @@ typedef enum Exynos4BoardType {
  } Exynos4BoardType;
  typedef struct Exynos4BoardState {
 -    Exynos4210State *soc;
 +    Exynos4210State soc;
      MemoryRegion dram0_mem;
      MemoryRegion dram1_mem;
  } Exynos4BoardState;
@@ -XXX,XX +XXX,XX @@ exynos4_boards_init_common(MachineState *machine,
      exynos4_boards_init_ram(s, get_system_memory(),
                              exynos4_board_ram_size[board_type]);
 -    s->soc = exynos4210_init(get_system_memory());
 +    object_initialize(&s->soc, sizeof(s->soc), TYPE_EXYNOS4210_SOC);
 +    qdev_set_parent_bus(DEVICE(&s->soc), sysbus_get_default());
 +    object_property_set_bool(OBJECT(&s->soc), true, "realized",
 +                             &error_fatal);
      return s;
  }
@@ -XXX,XX +XXX,XX @@ static void smdkc210_init(MachineState *machine)
                                                        EXYNOS4_BOARD_SMDKC210);
      lan9215_init(SMDK_LAN9118_BASE_ADDR,
 -            qemu_irq_invert(s->soc->irq_table[exynos4210_get_irq(37, 1)]));
 +            qemu_irq_invert(s->soc.irq_table[exynos4210_get_irq(37, 1)]));
      arm_load_kernel(ARM_CPU(first_cpu), &exynos4_board_binfo);
  }
 --
 .20.1

-New patch
+[PULL 25/25] hw/arm/aspeed: Do not create and attach empty SD cards by default
+From: Philippe Mathieu-Daudé <f4bug@amsat.org>
+Since added in commit 2bea128c3d, each SDHCI is wired with a SD
+card, using empty card when no block drive provided. This is not
+the desired behavior. The SDHCI exposes a SD bus to plug cards
+on, if no card available, it is fine to have an unplugged bus.
+Avoid creating unnecessary SD card device when no block drive
+provided.
+Fixes: 2bea128c3d ("hw/sd/aspeed_sdhci: New device")
+Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
+Message-id: 20200705173402.15620-1-f4bug@amsat.org
+Reviewed-by: Cédric Le Goater <clg@kaod.org>
+Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
+---
+ hw/arm/aspeed.c | 9 +++++----
+file changed, 5 insertions(+), 4 deletions(-)
+diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
+index XXXXXXX..XXXXXXX 100644
+--- a/hw/arm/aspeed.c
++++ b/hw/arm/aspeed.c
+@@ -XXX,XX +XXX,XX @@ static void sdhci_attach_drive(SDHCIState *sdhci, DriveInfo *dinfo)
+ {
+         DeviceState *card;
+-        card = qdev_new(TYPE_SD_CARD);
+-        if (dinfo) {
+-            qdev_prop_set_drive_err(card, "drive", blk_by_legacy_dinfo(dinfo),
+-                                    &error_fatal);
++        if (!dinfo) {
++            return;
+         }
++        card = qdev_new(TYPE_SD_CARD);
++        qdev_prop_set_drive_err(card, "drive", blk_by_legacy_dinfo(dinfo),
++                                &error_fatal);
+         qdev_realize_and_unref(card,
+                                qdev_get_child_bus(DEVICE(sdhci), "sd-bus"),
+                                &error_fatal);
+--
+.20.1

Not very much here, but several people have fallen over
the vector operation segfault bug, so let's get the fix
into master.

thanks
-- PMM

The following changes since commit d418238dca7b4e0b124135827ead3076233052b1:

Merge remote-tracking branch 'remotes/rth/tags/pull-rng-20190522' into staging (2019-05-23 12:57:17 +0100)

are available in the Git repository at:

https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20190523

for you to fetch changes up to 98e4f4fdb8ea05d840f51f47125924c2bb9df2df:

hw/arm/exynos4210: QOM'ify the Exynos4210 SoC (2019-05-23 14:47:44 +0100)

----------------------------------------------------------------
target-arm queue:
 * exynos4210: QOM'ify the Exynos4210 SoC
 * exynos4210: Add DMA support for the Exynos4210
 * arm_gicv3: Fix writes to ICC_CTLR_EL3
 * arm_gicv3: Fix write of ICH_VMCR_EL2.{VBPR0, VBPR1}
 * target/arm: Fix vector operation segfault
 * target/arm: Minor improvements to BFXIL, EXTR

----------------------------------------------------------------
Alistair Francis (1):
      target/arm: Fix vector operation segfault

Guenter Roeck (1):
      hw/arm/exynos4210: Add DMA support for the Exynos4210

Peter Maydell (5):
      arm: Move system_clock_scale to armv7m_systick.h
      arm: Remove unnecessary includes of hw/arm/arm.h
      arm: Rename hw/arm/arm.h to hw/arm/boot.h
      hw/intc/arm_gicv3: Fix write of ICH_VMCR_EL2.{VBPR0, VBPR1}
      hw/intc/arm_gicv3: Fix writes to ICC_CTLR_EL3

Philippe Mathieu-Daudé (3):
      hw/arm/exynos4: Remove unuseful debug code
      hw/arm/exynos4: Use the IEC binary prefix definitions
      hw/arm/exynos4210: QOM'ify the Exynos4210 SoC

Richard Henderson (2):
      target/arm: Use extract2 for EXTR
      target/arm: Simplify BFXIL expansion

include/hw/arm/allwinner-a10.h    |  2 +-
 include/hw/arm/aspeed_soc.h       |  1 -
 include/hw/arm/bcm2836.h          |  1 -
 include/hw/arm/{arm.h => boot.h}  | 12 +++------
 include/hw/arm/exynos4210.h       |  9 +++++--
 include/hw/arm/fsl-imx25.h        |  2 +-
 include/hw/arm/fsl-imx31.h        |  2 +-
 include/hw/arm/fsl-imx6.h         |  2 +-
 include/hw/arm/fsl-imx6ul.h       |  2 +-
 include/hw/arm/fsl-imx7.h         |  2 +-
 include/hw/arm/virt.h             |  2 +-
 include/hw/arm/xlnx-versal.h      |  2 +-
 include/hw/arm/xlnx-zynqmp.h      |  2 +-
 include/hw/timer/armv7m_systick.h | 22 ++++++++++++++++
 hw/arm/armsse.c                   |  2 +-
 hw/arm/armv7m.c                   |  2 +-
 hw/arm/aspeed.c                   |  2 +-
 hw/arm/boot.c                     |  2 +-
 hw/arm/collie.c                   |  2 +-
 hw/arm/exynos4210.c               | 54 ++++++++++++++++++++++++++++++++++++---
 hw/arm/exynos4_boards.c           | 40 ++++++++---------------------
 hw/arm/highbank.c                 |  2 +-
 hw/arm/integratorcp.c             |  2 +-
 hw/arm/mainstone.c                |  2 +-
 hw/arm/microbit.c                 |  2 +-
 hw/arm/mps2-tz.c                  |  2 +-
 hw/arm/mps2.c                     |  2 +-
 hw/arm/msf2-soc.c                 |  1 -
 hw/arm/msf2-som.c                 |  2 +-
 hw/arm/musca.c                    |  2 +-
 hw/arm/musicpal.c                 |  2 +-
 hw/arm/netduino2.c                |  2 +-
 hw/arm/nrf51_soc.c                |  2 +-
 hw/arm/nseries.c                  |  2 +-
 hw/arm/omap1.c                    |  2 +-
 hw/arm/omap2.c                    |  2 +-
 hw/arm/omap_sx1.c                 |  2 +-
 hw/arm/palm.c                     |  2 +-
 hw/arm/raspi.c                    |  2 +-
 hw/arm/realview.c                 |  2 +-
 hw/arm/spitz.c                    |  2 +-
 hw/arm/stellaris.c                |  2 +-
 hw/arm/stm32f205_soc.c            |  2 +-
 hw/arm/strongarm.c                |  2 +-
 hw/arm/tosa.c                     |  2 +-
 hw/arm/versatilepb.c              |  2 +-
 hw/arm/vexpress.c                 |  2 +-
 hw/arm/virt.c                     |  2 +-
 hw/arm/xilinx_zynq.c              |  2 +-
 hw/arm/xlnx-versal.c              |  2 +-
 hw/arm/z2.c                       |  2 +-
 hw/intc/arm_gicv3_cpuif.c         |  6 ++---
 hw/intc/armv7m_nvic.c             |  1 -
 target/arm/arm-semi.c             |  1 -
 target/arm/cpu.c                  |  1 -
 target/arm/cpu64.c                |  1 -
 target/arm/kvm.c                  |  1 -
 target/arm/kvm32.c                |  1 -
 target/arm/kvm64.c                |  1 -
 target/arm/translate-a64.c        | 44 ++++++++++++++++---------------
 target/arm/translate.c            |  4 +--
 61 files changed, 164 insertions(+), 123 deletions(-)
 rename include/hw/arm/{arm.h => boot.h} (96%)

From: Richard Henderson <richard.henderson@linaro.org>

This is, after all, how we implement extract2 in tcg/aarch64.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20190514011129.11330-2-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 target/arm/translate-a64.c | 38 ++++++++++++++++++++------------------
 1 file changed, 20 insertions(+), 18 deletions(-)

diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index XXXXXXX..XXXXXXX 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -XXX,XX +XXX,XX @@ static void disas_extract(DisasContext *s, uint32_t insn)
             } else {
                 tcg_gen_ext32u_i64(tcg_rd, cpu_reg(s, rm));
             }
-        } else if (rm == rn) { /* ROR */
-            tcg_rm = cpu_reg(s, rm);
-            if (sf) {
-                tcg_gen_rotri_i64(tcg_rd, tcg_rm, imm);
-            } else {
-                TCGv_i32 tmp = tcg_temp_new_i32();
-                tcg_gen_extrl_i64_i32(tmp, tcg_rm);
-                tcg_gen_rotri_i32(tmp, tmp, imm);
-                tcg_gen_extu_i32_i64(tcg_rd, tmp);
-                tcg_temp_free_i32(tmp);
-            }
         } else {
-            tcg_rm = read_cpu_reg(s, rm, sf);
-            tcg_rn = read_cpu_reg(s, rn, sf);
-            tcg_gen_shri_i64(tcg_rm, tcg_rm, imm);
-            tcg_gen_shli_i64(tcg_rn, tcg_rn, bitsize - imm);
-            tcg_gen_or_i64(tcg_rd, tcg_rm, tcg_rn);
-            if (!sf) {
-                tcg_gen_ext32u_i64(tcg_rd, tcg_rd);
+            tcg_rm = cpu_reg(s, rm);
+            tcg_rn = cpu_reg(s, rn);
+
+            if (sf) {
+                /* Specialization to ROR happens in EXTRACT2.  */
+                tcg_gen_extract2_i64(tcg_rd, tcg_rm, tcg_rn, imm);
+            } else {
+                TCGv_i32 t0 = tcg_temp_new_i32();
+
+                tcg_gen_extrl_i64_i32(t0, tcg_rm);
+                if (rm == rn) {
+                    tcg_gen_rotri_i32(t0, t0, imm);
+                } else {
+                    TCGv_i32 t1 = tcg_temp_new_i32();
+                    tcg_gen_extrl_i64_i32(t1, tcg_rn);
+                    tcg_gen_extract2_i32(t0, t0, t1, imm);
+                    tcg_temp_free_i32(t1);
+                }
+                tcg_gen_extu_i32_i64(tcg_rd, t0);
+                tcg_temp_free_i32(t0);
             }
         }
     }
-- 
2.20.1

From: Richard Henderson <richard.henderson@linaro.org>

The mask implied by the extract is redundant with the one
implied by the deposit.  Also, fix spelling of BFXIL.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20190514011129.11330-3-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 target/arm/translate-a64.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

From: Alistair Francis <alistair.francis@wdc.com>

Commit 89e68b575 "target/arm: Use vector operations for saturation"
causes this abort() when booting QEMU ARM with a Cortex-A15:

0  0x00007ffff4c2382f in raise () at /usr/lib/libc.so.6
1  0x00007ffff4c0e672 in abort () at /usr/lib/libc.so.6
2  0x00005555559c1839 in disas_neon_data_insn (insn=<optimized out>, s=<optimized out>) at ./target/arm/translate.c:6673
3  0x00005555559c1839 in disas_neon_data_insn (s=<optimized out>, insn=<optimized out>) at ./target/arm/translate.c:6386
4  0x00005555559cd8a4 in disas_arm_insn (insn=4081107068, s=0x7fffe59a9510) at ./target/arm/translate.c:9289
5  0x00005555559cd8a4 in arm_tr_translate_insn (dcbase=0x7fffe59a9510, cpu=<optimized out>) at ./target/arm/translate.c:13612
6  0x00005555558d1d39 in translator_loop (ops=0x5555561cc580 <arm_translator_ops>, db=0x7fffe59a9510, cpu=0x55555686a2f0, tb=<optimized out>, max_insns=<optimized out>) at ./accel/tcg/translator.c:96
7  0x00005555559d10d4 in gen_intermediate_code (cpu=cpu@entry=0x55555686a2f0, tb=tb@entry=0x7fffd7840080 <code_gen_buffer+126091347>, max_insns=max_insns@entry=512) at ./target/arm/translate.c:13901
8  0x00005555558d06b9 in tb_gen_code (cpu=cpu@entry=0x55555686a2f0, pc=3067096216, cs_base=0, flags=192, cflags=-16252928, cflags@entry=524288) at ./accel/tcg/translate-all.c:1736
9  0x00005555558ce467 in tb_find (cf_mask=524288, tb_exit=1, last_tb=0x7fffd783e640 <code_gen_buffer+126084627>, cpu=0x1) at ./accel/tcg/cpu-exec.c:407
10 0x00005555558ce467 in cpu_exec (cpu=cpu@entry=0x55555686a2f0) at ./accel/tcg/cpu-exec.c:728
11 0x000055555588b0cf in tcg_cpu_exec (cpu=0x55555686a2f0) at ./cpus.c:1431
12 0x000055555588d223 in qemu_tcg_cpu_thread_fn (arg=0x55555686a2f0) at ./cpus.c:1735
13 0x000055555588d223 in qemu_tcg_cpu_thread_fn (arg=arg@entry=0x55555686a2f0) at ./cpus.c:1709
14 0x0000555555d2629a in qemu_thread_start (args=<optimized out>) at ./util/qemu-thread-posix.c:502
15 0x00007ffff4db8a92 in start_thread () at /usr/lib/libpthread.

This patch ensures that we don't hit the abort() in the second switch
case in disas_neon_data_insn() as we will return from the first case.

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Tested-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: ad91b397f360b2fc7f4087e476f7df5b04d42ddb.1558021877.git.alistair.francis@wdc.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 target/arm/translate.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/target/arm/translate.c b/target/arm/translate.c
index XXXXXXX..XXXXXXX 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -XXX,XX +XXX,XX @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn)
             tcg_gen_gvec_4(rd_ofs, offsetof(CPUARMState, vfp.qc),
                            rn_ofs, rm_ofs, vec_size, vec_size,
                            (u ? uqadd_op : sqadd_op) + size);
-            break;
+            return 0;
 
         case NEON_3R_VQSUB:
             tcg_gen_gvec_4(rd_ofs, offsetof(CPUARMState, vfp.qc),
                            rn_ofs, rm_ofs, vec_size, vec_size,
                            (u ? uqsub_op : sqsub_op) + size);
-            break;
+            return 0;
 
         case NEON_3R_VMUL: /* VMUL */
             if (u) {
-- 
2.20.1

The system_clock_scale global is used only by the armv7m systick
device; move the extern declaration to the armv7m_systick.h header,
and expand the comment to explain what it is and that it should
ideally be replaced with a different approach.

diff --git a/include/hw/arm/arm.h b/include/hw/arm/arm.h
index XXXXXXX..XXXXXXX 100644
--- a/include/hw/arm/arm.h
+++ b/include/hw/arm/arm.h
@@ -XXX,XX +XXX,XX @@ void arm_write_secure_board_setup_dummy_smc(ARMCPU *cpu,
                                             const struct arm_boot_info *info,
                                             hwaddr mvbar_addr);
 
-/* Multiplication factor to convert from system clock ticks to qemu timer
-   ticks.  */
-extern int system_clock_scale;
-
 #endif /* HW_ARM_H */
diff --git a/include/hw/timer/armv7m_systick.h b/include/hw/timer/armv7m_systick.h
index XXXXXXX..XXXXXXX 100644
--- a/include/hw/timer/armv7m_systick.h
+++ b/include/hw/timer/armv7m_systick.h
@@ -XXX,XX +XXX,XX @@ typedef struct SysTickState {
     qemu_irq irq;
 } SysTickState;
 
+/*
+ * Multiplication factor to convert from system clock ticks to qemu timer
+ * ticks. This should be set (by board code, usually) to a value
+ * equal to NANOSECONDS_PER_SECOND / frq, where frq is the clock frequency
+ * in Hz of the CPU.
+ *
+ * This value is used by the systick device when it is running in
+ * its "use the CPU clock" mode (ie when SYST_CSR.CLKSOURCE == 1) to
+ * set how fast the timer should tick.
+ *
+ * TODO: we should refactor this so that rather than using a global
+ * we use a device property or something similar. This is complicated
+ * because (a) the property would need to be plumbed through from the
+ * board code down through various layers to the systick device
+ * and (b) the property needs to be modifiable after realize, because
+ * the stellaris board uses this to implement the behaviour where the
+ * guest can reprogram the PLL registers to downclock the CPU, and the
+ * systick device needs to react accordingly. Possibly this should
+ * be deferred until we have a good API for modelling clock trees.
+ */
+extern int system_clock_scale;
+
 #endif
-- 
2.20.1

The hw/arm/arm.h header now only includes declarations relating
to boot.c code, so it is only needed by Arm board or SoC code.
Remove some unnecessary inclusions of it from target/arm files
and from hw/intc/armv7m_nvic.c.

diff --git a/hw/intc/armv7m_nvic.c b/hw/intc/armv7m_nvic.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/intc/armv7m_nvic.c
+++ b/hw/intc/armv7m_nvic.c
@@ -XXX,XX +XXX,XX @@
 #include "cpu.h"
 #include "hw/sysbus.h"
 #include "qemu/timer.h"
-#include "hw/arm/arm.h"
 #include "hw/intc/armv7m_nvic.h"
 #include "target/arm/cpu.h"
 #include "exec/exec-all.h"
diff --git a/target/arm/arm-semi.c b/target/arm/arm-semi.c
index XXXXXXX..XXXXXXX 100644
--- a/target/arm/arm-semi.c
+++ b/target/arm/arm-semi.c
@@ -XXX,XX +XXX,XX @@
 #else
 #include "qemu-common.h"
 #include "exec/gdbstub.h"
-#include "hw/arm/arm.h"
 #include "qemu/cutils.h"
 #endif
 
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index XXXXXXX..XXXXXXX 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -XXX,XX +XXX,XX @@
 #if !defined(CONFIG_USER_ONLY)
 #include "hw/loader.h"
 #endif
-#include "hw/arm/arm.h"
 #include "sysemu/sysemu.h"
 #include "sysemu/hw_accel.h"
 #include "kvm_arm.h"
diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c
index XXXXXXX..XXXXXXX 100644
--- a/target/arm/cpu64.c
+++ b/target/arm/cpu64.c
@@ -XXX,XX +XXX,XX @@
 #if !defined(CONFIG_USER_ONLY)
 #include "hw/loader.h"
 #endif
-#include "hw/arm/arm.h"
 #include "sysemu/sysemu.h"
 #include "sysemu/kvm.h"
 #include "kvm_arm.h"
diff --git a/target/arm/kvm.c b/target/arm/kvm.c
index XXXXXXX..XXXXXXX 100644
--- a/target/arm/kvm.c
+++ b/target/arm/kvm.c
@@ -XXX,XX +XXX,XX @@
 #include "cpu.h"
 #include "trace.h"
 #include "internals.h"
-#include "hw/arm/arm.h"
 #include "hw/pci/pci.h"
 #include "exec/memattrs.h"
 #include "exec/address-spaces.h"
diff --git a/target/arm/kvm32.c b/target/arm/kvm32.c
index XXXXXXX..XXXXXXX 100644
--- a/target/arm/kvm32.c
+++ b/target/arm/kvm32.c
@@ -XXX,XX +XXX,XX @@
 #include "sysemu/kvm.h"
 #include "kvm_arm.h"
 #include "internals.h"
-#include "hw/arm/arm.h"
 #include "qemu/log.h"
 
 static inline void set_feature(uint64_t *features, int feature)
diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c
index XXXXXXX..XXXXXXX 100644
--- a/target/arm/kvm64.c
+++ b/target/arm/kvm64.c
@@ -XXX,XX +XXX,XX @@
 #include "sysemu/kvm.h"
 #include "kvm_arm.h"
 #include "internals.h"
-#include "hw/arm/arm.h"
 
 static bool have_guest_debug;
 
-- 
2.20.1

The header file hw/arm/arm.h now includes only declarations
relating to hw/arm/boot.c functionality. Rename it accordingly,
and adjust its header comment.

The bulk of this commit was created via
 perl -pi -e 's|hw/arm/arm.h|hw/arm/boot.h|' hw/arm/*.c include/hw/arm/*.h

In a few cases we can just delete the #include:
hw/arm/msf2-soc.c, include/hw/arm/aspeed_soc.h and
include/hw/arm/bcm2836.h did not require it.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-id: 20190516163857.6430-4-peter.maydell@linaro.org
---
 include/hw/arm/allwinner-a10.h   | 2 +-
 include/hw/arm/aspeed_soc.h      | 1 -
 include/hw/arm/bcm2836.h         | 1 -
 include/hw/arm/{arm.h => boot.h} | 8 ++++----
 include/hw/arm/fsl-imx25.h       | 2 +-
 include/hw/arm/fsl-imx31.h       | 2 +-
 include/hw/arm/fsl-imx6.h        | 2 +-
 include/hw/arm/fsl-imx6ul.h      | 2 +-
 include/hw/arm/fsl-imx7.h        | 2 +-
 include/hw/arm/virt.h            | 2 +-
 include/hw/arm/xlnx-versal.h     | 2 +-
 include/hw/arm/xlnx-zynqmp.h     | 2 +-
 hw/arm/armsse.c                  | 2 +-
 hw/arm/armv7m.c                  | 2 +-
 hw/arm/aspeed.c                  | 2 +-
 hw/arm/boot.c                    | 2 +-
 hw/arm/collie.c                  | 2 +-
 hw/arm/exynos4210.c              | 2 +-
 hw/arm/exynos4_boards.c          | 2 +-
 hw/arm/highbank.c                | 2 +-
 hw/arm/integratorcp.c            | 2 +-
 hw/arm/mainstone.c               | 2 +-
 hw/arm/microbit.c                | 2 +-
 hw/arm/mps2-tz.c                 | 2 +-
 hw/arm/mps2.c                    | 2 +-
 hw/arm/msf2-soc.c                | 1 -
 hw/arm/msf2-som.c                | 2 +-
 hw/arm/musca.c                   | 2 +-
 hw/arm/musicpal.c                | 2 +-
 hw/arm/netduino2.c               | 2 +-
 hw/arm/nrf51_soc.c               | 2 +-
 hw/arm/nseries.c                 | 2 +-
 hw/arm/omap1.c                   | 2 +-
 hw/arm/omap2.c                   | 2 +-
 hw/arm/omap_sx1.c                | 2 +-
 hw/arm/palm.c                    | 2 +-
 hw/arm/raspi.c                   | 2 +-
 hw/arm/realview.c                | 2 +-
 hw/arm/spitz.c                   | 2 +-
 hw/arm/stellaris.c               | 2 +-
 hw/arm/stm32f205_soc.c           | 2 +-
 hw/arm/strongarm.c               | 2 +-
 hw/arm/tosa.c                    | 2 +-
 hw/arm/versatilepb.c             | 2 +-
 hw/arm/vexpress.c                | 2 +-
 hw/arm/virt.c                    | 2 +-
 hw/arm/xilinx_zynq.c             | 2 +-
 hw/arm/xlnx-versal.c             | 2 +-
 hw/arm/z2.c                      | 2 +-
 49 files changed, 49 insertions(+), 52 deletions(-)
 rename include/hw/arm/{arm.h => boot.h} (98%)

diff --git a/include/hw/arm/allwinner-a10.h b/include/hw/arm/allwinner-a10.h
index XXXXXXX..XXXXXXX 100644
--- a/include/hw/arm/allwinner-a10.h
+++ b/include/hw/arm/allwinner-a10.h
@@ -XXX,XX +XXX,XX @@
 #include "qemu-common.h"
 #include "qemu/error-report.h"
 #include "hw/char/serial.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
 #include "hw/timer/allwinner-a10-pit.h"
 #include "hw/intc/allwinner-a10-pic.h"
 #include "hw/net/allwinner_emac.h"
diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h
index XXXXXXX..XXXXXXX 100644
--- a/include/hw/arm/aspeed_soc.h
+++ b/include/hw/arm/aspeed_soc.h
@@ -XXX,XX +XXX,XX @@
 #ifndef ASPEED_SOC_H
 #define ASPEED_SOC_H
 
-#include "hw/arm/arm.h"
 #include "hw/intc/aspeed_vic.h"
 #include "hw/misc/aspeed_scu.h"
 #include "hw/misc/aspeed_sdmc.h"
diff --git a/include/hw/arm/bcm2836.h b/include/hw/arm/bcm2836.h
index XXXXXXX..XXXXXXX 100644
--- a/include/hw/arm/bcm2836.h
+++ b/include/hw/arm/bcm2836.h
@@ -XXX,XX +XXX,XX @@
 #ifndef BCM2836_H
 #define BCM2836_H
 
-#include "hw/arm/arm.h"
 #include "hw/arm/bcm2835_peripherals.h"
 #include "hw/intc/bcm2836_control.h"
 
diff --git a/include/hw/arm/arm.h b/include/hw/arm/boot.h
similarity index 98%
rename from include/hw/arm/arm.h
rename to include/hw/arm/boot.h
index XXXXXXX..XXXXXXX 100644
--- a/include/hw/arm/arm.h
+++ b/include/hw/arm/boot.h
@@ -XXX,XX +XXX,XX @@
 /*
- * Misc ARM declarations
+ * ARM kernel loader.
  *
  * Copyright (c) 2006 CodeSourcery.
  * Written by Paul Brook
@@ -XXX,XX +XXX,XX @@
  *
  */
 
-#ifndef HW_ARM_H
-#define HW_ARM_H
+#ifndef HW_ARM_BOOT_H
+#define HW_ARM_BOOT_H
 
 #include "exec/memory.h"
 #include "target/arm/cpu-qom.h"
@@ -XXX,XX +XXX,XX @@ void arm_write_secure_board_setup_dummy_smc(ARMCPU *cpu,
                                             const struct arm_boot_info *info,
                                             hwaddr mvbar_addr);
 
-#endif /* HW_ARM_H */
+#endif /* HW_ARM_BOOT_H */
diff --git a/include/hw/arm/fsl-imx25.h b/include/hw/arm/fsl-imx25.h
index XXXXXXX..XXXXXXX 100644
--- a/include/hw/arm/fsl-imx25.h
+++ b/include/hw/arm/fsl-imx25.h
@@ -XXX,XX +XXX,XX @@
 #ifndef FSL_IMX25_H
 #define FSL_IMX25_H
 
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
 #include "hw/intc/imx_avic.h"
 #include "hw/misc/imx25_ccm.h"
 #include "hw/char/imx_serial.h"
diff --git a/include/hw/arm/fsl-imx31.h b/include/hw/arm/fsl-imx31.h
index XXXXXXX..XXXXXXX 100644
--- a/include/hw/arm/fsl-imx31.h
+++ b/include/hw/arm/fsl-imx31.h
@@ -XXX,XX +XXX,XX @@
 #ifndef FSL_IMX31_H
 #define FSL_IMX31_H
 
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
 #include "hw/intc/imx_avic.h"
 #include "hw/misc/imx31_ccm.h"
 #include "hw/char/imx_serial.h"
diff --git a/include/hw/arm/fsl-imx6.h b/include/hw/arm/fsl-imx6.h
index XXXXXXX..XXXXXXX 100644
--- a/include/hw/arm/fsl-imx6.h
+++ b/include/hw/arm/fsl-imx6.h
@@ -XXX,XX +XXX,XX @@
 #ifndef FSL_IMX6_H
 #define FSL_IMX6_H
 
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
 #include "hw/cpu/a9mpcore.h"
 #include "hw/misc/imx6_ccm.h"
 #include "hw/misc/imx6_src.h"
diff --git a/include/hw/arm/fsl-imx6ul.h b/include/hw/arm/fsl-imx6ul.h
index XXXXXXX..XXXXXXX 100644
--- a/include/hw/arm/fsl-imx6ul.h
+++ b/include/hw/arm/fsl-imx6ul.h
@@ -XXX,XX +XXX,XX @@
 #ifndef FSL_IMX6UL_H
 #define FSL_IMX6UL_H
 
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
 #include "hw/cpu/a15mpcore.h"
 #include "hw/misc/imx6ul_ccm.h"
 #include "hw/misc/imx6_src.h"
diff --git a/include/hw/arm/fsl-imx7.h b/include/hw/arm/fsl-imx7.h
index XXXXXXX..XXXXXXX 100644
--- a/include/hw/arm/fsl-imx7.h
+++ b/include/hw/arm/fsl-imx7.h
@@ -XXX,XX +XXX,XX @@
 #ifndef FSL_IMX7_H
 #define FSL_IMX7_H
 
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
 #include "hw/cpu/a15mpcore.h"
 #include "hw/intc/imx_gpcv2.h"
 #include "hw/misc/imx7_ccm.h"
diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
index XXXXXXX..XXXXXXX 100644
--- a/include/hw/arm/virt.h
+++ b/include/hw/arm/virt.h
@@ -XXX,XX +XXX,XX @@
 #include "exec/hwaddr.h"
 #include "qemu/notify.h"
 #include "hw/boards.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
 #include "hw/block/flash.h"
 #include "sysemu/kvm.h"
 #include "hw/intc/arm_gicv3_common.h"
diff --git a/include/hw/arm/xlnx-versal.h b/include/hw/arm/xlnx-versal.h
index XXXXXXX..XXXXXXX 100644
--- a/include/hw/arm/xlnx-versal.h
+++ b/include/hw/arm/xlnx-versal.h
@@ -XXX,XX +XXX,XX @@
 #define XLNX_VERSAL_H
 
 #include "hw/sysbus.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
 #include "hw/intc/arm_gicv3.h"
 
 #define TYPE_XLNX_VERSAL "xlnx-versal"
diff --git a/include/hw/arm/xlnx-zynqmp.h b/include/hw/arm/xlnx-zynqmp.h
index XXXXXXX..XXXXXXX 100644
--- a/include/hw/arm/xlnx-zynqmp.h
+++ b/include/hw/arm/xlnx-zynqmp.h
@@ -XXX,XX +XXX,XX @@
 #ifndef XLNX_ZYNQMP_H
 
 #include "qemu-common.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
 #include "hw/intc/arm_gic.h"
 #include "hw/net/cadence_gem.h"
 #include "hw/char/cadence_uart.h"
diff --git a/hw/arm/armsse.c b/hw/arm/armsse.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/arm/armsse.c
+++ b/hw/arm/armsse.c
@@ -XXX,XX +XXX,XX @@
 #include "hw/sysbus.h"
 #include "hw/registerfields.h"
 #include "hw/arm/armsse.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
 
 /* Format of the System Information block SYS_CONFIG register */
 typedef enum SysConfigFormat {
diff --git a/hw/arm/armv7m.c b/hw/arm/armv7m.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/arm/armv7m.c
+++ b/hw/arm/armv7m.c
@@ -XXX,XX +XXX,XX @@
 #include "qemu-common.h"
 #include "cpu.h"
 #include "hw/sysbus.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
 #include "hw/loader.h"
 #include "elf.h"
 #include "sysemu/qtest.h"
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -XXX,XX +XXX,XX @@
 #include "qemu-common.h"
 #include "cpu.h"
 #include "exec/address-spaces.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
 #include "hw/arm/aspeed.h"
 #include "hw/arm/aspeed_soc.h"
 #include "hw/boards.h"
diff --git a/hw/arm/boot.c b/hw/arm/boot.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/arm/boot.c
+++ b/hw/arm/boot.c
@@ -XXX,XX +XXX,XX @@
 #include "qapi/error.h"
 #include <libfdt.h>
 #include "hw/hw.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
 #include "hw/arm/linux-boot-if.h"
 #include "sysemu/kvm.h"
 #include "sysemu/sysemu.h"
diff --git a/hw/arm/collie.c b/hw/arm/collie.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/arm/collie.c
+++ b/hw/arm/collie.c
@@ -XXX,XX +XXX,XX @@
 #include "hw/sysbus.h"
 #include "hw/boards.h"
 #include "strongarm.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
 #include "hw/block/flash.h"
 #include "exec/address-spaces.h"
 #include "cpu.h"
diff --git a/hw/arm/exynos4210.c b/hw/arm/exynos4210.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/arm/exynos4210.c
+++ b/hw/arm/exynos4210.c
@@ -XXX,XX +XXX,XX @@
 #include "hw/boards.h"
 #include "sysemu/sysemu.h"
 #include "hw/sysbus.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
 #include "hw/loader.h"
 #include "hw/arm/exynos4210.h"
 #include "hw/sd/sdhci.h"
diff --git a/hw/arm/exynos4_boards.c b/hw/arm/exynos4_boards.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/arm/exynos4_boards.c
+++ b/hw/arm/exynos4_boards.c
@@ -XXX,XX +XXX,XX @@
 #include "sysemu/sysemu.h"
 #include "hw/sysbus.h"
 #include "net/net.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
 #include "exec/address-spaces.h"
 #include "hw/arm/exynos4210.h"
 #include "hw/net/lan9118.h"
diff --git a/hw/arm/highbank.c b/hw/arm/highbank.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/arm/highbank.c
+++ b/hw/arm/highbank.c
@@ -XXX,XX +XXX,XX @@
 #include "qemu/osdep.h"
 #include "qapi/error.h"
 #include "hw/sysbus.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
 #include "hw/loader.h"
 #include "net/net.h"
 #include "sysemu/kvm.h"
diff --git a/hw/arm/integratorcp.c b/hw/arm/integratorcp.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/arm/integratorcp.c
+++ b/hw/arm/integratorcp.c
@@ -XXX,XX +XXX,XX @@
 #include "cpu.h"
 #include "hw/sysbus.h"
 #include "hw/boards.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
 #include "hw/misc/arm_integrator_debug.h"
 #include "hw/net/smc91c111.h"
 #include "net/net.h"
diff --git a/hw/arm/mainstone.c b/hw/arm/mainstone.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/arm/mainstone.c
+++ b/hw/arm/mainstone.c
@@ -XXX,XX +XXX,XX @@
 #include "qapi/error.h"
 #include "hw/hw.h"
 #include "hw/arm/pxa.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
 #include "net/net.h"
 #include "hw/net/smc91c111.h"
 #include "hw/boards.h"
diff --git a/hw/arm/microbit.c b/hw/arm/microbit.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/arm/microbit.c
+++ b/hw/arm/microbit.c
@@ -XXX,XX +XXX,XX @@
 #include "qemu/osdep.h"
 #include "qapi/error.h"
 #include "hw/boards.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
 #include "sysemu/sysemu.h"
 #include "exec/address-spaces.h"
 
diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/arm/mps2-tz.c
+++ b/hw/arm/mps2-tz.c
@@ -XXX,XX +XXX,XX @@
 #include "qemu/osdep.h"
 #include "qapi/error.h"
 #include "qemu/error-report.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
 #include "hw/arm/armv7m.h"
 #include "hw/or-irq.h"
 #include "hw/boards.h"
diff --git a/hw/arm/mps2.c b/hw/arm/mps2.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/arm/mps2.c
+++ b/hw/arm/mps2.c
@@ -XXX,XX +XXX,XX @@
 #include "qemu/osdep.h"
 #include "qapi/error.h"
 #include "qemu/error-report.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
 #include "hw/arm/armv7m.h"
 #include "hw/or-irq.h"
 #include "hw/boards.h"
diff --git a/hw/arm/msf2-soc.c b/hw/arm/msf2-soc.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/arm/msf2-soc.c
+++ b/hw/arm/msf2-soc.c
@@ -XXX,XX +XXX,XX @@
 #include "qemu/units.h"
 #include "qapi/error.h"
 #include "qemu-common.h"
-#include "hw/arm/arm.h"
 #include "exec/address-spaces.h"
 #include "hw/char/serial.h"
 #include "hw/boards.h"
diff --git a/hw/arm/msf2-som.c b/hw/arm/msf2-som.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/arm/msf2-som.c
+++ b/hw/arm/msf2-som.c
@@ -XXX,XX +XXX,XX @@
 #include "qapi/error.h"
 #include "qemu/error-report.h"
 #include "hw/boards.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
 #include "exec/address-spaces.h"
 #include "hw/arm/msf2-soc.h"
 #include "cpu.h"
diff --git a/hw/arm/musca.c b/hw/arm/musca.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/arm/musca.c
+++ b/hw/arm/musca.c
@@ -XXX,XX +XXX,XX @@
 #include "qapi/error.h"
 #include "exec/address-spaces.h"
 #include "sysemu/sysemu.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
 #include "hw/arm/armsse.h"
 #include "hw/boards.h"
 #include "hw/char/pl011.h"
diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/arm/musicpal.c
+++ b/hw/arm/musicpal.c
@@ -XXX,XX +XXX,XX @@
 #include "qemu-common.h"
 #include "cpu.h"
 #include "hw/sysbus.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
 #include "net/net.h"
 #include "sysemu/sysemu.h"
 #include "hw/boards.h"
diff --git a/hw/arm/netduino2.c b/hw/arm/netduino2.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/arm/netduino2.c
+++ b/hw/arm/netduino2.c
@@ -XXX,XX +XXX,XX @@
 #include "hw/boards.h"
 #include "qemu/error-report.h"
 #include "hw/arm/stm32f205_soc.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
 
 static void netduino2_init(MachineState *machine)
 {
diff --git a/hw/arm/nrf51_soc.c b/hw/arm/nrf51_soc.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/arm/nrf51_soc.c
+++ b/hw/arm/nrf51_soc.c
@@ -XXX,XX +XXX,XX @@
 #include "qemu/osdep.h"
 #include "qapi/error.h"
 #include "qemu-common.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
 #include "hw/sysbus.h"
 #include "hw/boards.h"
 #include "hw/misc/unimp.h"
diff --git a/hw/arm/nseries.c b/hw/arm/nseries.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/arm/nseries.c
+++ b/hw/arm/nseries.c
@@ -XXX,XX +XXX,XX @@
 #include "qemu/bswap.h"
 #include "sysemu/sysemu.h"
 #include "hw/arm/omap.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
 #include "hw/irq.h"
 #include "ui/console.h"
 #include "hw/boards.h"
diff --git a/hw/arm/omap1.c b/hw/arm/omap1.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/arm/omap1.c
+++ b/hw/arm/omap1.c
@@ -XXX,XX +XXX,XX @@
 #include "cpu.h"
 #include "hw/boards.h"
 #include "hw/hw.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
 #include "hw/arm/omap.h"
 #include "sysemu/sysemu.h"
 #include "hw/arm/soc_dma.h"
diff --git a/hw/arm/omap2.c b/hw/arm/omap2.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/arm/omap2.c
+++ b/hw/arm/omap2.c
@@ -XXX,XX +XXX,XX @@
 #include "sysemu/qtest.h"
 #include "hw/boards.h"
 #include "hw/hw.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
 #include "hw/arm/omap.h"
 #include "sysemu/sysemu.h"
 #include "qemu/timer.h"
diff --git a/hw/arm/omap_sx1.c b/hw/arm/omap_sx1.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/arm/omap_sx1.c
+++ b/hw/arm/omap_sx1.c
@@ -XXX,XX +XXX,XX @@
 #include "ui/console.h"
 #include "hw/arm/omap.h"
 #include "hw/boards.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
 #include "hw/block/flash.h"
 #include "sysemu/qtest.h"
 #include "exec/address-spaces.h"
diff --git a/hw/arm/palm.c b/hw/arm/palm.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/arm/palm.c
+++ b/hw/arm/palm.c
@@ -XXX,XX +XXX,XX @@
 #include "ui/console.h"
 #include "hw/arm/omap.h"
 #include "hw/boards.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
 #include "hw/input/tsc2xxx.h"
 #include "hw/loader.h"
 #include "exec/address-spaces.h"
diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/arm/raspi.c
+++ b/hw/arm/raspi.c
@@ -XXX,XX +XXX,XX @@
 #include "qemu/error-report.h"
 #include "hw/boards.h"
 #include "hw/loader.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
 #include "sysemu/sysemu.h"
 
 #define SMPBOOT_ADDR    0x300 /* this should leave enough space for ATAGS */
diff --git a/hw/arm/realview.c b/hw/arm/realview.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/arm/realview.c
+++ b/hw/arm/realview.c
@@ -XXX,XX +XXX,XX @@
 #include "qemu-common.h"
 #include "cpu.h"
 #include "hw/sysbus.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
 #include "hw/arm/primecell.h"
 #include "hw/net/lan9118.h"
 #include "hw/net/smc91c111.h"
diff --git a/hw/arm/spitz.c b/hw/arm/spitz.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/arm/spitz.c
+++ b/hw/arm/spitz.c
@@ -XXX,XX +XXX,XX @@
 #include "qapi/error.h"
 #include "hw/hw.h"
 #include "hw/arm/pxa.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
 #include "sysemu/sysemu.h"
 #include "hw/pcmcia.h"
 #include "hw/i2c/i2c.h"
diff --git a/hw/arm/stellaris.c b/hw/arm/stellaris.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/arm/stellaris.c
+++ b/hw/arm/stellaris.c
@@ -XXX,XX +XXX,XX @@
 #include "qapi/error.h"
 #include "hw/sysbus.h"
 #include "hw/ssi/ssi.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
 #include "qemu/timer.h"
 #include "hw/i2c/i2c.h"
 #include "net/net.h"
diff --git a/hw/arm/stm32f205_soc.c b/hw/arm/stm32f205_soc.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/arm/stm32f205_soc.c
+++ b/hw/arm/stm32f205_soc.c
@@ -XXX,XX +XXX,XX @@
 #include "qemu/osdep.h"
 #include "qapi/error.h"
 #include "qemu-common.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
 #include "exec/address-spaces.h"
 #include "hw/arm/stm32f205_soc.h"
 
diff --git a/hw/arm/strongarm.c b/hw/arm/strongarm.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/arm/strongarm.c
+++ b/hw/arm/strongarm.c
@@ -XXX,XX +XXX,XX @@
 #include "hw/sysbus.h"
 #include "strongarm.h"
 #include "qemu/error-report.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
 #include "chardev/char-fe.h"
 #include "chardev/char-serial.h"
 #include "sysemu/sysemu.h"
diff --git a/hw/arm/tosa.c b/hw/arm/tosa.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/arm/tosa.c
+++ b/hw/arm/tosa.c
@@ -XXX,XX +XXX,XX @@
 #include "qapi/error.h"
 #include "hw/hw.h"
 #include "hw/arm/pxa.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
 #include "hw/arm/sharpsl.h"
 #include "hw/pcmcia.h"
 #include "hw/boards.h"
diff --git a/hw/arm/versatilepb.c b/hw/arm/versatilepb.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/arm/versatilepb.c
+++ b/hw/arm/versatilepb.c
@@ -XXX,XX +XXX,XX @@
 #include "qemu-common.h"
 #include "cpu.h"
 #include "hw/sysbus.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
 #include "hw/net/smc91c111.h"
 #include "net/net.h"
 #include "sysemu/sysemu.h"
diff --git a/hw/arm/vexpress.c b/hw/arm/vexpress.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/arm/vexpress.c
+++ b/hw/arm/vexpress.c
@@ -XXX,XX +XXX,XX @@
 #include "qemu-common.h"
 #include "cpu.h"
 #include "hw/sysbus.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
 #include "hw/arm/primecell.h"
 #include "hw/net/lan9118.h"
 #include "hw/i2c/i2c.h"
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -XXX,XX +XXX,XX @@
 #include "qemu/option.h"
 #include "qapi/error.h"
 #include "hw/sysbus.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
 #include "hw/arm/primecell.h"
 #include "hw/arm/virt.h"
 #include "hw/block/flash.h"
diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/arm/xilinx_zynq.c
+++ b/hw/arm/xilinx_zynq.c
@@ -XXX,XX +XXX,XX @@
 #include "qemu-common.h"
 #include "cpu.h"
 #include "hw/sysbus.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
 #include "net/net.h"
 #include "exec/address-spaces.h"
 #include "sysemu/sysemu.h"
diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/arm/xlnx-versal.c
+++ b/hw/arm/xlnx-versal.c
@@ -XXX,XX +XXX,XX @@
 #include "net/net.h"
 #include "sysemu/sysemu.h"
 #include "sysemu/kvm.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
 #include "kvm_arm.h"
 #include "hw/misc/unimp.h"
 #include "hw/intc/arm_gicv3_common.h"
diff --git a/hw/arm/z2.c b/hw/arm/z2.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/arm/z2.c
+++ b/hw/arm/z2.c
@@ -XXX,XX +XXX,XX @@
 #include "qemu/osdep.h"
 #include "hw/hw.h"
 #include "hw/arm/pxa.h"
-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"
 #include "hw/i2c/i2c.h"
 #include "hw/ssi/ssi.h"
 #include "hw/boards.h"
-- 
2.20.1

In ich_vmcr_write() we enforce "writes of BPR fields to less than
their minimum sets them to the minimum" by doing a "read vbpr and
write it back" operation.  A typo here meant that we weren't handling
writes to these fields correctly, because we were reading from VBPR0
but writing to VBPR1.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-id: 20190520162809.2677-4-peter.maydell@linaro.org
---
 hw/intc/arm_gicv3_cpuif.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

The ICC_CTLR_EL3 register includes some bits which are aliases
of bits in the ICC_CTLR_EL1(S) and (NS) registers. QEMU chooses
to keep those bits in the cs->icc_ctlr_el1[] struct fields.
Unfortunately a missing '~' in the code to update the bits
in those fields meant that writing to ICC_CTLR_EL3 would corrupt
the ICC_CLTR_EL1 register values.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-id: 20190520162809.2677-5-peter.maydell@linaro.org
---
 hw/intc/arm_gicv3_cpuif.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/hw/intc/arm_gicv3_cpuif.c b/hw/intc/arm_gicv3_cpuif.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/intc/arm_gicv3_cpuif.c
+++ b/hw/intc/arm_gicv3_cpuif.c
@@ -XXX,XX +XXX,XX @@ static void icc_ctlr_el3_write(CPUARMState *env, const ARMCPRegInfo *ri,
     trace_gicv3_icc_ctlr_el3_write(gicv3_redist_affid(cs), value);
 
     /* *_EL1NS and *_EL1S bits are aliases into the ICC_CTLR_EL1 bits. */
-    cs->icc_ctlr_el1[GICV3_NS] &= (ICC_CTLR_EL1_CBPR | ICC_CTLR_EL1_EOIMODE);
+    cs->icc_ctlr_el1[GICV3_NS] &= ~(ICC_CTLR_EL1_CBPR | ICC_CTLR_EL1_EOIMODE);
     if (value & ICC_CTLR_EL3_EOIMODE_EL1NS) {
         cs->icc_ctlr_el1[GICV3_NS] |= ICC_CTLR_EL1_EOIMODE;
     }
@@ -XXX,XX +XXX,XX @@ static void icc_ctlr_el3_write(CPUARMState *env, const ARMCPRegInfo *ri,
         cs->icc_ctlr_el1[GICV3_NS] |= ICC_CTLR_EL1_CBPR;
     }
 
-    cs->icc_ctlr_el1[GICV3_S] &= (ICC_CTLR_EL1_CBPR | ICC_CTLR_EL1_EOIMODE);
+    cs->icc_ctlr_el1[GICV3_S] &= ~(ICC_CTLR_EL1_CBPR | ICC_CTLR_EL1_EOIMODE);
     if (value & ICC_CTLR_EL3_EOIMODE_EL1S) {
         cs->icc_ctlr_el1[GICV3_S] |= ICC_CTLR_EL1_EOIMODE;
     }
-- 
2.20.1

From: Philippe Mathieu-Daudé <philmd@redhat.com>

Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20190520214342.13709-2-philmd@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 hw/arm/exynos4_boards.c | 24 ------------------------
 1 file changed, 24 deletions(-)

diff --git a/hw/arm/exynos4_boards.c b/hw/arm/exynos4_boards.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/arm/exynos4_boards.c
+++ b/hw/arm/exynos4_boards.c
@@ -XXX,XX +XXX,XX @@
 #include "hw/net/lan9118.h"
 #include "hw/boards.h"
 
-#undef DEBUG
-
-//#define DEBUG
-
-#ifdef DEBUG
-    #undef PRINT_DEBUG
-    #define  PRINT_DEBUG(fmt, args...) \
-        do { \
-            fprintf(stderr, "  [%s:%d]   "fmt, __func__, __LINE__, ##args); \
-        } while (0)
-#else
-    #define  PRINT_DEBUG(fmt, args...)  do {} while (0)
-#endif
-
 #define SMDK_LAN9118_BASE_ADDR      0x05000000
 
 typedef enum Exynos4BoardType {
@@ -XXX,XX +XXX,XX @@ exynos4_boards_init_common(MachineState *machine,
     exynos4_board_binfo.gic_cpu_if_addr =
             EXYNOS4210_SMP_PRIVATE_BASE_ADDR + 0x100;
 
-    PRINT_DEBUG("\n ram_size: %luMiB [0x%08lx]\n"
-            " kernel_filename: %s\n"
-            " kernel_cmdline: %s\n"
-            " initrd_filename: %s\n",
-            exynos4_board_ram_size[board_type] / 1048576,
-            exynos4_board_ram_size[board_type],
-            machine->kernel_filename,
-            machine->kernel_cmdline,
-            machine->initrd_filename);
-
     exynos4_boards_init_ram(s, get_system_memory(),
                             exynos4_board_ram_size[board_type]);
 
-- 
2.20.1

From: Philippe Mathieu-Daudé <philmd@redhat.com>

It eases code review, unit is explicit.

Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20190520214342.13709-3-philmd@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 hw/arm/exynos4_boards.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/hw/arm/exynos4_boards.c b/hw/arm/exynos4_boards.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/arm/exynos4_boards.c
+++ b/hw/arm/exynos4_boards.c
@@ -XXX,XX +XXX,XX @@
  */
 
 #include "qemu/osdep.h"
+#include "qemu/units.h"
 #include "qapi/error.h"
 #include "qemu/error-report.h"
 #include "qemu-common.h"
@@ -XXX,XX +XXX,XX @@ static int exynos4_board_smp_bootreg_addr[EXYNOS4_NUM_OF_BOARDS] = {
 };
 
 static unsigned long exynos4_board_ram_size[EXYNOS4_NUM_OF_BOARDS] = {
-    [EXYNOS4_BOARD_NURI]     = 0x40000000,
-    [EXYNOS4_BOARD_SMDKC210] = 0x40000000,
+    [EXYNOS4_BOARD_NURI]     = 1 * GiB,
+    [EXYNOS4_BOARD_SMDKC210] = 1 * GiB,
 };
 
 static struct arm_boot_info exynos4_board_binfo = {
-- 
2.20.1

From: Guenter Roeck <linux@roeck-us.net>

QEMU already supports pl330. Instantiate it for Exynos4210.

Relevant part of Linux arch/arm/boot/dts/exynos4.dtsi:

/ {
    soc: soc {
        amba {
            pdma0: pdma@12680000 {
                compatible = "arm,pl330", "arm,primecell";
                reg = <0x12680000 0x1000>;
                interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&clock CLK_PDMA0>;
                clock-names = "apb_pclk";
                #dma-cells = <1>;
                #dma-channels = <8>;
                #dma-requests = <32>;
            };
            pdma1: pdma@12690000 {
                compatible = "arm,pl330", "arm,primecell";
                reg = <0x12690000 0x1000>;
                interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&clock CLK_PDMA1>;
                clock-names = "apb_pclk";
                #dma-cells = <1>;
                #dma-channels = <8>;
                #dma-requests = <32>;
            };
            mdma1: mdma@12850000 {
                compatible = "arm,pl330", "arm,primecell";
                reg = <0x12850000 0x1000>;
                interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&clock CLK_MDMA>;
                clock-names = "apb_pclk";
                #dma-cells = <1>;
                #dma-channels = <8>;
                #dma-requests = <1>;
            };
        };
    };
};

Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-id: 20190520214342.13709-4-philmd@redhat.com
[PMD: Do not set default qdev properties, create the controllers in the SoC
      rather than the board (Peter Maydell), add dtsi in commit message]
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 hw/arm/exynos4210.c | 26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)

diff --git a/hw/arm/exynos4210.c b/hw/arm/exynos4210.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/arm/exynos4210.c
+++ b/hw/arm/exynos4210.c
@@ -XXX,XX +XXX,XX @@
 /* EHCI */
 #define EXYNOS4210_EHCI_BASE_ADDR           0x12580000
 
+/* DMA */
+#define EXYNOS4210_PL330_BASE0_ADDR         0x12680000
+#define EXYNOS4210_PL330_BASE1_ADDR         0x12690000
+#define EXYNOS4210_PL330_BASE2_ADDR         0x12850000
+
 static uint8_t chipid_and_omr[] = { 0x11, 0x02, 0x21, 0x43,
                                     0x09, 0x00, 0x00, 0x00 };
 
@@ -XXX,XX +XXX,XX @@ static uint64_t exynos4210_calc_affinity(int cpu)
     return (0x9 << ARM_AFF1_SHIFT) | cpu;
 }
 
+static void pl330_create(uint32_t base, qemu_irq irq, int nreq)
+{
+    SysBusDevice *busdev;
+    DeviceState *dev;
+
+    dev = qdev_create(NULL, "pl330");
+    qdev_prop_set_uint8(dev, "num_periph_req",  nreq);
+    qdev_init_nofail(dev);
+    busdev = SYS_BUS_DEVICE(dev);
+    sysbus_mmio_map(busdev, 0, base);
+    sysbus_connect_irq(busdev, 0, irq);
+}
+
 Exynos4210State *exynos4210_init(MemoryRegion *system_mem)
 {
     Exynos4210State *s = g_new0(Exynos4210State, 1);
@@ -XXX,XX +XXX,XX @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem)
     sysbus_create_simple(TYPE_EXYNOS4210_EHCI, EXYNOS4210_EHCI_BASE_ADDR,
             s->irq_table[exynos4210_get_irq(28, 3)]);
 
+    /*** DMA controllers ***/
+    pl330_create(EXYNOS4210_PL330_BASE0_ADDR,
+                 qemu_irq_invert(s->irq_table[exynos4210_get_irq(35, 1)]), 32);
+    pl330_create(EXYNOS4210_PL330_BASE1_ADDR,
+                 qemu_irq_invert(s->irq_table[exynos4210_get_irq(36, 1)]), 32);
+    pl330_create(EXYNOS4210_PL330_BASE2_ADDR,
+                 qemu_irq_invert(s->irq_table[exynos4210_get_irq(34, 1)]), 1);
+
     return s;
 }
-- 
2.20.1

From: Philippe Mathieu-Daudé <philmd@redhat.com>

Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20190520214342.13709-5-philmd@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 include/hw/arm/exynos4210.h |  9 +++++++--
 hw/arm/exynos4210.c         | 28 ++++++++++++++++++++++++----
 hw/arm/exynos4_boards.c     |  9 ++++++---
 3 files changed, 37 insertions(+), 9 deletions(-)

diff --git a/include/hw/arm/exynos4210.h b/include/hw/arm/exynos4210.h
index XXXXXXX..XXXXXXX 100644
--- a/include/hw/arm/exynos4210.h
+++ b/include/hw/arm/exynos4210.h
@@ -XXX,XX +XXX,XX @@ typedef struct Exynos4210Irq {
 } Exynos4210Irq;
 
 typedef struct Exynos4210State {
+    /*< private >*/
+    SysBusDevice parent_obj;
+    /*< public >*/
     ARMCPU *cpu[EXYNOS4210_NCPUS];
     Exynos4210Irq irqs;
     qemu_irq *irq_table;
@@ -XXX,XX +XXX,XX @@ typedef struct Exynos4210State {
     I2CBus *i2c_if[EXYNOS4210_I2C_NUMBER];
 } Exynos4210State;
 
+#define TYPE_EXYNOS4210_SOC "exynos4210"
+#define EXYNOS4210_SOC(obj) \
+    OBJECT_CHECK(Exynos4210State, obj, TYPE_EXYNOS4210_SOC)
+
 void exynos4210_write_secondary(ARMCPU *cpu,
         const struct arm_boot_info *info);
 
-Exynos4210State *exynos4210_init(MemoryRegion *system_mem);
-
 /* Initialize exynos4210 IRQ subsystem stub */
 qemu_irq *exynos4210_init_irq(Exynos4210Irq *env);
 
diff --git a/hw/arm/exynos4210.c b/hw/arm/exynos4210.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/arm/exynos4210.c
+++ b/hw/arm/exynos4210.c
@@ -XXX,XX +XXX,XX @@ static void pl330_create(uint32_t base, qemu_irq irq, int nreq)
     sysbus_connect_irq(busdev, 0, irq);
 }
 
-Exynos4210State *exynos4210_init(MemoryRegion *system_mem)
+static void exynos4210_realize(DeviceState *socdev, Error **errp)
 {
-    Exynos4210State *s = g_new0(Exynos4210State, 1);
+    Exynos4210State *s = EXYNOS4210_SOC(socdev);
+    MemoryRegion *system_mem = get_system_memory();
     qemu_irq gate_irq[EXYNOS4210_NCPUS][EXYNOS4210_IRQ_GATE_NINPUTS];
     SysBusDevice *busdev;
     DeviceState *dev;
@@ -XXX,XX +XXX,XX @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem)
                  qemu_irq_invert(s->irq_table[exynos4210_get_irq(36, 1)]), 32);
     pl330_create(EXYNOS4210_PL330_BASE2_ADDR,
                  qemu_irq_invert(s->irq_table[exynos4210_get_irq(34, 1)]), 1);
-
-    return s;
 }
+
+static void exynos4210_class_init(ObjectClass *klass, void *data)
+{
+    DeviceClass *dc = DEVICE_CLASS(klass);
+
+    dc->realize = exynos4210_realize;
+}
+
+static const TypeInfo exynos4210_info = {
+    .name = TYPE_EXYNOS4210_SOC,
+    .parent = TYPE_SYS_BUS_DEVICE,
+    .instance_size = sizeof(Exynos4210State),
+    .class_init = exynos4210_class_init,
+};
+
+static void exynos4210_register_types(void)
+{
+    type_register_static(&exynos4210_info);
+}
+
+type_init(exynos4210_register_types)
diff --git a/hw/arm/exynos4_boards.c b/hw/arm/exynos4_boards.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/arm/exynos4_boards.c
+++ b/hw/arm/exynos4_boards.c
@@ -XXX,XX +XXX,XX @@ typedef enum Exynos4BoardType {
 } Exynos4BoardType;
 
 typedef struct Exynos4BoardState {
-    Exynos4210State *soc;
+    Exynos4210State soc;
     MemoryRegion dram0_mem;
     MemoryRegion dram1_mem;
 } Exynos4BoardState;
@@ -XXX,XX +XXX,XX @@ exynos4_boards_init_common(MachineState *machine,
     exynos4_boards_init_ram(s, get_system_memory(),
                             exynos4_board_ram_size[board_type]);
 
-    s->soc = exynos4210_init(get_system_memory());
+    object_initialize(&s->soc, sizeof(s->soc), TYPE_EXYNOS4210_SOC);
+    qdev_set_parent_bus(DEVICE(&s->soc), sysbus_get_default());
+    object_property_set_bool(OBJECT(&s->soc), true, "realized",
+                             &error_fatal);
 
     return s;
 }
@@ -XXX,XX +XXX,XX @@ static void smdkc210_init(MachineState *machine)
                                                       EXYNOS4_BOARD_SMDKC210);
 
     lan9215_init(SMDK_LAN9118_BASE_ADDR,
-            qemu_irq_invert(s->soc->irq_table[exynos4210_get_irq(37, 1)]));
+            qemu_irq_invert(s->soc.irq_table[exynos4210_get_irq(37, 1)]));
     arm_load_kernel(ARM_CPU(first_cpu), &exynos4_board_binfo);
 }
 
-- 
2.20.1

Last lot of target-arm changes to squeeze in before rc1:
 * various minor Arm bug fixes
 * David Carlier's Haiku build portability fixes
 * Wentong Wu's fixes for icount handling in the nios2 target

The following changes since commit 00ce6c36b35e0eb8cc5d68a28f288a6335848813:

Merge remote-tracking branch 'remotes/huth-gitlab/tags/pull-request-2020-07-13' into staging (2020-07-13 13:01:30 +0100)

are available in the Git repository at:

https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20200713

for you to fetch changes up to 756f739b1682bf131994ec96dad7fbdf8b54493a:

hw/arm/aspeed: Do not create and attach empty SD cards by default (2020-07-13 14:36:12 +0100)

----------------------------------------------------------------
target-arm queue:
 * hw/arm/bcm2836: Remove unused 'cpu_type' field
 * target/arm: Fix mtedesc for do_mem_zpz
 * Add the ability to change the FEC PHY MDIO device number on i.MX25/i.MX6/i.MX7
 * target/arm: Don't do raw writes for PMINTENCLR
 * virtio-iommu: Fix coverity issue in virtio_iommu_handle_command()
 * build: Fix various issues with building on Haiku
 * target/nios2: fix wrctl behaviour when using icount
 * hw/arm/tosa: Encapsulate misc GPIO handling in a device
 * hw/arm/palm.c: Encapsulate misc GPIO handling in a device
 * hw/arm/aspeed: Do not create and attach empty SD cards by default

----------------------------------------------------------------
Aaron Lindsay (1):
      target/arm: Don't do raw writes for PMINTENCLR

David CARLIER (8):
      build: Enable BSD symbols for Haiku
      util/qemu-openpty.c: Don't assume pty.h is glibc-only
      build: Check that mlockall() exists
      osdep.h: Always include <sys/signal.h> if it exists
      osdep.h: For Haiku, define SIGIO as equivalent to SIGPOLL
      bswap.h: Include <endian.h> on Haiku for bswap operations
      util/compatfd.c: Only include <sys/syscall.h> if CONFIG_SIGNALFD
      util/oslib-posix.c: Implement qemu_init_exec_dir() for Haiku

Eric Auger (1):
      virtio-iommu: Fix coverity issue in virtio_iommu_handle_command()

Gerd Hoffmann (1):
      util/drm: make portable by avoiding struct dirent d_type

Jean-Christophe Dubois (3):
      Add the ability to change the FEC PHY MDIO device number on i.MX25 processor
      Add the ability to change the FEC PHY MDIO device number on i.MX6 processor
      Add the ability to change the FEC PHY MDIO devices numbers on i.MX7 processor

Peter Maydell (4):
      hw/arm/tosa.c: Detabify
      hw/arm/tosa: Encapsulate misc GPIO handling in a device
      hw/arm/palm.c: Detabify
      hw/arm/palm.c: Encapsulate misc GPIO handling in a device

Philippe Mathieu-Daudé (2):
      hw/arm/bcm2836: Remove unused 'cpu_type' field
      hw/arm/aspeed: Do not create and attach empty SD cards by default

Richard Henderson (1):
      target/arm: Fix mtedesc for do_mem_zpz

Wentong Wu (4):
      target/nios2: add DISAS_NORETURN case for nothing more to generate
      target/nios2: in line the semantics of DISAS_UPDATE with other targets
      target/nios2: Use gen_io_start around wrctl instruction
      hw/nios2: exit to main CPU loop only when unmasking interrupts

From: Richard Henderson <richard.henderson@linaro.org>

The mtedesc that was constructed was not actually passed in.
Found by Coverity (CID 1429996).

Fixes: d28d12f008e
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20200706202345.193676-1-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 target/arm/translate-sve.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/arm/translate-sve.c b/target/arm/translate-sve.c
index XXXXXXX..XXXXXXX 100644
--- a/target/arm/translate-sve.c
+++ b/target/arm/translate-sve.c
@@ -XXX,XX +XXX,XX @@ static void do_mem_zpz(DisasContext *s, int zt, int pg, int zm,
         desc = FIELD_DP32(desc, MTEDESC, ESIZE, 1 << msz);
         desc <<= SVE_MTEDESC_SHIFT;
     }
-    desc = simd_desc(vsz, vsz, scale);
+    desc = simd_desc(vsz, vsz, desc | scale);
     t_desc = tcg_const_i32(desc);
 
     tcg_gen_addi_ptr(t_pg, cpu_env, pred_full_reg_offset(s, pg));
-- 
2.20.1

From: Jean-Christophe Dubois <jcd@tribudubois.net>

Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net>
Message-id: 9f8923ecd974160ae8f634c275b1100c2cbe66d7.1593806826.git.jcd@tribudubois.net
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
[PMM: updated for object_property_set_uint() argument reordering]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 include/hw/arm/fsl-imx25.h | 1 +
 hw/arm/fsl-imx25.c         | 7 +++++++
 2 files changed, 8 insertions(+)

diff --git a/include/hw/arm/fsl-imx25.h b/include/hw/arm/fsl-imx25.h
index XXXXXXX..XXXXXXX 100644
--- a/include/hw/arm/fsl-imx25.h
+++ b/include/hw/arm/fsl-imx25.h
@@ -XXX,XX +XXX,XX @@ typedef struct FslIMX25State {
     MemoryRegion   rom[2];
     MemoryRegion   iram;
     MemoryRegion   iram_alias;
+    uint32_t       phy_num;
 } FslIMX25State;
 
 /**
diff --git a/hw/arm/fsl-imx25.c b/hw/arm/fsl-imx25.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/arm/fsl-imx25.c
+++ b/hw/arm/fsl-imx25.c
@@ -XXX,XX +XXX,XX @@ static void fsl_imx25_realize(DeviceState *dev, Error **errp)
                                             epit_table[i].irq));
     }
 
+    object_property_set_uint(OBJECT(&s->fec), "phy-num", s->phy_num, &err);
     qdev_set_nic_properties(DEVICE(&s->fec), &nd_table[0]);
 
     if (!sysbus_realize(SYS_BUS_DEVICE(&s->fec), errp)) {
@@ -XXX,XX +XXX,XX @@ static void fsl_imx25_realize(DeviceState *dev, Error **errp)
                                 &s->iram_alias);
 }
 
+static Property fsl_imx25_properties[] = {
+    DEFINE_PROP_UINT32("fec-phy-num", FslIMX25State, phy_num, 0),
+    DEFINE_PROP_END_OF_LIST(),
+};
+
 static void fsl_imx25_class_init(ObjectClass *oc, void *data)
 {
     DeviceClass *dc = DEVICE_CLASS(oc);
 
+    device_class_set_props(dc, fsl_imx25_properties);
     dc->realize = fsl_imx25_realize;
     dc->desc = "i.MX25 SOC";
     /*
-- 
2.20.1

From: Jean-Christophe Dubois <jcd@tribudubois.net>

Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net>
Message-id: 05a64e83eb1c0c865ac077b22c599425c024c02c.1593806826.git.jcd@tribudubois.net
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
[PMM: updated for object_property_set_uint() argument reordering]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 include/hw/arm/fsl-imx6.h | 1 +
 hw/arm/fsl-imx6.c         | 7 +++++++
 2 files changed, 8 insertions(+)

diff --git a/include/hw/arm/fsl-imx6.h b/include/hw/arm/fsl-imx6.h
index XXXXXXX..XXXXXXX 100644
--- a/include/hw/arm/fsl-imx6.h
+++ b/include/hw/arm/fsl-imx6.h
@@ -XXX,XX +XXX,XX @@ typedef struct FslIMX6State {
     MemoryRegion   caam;
     MemoryRegion   ocram;
     MemoryRegion   ocram_alias;
+    uint32_t       phy_num;
 } FslIMX6State;
 
 
diff --git a/hw/arm/fsl-imx6.c b/hw/arm/fsl-imx6.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/arm/fsl-imx6.c
+++ b/hw/arm/fsl-imx6.c
@@ -XXX,XX +XXX,XX @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp)
                                             spi_table[i].irq));
     }
 
+    object_property_set_uint(OBJECT(&s->eth), "phy-num", s->phy_num, &err);
     qdev_set_nic_properties(DEVICE(&s->eth), &nd_table[0]);
     if (!sysbus_realize(SYS_BUS_DEVICE(&s->eth), errp)) {
         return;
@@ -XXX,XX +XXX,XX @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp)
                                 &s->ocram_alias);
 }
 
+static Property fsl_imx6_properties[] = {
+    DEFINE_PROP_UINT32("fec-phy-num", FslIMX6State, phy_num, 0),
+    DEFINE_PROP_END_OF_LIST(),
+};
+
 static void fsl_imx6_class_init(ObjectClass *oc, void *data)
 {
     DeviceClass *dc = DEVICE_CLASS(oc);
 
+    device_class_set_props(dc, fsl_imx6_properties);
     dc->realize = fsl_imx6_realize;
     dc->desc = "i.MX6 SOC";
     /* Reason: Uses serial_hd() in the realize() function */
-- 
2.20.1

From: Jean-Christophe Dubois <jcd@tribudubois.net>

Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net>
Message-id: c850187322be9930e47c8b234c385a7d0da245cb.1593806826.git.jcd@tribudubois.net
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
[PMM: updated for object_property_set_uint() argument reordering]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 include/hw/arm/fsl-imx7.h | 1 +
 hw/arm/fsl-imx7.c         | 9 +++++++++
 2 files changed, 10 insertions(+)

diff --git a/include/hw/arm/fsl-imx7.h b/include/hw/arm/fsl-imx7.h
index XXXXXXX..XXXXXXX 100644
--- a/include/hw/arm/fsl-imx7.h
+++ b/include/hw/arm/fsl-imx7.h
@@ -XXX,XX +XXX,XX @@ typedef struct FslIMX7State {
     IMX7GPRState       gpr;
     ChipideaState      usb[FSL_IMX7_NUM_USBS];
     DesignwarePCIEHost pcie;
+    uint32_t           phy_num[FSL_IMX7_NUM_ETHS];
 } FslIMX7State;
 
 enum FslIMX7MemoryMap {
diff --git a/hw/arm/fsl-imx7.c b/hw/arm/fsl-imx7.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/arm/fsl-imx7.c
+++ b/hw/arm/fsl-imx7.c
@@ -XXX,XX +XXX,XX @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp)
             FSL_IMX7_ENET2_ADDR,
         };
 
+        object_property_set_uint(OBJECT(&s->eth[i]), "phy-num",
+                                 s->phy_num[i], &error_abort);
         object_property_set_uint(OBJECT(&s->eth[i]), "tx-ring-num",
                                  FSL_IMX7_ETH_NUM_TX_RINGS, &error_abort);
         qdev_set_nic_properties(DEVICE(&s->eth[i]), &nd_table[i]);
@@ -XXX,XX +XXX,XX @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp)
                                 FSL_IMX7_PCIE_PHY_SIZE);
 }
 
+static Property fsl_imx7_properties[] = {
+    DEFINE_PROP_UINT32("fec1-phy-num", FslIMX7State, phy_num[0], 0),
+    DEFINE_PROP_UINT32("fec2-phy-num", FslIMX7State, phy_num[1], 1),
+    DEFINE_PROP_END_OF_LIST(),
+};
+
 static void fsl_imx7_class_init(ObjectClass *oc, void *data)
 {
     DeviceClass *dc = DEVICE_CLASS(oc);
 
+    device_class_set_props(dc, fsl_imx7_properties);
     dc->realize = fsl_imx7_realize;
 
     /* Reason: Uses serial_hds and nd_table in realize() directly */
-- 
2.20.1

From: Aaron Lindsay <aaron@os.amperecomputing.com>

Raw writes to this register when in KVM mode can cause interrupts to be
raised (even when the PMU is disabled). Because the underlying state is
already aliased to PMINTENSET (which already provides raw write
functions), we can safely disable raw accesses to PMINTENCLR entirely.

Signed-off-by: Aaron Lindsay <aaron@os.amperecomputing.com>
Message-id: 20200707152616.1917154-1-aaron@os.amperecomputing.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 target/arm/helper.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/target/arm/helper.c b/target/arm/helper.c
index XXXXXXX..XXXXXXX 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -XXX,XX +XXX,XX @@ static const ARMCPRegInfo v7_cp_reginfo[] = {
       .resetvalue = 0x0 },
     { .name = "PMINTENCLR", .cp = 15, .crn = 9, .crm = 14, .opc1 = 0, .opc2 = 2,
       .access = PL1_RW, .accessfn = access_tpm,
-      .type = ARM_CP_ALIAS | ARM_CP_IO,
+      .type = ARM_CP_ALIAS | ARM_CP_IO | ARM_CP_NO_RAW,
       .fieldoffset = offsetof(CPUARMState, cp15.c9_pminten),
       .writefn = pmintenclr_write, },
     { .name = "PMINTENCLR_EL1", .state = ARM_CP_STATE_AA64,
       .opc0 = 3, .opc1 = 0, .crn = 9, .crm = 14, .opc2 = 2,
       .access = PL1_RW, .accessfn = access_tpm,
-      .type = ARM_CP_ALIAS | ARM_CP_IO,
+      .type = ARM_CP_ALIAS | ARM_CP_IO | ARM_CP_NO_RAW,
       .fieldoffset = offsetof(CPUARMState, cp15.c9_pminten),
       .writefn = pmintenclr_write },
     { .name = "CCSIDR", .state = ARM_CP_STATE_BOTH,
-- 
2.20.1

From: Eric Auger <eric.auger@redhat.com>

Coverity points out (CID 1430180) that the new case is missing
break or a /* fallthrough */ comment. Break is the right thing to
do as in that case, tail is not used.

Fixes 1733eebb9e ("virtio-iommu: Implement RESV_MEM probe request")
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Reported-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20200708160147.18426-1-eric.auger@redhat.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 hw/virtio/virtio-iommu.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/hw/virtio/virtio-iommu.c b/hw/virtio/virtio-iommu.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/virtio/virtio-iommu.c
+++ b/hw/virtio/virtio-iommu.c
@@ -XXX,XX +XXX,XX @@ static void virtio_iommu_handle_command(VirtIODevice *vdev, VirtQueue *vq)
             ptail = (struct virtio_iommu_req_tail *)
                         (buf + s->config.probe_size);
             ptail->status = virtio_iommu_handle_probe(s, iov, iov_cnt, buf);
+            break;
         }
         default:
             tail.status = VIRTIO_IOMMU_S_UNSUPP;
-- 
2.20.1