1 | Two last-minute regression fixes that I thought we might as well | 1 | The following changes since commit e3debd5e7d0ce031356024878a0a18b9d109354a: |
---|---|---|---|
2 | squeeze in before rc1. | ||
3 | 2 | ||
4 | thanks | 3 | Merge tag 'pull-request-2023-03-24' of https://gitlab.com/thuth/qemu into staging (2023-03-24 16:08:46 +0000) |
5 | -- PMM | ||
6 | |||
7 | The following changes since commit d37bfe142382fa8258531c47b4519387c77cd169: | ||
8 | |||
9 | Merge remote-tracking branch 'remotes/palmer/tags/riscv-for-master-4.0-rc1-v2' into staging (2019-03-26 10:27:20 +0000) | ||
10 | 4 | ||
11 | are available in the Git repository at: | 5 | are available in the Git repository at: |
12 | 6 | ||
13 | https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20190326 | 7 | https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20230328 |
14 | 8 | ||
15 | for you to fetch changes up to c99ef792dc9ec6d8a5061428faf396ea9ceb8f57: | 9 | for you to fetch changes up to 46e3b237c52e0c48bfd81bce020b51fbe300b23a: |
16 | 10 | ||
17 | gdbstub: fix vCont packet handling when no thread is specified (2019-03-26 12:53:26 +0000) | 11 | target/arm/gdbstub: Only advertise M-profile features if TCG available (2023-03-28 10:53:40 +0100) |
18 | 12 | ||
19 | ---------------------------------------------------------------- | 13 | ---------------------------------------------------------------- |
20 | target-arm queue: | 14 | target-arm queue: |
21 | * Set SIMDMISC and FPMISC for 32-bit -cpu max | 15 | * fix part of the "TCG-disabled builds are broken" issue |
22 | (fixes regression from 3.1) | ||
23 | * fix vCont packet handling when no thread is specified | ||
24 | 16 | ||
25 | ---------------------------------------------------------------- | 17 | ---------------------------------------------------------------- |
26 | Luc Michel (1): | 18 | Philippe Mathieu-Daudé (1): |
27 | gdbstub: fix vCont packet handling when no thread is specified | 19 | target/arm/gdbstub: Only advertise M-profile features if TCG available |
28 | 20 | ||
29 | Richard Henderson (1): | 21 | target/arm/gdbstub.c | 5 +++-- |
30 | target/arm: Set SIMDMISC and FPMISC for 32-bit -cpu max | 22 | 1 file changed, 3 insertions(+), 2 deletions(-) |
31 | 23 | ||
32 | gdbstub.c | 14 ++++++++++++-- | ||
33 | target/arm/cpu.c | 5 +++++ | ||
34 | 2 files changed, 17 insertions(+), 2 deletions(-) | ||
35 | diff view generated by jsdifflib |
Deleted patch | |||
---|---|---|---|
1 | From: Richard Henderson <richard.henderson@linaro.org> | ||
2 | 1 | ||
3 | Fixes: https://bugs.launchpad.net/bugs/1821430 | ||
4 | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> | ||
5 | Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> | ||
6 | Reviewed-by: Alex Bennée <alex.bennee@linaro.org> | ||
7 | Message-id: 20190325161338.6536-1-richard.henderson@linaro.org | ||
8 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | ||
9 | --- | ||
10 | target/arm/cpu.c | 5 +++++ | ||
11 | 1 file changed, 5 insertions(+) | ||
12 | |||
13 | diff --git a/target/arm/cpu.c b/target/arm/cpu.c | ||
14 | index XXXXXXX..XXXXXXX 100644 | ||
15 | --- a/target/arm/cpu.c | ||
16 | +++ b/target/arm/cpu.c | ||
17 | @@ -XXX,XX +XXX,XX @@ static void arm_max_initfn(Object *obj) | ||
18 | t = FIELD_DP32(t, ID_ISAR6, SPECRES, 1); | ||
19 | cpu->isar.id_isar6 = t; | ||
20 | |||
21 | + t = cpu->isar.mvfr2; | ||
22 | + t = FIELD_DP32(t, MVFR2, SIMDMISC, 3); /* SIMD MaxNum */ | ||
23 | + t = FIELD_DP32(t, MVFR2, FPMISC, 4); /* FP MaxNum */ | ||
24 | + cpu->isar.mvfr2 = t; | ||
25 | + | ||
26 | t = cpu->id_mmfr4; | ||
27 | t = FIELD_DP32(t, ID_MMFR4, HPDS, 1); /* AA32HPD */ | ||
28 | cpu->id_mmfr4 = t; | ||
29 | -- | ||
30 | 2.20.1 | ||
31 | |||
32 | diff view generated by jsdifflib |
1 | From: Luc Michel <luc.michel@greensocs.com> | 1 | From: Philippe Mathieu-Daudé <philmd@linaro.org> |
---|---|---|---|
2 | 2 | ||
3 | The vCont packet accepts a series of actions, each being applied on a | 3 | Cortex-M profile is only emulable from TCG accelerator. Restrict |
4 | given thread ID. Giving no thread ID for an action is valid and means | 4 | the GDBstub features to its availability in order to avoid a link |
5 | "all threads". | 5 | error when TCG is not enabled: |
6 | 6 | ||
7 | This commit fixes vCont packets being incorrectly rejected when no | 7 | Undefined symbols for architecture arm64: |
8 | thread ID was given for an action. | 8 | "_arm_v7m_get_sp_ptr", referenced from: |
9 | _m_sysreg_get in target_arm_gdbstub.c.o | ||
10 | "_arm_v7m_mrs_control", referenced from: | ||
11 | _arm_gdb_get_m_systemreg in target_arm_gdbstub.c.o | ||
12 | ld: symbol(s) not found for architecture arm64 | ||
13 | clang: error: linker command failed with exit code 1 (use -v to see invocation) | ||
9 | 14 | ||
10 | In multiprocess mode, the GDB Remote Protocol specification is unclear | 15 | Fixes: 7d8b28b8b5 ("target/arm: Implement gdbstub m-profile systemreg and secext") |
11 | on what "all threads" means. We choose to apply the action on all | 16 | Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> |
12 | threads of all attached processes. | ||
13 | |||
14 | This commit is based on the initial fix by Lucien Murray-Pitts. | ||
15 | |||
16 | Fixes: e40e5204af8388 | ||
17 | Reported-by: Lucien Murray-Pitts <lucienmp_antispam@yahoo.com> | ||
18 | Reported-by: Jan Kiszka <jan.kiszka@siemens.com> | ||
19 | Signed-off-by: Luc Michel <luc.michel@greensocs.com> | ||
20 | Reviewed-by: Richard Henderson <richard.henderson@linaro.org> | 17 | Reviewed-by: Richard Henderson <richard.henderson@linaro.org> |
21 | Message-id: 20190325110452.6756-1-luc.michel@greensocs.com | 18 | Reviewed-by: Alex Bennée <alex.bennee@linaro.org> |
19 | Message-id: 20230322142902.69511-3-philmd@linaro.org | ||
20 | [PMM: add #include since I cherry-picked this patch from the series] | ||
22 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | 21 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
23 | --- | 22 | --- |
24 | gdbstub.c | 14 ++++++++++++-- | 23 | target/arm/gdbstub.c | 5 +++-- |
25 | 1 file changed, 12 insertions(+), 2 deletions(-) | 24 | 1 file changed, 3 insertions(+), 2 deletions(-) |
26 | 25 | ||
27 | diff --git a/gdbstub.c b/gdbstub.c | 26 | diff --git a/target/arm/gdbstub.c b/target/arm/gdbstub.c |
28 | index XXXXXXX..XXXXXXX 100644 | 27 | index XXXXXXX..XXXXXXX 100644 |
29 | --- a/gdbstub.c | 28 | --- a/target/arm/gdbstub.c |
30 | +++ b/gdbstub.c | 29 | +++ b/target/arm/gdbstub.c |
31 | @@ -XXX,XX +XXX,XX @@ static int gdb_handle_vcont(GDBState *s, const char *p) | 30 | @@ -XXX,XX +XXX,XX @@ |
32 | uint32_t pid, tid; | 31 | #include "cpu.h" |
33 | GDBProcess *process; | 32 | #include "exec/gdbstub.h" |
34 | CPUState *cpu; | 33 | #include "gdbstub/helpers.h" |
35 | + GDBThreadIdKind kind; | 34 | +#include "sysemu/tcg.h" |
36 | #ifdef CONFIG_USER_ONLY | 35 | #include "internals.h" |
37 | int max_cpus = 1; /* global variable max_cpus exists only in system mode */ | 36 | #include "cpregs.h" |
38 | 37 | ||
39 | @@ -XXX,XX +XXX,XX @@ static int gdb_handle_vcont(GDBState *s, const char *p) | 38 | @@ -XXX,XX +XXX,XX @@ void arm_cpu_register_gdb_regs_for_features(ARMCPU *cpu) |
40 | goto out; | 39 | 2, "arm-vfp-sysregs.xml", 0); |
41 | } | 40 | } |
42 | 41 | } | |
43 | - if (*p++ != ':') { | 42 | - if (cpu_isar_feature(aa32_mve, cpu)) { |
44 | + if (*p == '\0' || *p == ';') { | 43 | + if (cpu_isar_feature(aa32_mve, cpu) && tcg_enabled()) { |
45 | + /* | 44 | gdb_register_coprocessor(cs, mve_gdb_get_reg, mve_gdb_set_reg, |
46 | + * No thread specifier, action is on "all threads". The | 45 | 1, "arm-m-profile-mve.xml", 0); |
47 | + * specification is unclear regarding the process to act on. We | 46 | } |
48 | + * choose all processes. | 47 | @@ -XXX,XX +XXX,XX @@ void arm_cpu_register_gdb_regs_for_features(ARMCPU *cpu) |
49 | + */ | 48 | arm_gen_dynamic_sysreg_xml(cs, cs->gdb_num_regs), |
50 | + kind = GDB_ALL_PROCESSES; | 49 | "system-registers.xml", 0); |
51 | + } else if (*p++ == ':') { | 50 | |
52 | + kind = read_thread_id(p, &p, &pid, &tid); | 51 | - if (arm_feature(env, ARM_FEATURE_M)) { |
53 | + } else { | 52 | + if (arm_feature(env, ARM_FEATURE_M) && tcg_enabled()) { |
54 | res = -ENOTSUP; | 53 | gdb_register_coprocessor(cs, |
55 | goto out; | 54 | arm_gdb_get_m_systemreg, arm_gdb_set_m_systemreg, |
56 | } | 55 | arm_gen_dynamic_m_systemreg_xml(cs, cs->gdb_num_regs), |
57 | |||
58 | - switch (read_thread_id(p, &p, &pid, &tid)) { | ||
59 | + switch (kind) { | ||
60 | case GDB_READ_THREAD_ERR: | ||
61 | res = -EINVAL; | ||
62 | goto out; | ||
63 | -- | 56 | -- |
64 | 2.20.1 | 57 | 2.34.1 |
65 | 58 | ||
66 | 59 | diff view generated by jsdifflib |