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Two last-minute regression fixes that I thought we might as well
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The following changes since commit e3debd5e7d0ce031356024878a0a18b9d109354a:
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squeeze in before rc1.
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thanks
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Merge tag 'pull-request-2023-03-24' of https://gitlab.com/thuth/qemu into staging (2023-03-24 16:08:46 +0000)
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-- PMM
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The following changes since commit d37bfe142382fa8258531c47b4519387c77cd169:
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Merge remote-tracking branch 'remotes/palmer/tags/riscv-for-master-4.0-rc1-v2' into staging (2019-03-26 10:27:20 +0000)
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are available in the Git repository at:
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are available in the Git repository at:
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https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20190326
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https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20230328
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for you to fetch changes up to c99ef792dc9ec6d8a5061428faf396ea9ceb8f57:
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for you to fetch changes up to 46e3b237c52e0c48bfd81bce020b51fbe300b23a:
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gdbstub: fix vCont packet handling when no thread is specified (2019-03-26 12:53:26 +0000)
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target/arm/gdbstub: Only advertise M-profile features if TCG available (2023-03-28 10:53:40 +0100)
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----------------------------------------------------------------
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----------------------------------------------------------------
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target-arm queue:
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target-arm queue:
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* Set SIMDMISC and FPMISC for 32-bit -cpu max
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* fix part of the "TCG-disabled builds are broken" issue
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(fixes regression from 3.1)
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* fix vCont packet handling when no thread is specified
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----------------------------------------------------------------
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----------------------------------------------------------------
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Luc Michel (1):
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Philippe Mathieu-Daudé (1):
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gdbstub: fix vCont packet handling when no thread is specified
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target/arm/gdbstub: Only advertise M-profile features if TCG available
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Richard Henderson (1):
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target/arm/gdbstub.c | 5 +++--
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target/arm: Set SIMDMISC and FPMISC for 32-bit -cpu max
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1 file changed, 3 insertions(+), 2 deletions(-)
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gdbstub.c | 14 ++++++++++++--
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target/arm/cpu.c | 5 +++++
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2 files changed, 17 insertions(+), 2 deletions(-)
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diff view generated by jsdifflib
Deleted patch
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From: Richard Henderson <richard.henderson@linaro.org>
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Fixes: https://bugs.launchpad.net/bugs/1821430
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Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
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Message-id: 20190325161338.6536-1-richard.henderson@linaro.org
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Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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---
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target/arm/cpu.c | 5 +++++
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1 file changed, 5 insertions(+)
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diff --git a/target/arm/cpu.c b/target/arm/cpu.c
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index XXXXXXX..XXXXXXX 100644
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--- a/target/arm/cpu.c
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+++ b/target/arm/cpu.c
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@@ -XXX,XX +XXX,XX @@ static void arm_max_initfn(Object *obj)
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t = FIELD_DP32(t, ID_ISAR6, SPECRES, 1);
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cpu->isar.id_isar6 = t;
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+ t = cpu->isar.mvfr2;
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+ t = FIELD_DP32(t, MVFR2, SIMDMISC, 3); /* SIMD MaxNum */
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+ t = FIELD_DP32(t, MVFR2, FPMISC, 4); /* FP MaxNum */
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+ cpu->isar.mvfr2 = t;
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+
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t = cpu->id_mmfr4;
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t = FIELD_DP32(t, ID_MMFR4, HPDS, 1); /* AA32HPD */
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cpu->id_mmfr4 = t;
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--
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2.20.1
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diff view generated by jsdifflib
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From: Luc Michel <luc.michel@greensocs.com>
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From: Philippe Mathieu-Daudé <philmd@linaro.org>
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The vCont packet accepts a series of actions, each being applied on a
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Cortex-M profile is only emulable from TCG accelerator. Restrict
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given thread ID. Giving no thread ID for an action is valid and means
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the GDBstub features to its availability in order to avoid a link
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"all threads".
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error when TCG is not enabled:
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This commit fixes vCont packets being incorrectly rejected when no
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Undefined symbols for architecture arm64:
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thread ID was given for an action.
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"_arm_v7m_get_sp_ptr", referenced from:
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_m_sysreg_get in target_arm_gdbstub.c.o
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"_arm_v7m_mrs_control", referenced from:
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_arm_gdb_get_m_systemreg in target_arm_gdbstub.c.o
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ld: symbol(s) not found for architecture arm64
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clang: error: linker command failed with exit code 1 (use -v to see invocation)
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In multiprocess mode, the GDB Remote Protocol specification is unclear
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Fixes: 7d8b28b8b5 ("target/arm: Implement gdbstub m-profile systemreg and secext")
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on what "all threads" means. We choose to apply the action on all
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Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
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threads of all attached processes.
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This commit is based on the initial fix by Lucien Murray-Pitts.
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Fixes: e40e5204af8388
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Reported-by: Lucien Murray-Pitts <lucienmp_antispam@yahoo.com>
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Reported-by: Jan Kiszka <jan.kiszka@siemens.com>
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Signed-off-by: Luc Michel <luc.michel@greensocs.com>
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Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
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Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
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Message-id: 20190325110452.6756-1-luc.michel@greensocs.com
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Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
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Message-id: 20230322142902.69511-3-philmd@linaro.org
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[PMM: add #include since I cherry-picked this patch from the series]
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Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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---
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---
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gdbstub.c | 14 ++++++++++++--
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target/arm/gdbstub.c | 5 +++--
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1 file changed, 12 insertions(+), 2 deletions(-)
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1 file changed, 3 insertions(+), 2 deletions(-)
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diff --git a/gdbstub.c b/gdbstub.c
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diff --git a/target/arm/gdbstub.c b/target/arm/gdbstub.c
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index XXXXXXX..XXXXXXX 100644
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index XXXXXXX..XXXXXXX 100644
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--- a/gdbstub.c
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--- a/target/arm/gdbstub.c
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+++ b/gdbstub.c
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+++ b/target/arm/gdbstub.c
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@@ -XXX,XX +XXX,XX @@ static int gdb_handle_vcont(GDBState *s, const char *p)
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@@ -XXX,XX +XXX,XX @@
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uint32_t pid, tid;
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#include "cpu.h"
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GDBProcess *process;
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#include "exec/gdbstub.h"
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CPUState *cpu;
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#include "gdbstub/helpers.h"
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+ GDBThreadIdKind kind;
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+#include "sysemu/tcg.h"
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#ifdef CONFIG_USER_ONLY
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#include "internals.h"
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int max_cpus = 1; /* global variable max_cpus exists only in system mode */
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#include "cpregs.h"
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@@ -XXX,XX +XXX,XX @@ static int gdb_handle_vcont(GDBState *s, const char *p)
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@@ -XXX,XX +XXX,XX @@ void arm_cpu_register_gdb_regs_for_features(ARMCPU *cpu)
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goto out;
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2, "arm-vfp-sysregs.xml", 0);
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}
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}
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}
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- if (*p++ != ':') {
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- if (cpu_isar_feature(aa32_mve, cpu)) {
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+ if (*p == '\0' || *p == ';') {
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+ if (cpu_isar_feature(aa32_mve, cpu) && tcg_enabled()) {
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+ /*
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gdb_register_coprocessor(cs, mve_gdb_get_reg, mve_gdb_set_reg,
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+ * No thread specifier, action is on "all threads". The
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1, "arm-m-profile-mve.xml", 0);
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+ * specification is unclear regarding the process to act on. We
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}
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+ * choose all processes.
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@@ -XXX,XX +XXX,XX @@ void arm_cpu_register_gdb_regs_for_features(ARMCPU *cpu)
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+ */
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arm_gen_dynamic_sysreg_xml(cs, cs->gdb_num_regs),
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+ kind = GDB_ALL_PROCESSES;
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"system-registers.xml", 0);
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+ } else if (*p++ == ':') {
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+ kind = read_thread_id(p, &p, &pid, &tid);
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- if (arm_feature(env, ARM_FEATURE_M)) {
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+ } else {
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+ if (arm_feature(env, ARM_FEATURE_M) && tcg_enabled()) {
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res = -ENOTSUP;
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gdb_register_coprocessor(cs,
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goto out;
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arm_gdb_get_m_systemreg, arm_gdb_set_m_systemreg,
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}
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arm_gen_dynamic_m_systemreg_xml(cs, cs->gdb_num_regs),
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- switch (read_thread_id(p, &p, &pid, &tid)) {
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+ switch (kind) {
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case GDB_READ_THREAD_ERR:
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res = -EINVAL;
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goto out;
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--
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--
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2.20.1
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2.34.1
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diff view generated by jsdifflib