The second word has been loaded from the unincremented
address since the first commit.

Fixes: 44ac14b06fa
Reported-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/arm/translate-a64.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index 1959046343..dcdeb80176 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -2510,7 +2510,7 @@ static void gen_compare_and_swap_pair(DisasContext *s, int rs, int rt,
         tcg_gen_qemu_ld_i64(d1, clean_addr, memidx,
                             MO_64 | MO_ALIGN_16 | s->be_data);
         tcg_gen_addi_i64(a2, clean_addr, 8);
-        tcg_gen_qemu_ld_i64(d2, clean_addr, memidx, MO_64 | s->be_data);
+        tcg_gen_qemu_ld_i64(d2, a2, memidx, MO_64 | s->be_data);
 
         /* Compare the two words, also in memory order.  */
         tcg_gen_setcond_i64(TCG_COND_EQ, c1, d1, s1);
-- 
2.17.1

On Fri, 22 Mar 2019 at 23:43, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> The second word has been loaded from the unincremented
> address since the first commit.
>
> Fixes: 44ac14b06fa
> Reported-by: Alex Bennée <alex.bennee@linaro.org>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>  target/arm/translate-a64.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
> index 1959046343..dcdeb80176 100644
> --- a/target/arm/translate-a64.c
> +++ b/target/arm/translate-a64.c
> @@ -2510,7 +2510,7 @@ static void gen_compare_and_swap_pair(DisasContext *s, int rs, int rt,
>          tcg_gen_qemu_ld_i64(d1, clean_addr, memidx,
>                              MO_64 | MO_ALIGN_16 | s->be_data);
>          tcg_gen_addi_i64(a2, clean_addr, 8);
> -        tcg_gen_qemu_ld_i64(d2, clean_addr, memidx, MO_64 | s->be_data);
> +        tcg_gen_qemu_ld_i64(d2, a2, memidx, MO_64 | s->be_data);
>
>          /* Compare the two words, also in memory order.  */
>          tcg_gen_setcond_i64(TCG_COND_EQ, c1, d1, s1);
> --



Applied to target-arm.next, thanks.

-- PMM

Richard Henderson <richard.henderson@linaro.org> writes:

> The second word has been loaded from the unincremented
> address since the first commit.
>
> Fixes: 44ac14b06fa
> Reported-by: Alex Bennée <alex.bennee@linaro.org>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>  target/arm/translate-a64.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
> index 1959046343..dcdeb80176 100644
> --- a/target/arm/translate-a64.c
> +++ b/target/arm/translate-a64.c
> @@ -2510,7 +2510,7 @@ static void gen_compare_and_swap_pair(DisasContext *s, int rs, int rt,
>          tcg_gen_qemu_ld_i64(d1, clean_addr, memidx,
>                              MO_64 | MO_ALIGN_16 | s->be_data);
>          tcg_gen_addi_i64(a2, clean_addr, 8);
> -        tcg_gen_qemu_ld_i64(d2, clean_addr, memidx, MO_64 | s->be_data);
> +        tcg_gen_qemu_ld_i64(d2, a2, memidx, MO_64 | s->be_data);

The number of times my eyes must have glided over the addition and
didn't notice we never used it. You were right I should have stopped and
had that beer earlier ;-)

Tested-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>

--
Alex Bennée